17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5cc291a4cSgd * Common Development and Distribution License (the "License"). 6cc291a4cSgd * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22*da14cebeSEric Cheng * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate #ifndef _SYS_DMFE_IMPL_H 277c478bd9Sstevel@tonic-gate #define _SYS_DMFE_IMPL_H 287c478bd9Sstevel@tonic-gate 297c478bd9Sstevel@tonic-gate #ifdef __cplusplus 307c478bd9Sstevel@tonic-gate extern "C" { 317c478bd9Sstevel@tonic-gate #endif 327c478bd9Sstevel@tonic-gate 337c478bd9Sstevel@tonic-gate #include <sys/types.h> 347c478bd9Sstevel@tonic-gate #include <sys/stream.h> 357c478bd9Sstevel@tonic-gate #include <sys/strsun.h> 367c478bd9Sstevel@tonic-gate #include <sys/stat.h> 377c478bd9Sstevel@tonic-gate #include <sys/pci.h> 387c478bd9Sstevel@tonic-gate #include <sys/note.h> 397c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 407c478bd9Sstevel@tonic-gate #include <sys/kstat.h> 417c478bd9Sstevel@tonic-gate #include <sys/ethernet.h> 427c478bd9Sstevel@tonic-gate #include <sys/devops.h> 437c478bd9Sstevel@tonic-gate #include <sys/debug.h> 447c478bd9Sstevel@tonic-gate #include <sys/conf.h> 457c478bd9Sstevel@tonic-gate 467c478bd9Sstevel@tonic-gate #include <inet/common.h> 477c478bd9Sstevel@tonic-gate #include <inet/nd.h> 487c478bd9Sstevel@tonic-gate #include <inet/mi.h> 497c478bd9Sstevel@tonic-gate 50cc291a4cSgd #include <sys/vlan.h> 51cc291a4cSgd 527c478bd9Sstevel@tonic-gate #include <sys/dditypes.h> 537c478bd9Sstevel@tonic-gate #include <sys/ddi.h> 547c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 557c478bd9Sstevel@tonic-gate 567c478bd9Sstevel@tonic-gate #include <sys/miiregs.h> 57*da14cebeSEric Cheng #include <sys/mac_provider.h> 58cc291a4cSgd #include <sys/mac_ether.h> 595c1d0199Sgd #include "dmfe.h" 607c478bd9Sstevel@tonic-gate 61cc291a4cSgd #define DMFE_MAX_PKT_SIZE (VLAN_TAGSZ + ETHERMAX + ETHERFCSL) 627c478bd9Sstevel@tonic-gate 637c478bd9Sstevel@tonic-gate 647c478bd9Sstevel@tonic-gate #define DRIVER_NAME "dmfe" 657c478bd9Sstevel@tonic-gate 667c478bd9Sstevel@tonic-gate /* 677c478bd9Sstevel@tonic-gate * Describes the identity of a specific chip 687c478bd9Sstevel@tonic-gate */ 697c478bd9Sstevel@tonic-gate typedef struct { 707c478bd9Sstevel@tonic-gate uint16_t vendor; 717c478bd9Sstevel@tonic-gate uint16_t device; 727c478bd9Sstevel@tonic-gate uint8_t revision; 737c478bd9Sstevel@tonic-gate uint8_t spare; 747c478bd9Sstevel@tonic-gate } chip_id_t; 757c478bd9Sstevel@tonic-gate 767c478bd9Sstevel@tonic-gate /* 777c478bd9Sstevel@tonic-gate * Describes the state of a descriptor ring 787c478bd9Sstevel@tonic-gate * 797c478bd9Sstevel@tonic-gate * NOTE: n_free and next_busy are only used for the Tx descriptors 807c478bd9Sstevel@tonic-gate * and are not valid on the receive side. 817c478bd9Sstevel@tonic-gate */ 827c478bd9Sstevel@tonic-gate typedef struct { 837c478bd9Sstevel@tonic-gate uint32_t n_desc; /* # of descriptors */ 847c478bd9Sstevel@tonic-gate uint32_t n_free; /* # of free descriptors */ 857c478bd9Sstevel@tonic-gate uint32_t next_free; /* next index to use/check */ 867c478bd9Sstevel@tonic-gate uint32_t next_busy; /* next index to reclaim */ 877c478bd9Sstevel@tonic-gate } desc_state_t; 887c478bd9Sstevel@tonic-gate 897c478bd9Sstevel@tonic-gate /* 907c478bd9Sstevel@tonic-gate * Describes one chunk of allocated DMA-able memory 917c478bd9Sstevel@tonic-gate */ 927c478bd9Sstevel@tonic-gate typedef struct { 937c478bd9Sstevel@tonic-gate ddi_dma_handle_t dma_hdl; 947c478bd9Sstevel@tonic-gate ddi_acc_handle_t acc_hdl; 957c478bd9Sstevel@tonic-gate size_t alength; /* allocated size */ 967c478bd9Sstevel@tonic-gate caddr_t mem_va; /* CPU VA of memory */ 977c478bd9Sstevel@tonic-gate uint32_t spare1; 987c478bd9Sstevel@tonic-gate uint32_t mem_dvma; /* DVMA addr of memory */ 997c478bd9Sstevel@tonic-gate caddr_t setup_va; 1007c478bd9Sstevel@tonic-gate uint32_t spare2; 1017c478bd9Sstevel@tonic-gate uint32_t setup_dvma; 1027c478bd9Sstevel@tonic-gate int spare3; 1037c478bd9Sstevel@tonic-gate int ncookies; 1047c478bd9Sstevel@tonic-gate } dma_area_t; 1057c478bd9Sstevel@tonic-gate 1067c478bd9Sstevel@tonic-gate /* 1077c478bd9Sstevel@tonic-gate * Named Data (ND) Parameter Management Structure 1087c478bd9Sstevel@tonic-gate */ 1097c478bd9Sstevel@tonic-gate typedef struct { 1107c478bd9Sstevel@tonic-gate uint32_t ndp_info; 1117c478bd9Sstevel@tonic-gate uint32_t ndp_min; 1127c478bd9Sstevel@tonic-gate uint32_t ndp_max; 1137c478bd9Sstevel@tonic-gate uint32_t ndp_val; 1147c478bd9Sstevel@tonic-gate char *ndp_name; 1155c1d0199Sgd struct dmfe *ndp_dmfe; 1167c478bd9Sstevel@tonic-gate } nd_param_t; 1177c478bd9Sstevel@tonic-gate 1187c478bd9Sstevel@tonic-gate /* 1197c478bd9Sstevel@tonic-gate * NDD parameter indexes, divided into: 1207c478bd9Sstevel@tonic-gate * 1217c478bd9Sstevel@tonic-gate * read-only parameters describing the link state 1227c478bd9Sstevel@tonic-gate * read-write parameters controlling the advertised link capabilities 1237c478bd9Sstevel@tonic-gate * read-only parameters describing the device link capabilities 1247c478bd9Sstevel@tonic-gate * read-only parameters describing the link-partner's link capabilities 1257c478bd9Sstevel@tonic-gate */ 1267c478bd9Sstevel@tonic-gate enum { 1277c478bd9Sstevel@tonic-gate PARAM_LINK_STATUS, 1287c478bd9Sstevel@tonic-gate PARAM_LINK_SPEED, 1297c478bd9Sstevel@tonic-gate PARAM_LINK_MODE, 1307c478bd9Sstevel@tonic-gate 1317c478bd9Sstevel@tonic-gate PARAM_ADV_AUTONEG_CAP, 1327c478bd9Sstevel@tonic-gate PARAM_ADV_100T4_CAP, 1337c478bd9Sstevel@tonic-gate PARAM_ADV_100FDX_CAP, 1347c478bd9Sstevel@tonic-gate PARAM_ADV_100HDX_CAP, 1357c478bd9Sstevel@tonic-gate PARAM_ADV_10FDX_CAP, 1367c478bd9Sstevel@tonic-gate PARAM_ADV_10HDX_CAP, 137cc291a4cSgd PARAM_ADV_REMFAULT, 1387c478bd9Sstevel@tonic-gate 1397c478bd9Sstevel@tonic-gate PARAM_BMSR_AUTONEG_CAP, 1407c478bd9Sstevel@tonic-gate PARAM_BMSR_100T4_CAP, 1417c478bd9Sstevel@tonic-gate PARAM_BMSR_100FDX_CAP, 1427c478bd9Sstevel@tonic-gate PARAM_BMSR_100HDX_CAP, 1437c478bd9Sstevel@tonic-gate PARAM_BMSR_10FDX_CAP, 1447c478bd9Sstevel@tonic-gate PARAM_BMSR_10HDX_CAP, 1457c478bd9Sstevel@tonic-gate PARAM_BMSR_REMFAULT, 1467c478bd9Sstevel@tonic-gate 1477c478bd9Sstevel@tonic-gate PARAM_LP_AUTONEG_CAP, 1487c478bd9Sstevel@tonic-gate PARAM_LP_100T4_CAP, 1497c478bd9Sstevel@tonic-gate PARAM_LP_100FDX_CAP, 1507c478bd9Sstevel@tonic-gate PARAM_LP_100HDX_CAP, 1517c478bd9Sstevel@tonic-gate PARAM_LP_10FDX_CAP, 1527c478bd9Sstevel@tonic-gate PARAM_LP_10HDX_CAP, 1537c478bd9Sstevel@tonic-gate PARAM_LP_REMFAULT, 1547c478bd9Sstevel@tonic-gate 1557c478bd9Sstevel@tonic-gate PARAM_COUNT 1567c478bd9Sstevel@tonic-gate }; 1577c478bd9Sstevel@tonic-gate 1587c478bd9Sstevel@tonic-gate /* 1597c478bd9Sstevel@tonic-gate * Indexes into the driver-specific kstats, divided into: 1607c478bd9Sstevel@tonic-gate * 1617c478bd9Sstevel@tonic-gate * cyclic activity 1627c478bd9Sstevel@tonic-gate * reasons for waking the factotum 1637c478bd9Sstevel@tonic-gate * the factotum's activities 1647c478bd9Sstevel@tonic-gate * link state updates 1657c478bd9Sstevel@tonic-gate * MII-level register values 1667c478bd9Sstevel@tonic-gate */ 1677c478bd9Sstevel@tonic-gate enum { 1687c478bd9Sstevel@tonic-gate KS_CYCLIC_RUN, 1697c478bd9Sstevel@tonic-gate 1707c478bd9Sstevel@tonic-gate KS_TICK_LINK_STATE, 1717c478bd9Sstevel@tonic-gate KS_TICK_LINK_POLL, 172cc291a4cSgd KS_INTERRUPT, 1737c478bd9Sstevel@tonic-gate KS_TX_STALL, 1747c478bd9Sstevel@tonic-gate KS_CHIP_ERROR, 1757c478bd9Sstevel@tonic-gate 1767c478bd9Sstevel@tonic-gate KS_FACTOTUM_RUN, 1777c478bd9Sstevel@tonic-gate KS_RECOVERY, 1787c478bd9Sstevel@tonic-gate KS_LINK_CHECK, 1797c478bd9Sstevel@tonic-gate 1807c478bd9Sstevel@tonic-gate KS_LINK_UP_CNT, 1817c478bd9Sstevel@tonic-gate KS_LINK_DROP_CNT, 1827c478bd9Sstevel@tonic-gate 1837c478bd9Sstevel@tonic-gate KS_MIIREG_BMSR, 1847c478bd9Sstevel@tonic-gate KS_MIIREG_ANAR, 1857c478bd9Sstevel@tonic-gate KS_MIIREG_ANLPAR, 1867c478bd9Sstevel@tonic-gate KS_MIIREG_ANER, 1877c478bd9Sstevel@tonic-gate KS_MIIREG_DSCSR, 1887c478bd9Sstevel@tonic-gate 1897c478bd9Sstevel@tonic-gate KS_DRV_COUNT 1907c478bd9Sstevel@tonic-gate }; 1917c478bd9Sstevel@tonic-gate 1927c478bd9Sstevel@tonic-gate /* 1937c478bd9Sstevel@tonic-gate * Actual state of the DM9102A chip 1947c478bd9Sstevel@tonic-gate */ 1957c478bd9Sstevel@tonic-gate enum chip_state { 1967c478bd9Sstevel@tonic-gate CHIP_ERROR = -1, /* error, need reset */ 1977c478bd9Sstevel@tonic-gate CHIP_UNKNOWN, /* Initial state only */ 1987c478bd9Sstevel@tonic-gate CHIP_RESET, /* reset, need init */ 1997c478bd9Sstevel@tonic-gate CHIP_STOPPED, /* Tx/Rx stopped */ 2007c478bd9Sstevel@tonic-gate CHIP_TX_ONLY, /* Tx (re)started */ 2017c478bd9Sstevel@tonic-gate CHIP_TX_RX, /* Tx & Rx (re)started */ 2027c478bd9Sstevel@tonic-gate CHIP_RUNNING /* with interrupts */ 2037c478bd9Sstevel@tonic-gate }; 2047c478bd9Sstevel@tonic-gate 2057c478bd9Sstevel@tonic-gate /* 206cc291a4cSgd * Required state according to MAC 2077c478bd9Sstevel@tonic-gate */ 208cc291a4cSgd enum mac_state { 209cc291a4cSgd DMFE_MAC_UNKNOWN, 210cc291a4cSgd DMFE_MAC_RESET, 211cc291a4cSgd DMFE_MAC_STOPPED, 212cc291a4cSgd DMFE_MAC_STARTED 2137c478bd9Sstevel@tonic-gate }; 2147c478bd9Sstevel@tonic-gate 2157c478bd9Sstevel@tonic-gate /* 2167c478bd9Sstevel@tonic-gate * (Internal) return values from ioctl subroutines 2177c478bd9Sstevel@tonic-gate */ 2187c478bd9Sstevel@tonic-gate enum ioc_reply { 2197c478bd9Sstevel@tonic-gate IOC_INVAL = -1, /* bad, NAK with EINVAL */ 2207c478bd9Sstevel@tonic-gate IOC_DONE, /* OK, reply sent */ 2217c478bd9Sstevel@tonic-gate IOC_REPLY, /* OK, just send reply */ 2227c478bd9Sstevel@tonic-gate IOC_ACK, /* OK, just send ACK */ 2237c478bd9Sstevel@tonic-gate IOC_RESTART, /* OK, restart & reply */ 2247c478bd9Sstevel@tonic-gate IOC_RESTART_ACK /* OK, restart & ACK */ 2257c478bd9Sstevel@tonic-gate }; 2267c478bd9Sstevel@tonic-gate 2277c478bd9Sstevel@tonic-gate /* 2287c478bd9Sstevel@tonic-gate * Per-instance soft-state structure 2297c478bd9Sstevel@tonic-gate */ 2305c1d0199Sgd typedef struct dmfe { 2317c478bd9Sstevel@tonic-gate /* 2327c478bd9Sstevel@tonic-gate * These fields are set by attach() and unchanged thereafter ... 2337c478bd9Sstevel@tonic-gate */ 2347c478bd9Sstevel@tonic-gate dev_info_t *devinfo; /* device instance */ 235cc291a4cSgd mac_handle_t mh; /* MAC instance data */ 2367c478bd9Sstevel@tonic-gate ddi_acc_handle_t io_handle; /* DDI I/O handle */ 2377c478bd9Sstevel@tonic-gate caddr_t io_reg; /* mapped registers */ 2387c478bd9Sstevel@tonic-gate 2397c478bd9Sstevel@tonic-gate uint32_t debug; /* per-instance debug */ 2407c478bd9Sstevel@tonic-gate uint32_t progress; /* attach tracking */ 2417c478bd9Sstevel@tonic-gate chip_id_t chipid; 2427c478bd9Sstevel@tonic-gate uint8_t vendor_addr[ETHERADDRL]; 2437c478bd9Sstevel@tonic-gate char ifname[12]; /* "dmfeXXXX" */ 2447c478bd9Sstevel@tonic-gate 2457c478bd9Sstevel@tonic-gate dma_area_t tx_desc; /* transmit descriptors */ 2467c478bd9Sstevel@tonic-gate dma_area_t tx_buff; /* transmit buffers */ 2477c478bd9Sstevel@tonic-gate dma_area_t rx_desc; /* receive descriptors */ 2487c478bd9Sstevel@tonic-gate dma_area_t rx_buff; /* receive buffers */ 2497c478bd9Sstevel@tonic-gate 250dd4eeefdSeota ddi_periodic_t cycid; /* periodical callback */ 2517c478bd9Sstevel@tonic-gate ddi_softintr_t factotum_id; /* identity of factotum */ 2527c478bd9Sstevel@tonic-gate ddi_iblock_cookie_t iblk; 2537c478bd9Sstevel@tonic-gate 2547c478bd9Sstevel@tonic-gate /* 2557c478bd9Sstevel@tonic-gate * Locks: 2567c478bd9Sstevel@tonic-gate * 2577c478bd9Sstevel@tonic-gate * <milock> is used only by the MII (PHY) level code, to ensure 2587c478bd9Sstevel@tonic-gate * exclusive access during the bit-twiddling needed to send 2597c478bd9Sstevel@tonic-gate * signals along the MII serial bus. These operations are 2607c478bd9Sstevel@tonic-gate * --S--L--O--W-- so we keep this lock separate, so that 2617c478bd9Sstevel@tonic-gate * faster operations (e.g. interrupts) aren't delayed by 2627c478bd9Sstevel@tonic-gate * waiting for it. 2637c478bd9Sstevel@tonic-gate * 2647c478bd9Sstevel@tonic-gate * <oplock> is a general "outer" lock, protecting most r/w data 2657c478bd9Sstevel@tonic-gate * and chip state. It is also acquired by the interrupt 2667c478bd9Sstevel@tonic-gate * handler. 2677c478bd9Sstevel@tonic-gate * 2687c478bd9Sstevel@tonic-gate * <rxlock> is used to protect the Rx-side buffers, descriptors, 2697c478bd9Sstevel@tonic-gate * and statistics during a single call to dmfe_getp(). 2707c478bd9Sstevel@tonic-gate * This is called from inside the interrupt handler, but 2717c478bd9Sstevel@tonic-gate * <oplock> is not held across this call. 2727c478bd9Sstevel@tonic-gate * 2737c478bd9Sstevel@tonic-gate * <txlock> is an "inner" lock, and protects only the Tx-side 2747c478bd9Sstevel@tonic-gate * data below and in the ring buffers/descriptors. The 2757c478bd9Sstevel@tonic-gate * Tx-side code uses only this lock, avoiding contention 2767c478bd9Sstevel@tonic-gate * with the receive-side code. 2777c478bd9Sstevel@tonic-gate * 2787c478bd9Sstevel@tonic-gate * Any of the locks can be acquired singly, but where multiple 2797c478bd9Sstevel@tonic-gate * locks are acquired, they *must* be in the order: 2807c478bd9Sstevel@tonic-gate * 2817c478bd9Sstevel@tonic-gate * milock >>> oplock >>> rxlock >>> txlock. 2827c478bd9Sstevel@tonic-gate * 2837c478bd9Sstevel@tonic-gate * *None* of these locks may be held across calls out to the 284cc291a4cSgd * MAC routines mac_rx() or mac_tx_notify(); MAC locks must 285cc291a4cSgd * be regarded as *outermost* locks in all cases, as they will 2867c478bd9Sstevel@tonic-gate * already be held before calling the ioctl() or get_stats() 2877c478bd9Sstevel@tonic-gate * entry points - which then have to acquire multiple locks, in 2887c478bd9Sstevel@tonic-gate * the order described here. 2897c478bd9Sstevel@tonic-gate */ 2907c478bd9Sstevel@tonic-gate kmutex_t milock[1]; 2917c478bd9Sstevel@tonic-gate kmutex_t oplock[1]; 2927c478bd9Sstevel@tonic-gate kmutex_t rxlock[1]; 2937c478bd9Sstevel@tonic-gate kmutex_t txlock[1]; 2947c478bd9Sstevel@tonic-gate 2957c478bd9Sstevel@tonic-gate /* 2967c478bd9Sstevel@tonic-gate * DMFE Extended kstats, protected by <oplock> 2977c478bd9Sstevel@tonic-gate */ 2987c478bd9Sstevel@tonic-gate kstat_t *ksp_drv; 2997c478bd9Sstevel@tonic-gate kstat_named_t *knp_drv; 3007c478bd9Sstevel@tonic-gate 3017c478bd9Sstevel@tonic-gate /* 3027c478bd9Sstevel@tonic-gate * GLD statistics; the prefix tells which lock each is protected by. 3037c478bd9Sstevel@tonic-gate */ 3047c478bd9Sstevel@tonic-gate uint64_t op_stats_speed; 305cc291a4cSgd uint64_t op_stats_duplex; 306cc291a4cSgd 307cc291a4cSgd uint64_t rx_stats_ipackets; 308cc291a4cSgd uint64_t rx_stats_multi; 309cc291a4cSgd uint64_t rx_stats_bcast; 310cc291a4cSgd uint64_t rx_stats_ierrors; 311cc291a4cSgd uint64_t rx_stats_norcvbuf; 312cc291a4cSgd uint64_t rx_stats_rbytes; 313cc291a4cSgd uint64_t rx_stats_missed; 314cc291a4cSgd uint64_t rx_stats_align; 315cc291a4cSgd uint64_t rx_stats_fcs; 316cc291a4cSgd uint64_t rx_stats_toolong; 317cc291a4cSgd uint64_t rx_stats_macrcv_errors; 318cc291a4cSgd uint64_t rx_stats_overflow; 319cc291a4cSgd uint64_t rx_stats_short; 320cc291a4cSgd 321cc291a4cSgd uint64_t tx_stats_oerrors; 322cc291a4cSgd uint64_t tx_stats_opackets; 323cc291a4cSgd uint64_t tx_stats_multi; 324cc291a4cSgd uint64_t tx_stats_bcast; 325cc291a4cSgd uint64_t tx_stats_obytes; 326cc291a4cSgd uint64_t tx_stats_collisions; 327cc291a4cSgd uint64_t tx_stats_nocarrier; 328cc291a4cSgd uint64_t tx_stats_xmtlatecoll; 329cc291a4cSgd uint64_t tx_stats_excoll; 330cc291a4cSgd uint64_t tx_stats_macxmt_errors; 3310d2a8e5eSgd uint64_t tx_stats_jabber; 332cc291a4cSgd uint64_t tx_stats_defer; 333cc291a4cSgd uint64_t tx_stats_first_coll; 334cc291a4cSgd uint64_t tx_stats_multi_coll; 335cc291a4cSgd uint64_t tx_stats_underflow; 3367c478bd9Sstevel@tonic-gate 3377c478bd9Sstevel@tonic-gate /* 3387c478bd9Sstevel@tonic-gate * These two sets of desciptors are manipulated during 3397c478bd9Sstevel@tonic-gate * packet receive/transmit respectively. 3407c478bd9Sstevel@tonic-gate */ 3417c478bd9Sstevel@tonic-gate desc_state_t rx; /* describes Rx ring */ 3427c478bd9Sstevel@tonic-gate desc_state_t tx; /* describes Tx ring */ 3437c478bd9Sstevel@tonic-gate 3447c478bd9Sstevel@tonic-gate /* 3457c478bd9Sstevel@tonic-gate * Miscellaneous Tx-side variables (protected by txlock) 3467c478bd9Sstevel@tonic-gate */ 3477c478bd9Sstevel@tonic-gate uint32_t tx_pending_tix; /* tix since reclaim */ 348cc291a4cSgd uint8_t *tx_mcast; /* bitmask: pkt is mcast */ 349cc291a4cSgd uint8_t *tx_bcast; /* bitmask: pkt is bcast */ 3507c478bd9Sstevel@tonic-gate 3517c478bd9Sstevel@tonic-gate /* 3527c478bd9Sstevel@tonic-gate * Miscellaneous operating variables (protected by oplock) 3537c478bd9Sstevel@tonic-gate */ 3547c478bd9Sstevel@tonic-gate uint32_t link_poll_tix; /* tix until link poll */ 3557c478bd9Sstevel@tonic-gate uint16_t factotum_flag; /* callback pending */ 3567c478bd9Sstevel@tonic-gate uint16_t need_setup; /* send-setup pending */ 3577c478bd9Sstevel@tonic-gate uint32_t opmode; /* operating mode shadow */ 3587c478bd9Sstevel@tonic-gate uint32_t imask; /* interrupt mask shadow */ 359cc291a4cSgd enum mac_state mac_state; /* RESET/STOPPED/STARTED */ 3607c478bd9Sstevel@tonic-gate enum chip_state chip_state; /* see above */ 3615c1d0199Sgd boolean_t link_reset; /* ndd needs link reset */ 3627c478bd9Sstevel@tonic-gate 3637c478bd9Sstevel@tonic-gate /* 3647c478bd9Sstevel@tonic-gate * Physical link state data (protected by oplock) 3657c478bd9Sstevel@tonic-gate */ 3667c478bd9Sstevel@tonic-gate link_state_t link_state; /* See above */ 3677c478bd9Sstevel@tonic-gate 3687c478bd9Sstevel@tonic-gate /* 3697c478bd9Sstevel@tonic-gate * PHYceiver state data (protected by milock) 3707c478bd9Sstevel@tonic-gate */ 371cc291a4cSgd int phy_inuse; 3727c478bd9Sstevel@tonic-gate int phy_addr; /* should be -1! */ 3737c478bd9Sstevel@tonic-gate uint16_t phy_control; /* last value written */ 3747c478bd9Sstevel@tonic-gate uint16_t phy_anar_w; /* last value written */ 3757c478bd9Sstevel@tonic-gate uint16_t phy_anar_r; /* latest value read */ 3767c478bd9Sstevel@tonic-gate uint16_t phy_anlpar; /* latest value read */ 3777c478bd9Sstevel@tonic-gate uint16_t phy_aner; 3787c478bd9Sstevel@tonic-gate uint16_t phy_dscsr; /* latest value read */ 3797c478bd9Sstevel@tonic-gate uint16_t phy_bmsr; /* latest value read */ 3807c478bd9Sstevel@tonic-gate uint16_t rsvd; /* reserved for future use */ 3817c478bd9Sstevel@tonic-gate uint32_t phy_bmsr_lbolt; /* time of BMSR change */ 3827c478bd9Sstevel@tonic-gate uint32_t phy_id; /* vendor+device (OUI) */ 3837c478bd9Sstevel@tonic-gate 3847c478bd9Sstevel@tonic-gate /* 3857c478bd9Sstevel@tonic-gate * Current Ethernet address & multicast map ... 3867c478bd9Sstevel@tonic-gate */ 3877c478bd9Sstevel@tonic-gate uint8_t curr_addr[ETHERADDRL]; 3887c478bd9Sstevel@tonic-gate uint8_t mcast_refs[MCASTBUF_SIZE]; 3897c478bd9Sstevel@tonic-gate boolean_t addr_set; 3907c478bd9Sstevel@tonic-gate boolean_t update_phy; /* Need to update_phy? */ 3917c478bd9Sstevel@tonic-gate 3927c478bd9Sstevel@tonic-gate /* 3937c478bd9Sstevel@tonic-gate * NDD parameters 3947c478bd9Sstevel@tonic-gate */ 3957c478bd9Sstevel@tonic-gate caddr_t nd_data_p; 3967c478bd9Sstevel@tonic-gate nd_param_t nd_params[PARAM_COUNT]; 3977c478bd9Sstevel@tonic-gate 3987c478bd9Sstevel@tonic-gate /* 3997c478bd9Sstevel@tonic-gate * Guard element used to check data integrity 4007c478bd9Sstevel@tonic-gate */ 4017c478bd9Sstevel@tonic-gate uint64_t dmfe_guard; 4027c478bd9Sstevel@tonic-gate } dmfe_t; 4037c478bd9Sstevel@tonic-gate 4047c478bd9Sstevel@tonic-gate /* 4057c478bd9Sstevel@tonic-gate * 'Progress' bit flags ... 4067c478bd9Sstevel@tonic-gate */ 4077c478bd9Sstevel@tonic-gate #define PROGRESS_CONFIG 0x0001 /* config space initialised */ 4087c478bd9Sstevel@tonic-gate #define PROGRESS_NDD 0x0002 /* NDD parameters set up */ 4097c478bd9Sstevel@tonic-gate #define PROGRESS_REGS 0x0004 /* registers mapped */ 4107c478bd9Sstevel@tonic-gate #define PROGRESS_BUFS 0x0008 /* buffers allocated */ 4117c478bd9Sstevel@tonic-gate #define PROGRESS_SOFTINT 0x0010 /* softint registered */ 4127c478bd9Sstevel@tonic-gate #define PROGRESS_HWINT 0x0020 /* h/w interrupt registered */ 4137c478bd9Sstevel@tonic-gate 4147c478bd9Sstevel@tonic-gate /* 4157c478bd9Sstevel@tonic-gate * Type of transceiver currently in use 4167c478bd9Sstevel@tonic-gate */ 4177c478bd9Sstevel@tonic-gate #define PHY_TYPE_UNDEFINED 0 4187c478bd9Sstevel@tonic-gate #define PHY_TYPE_10BASE_MNCHSTR 2 4197c478bd9Sstevel@tonic-gate #define PHY_TYPE_100BASE_X 4 4207c478bd9Sstevel@tonic-gate 4217c478bd9Sstevel@tonic-gate /* 4227c478bd9Sstevel@tonic-gate * Shorthand for the NDD parameters 4237c478bd9Sstevel@tonic-gate */ 4247c478bd9Sstevel@tonic-gate #define param_linkup nd_params[PARAM_LINK_STATUS].ndp_val 4257c478bd9Sstevel@tonic-gate #define param_speed nd_params[PARAM_LINK_SPEED].ndp_val 4267c478bd9Sstevel@tonic-gate #define param_duplex nd_params[PARAM_LINK_MODE].ndp_val 4277c478bd9Sstevel@tonic-gate #define param_autoneg nd_params[PARAM_ADV_AUTONEG_CAP].ndp_val 4287c478bd9Sstevel@tonic-gate #define param_anar_100T4 nd_params[PARAM_ADV_100T4_CAP].ndp_val 4297c478bd9Sstevel@tonic-gate #define param_anar_100fdx nd_params[PARAM_ADV_100FDX_CAP].ndp_val 4307c478bd9Sstevel@tonic-gate #define param_anar_100hdx nd_params[PARAM_ADV_100HDX_CAP].ndp_val 4317c478bd9Sstevel@tonic-gate #define param_anar_10fdx nd_params[PARAM_ADV_10FDX_CAP].ndp_val 4327c478bd9Sstevel@tonic-gate #define param_anar_10hdx nd_params[PARAM_ADV_10HDX_CAP].ndp_val 433cc291a4cSgd #define param_anar_remfault nd_params[PARAM_ADV_REMFAULT].ndp_val 4347c478bd9Sstevel@tonic-gate #define param_bmsr_autoneg nd_params[PARAM_BMSR_AUTONEG_CAP].ndp_val 4357c478bd9Sstevel@tonic-gate #define param_bmsr_100T4 nd_params[PARAM_BMSR_100T4_CAP].ndp_val 4367c478bd9Sstevel@tonic-gate #define param_bmsr_100fdx nd_params[PARAM_BMSR_100FDX_CAP].ndp_val 4377c478bd9Sstevel@tonic-gate #define param_bmsr_100hdx nd_params[PARAM_BMSR_100HDX_CAP].ndp_val 4387c478bd9Sstevel@tonic-gate #define param_bmsr_10fdx nd_params[PARAM_BMSR_10FDX_CAP].ndp_val 4397c478bd9Sstevel@tonic-gate #define param_bmsr_10hdx nd_params[PARAM_BMSR_10HDX_CAP].ndp_val 4407c478bd9Sstevel@tonic-gate #define param_bmsr_remfault nd_params[PARAM_BMSR_REMFAULT].ndp_val 4417c478bd9Sstevel@tonic-gate #define param_lp_autoneg nd_params[PARAM_LP_AUTONEG_CAP].ndp_val 4427c478bd9Sstevel@tonic-gate #define param_lp_100T4 nd_params[PARAM_LP_100T4_CAP].ndp_val 4437c478bd9Sstevel@tonic-gate #define param_lp_100fdx nd_params[PARAM_LP_100FDX_CAP].ndp_val 4447c478bd9Sstevel@tonic-gate #define param_lp_100hdx nd_params[PARAM_LP_100HDX_CAP].ndp_val 4457c478bd9Sstevel@tonic-gate #define param_lp_10fdx nd_params[PARAM_LP_10FDX_CAP].ndp_val 4467c478bd9Sstevel@tonic-gate #define param_lp_10hdx nd_params[PARAM_LP_10HDX_CAP].ndp_val 4477c478bd9Sstevel@tonic-gate #define param_lp_remfault nd_params[PARAM_LP_REMFAULT].ndp_val 4487c478bd9Sstevel@tonic-gate 4497c478bd9Sstevel@tonic-gate /* 4507c478bd9Sstevel@tonic-gate * Sync a DMA area described by a dma_area_t 4517c478bd9Sstevel@tonic-gate */ 4527c478bd9Sstevel@tonic-gate #define DMA_SYNC(descp, flag) ((void) ddi_dma_sync((descp)->dma_hdl, \ 4537c478bd9Sstevel@tonic-gate 0, (descp)->alength, flag)) 4547c478bd9Sstevel@tonic-gate 4557c478bd9Sstevel@tonic-gate /* 4567c478bd9Sstevel@tonic-gate * Next value of a cyclic index 4577c478bd9Sstevel@tonic-gate */ 4587c478bd9Sstevel@tonic-gate #define NEXT(index, limit) ((index)+1 < (limit) ? (index)+1 : 0); 4597c478bd9Sstevel@tonic-gate 4607c478bd9Sstevel@tonic-gate /* 4617c478bd9Sstevel@tonic-gate * Utility Macros 4627c478bd9Sstevel@tonic-gate */ 4637c478bd9Sstevel@tonic-gate #define U32TOPTR(x) ((void *)(uintptr_t)(uint32_t)(x)) 4647c478bd9Sstevel@tonic-gate #define PTRTOU32(x) ((uint32_t)(uintptr_t)(void *)(x)) 4657c478bd9Sstevel@tonic-gate 4667c478bd9Sstevel@tonic-gate /* 4677c478bd9Sstevel@tonic-gate * Copy an ethernet address 4687c478bd9Sstevel@tonic-gate */ 4697c478bd9Sstevel@tonic-gate #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 4707c478bd9Sstevel@tonic-gate #define MII_KS_GET(dmfep, id) \ 4717c478bd9Sstevel@tonic-gate (((dmfep)->knp_mii) ? ((dmfep)->knp_mii)[id].value.ui32 : 0) 4727c478bd9Sstevel@tonic-gate 4737c478bd9Sstevel@tonic-gate #define MII_KS_SET(dmfep, id, val) \ 4747c478bd9Sstevel@tonic-gate do { \ 4757c478bd9Sstevel@tonic-gate if ((dmfep)->knp_mii != NULL) \ 4767c478bd9Sstevel@tonic-gate ((dmfep)->knp_mii)[id].value.ui32 = (val); \ 4777c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 4787c478bd9Sstevel@tonic-gate } while (0) 4797c478bd9Sstevel@tonic-gate 4807c478bd9Sstevel@tonic-gate #define MII_KS_INC(dmfep, id) \ 4817c478bd9Sstevel@tonic-gate do { \ 4827c478bd9Sstevel@tonic-gate if ((dmfep)->knp_mii != NULL) \ 4837c478bd9Sstevel@tonic-gate ((dmfep)->knp_mii)[id].value.ui32 += 1; \ 4847c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 4857c478bd9Sstevel@tonic-gate } while (0) 4867c478bd9Sstevel@tonic-gate 4877c478bd9Sstevel@tonic-gate /* 4887c478bd9Sstevel@tonic-gate * Get/set/increment a (64-bit) driver-private kstat 4897c478bd9Sstevel@tonic-gate */ 4907c478bd9Sstevel@tonic-gate #define DRV_KS_GET(dmfep, id) \ 4917c478bd9Sstevel@tonic-gate (((dmfep)->knp_drv) ? ((dmfep)->knp_drv)[id].value.ui64 : 0) 4927c478bd9Sstevel@tonic-gate 4937c478bd9Sstevel@tonic-gate #define DRV_KS_SET(dmfep, id, val) \ 4947c478bd9Sstevel@tonic-gate do { \ 4957c478bd9Sstevel@tonic-gate if ((dmfep)->knp_drv) \ 4967c478bd9Sstevel@tonic-gate ((dmfep)->knp_drv)[id].value.ui64 = (val); \ 4977c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 4987c478bd9Sstevel@tonic-gate } while (0) 4997c478bd9Sstevel@tonic-gate 5007c478bd9Sstevel@tonic-gate #define DRV_KS_INC(dmfep, id) \ 5017c478bd9Sstevel@tonic-gate do { \ 5027c478bd9Sstevel@tonic-gate if ((dmfep)->knp_drv) \ 5037c478bd9Sstevel@tonic-gate ((dmfep)->knp_drv)[id].value.ui64 += 1; \ 5047c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 5057c478bd9Sstevel@tonic-gate } while (0) 5067c478bd9Sstevel@tonic-gate 5077c478bd9Sstevel@tonic-gate /* 5087c478bd9Sstevel@tonic-gate * Bit test macros, returning boolean_t values 5097c478bd9Sstevel@tonic-gate */ 5105c1d0199Sgd #define BIS(w, b) (((w) & (b)) != 0) 5117c478bd9Sstevel@tonic-gate #define BIC(w, b) !BIS(w, b) 5127c478bd9Sstevel@tonic-gate 5137c478bd9Sstevel@tonic-gate #define DMFE_GUARD 0x1919603003090218 5147c478bd9Sstevel@tonic-gate 5157c478bd9Sstevel@tonic-gate /* 5167c478bd9Sstevel@tonic-gate * 'Debug' bit flags ... 5177c478bd9Sstevel@tonic-gate */ 5187c478bd9Sstevel@tonic-gate #define DMFE_DBG_TRACE 0x0001 /* general flow tracing */ 5197c478bd9Sstevel@tonic-gate #define DMFE_DBG_REGS 0x0002 /* low-level accesses */ 5207c478bd9Sstevel@tonic-gate #define DMFE_DBG_RECV 0x0004 /* receive-side code */ 5217c478bd9Sstevel@tonic-gate #define DMFE_DBG_SEND 0x0008 /* packet-send code */ 5227c478bd9Sstevel@tonic-gate #define DMFE_DBG_ADDR 0x0010 /* address-setting code */ 5237c478bd9Sstevel@tonic-gate #define DMFE_DBG_GLD 0x0020 /* GLD entry points */ 5247c478bd9Sstevel@tonic-gate #define DMFE_DBG_FACT 0x0040 /* factotum (softint) */ 5257c478bd9Sstevel@tonic-gate #define DMFE_DBG_TICK 0x0080 /* GPT ticker */ 5267c478bd9Sstevel@tonic-gate #define DMFE_DBG_INT 0x0100 /* interrupt handler */ 5277c478bd9Sstevel@tonic-gate #define DMFE_DBG_STATS 0x0200 /* statistics */ 5287c478bd9Sstevel@tonic-gate #define DMFE_DBG_IOCTL 0x0400 /* ioctl/loopback code */ 5297c478bd9Sstevel@tonic-gate #define DMFE_DBG_INIT 0x0800 /* initialisation */ 5307c478bd9Sstevel@tonic-gate #define DMFE_DBG_MII 0x1000 /* low-level MII/PHY */ 5317c478bd9Sstevel@tonic-gate #define DMFE_DBG_LINK 0x2000 /* Link status check */ 5327c478bd9Sstevel@tonic-gate #define DMFE_DBG_NDD 0x4000 /* NDD parameters */ 5337c478bd9Sstevel@tonic-gate 5347c478bd9Sstevel@tonic-gate /* 5357c478bd9Sstevel@tonic-gate * Debugging ... 5367c478bd9Sstevel@tonic-gate */ 537cc291a4cSgd #if defined(DEBUG) || defined(lint) 5387c478bd9Sstevel@tonic-gate #define DMFEDEBUG 1 5397c478bd9Sstevel@tonic-gate #else 5407c478bd9Sstevel@tonic-gate #define DMFEDEBUG 0 5417c478bd9Sstevel@tonic-gate #endif 5427c478bd9Sstevel@tonic-gate 5437c478bd9Sstevel@tonic-gate #if DMFEDEBUG 5447c478bd9Sstevel@tonic-gate 5457c478bd9Sstevel@tonic-gate extern uint32_t dmfe_debug; 5467c478bd9Sstevel@tonic-gate extern void (*dmfe_gdb())(const char *fmt, ...); 5477c478bd9Sstevel@tonic-gate extern void (*dmfe_db(dmfe_t *dmfep))(const char *fmt, ...); 5487c478bd9Sstevel@tonic-gate 5497c478bd9Sstevel@tonic-gate /* 5507c478bd9Sstevel@tonic-gate * Define DMFE_DBG to be the relevant flag from the set above before 5517c478bd9Sstevel@tonic-gate * using the DMFE_GDEBUG() or DMFE_DEBUG() macros. The 'G' versions 5527c478bd9Sstevel@tonic-gate * look at the Global debug flag word (dmfe_debug); the non-G versions 5537c478bd9Sstevel@tonic-gate * look in the per-instance data (dmfep->debug) and so require a variable 5547c478bd9Sstevel@tonic-gate * called 'dmfep' to be in scope (and initialised!) 5557c478bd9Sstevel@tonic-gate * 5567c478bd9Sstevel@tonic-gate * You could redefine DMFE_TRC too if you really need two different 5577c478bd9Sstevel@tonic-gate * flavours of debugging output in the same area of code, but I don't 5587c478bd9Sstevel@tonic-gate * really recommend it. 5597c478bd9Sstevel@tonic-gate */ 5607c478bd9Sstevel@tonic-gate 5617c478bd9Sstevel@tonic-gate #define DMFE_TRC DMFE_DBG_TRACE /* default 'trace' bit */ 5627c478bd9Sstevel@tonic-gate 5637c478bd9Sstevel@tonic-gate #define DMFE_GDEBUG(args) do { \ 5647c478bd9Sstevel@tonic-gate if (dmfe_debug & (DMFE_DBG)) \ 5657c478bd9Sstevel@tonic-gate (*dmfe_gdb()) args; \ 5667c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 5677c478bd9Sstevel@tonic-gate } while (0) 5687c478bd9Sstevel@tonic-gate 5697c478bd9Sstevel@tonic-gate #define DMFE_GTRACE(args) do { \ 5707c478bd9Sstevel@tonic-gate if (dmfe_debug & (DMFE_TRC)) \ 5717c478bd9Sstevel@tonic-gate (*dmfe_gdb()) args; \ 5727c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 5737c478bd9Sstevel@tonic-gate } while (0) 5747c478bd9Sstevel@tonic-gate 5757c478bd9Sstevel@tonic-gate #define DMFE_DEBUG(args) do { \ 5767c478bd9Sstevel@tonic-gate if (dmfep->debug & (DMFE_DBG)) \ 5777c478bd9Sstevel@tonic-gate (*dmfe_db(dmfep)) args; \ 5787c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 5797c478bd9Sstevel@tonic-gate } while (0) 5807c478bd9Sstevel@tonic-gate 5817c478bd9Sstevel@tonic-gate #define DMFE_TRACE(args) do { \ 5827c478bd9Sstevel@tonic-gate if (dmfep->debug & (DMFE_TRC)) \ 5837c478bd9Sstevel@tonic-gate (*dmfe_db(dmfep)) args; \ 5847c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 5857c478bd9Sstevel@tonic-gate } while (0) 5867c478bd9Sstevel@tonic-gate 5877c478bd9Sstevel@tonic-gate #else 5887c478bd9Sstevel@tonic-gate 5897c478bd9Sstevel@tonic-gate #define DMFE_DEBUG(args) do ; _NOTE(CONSTANTCONDITION) while (0) 5907c478bd9Sstevel@tonic-gate #define DMFE_TRACE(args) do ; _NOTE(CONSTANTCONDITION) while (0) 5917c478bd9Sstevel@tonic-gate #define DMFE_GDEBUG(args) do ; _NOTE(CONSTANTCONDITION) while (0) 5927c478bd9Sstevel@tonic-gate #define DMFE_GTRACE(args) do ; _NOTE(CONSTANTCONDITION) while (0) 5937c478bd9Sstevel@tonic-gate 5947c478bd9Sstevel@tonic-gate #endif /* DMFEDEBUG */ 5957c478bd9Sstevel@tonic-gate 5967c478bd9Sstevel@tonic-gate 5977c478bd9Sstevel@tonic-gate /* 5987c478bd9Sstevel@tonic-gate * Inter-source-file linkage ... 5997c478bd9Sstevel@tonic-gate */ 6007c478bd9Sstevel@tonic-gate 6017c478bd9Sstevel@tonic-gate /* dmfe_log.c */ 6027c478bd9Sstevel@tonic-gate void dmfe_warning(dmfe_t *dmfep, const char *fmt, ...); 6037c478bd9Sstevel@tonic-gate void dmfe_error(dmfe_t *dmfep, const char *fmt, ...); 6047c478bd9Sstevel@tonic-gate void dmfe_notice(dmfe_t *dmfep, const char *fmt, ...); 6057c478bd9Sstevel@tonic-gate void dmfe_log(dmfe_t *dmfep, const char *fmt, ...); 6067c478bd9Sstevel@tonic-gate void dmfe_log_init(void); 6077c478bd9Sstevel@tonic-gate void dmfe_log_fini(void); 6087c478bd9Sstevel@tonic-gate 6097c478bd9Sstevel@tonic-gate /* dmfe_main.c */ 6107c478bd9Sstevel@tonic-gate uint32_t dmfe_chip_get32(dmfe_t *dmfep, off_t offset); 6117c478bd9Sstevel@tonic-gate void dmfe_chip_put32(dmfe_t *dmfep, off_t offset, uint32_t value); 6127c478bd9Sstevel@tonic-gate 6137c478bd9Sstevel@tonic-gate /* dmfe_mii.c */ 6145c1d0199Sgd void dmfe_read_eeprom(dmfe_t *dmfep, uint16_t addr, uint8_t *ptr, int cnt); 6157c478bd9Sstevel@tonic-gate boolean_t dmfe_init_phy(dmfe_t *dmfep); 6167c478bd9Sstevel@tonic-gate void dmfe_update_phy(dmfe_t *dmfep); 6177c478bd9Sstevel@tonic-gate boolean_t dmfe_check_link(dmfe_t *dmfep); 6187c478bd9Sstevel@tonic-gate void dmfe_recheck_link(dmfe_t *dmfep, boolean_t ioctl); 6197c478bd9Sstevel@tonic-gate 6207c478bd9Sstevel@tonic-gate /* dmfe_ndd.c */ 6217c478bd9Sstevel@tonic-gate int dmfe_nd_init(dmfe_t *dmfep); 6227c478bd9Sstevel@tonic-gate enum ioc_reply dmfe_nd_ioctl(dmfe_t *dmfep, queue_t *wq, mblk_t *mp, int cmd); 6237c478bd9Sstevel@tonic-gate void dmfe_nd_cleanup(dmfe_t *dmfep); 6247c478bd9Sstevel@tonic-gate 6257c478bd9Sstevel@tonic-gate #ifdef __cplusplus 6267c478bd9Sstevel@tonic-gate } 6277c478bd9Sstevel@tonic-gate #endif 6287c478bd9Sstevel@tonic-gate 6297c478bd9Sstevel@tonic-gate #endif /* _SYS_DMFE_IMPL_H */ 630