17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5cc291a4cSgd * Common Development and Distribution License (the "License"). 6cc291a4cSgd * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22*bdb9230aSGarrett D'Amore * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate #ifndef _SYS_DMFE_IMPL_H 277c478bd9Sstevel@tonic-gate #define _SYS_DMFE_IMPL_H 287c478bd9Sstevel@tonic-gate 297c478bd9Sstevel@tonic-gate #include <sys/types.h> 307c478bd9Sstevel@tonic-gate #include <sys/stream.h> 317c478bd9Sstevel@tonic-gate #include <sys/strsun.h> 327c478bd9Sstevel@tonic-gate #include <sys/stat.h> 337c478bd9Sstevel@tonic-gate #include <sys/pci.h> 347c478bd9Sstevel@tonic-gate #include <sys/note.h> 357c478bd9Sstevel@tonic-gate #include <sys/modctl.h> 367c478bd9Sstevel@tonic-gate #include <sys/kstat.h> 377c478bd9Sstevel@tonic-gate #include <sys/ethernet.h> 387c478bd9Sstevel@tonic-gate #include <sys/devops.h> 397c478bd9Sstevel@tonic-gate #include <sys/debug.h> 407c478bd9Sstevel@tonic-gate #include <sys/conf.h> 417c478bd9Sstevel@tonic-gate 42cc291a4cSgd #include <sys/vlan.h> 43cc291a4cSgd 447c478bd9Sstevel@tonic-gate #include <sys/dditypes.h> 457c478bd9Sstevel@tonic-gate #include <sys/ddi.h> 467c478bd9Sstevel@tonic-gate #include <sys/sunddi.h> 477c478bd9Sstevel@tonic-gate 48*bdb9230aSGarrett D'Amore #include <sys/mii.h> 49da14cebeSEric Cheng #include <sys/mac_provider.h> 50cc291a4cSgd #include <sys/mac_ether.h> 515c1d0199Sgd #include "dmfe.h" 527c478bd9Sstevel@tonic-gate 53cc291a4cSgd #define DMFE_MAX_PKT_SIZE (VLAN_TAGSZ + ETHERMAX + ETHERFCSL) 547c478bd9Sstevel@tonic-gate 557c478bd9Sstevel@tonic-gate 567c478bd9Sstevel@tonic-gate #define DRIVER_NAME "dmfe" 577c478bd9Sstevel@tonic-gate 587c478bd9Sstevel@tonic-gate /* 597c478bd9Sstevel@tonic-gate * Describes the identity of a specific chip 607c478bd9Sstevel@tonic-gate */ 617c478bd9Sstevel@tonic-gate typedef struct { 627c478bd9Sstevel@tonic-gate uint16_t vendor; 637c478bd9Sstevel@tonic-gate uint16_t device; 647c478bd9Sstevel@tonic-gate uint8_t revision; 657c478bd9Sstevel@tonic-gate uint8_t spare; 667c478bd9Sstevel@tonic-gate } chip_id_t; 677c478bd9Sstevel@tonic-gate 687c478bd9Sstevel@tonic-gate /* 697c478bd9Sstevel@tonic-gate * Describes the state of a descriptor ring 707c478bd9Sstevel@tonic-gate * 717c478bd9Sstevel@tonic-gate * NOTE: n_free and next_busy are only used for the Tx descriptors 727c478bd9Sstevel@tonic-gate * and are not valid on the receive side. 737c478bd9Sstevel@tonic-gate */ 747c478bd9Sstevel@tonic-gate typedef struct { 757c478bd9Sstevel@tonic-gate uint32_t n_desc; /* # of descriptors */ 767c478bd9Sstevel@tonic-gate uint32_t n_free; /* # of free descriptors */ 777c478bd9Sstevel@tonic-gate uint32_t next_free; /* next index to use/check */ 787c478bd9Sstevel@tonic-gate uint32_t next_busy; /* next index to reclaim */ 797c478bd9Sstevel@tonic-gate } desc_state_t; 807c478bd9Sstevel@tonic-gate 817c478bd9Sstevel@tonic-gate /* 827c478bd9Sstevel@tonic-gate * Describes one chunk of allocated DMA-able memory 837c478bd9Sstevel@tonic-gate */ 847c478bd9Sstevel@tonic-gate typedef struct { 857c478bd9Sstevel@tonic-gate ddi_dma_handle_t dma_hdl; 867c478bd9Sstevel@tonic-gate ddi_acc_handle_t acc_hdl; 877c478bd9Sstevel@tonic-gate size_t alength; /* allocated size */ 887c478bd9Sstevel@tonic-gate caddr_t mem_va; /* CPU VA of memory */ 897c478bd9Sstevel@tonic-gate uint32_t spare1; 907c478bd9Sstevel@tonic-gate uint32_t mem_dvma; /* DVMA addr of memory */ 917c478bd9Sstevel@tonic-gate caddr_t setup_va; 927c478bd9Sstevel@tonic-gate uint32_t spare2; 937c478bd9Sstevel@tonic-gate uint32_t setup_dvma; 947c478bd9Sstevel@tonic-gate int spare3; 957c478bd9Sstevel@tonic-gate int ncookies; 967c478bd9Sstevel@tonic-gate } dma_area_t; 977c478bd9Sstevel@tonic-gate 987c478bd9Sstevel@tonic-gate /* 997c478bd9Sstevel@tonic-gate * Indexes into the driver-specific kstats, divided into: 1007c478bd9Sstevel@tonic-gate * 1017c478bd9Sstevel@tonic-gate * cyclic activity 1027c478bd9Sstevel@tonic-gate * reasons for waking the factotum 1037c478bd9Sstevel@tonic-gate * the factotum's activities 1047c478bd9Sstevel@tonic-gate */ 1057c478bd9Sstevel@tonic-gate enum { 1067c478bd9Sstevel@tonic-gate KS_CYCLIC_RUN, 1077c478bd9Sstevel@tonic-gate 108cc291a4cSgd KS_INTERRUPT, 1097c478bd9Sstevel@tonic-gate KS_TX_STALL, 1107c478bd9Sstevel@tonic-gate KS_CHIP_ERROR, 1117c478bd9Sstevel@tonic-gate 1127c478bd9Sstevel@tonic-gate KS_FACTOTUM_RUN, 1137c478bd9Sstevel@tonic-gate KS_RECOVERY, 1147c478bd9Sstevel@tonic-gate 1157c478bd9Sstevel@tonic-gate KS_DRV_COUNT 1167c478bd9Sstevel@tonic-gate }; 1177c478bd9Sstevel@tonic-gate 1187c478bd9Sstevel@tonic-gate /* 1197c478bd9Sstevel@tonic-gate * Actual state of the DM9102A chip 1207c478bd9Sstevel@tonic-gate */ 1217c478bd9Sstevel@tonic-gate enum chip_state { 1227c478bd9Sstevel@tonic-gate CHIP_ERROR = -1, /* error, need reset */ 1237c478bd9Sstevel@tonic-gate CHIP_UNKNOWN, /* Initial state only */ 1247c478bd9Sstevel@tonic-gate CHIP_RESET, /* reset, need init */ 1257c478bd9Sstevel@tonic-gate CHIP_STOPPED, /* Tx/Rx stopped */ 1267c478bd9Sstevel@tonic-gate CHIP_TX_ONLY, /* Tx (re)started */ 1277c478bd9Sstevel@tonic-gate CHIP_TX_RX, /* Tx & Rx (re)started */ 1287c478bd9Sstevel@tonic-gate CHIP_RUNNING /* with interrupts */ 1297c478bd9Sstevel@tonic-gate }; 1307c478bd9Sstevel@tonic-gate 1317c478bd9Sstevel@tonic-gate /* 132cc291a4cSgd * Required state according to MAC 1337c478bd9Sstevel@tonic-gate */ 134cc291a4cSgd enum mac_state { 135cc291a4cSgd DMFE_MAC_UNKNOWN, 136cc291a4cSgd DMFE_MAC_RESET, 137cc291a4cSgd DMFE_MAC_STOPPED, 138cc291a4cSgd DMFE_MAC_STARTED 1397c478bd9Sstevel@tonic-gate }; 1407c478bd9Sstevel@tonic-gate 1417c478bd9Sstevel@tonic-gate /* 1427c478bd9Sstevel@tonic-gate * (Internal) return values from ioctl subroutines 1437c478bd9Sstevel@tonic-gate */ 1447c478bd9Sstevel@tonic-gate enum ioc_reply { 1457c478bd9Sstevel@tonic-gate IOC_INVAL = -1, /* bad, NAK with EINVAL */ 1467c478bd9Sstevel@tonic-gate IOC_DONE, /* OK, reply sent */ 1477c478bd9Sstevel@tonic-gate IOC_REPLY, /* OK, just send reply */ 1487c478bd9Sstevel@tonic-gate IOC_ACK, /* OK, just send ACK */ 1497c478bd9Sstevel@tonic-gate IOC_RESTART, /* OK, restart & reply */ 1507c478bd9Sstevel@tonic-gate IOC_RESTART_ACK /* OK, restart & ACK */ 1517c478bd9Sstevel@tonic-gate }; 1527c478bd9Sstevel@tonic-gate 1537c478bd9Sstevel@tonic-gate /* 1547c478bd9Sstevel@tonic-gate * Per-instance soft-state structure 1557c478bd9Sstevel@tonic-gate */ 1565c1d0199Sgd typedef struct dmfe { 1577c478bd9Sstevel@tonic-gate /* 1587c478bd9Sstevel@tonic-gate * These fields are set by attach() and unchanged thereafter ... 1597c478bd9Sstevel@tonic-gate */ 1607c478bd9Sstevel@tonic-gate dev_info_t *devinfo; /* device instance */ 161cc291a4cSgd mac_handle_t mh; /* MAC instance data */ 162*bdb9230aSGarrett D'Amore mii_handle_t mii; /* MII handle */ 1637c478bd9Sstevel@tonic-gate ddi_acc_handle_t io_handle; /* DDI I/O handle */ 1647c478bd9Sstevel@tonic-gate caddr_t io_reg; /* mapped registers */ 165*bdb9230aSGarrett D'Amore boolean_t suspended; 1667c478bd9Sstevel@tonic-gate 1677c478bd9Sstevel@tonic-gate uint32_t debug; /* per-instance debug */ 1687c478bd9Sstevel@tonic-gate uint32_t progress; /* attach tracking */ 1697c478bd9Sstevel@tonic-gate chip_id_t chipid; 1707c478bd9Sstevel@tonic-gate uint8_t vendor_addr[ETHERADDRL]; 1717c478bd9Sstevel@tonic-gate char ifname[12]; /* "dmfeXXXX" */ 1727c478bd9Sstevel@tonic-gate 1737c478bd9Sstevel@tonic-gate dma_area_t tx_desc; /* transmit descriptors */ 1747c478bd9Sstevel@tonic-gate dma_area_t tx_buff; /* transmit buffers */ 1757c478bd9Sstevel@tonic-gate dma_area_t rx_desc; /* receive descriptors */ 1767c478bd9Sstevel@tonic-gate dma_area_t rx_buff; /* receive buffers */ 1777c478bd9Sstevel@tonic-gate 178dd4eeefdSeota ddi_periodic_t cycid; /* periodical callback */ 1797c478bd9Sstevel@tonic-gate ddi_softintr_t factotum_id; /* identity of factotum */ 1807c478bd9Sstevel@tonic-gate ddi_iblock_cookie_t iblk; 1817c478bd9Sstevel@tonic-gate 1827c478bd9Sstevel@tonic-gate /* 1837c478bd9Sstevel@tonic-gate * Locks: 1847c478bd9Sstevel@tonic-gate * 1857c478bd9Sstevel@tonic-gate * <milock> is used only by the MII (PHY) level code, to ensure 1867c478bd9Sstevel@tonic-gate * exclusive access during the bit-twiddling needed to send 1877c478bd9Sstevel@tonic-gate * signals along the MII serial bus. These operations are 1887c478bd9Sstevel@tonic-gate * --S--L--O--W-- so we keep this lock separate, so that 1897c478bd9Sstevel@tonic-gate * faster operations (e.g. interrupts) aren't delayed by 1907c478bd9Sstevel@tonic-gate * waiting for it. 1917c478bd9Sstevel@tonic-gate * 1927c478bd9Sstevel@tonic-gate * <oplock> is a general "outer" lock, protecting most r/w data 1937c478bd9Sstevel@tonic-gate * and chip state. It is also acquired by the interrupt 1947c478bd9Sstevel@tonic-gate * handler. 1957c478bd9Sstevel@tonic-gate * 1967c478bd9Sstevel@tonic-gate * <rxlock> is used to protect the Rx-side buffers, descriptors, 1977c478bd9Sstevel@tonic-gate * and statistics during a single call to dmfe_getp(). 1987c478bd9Sstevel@tonic-gate * This is called from inside the interrupt handler, but 1997c478bd9Sstevel@tonic-gate * <oplock> is not held across this call. 2007c478bd9Sstevel@tonic-gate * 2017c478bd9Sstevel@tonic-gate * <txlock> is an "inner" lock, and protects only the Tx-side 2027c478bd9Sstevel@tonic-gate * data below and in the ring buffers/descriptors. The 2037c478bd9Sstevel@tonic-gate * Tx-side code uses only this lock, avoiding contention 2047c478bd9Sstevel@tonic-gate * with the receive-side code. 2057c478bd9Sstevel@tonic-gate * 2067c478bd9Sstevel@tonic-gate * Any of the locks can be acquired singly, but where multiple 2077c478bd9Sstevel@tonic-gate * locks are acquired, they *must* be in the order: 2087c478bd9Sstevel@tonic-gate * 2097c478bd9Sstevel@tonic-gate * milock >>> oplock >>> rxlock >>> txlock. 2107c478bd9Sstevel@tonic-gate * 2117c478bd9Sstevel@tonic-gate * *None* of these locks may be held across calls out to the 212cc291a4cSgd * MAC routines mac_rx() or mac_tx_notify(); MAC locks must 213cc291a4cSgd * be regarded as *outermost* locks in all cases, as they will 2147c478bd9Sstevel@tonic-gate * already be held before calling the ioctl() or get_stats() 2157c478bd9Sstevel@tonic-gate * entry points - which then have to acquire multiple locks, in 2167c478bd9Sstevel@tonic-gate * the order described here. 2177c478bd9Sstevel@tonic-gate */ 2187c478bd9Sstevel@tonic-gate kmutex_t milock[1]; 2197c478bd9Sstevel@tonic-gate kmutex_t oplock[1]; 2207c478bd9Sstevel@tonic-gate kmutex_t rxlock[1]; 2217c478bd9Sstevel@tonic-gate kmutex_t txlock[1]; 2227c478bd9Sstevel@tonic-gate 2237c478bd9Sstevel@tonic-gate /* 2247c478bd9Sstevel@tonic-gate * DMFE Extended kstats, protected by <oplock> 2257c478bd9Sstevel@tonic-gate */ 2267c478bd9Sstevel@tonic-gate kstat_t *ksp_drv; 2277c478bd9Sstevel@tonic-gate kstat_named_t *knp_drv; 2287c478bd9Sstevel@tonic-gate 2297c478bd9Sstevel@tonic-gate /* 2307c478bd9Sstevel@tonic-gate * GLD statistics; the prefix tells which lock each is protected by. 2317c478bd9Sstevel@tonic-gate */ 232cc291a4cSgd 233cc291a4cSgd uint64_t rx_stats_ipackets; 234cc291a4cSgd uint64_t rx_stats_multi; 235cc291a4cSgd uint64_t rx_stats_bcast; 236cc291a4cSgd uint64_t rx_stats_ierrors; 237cc291a4cSgd uint64_t rx_stats_norcvbuf; 238cc291a4cSgd uint64_t rx_stats_rbytes; 239cc291a4cSgd uint64_t rx_stats_missed; 240cc291a4cSgd uint64_t rx_stats_align; 241cc291a4cSgd uint64_t rx_stats_fcs; 242cc291a4cSgd uint64_t rx_stats_toolong; 243cc291a4cSgd uint64_t rx_stats_macrcv_errors; 244cc291a4cSgd uint64_t rx_stats_overflow; 245cc291a4cSgd uint64_t rx_stats_short; 246cc291a4cSgd 247cc291a4cSgd uint64_t tx_stats_oerrors; 248cc291a4cSgd uint64_t tx_stats_opackets; 249cc291a4cSgd uint64_t tx_stats_multi; 250cc291a4cSgd uint64_t tx_stats_bcast; 251cc291a4cSgd uint64_t tx_stats_obytes; 252cc291a4cSgd uint64_t tx_stats_collisions; 253cc291a4cSgd uint64_t tx_stats_nocarrier; 254cc291a4cSgd uint64_t tx_stats_xmtlatecoll; 255cc291a4cSgd uint64_t tx_stats_excoll; 256cc291a4cSgd uint64_t tx_stats_macxmt_errors; 2570d2a8e5eSgd uint64_t tx_stats_jabber; 258cc291a4cSgd uint64_t tx_stats_defer; 259cc291a4cSgd uint64_t tx_stats_first_coll; 260cc291a4cSgd uint64_t tx_stats_multi_coll; 261cc291a4cSgd uint64_t tx_stats_underflow; 2627c478bd9Sstevel@tonic-gate 2637c478bd9Sstevel@tonic-gate /* 2647c478bd9Sstevel@tonic-gate * These two sets of desciptors are manipulated during 2657c478bd9Sstevel@tonic-gate * packet receive/transmit respectively. 2667c478bd9Sstevel@tonic-gate */ 2677c478bd9Sstevel@tonic-gate desc_state_t rx; /* describes Rx ring */ 2687c478bd9Sstevel@tonic-gate desc_state_t tx; /* describes Tx ring */ 2697c478bd9Sstevel@tonic-gate 2707c478bd9Sstevel@tonic-gate /* 2717c478bd9Sstevel@tonic-gate * Miscellaneous Tx-side variables (protected by txlock) 2727c478bd9Sstevel@tonic-gate */ 2737c478bd9Sstevel@tonic-gate uint32_t tx_pending_tix; /* tix since reclaim */ 274cc291a4cSgd uint8_t *tx_mcast; /* bitmask: pkt is mcast */ 275cc291a4cSgd uint8_t *tx_bcast; /* bitmask: pkt is bcast */ 2767c478bd9Sstevel@tonic-gate 2777c478bd9Sstevel@tonic-gate /* 2787c478bd9Sstevel@tonic-gate * Miscellaneous operating variables (protected by oplock) 2797c478bd9Sstevel@tonic-gate */ 2807c478bd9Sstevel@tonic-gate uint16_t factotum_flag; /* callback pending */ 2817c478bd9Sstevel@tonic-gate uint16_t need_setup; /* send-setup pending */ 2827c478bd9Sstevel@tonic-gate uint32_t opmode; /* operating mode shadow */ 2837c478bd9Sstevel@tonic-gate uint32_t imask; /* interrupt mask shadow */ 284cc291a4cSgd enum mac_state mac_state; /* RESET/STOPPED/STARTED */ 2857c478bd9Sstevel@tonic-gate enum chip_state chip_state; /* see above */ 2867c478bd9Sstevel@tonic-gate 2877c478bd9Sstevel@tonic-gate /* 2887c478bd9Sstevel@tonic-gate * Current Ethernet address & multicast map ... 2897c478bd9Sstevel@tonic-gate */ 2907c478bd9Sstevel@tonic-gate uint8_t curr_addr[ETHERADDRL]; 2917c478bd9Sstevel@tonic-gate uint8_t mcast_refs[MCASTBUF_SIZE]; 2927c478bd9Sstevel@tonic-gate boolean_t addr_set; 2937c478bd9Sstevel@tonic-gate 2947c478bd9Sstevel@tonic-gate /* 2957c478bd9Sstevel@tonic-gate * Guard element used to check data integrity 2967c478bd9Sstevel@tonic-gate */ 2977c478bd9Sstevel@tonic-gate uint64_t dmfe_guard; 2987c478bd9Sstevel@tonic-gate } dmfe_t; 2997c478bd9Sstevel@tonic-gate 3007c478bd9Sstevel@tonic-gate /* 3017c478bd9Sstevel@tonic-gate * 'Progress' bit flags ... 3027c478bd9Sstevel@tonic-gate */ 3037c478bd9Sstevel@tonic-gate #define PROGRESS_CONFIG 0x0001 /* config space initialised */ 304*bdb9230aSGarrett D'Amore #define PROGRESS_MUTEX 0x0002 /* mutexes initialized */ 3057c478bd9Sstevel@tonic-gate #define PROGRESS_REGS 0x0004 /* registers mapped */ 3067c478bd9Sstevel@tonic-gate #define PROGRESS_BUFS 0x0008 /* buffers allocated */ 3077c478bd9Sstevel@tonic-gate #define PROGRESS_SOFTINT 0x0010 /* softint registered */ 3087c478bd9Sstevel@tonic-gate #define PROGRESS_HWINT 0x0020 /* h/w interrupt registered */ 3097c478bd9Sstevel@tonic-gate 3107c478bd9Sstevel@tonic-gate /* 3117c478bd9Sstevel@tonic-gate * Sync a DMA area described by a dma_area_t 3127c478bd9Sstevel@tonic-gate */ 3137c478bd9Sstevel@tonic-gate #define DMA_SYNC(descp, flag) ((void) ddi_dma_sync((descp)->dma_hdl, \ 3147c478bd9Sstevel@tonic-gate 0, (descp)->alength, flag)) 3157c478bd9Sstevel@tonic-gate 3167c478bd9Sstevel@tonic-gate /* 3177c478bd9Sstevel@tonic-gate * Next value of a cyclic index 3187c478bd9Sstevel@tonic-gate */ 3197c478bd9Sstevel@tonic-gate #define NEXT(index, limit) ((index)+1 < (limit) ? (index)+1 : 0); 3207c478bd9Sstevel@tonic-gate 3217c478bd9Sstevel@tonic-gate /* 3227c478bd9Sstevel@tonic-gate * Copy an ethernet address 3237c478bd9Sstevel@tonic-gate */ 3247c478bd9Sstevel@tonic-gate #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 3257c478bd9Sstevel@tonic-gate 3267c478bd9Sstevel@tonic-gate /* 3277c478bd9Sstevel@tonic-gate * Get/set/increment a (64-bit) driver-private kstat 3287c478bd9Sstevel@tonic-gate */ 3297c478bd9Sstevel@tonic-gate #define DRV_KS_GET(dmfep, id) \ 3307c478bd9Sstevel@tonic-gate (((dmfep)->knp_drv) ? ((dmfep)->knp_drv)[id].value.ui64 : 0) 3317c478bd9Sstevel@tonic-gate 3327c478bd9Sstevel@tonic-gate #define DRV_KS_SET(dmfep, id, val) \ 3337c478bd9Sstevel@tonic-gate do { \ 3347c478bd9Sstevel@tonic-gate if ((dmfep)->knp_drv) \ 3357c478bd9Sstevel@tonic-gate ((dmfep)->knp_drv)[id].value.ui64 = (val); \ 3367c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 3377c478bd9Sstevel@tonic-gate } while (0) 3387c478bd9Sstevel@tonic-gate 3397c478bd9Sstevel@tonic-gate #define DRV_KS_INC(dmfep, id) \ 3407c478bd9Sstevel@tonic-gate do { \ 3417c478bd9Sstevel@tonic-gate if ((dmfep)->knp_drv) \ 3427c478bd9Sstevel@tonic-gate ((dmfep)->knp_drv)[id].value.ui64 += 1; \ 3437c478bd9Sstevel@tonic-gate _NOTE(CONSTANTCONDITION) \ 3447c478bd9Sstevel@tonic-gate } while (0) 3457c478bd9Sstevel@tonic-gate 3467c478bd9Sstevel@tonic-gate 3477c478bd9Sstevel@tonic-gate #define DMFE_GUARD 0x1919603003090218 3487c478bd9Sstevel@tonic-gate 3497c478bd9Sstevel@tonic-gate /* 3507c478bd9Sstevel@tonic-gate * Inter-source-file linkage ... 3517c478bd9Sstevel@tonic-gate */ 3527c478bd9Sstevel@tonic-gate 3537c478bd9Sstevel@tonic-gate /* dmfe_log.c */ 3547c478bd9Sstevel@tonic-gate void dmfe_warning(dmfe_t *dmfep, const char *fmt, ...); 3557c478bd9Sstevel@tonic-gate void dmfe_error(dmfe_t *dmfep, const char *fmt, ...); 3567c478bd9Sstevel@tonic-gate void dmfe_notice(dmfe_t *dmfep, const char *fmt, ...); 3577c478bd9Sstevel@tonic-gate void dmfe_log(dmfe_t *dmfep, const char *fmt, ...); 3587c478bd9Sstevel@tonic-gate void dmfe_log_init(void); 3597c478bd9Sstevel@tonic-gate void dmfe_log_fini(void); 3607c478bd9Sstevel@tonic-gate 3617c478bd9Sstevel@tonic-gate /* dmfe_main.c */ 3627c478bd9Sstevel@tonic-gate uint32_t dmfe_chip_get32(dmfe_t *dmfep, off_t offset); 3637c478bd9Sstevel@tonic-gate void dmfe_chip_put32(dmfe_t *dmfep, off_t offset, uint32_t value); 3647c478bd9Sstevel@tonic-gate 3657c478bd9Sstevel@tonic-gate /* dmfe_mii.c */ 3665c1d0199Sgd void dmfe_read_eeprom(dmfe_t *dmfep, uint16_t addr, uint8_t *ptr, int cnt); 3677c478bd9Sstevel@tonic-gate boolean_t dmfe_init_phy(dmfe_t *dmfep); 3687c478bd9Sstevel@tonic-gate 3697c478bd9Sstevel@tonic-gate #endif /* _SYS_DMFE_IMPL_H */ 370