156b2bdd1SGireesh Nagabhushana /* 256b2bdd1SGireesh Nagabhushana * This file and its contents are supplied under the terms of the 356b2bdd1SGireesh Nagabhushana * Common Development and Distribution License ("CDDL"), version 1.0. 456b2bdd1SGireesh Nagabhushana * You may only use this file in accordance with the terms of version 556b2bdd1SGireesh Nagabhushana * 1.0 of the CDDL. 656b2bdd1SGireesh Nagabhushana * 756b2bdd1SGireesh Nagabhushana * A full copy of the text of the CDDL should have accompanied this 856b2bdd1SGireesh Nagabhushana * source. A copy of the CDDL is also available via the Internet at 956b2bdd1SGireesh Nagabhushana * http://www.illumos.org/license/CDDL. 1056b2bdd1SGireesh Nagabhushana */ 1156b2bdd1SGireesh Nagabhushana 1256b2bdd1SGireesh Nagabhushana /* 1356b2bdd1SGireesh Nagabhushana * Definitions of T4 work request and CPL5 commands and status codes. 1456b2bdd1SGireesh Nagabhushana * 1556b2bdd1SGireesh Nagabhushana * Copyright (C) 2008-2013 Chelsio Communications. All rights reserved. 1656b2bdd1SGireesh Nagabhushana * 1756b2bdd1SGireesh Nagabhushana * Written by Dimitris Michailidis (dm@chelsio.com) 1856b2bdd1SGireesh Nagabhushana * 1956b2bdd1SGireesh Nagabhushana * This program is distributed in the hope that it will be useful, but WITHOUT 2056b2bdd1SGireesh Nagabhushana * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 2156b2bdd1SGireesh Nagabhushana * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this 2256b2bdd1SGireesh Nagabhushana * release for licensing terms and conditions. 2356b2bdd1SGireesh Nagabhushana */ 2456b2bdd1SGireesh Nagabhushana 2556b2bdd1SGireesh Nagabhushana #ifndef __CXGBE_T4_MSG_H 2656b2bdd1SGireesh Nagabhushana #define __CXGBE_T4_MSG_H 2756b2bdd1SGireesh Nagabhushana 2856b2bdd1SGireesh Nagabhushana enum { 2956b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_REQ = 0x1, 3056b2bdd1SGireesh Nagabhushana CPL_PASS_ACCEPT_RPL = 0x2, 3156b2bdd1SGireesh Nagabhushana CPL_ACT_OPEN_REQ = 0x3, 3256b2bdd1SGireesh Nagabhushana CPL_SET_TCB = 0x4, 3356b2bdd1SGireesh Nagabhushana CPL_SET_TCB_FIELD = 0x5, 3456b2bdd1SGireesh Nagabhushana CPL_GET_TCB = 0x6, 3556b2bdd1SGireesh Nagabhushana CPL_CLOSE_CON_REQ = 0x8, 3656b2bdd1SGireesh Nagabhushana CPL_CLOSE_LISTSRV_REQ = 0x9, 3756b2bdd1SGireesh Nagabhushana CPL_ABORT_REQ = 0xA, 3856b2bdd1SGireesh Nagabhushana CPL_ABORT_RPL = 0xB, 3956b2bdd1SGireesh Nagabhushana CPL_TX_DATA = 0xC, 4056b2bdd1SGireesh Nagabhushana CPL_RX_DATA_ACK = 0xD, 4156b2bdd1SGireesh Nagabhushana CPL_TX_PKT = 0xE, 4256b2bdd1SGireesh Nagabhushana CPL_RTE_DELETE_REQ = 0xF, 4356b2bdd1SGireesh Nagabhushana CPL_RTE_WRITE_REQ = 0x10, 4456b2bdd1SGireesh Nagabhushana CPL_RTE_READ_REQ = 0x11, 4556b2bdd1SGireesh Nagabhushana CPL_L2T_WRITE_REQ = 0x12, 4656b2bdd1SGireesh Nagabhushana CPL_L2T_READ_REQ = 0x13, 4756b2bdd1SGireesh Nagabhushana CPL_SMT_WRITE_REQ = 0x14, 4856b2bdd1SGireesh Nagabhushana CPL_SMT_READ_REQ = 0x15, 49*de483253SVishal Kulkarni CPL_TAG_WRITE_REQ = 0x16, 5056b2bdd1SGireesh Nagabhushana CPL_BARRIER = 0x18, 5156b2bdd1SGireesh Nagabhushana CPL_TID_RELEASE = 0x1A, 52*de483253SVishal Kulkarni CPL_TAG_READ_REQ = 0x1B, 53*de483253SVishal Kulkarni CPL_TX_PKT_FSO = 0x1E, 54*de483253SVishal Kulkarni CPL_TX_PKT_ISO = 0x1F, 5556b2bdd1SGireesh Nagabhushana 5656b2bdd1SGireesh Nagabhushana CPL_CLOSE_LISTSRV_RPL = 0x20, 5756b2bdd1SGireesh Nagabhushana CPL_ERROR = 0x21, 5856b2bdd1SGireesh Nagabhushana CPL_GET_TCB_RPL = 0x22, 5956b2bdd1SGireesh Nagabhushana CPL_L2T_WRITE_RPL = 0x23, 6056b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_RPL = 0x24, 6156b2bdd1SGireesh Nagabhushana CPL_ACT_OPEN_RPL = 0x25, 6256b2bdd1SGireesh Nagabhushana CPL_PEER_CLOSE = 0x26, 6356b2bdd1SGireesh Nagabhushana CPL_RTE_DELETE_RPL = 0x27, 6456b2bdd1SGireesh Nagabhushana CPL_RTE_WRITE_RPL = 0x28, 6556b2bdd1SGireesh Nagabhushana CPL_RX_URG_PKT = 0x29, 66*de483253SVishal Kulkarni CPL_TAG_WRITE_RPL = 0x2A, 6756b2bdd1SGireesh Nagabhushana CPL_ABORT_REQ_RSS = 0x2B, 6856b2bdd1SGireesh Nagabhushana CPL_RX_URG_NOTIFY = 0x2C, 6956b2bdd1SGireesh Nagabhushana CPL_ABORT_RPL_RSS = 0x2D, 7056b2bdd1SGireesh Nagabhushana CPL_SMT_WRITE_RPL = 0x2E, 7156b2bdd1SGireesh Nagabhushana CPL_TX_DATA_ACK = 0x2F, 7256b2bdd1SGireesh Nagabhushana 7356b2bdd1SGireesh Nagabhushana CPL_RX_PHYS_ADDR = 0x30, 7456b2bdd1SGireesh Nagabhushana CPL_PCMD_READ_RPL = 0x31, 7556b2bdd1SGireesh Nagabhushana CPL_CLOSE_CON_RPL = 0x32, 7656b2bdd1SGireesh Nagabhushana CPL_ISCSI_HDR = 0x33, 7756b2bdd1SGireesh Nagabhushana CPL_L2T_READ_RPL = 0x34, 7856b2bdd1SGireesh Nagabhushana CPL_RDMA_CQE = 0x35, 7956b2bdd1SGireesh Nagabhushana CPL_RDMA_CQE_READ_RSP = 0x36, 8056b2bdd1SGireesh Nagabhushana CPL_RDMA_CQE_ERR = 0x37, 8156b2bdd1SGireesh Nagabhushana CPL_RTE_READ_RPL = 0x38, 8256b2bdd1SGireesh Nagabhushana CPL_RX_DATA = 0x39, 8356b2bdd1SGireesh Nagabhushana CPL_SET_TCB_RPL = 0x3A, 8456b2bdd1SGireesh Nagabhushana CPL_RX_PKT = 0x3B, 85*de483253SVishal Kulkarni CPL_TAG_READ_RPL = 0x3C, 8656b2bdd1SGireesh Nagabhushana CPL_HIT_NOTIFY = 0x3D, 8756b2bdd1SGireesh Nagabhushana CPL_PKT_NOTIFY = 0x3E, 8856b2bdd1SGireesh Nagabhushana CPL_RX_DDP_COMPLETE = 0x3F, 8956b2bdd1SGireesh Nagabhushana 9056b2bdd1SGireesh Nagabhushana CPL_ACT_ESTABLISH = 0x40, 9156b2bdd1SGireesh Nagabhushana CPL_PASS_ESTABLISH = 0x41, 9256b2bdd1SGireesh Nagabhushana CPL_RX_DATA_DDP = 0x42, 9356b2bdd1SGireesh Nagabhushana CPL_SMT_READ_RPL = 0x43, 9456b2bdd1SGireesh Nagabhushana CPL_PASS_ACCEPT_REQ = 0x44, 9556b2bdd1SGireesh Nagabhushana CPL_RX2TX_PKT = 0x45, 9656b2bdd1SGireesh Nagabhushana CPL_RX_FCOE_DDP = 0x46, 9756b2bdd1SGireesh Nagabhushana CPL_FCOE_HDR = 0x47, 98*de483253SVishal Kulkarni CPL_T5_TRACE_PKT = 0x48, 99*de483253SVishal Kulkarni CPL_RX_ISCSI_DDP = 0x49, 100*de483253SVishal Kulkarni CPL_RX_FCOE_DIF = 0x4A, 101*de483253SVishal Kulkarni CPL_RX_DATA_DIF = 0x4B, 102*de483253SVishal Kulkarni CPL_ERR_NOTIFY = 0x4D, 103*de483253SVishal Kulkarni 10456b2bdd1SGireesh Nagabhushana CPL_RDMA_READ_REQ = 0x60, 105*de483253SVishal Kulkarni CPL_RX_ISCSI_DIF = 0x60, 10656b2bdd1SGireesh Nagabhushana 10756b2bdd1SGireesh Nagabhushana CPL_SET_LE_REQ = 0x80, 10856b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_REQ6 = 0x81, 10956b2bdd1SGireesh Nagabhushana CPL_ACT_OPEN_REQ6 = 0x83, 11056b2bdd1SGireesh Nagabhushana 11156b2bdd1SGireesh Nagabhushana CPL_RDMA_TERMINATE = 0xA2, 11256b2bdd1SGireesh Nagabhushana CPL_RDMA_WRITE = 0xA4, 11356b2bdd1SGireesh Nagabhushana CPL_SGE_EGR_UPDATE = 0xA5, 11456b2bdd1SGireesh Nagabhushana CPL_SET_LE_RPL = 0xA6, 11556b2bdd1SGireesh Nagabhushana CPL_FW2_MSG = 0xA7, 11656b2bdd1SGireesh Nagabhushana CPL_FW2_PLD = 0xA8, 117*de483253SVishal Kulkarni CPL_T5_RDMA_READ_REQ = 0xA9, 118*de483253SVishal Kulkarni CPL_RDMA_ATOMIC_REQ = 0xAA, 119*de483253SVishal Kulkarni CPL_RDMA_ATOMIC_RPL = 0xAB, 120*de483253SVishal Kulkarni CPL_RDMA_IMM_DATA = 0xAC, 121*de483253SVishal Kulkarni CPL_RDMA_IMM_DATA_SE = 0xAD, 12256b2bdd1SGireesh Nagabhushana 12356b2bdd1SGireesh Nagabhushana CPL_TRACE_PKT = 0xB0, 124*de483253SVishal Kulkarni CPL_TRACE_PKT_T5 = 0x48, 12556b2bdd1SGireesh Nagabhushana CPL_RX2TX_DATA = 0xB1, 126*de483253SVishal Kulkarni CPL_ISCSI_DATA = 0xB2, 127*de483253SVishal Kulkarni CPL_FCOE_DATA = 0xB3, 12856b2bdd1SGireesh Nagabhushana 12956b2bdd1SGireesh Nagabhushana CPL_FW4_MSG = 0xC0, 13056b2bdd1SGireesh Nagabhushana CPL_FW4_PLD = 0xC1, 13156b2bdd1SGireesh Nagabhushana CPL_FW4_ACK = 0xC3, 13256b2bdd1SGireesh Nagabhushana 13356b2bdd1SGireesh Nagabhushana CPL_FW6_MSG = 0xE0, 13456b2bdd1SGireesh Nagabhushana CPL_FW6_PLD = 0xE1, 13556b2bdd1SGireesh Nagabhushana CPL_TX_PKT_LSO = 0xED, 13656b2bdd1SGireesh Nagabhushana CPL_TX_PKT_XT = 0xEE, 13756b2bdd1SGireesh Nagabhushana 13856b2bdd1SGireesh Nagabhushana NUM_CPL_CMDS /* must be last and previous entries must be sorted */ 13956b2bdd1SGireesh Nagabhushana }; 14056b2bdd1SGireesh Nagabhushana 14156b2bdd1SGireesh Nagabhushana enum CPL_error { 14256b2bdd1SGireesh Nagabhushana CPL_ERR_NONE = 0, 14356b2bdd1SGireesh Nagabhushana CPL_ERR_TCAM_PARITY = 1, 14456b2bdd1SGireesh Nagabhushana CPL_ERR_TCAM_FULL = 3, 14556b2bdd1SGireesh Nagabhushana CPL_ERR_BAD_LENGTH = 15, 14656b2bdd1SGireesh Nagabhushana CPL_ERR_BAD_ROUTE = 18, 14756b2bdd1SGireesh Nagabhushana CPL_ERR_CONN_RESET = 20, 14856b2bdd1SGireesh Nagabhushana CPL_ERR_CONN_EXIST_SYNRECV = 21, 14956b2bdd1SGireesh Nagabhushana CPL_ERR_CONN_EXIST = 22, 15056b2bdd1SGireesh Nagabhushana CPL_ERR_ARP_MISS = 23, 15156b2bdd1SGireesh Nagabhushana CPL_ERR_BAD_SYN = 24, 15256b2bdd1SGireesh Nagabhushana CPL_ERR_CONN_TIMEDOUT = 30, 15356b2bdd1SGireesh Nagabhushana CPL_ERR_XMIT_TIMEDOUT = 31, 15456b2bdd1SGireesh Nagabhushana CPL_ERR_PERSIST_TIMEDOUT = 32, 15556b2bdd1SGireesh Nagabhushana CPL_ERR_FINWAIT2_TIMEDOUT = 33, 15656b2bdd1SGireesh Nagabhushana CPL_ERR_KEEPALIVE_TIMEDOUT = 34, 15756b2bdd1SGireesh Nagabhushana CPL_ERR_RTX_NEG_ADVICE = 35, 15856b2bdd1SGireesh Nagabhushana CPL_ERR_PERSIST_NEG_ADVICE = 36, 15956b2bdd1SGireesh Nagabhushana CPL_ERR_KEEPALV_NEG_ADVICE = 37, 16056b2bdd1SGireesh Nagabhushana CPL_ERR_WAIT_ARP_RPL = 41, 16156b2bdd1SGireesh Nagabhushana CPL_ERR_ABORT_FAILED = 42, 16256b2bdd1SGireesh Nagabhushana CPL_ERR_IWARP_FLM = 50, 16356b2bdd1SGireesh Nagabhushana }; 16456b2bdd1SGireesh Nagabhushana 16556b2bdd1SGireesh Nagabhushana enum { 16656b2bdd1SGireesh Nagabhushana CPL_CONN_POLICY_AUTO = 0, 16756b2bdd1SGireesh Nagabhushana CPL_CONN_POLICY_ASK = 1, 16856b2bdd1SGireesh Nagabhushana CPL_CONN_POLICY_FILTER = 2, 16956b2bdd1SGireesh Nagabhushana CPL_CONN_POLICY_DENY = 3 17056b2bdd1SGireesh Nagabhushana }; 17156b2bdd1SGireesh Nagabhushana 17256b2bdd1SGireesh Nagabhushana enum { 17356b2bdd1SGireesh Nagabhushana ULP_MODE_NONE = 0, 17456b2bdd1SGireesh Nagabhushana ULP_MODE_ISCSI = 2, 17556b2bdd1SGireesh Nagabhushana ULP_MODE_RDMA = 4, 17656b2bdd1SGireesh Nagabhushana ULP_MODE_TCPDDP = 5, 17756b2bdd1SGireesh Nagabhushana ULP_MODE_FCOE = 6, 17856b2bdd1SGireesh Nagabhushana }; 17956b2bdd1SGireesh Nagabhushana 18056b2bdd1SGireesh Nagabhushana enum { 18156b2bdd1SGireesh Nagabhushana ULP_CRC_HEADER = 1 << 0, 18256b2bdd1SGireesh Nagabhushana ULP_CRC_DATA = 1 << 1 18356b2bdd1SGireesh Nagabhushana }; 18456b2bdd1SGireesh Nagabhushana 18556b2bdd1SGireesh Nagabhushana enum { 18656b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_ACCEPT, 18756b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_REJECT, 18856b2bdd1SGireesh Nagabhushana CPL_PASS_OPEN_ACCEPT_TNL 18956b2bdd1SGireesh Nagabhushana }; 19056b2bdd1SGireesh Nagabhushana 19156b2bdd1SGireesh Nagabhushana enum { 19256b2bdd1SGireesh Nagabhushana CPL_ABORT_SEND_RST = 0, 19356b2bdd1SGireesh Nagabhushana CPL_ABORT_NO_RST, 19456b2bdd1SGireesh Nagabhushana }; 19556b2bdd1SGireesh Nagabhushana 19656b2bdd1SGireesh Nagabhushana enum { /* TX_PKT_XT checksum types */ 19756b2bdd1SGireesh Nagabhushana TX_CSUM_TCP = 0, 19856b2bdd1SGireesh Nagabhushana TX_CSUM_UDP = 1, 19956b2bdd1SGireesh Nagabhushana TX_CSUM_CRC16 = 4, 20056b2bdd1SGireesh Nagabhushana TX_CSUM_CRC32 = 5, 20156b2bdd1SGireesh Nagabhushana TX_CSUM_CRC32C = 6, 20256b2bdd1SGireesh Nagabhushana TX_CSUM_FCOE = 7, 20356b2bdd1SGireesh Nagabhushana TX_CSUM_TCPIP = 8, 20456b2bdd1SGireesh Nagabhushana TX_CSUM_UDPIP = 9, 20556b2bdd1SGireesh Nagabhushana TX_CSUM_TCPIP6 = 10, 20656b2bdd1SGireesh Nagabhushana TX_CSUM_UDPIP6 = 11, 20756b2bdd1SGireesh Nagabhushana TX_CSUM_IP = 12, 20856b2bdd1SGireesh Nagabhushana }; 20956b2bdd1SGireesh Nagabhushana 21056b2bdd1SGireesh Nagabhushana enum { /* packet type in CPL_RX_PKT */ 21156b2bdd1SGireesh Nagabhushana PKTYPE_XACT_UCAST = 0, 21256b2bdd1SGireesh Nagabhushana PKTYPE_HASH_UCAST = 1, 21356b2bdd1SGireesh Nagabhushana PKTYPE_XACT_MCAST = 2, 21456b2bdd1SGireesh Nagabhushana PKTYPE_HASH_MCAST = 3, 21556b2bdd1SGireesh Nagabhushana PKTYPE_PROMISC = 4, 21656b2bdd1SGireesh Nagabhushana PKTYPE_HPROMISC = 5, 21756b2bdd1SGireesh Nagabhushana PKTYPE_BCAST = 6 21856b2bdd1SGireesh Nagabhushana }; 21956b2bdd1SGireesh Nagabhushana 22056b2bdd1SGireesh Nagabhushana enum { /* DMAC type in CPL_RX_PKT */ 22156b2bdd1SGireesh Nagabhushana DATYPE_UCAST, 22256b2bdd1SGireesh Nagabhushana DATYPE_MCAST, 22356b2bdd1SGireesh Nagabhushana DATYPE_BCAST 22456b2bdd1SGireesh Nagabhushana }; 22556b2bdd1SGireesh Nagabhushana 22656b2bdd1SGireesh Nagabhushana enum { /* TCP congestion control algorithms */ 22756b2bdd1SGireesh Nagabhushana CONG_ALG_RENO, 22856b2bdd1SGireesh Nagabhushana CONG_ALG_TAHOE, 22956b2bdd1SGireesh Nagabhushana CONG_ALG_NEWRENO, 23056b2bdd1SGireesh Nagabhushana CONG_ALG_HIGHSPEED 23156b2bdd1SGireesh Nagabhushana }; 23256b2bdd1SGireesh Nagabhushana 23356b2bdd1SGireesh Nagabhushana enum { /* RSS hash type */ 23456b2bdd1SGireesh Nagabhushana RSS_HASH_NONE = 0, /* no hash computed */ 23556b2bdd1SGireesh Nagabhushana RSS_HASH_IP = 1, /* IP or IPv6 2-tuple hash */ 23656b2bdd1SGireesh Nagabhushana RSS_HASH_TCP = 2, /* TCP 4-tuple hash */ 23756b2bdd1SGireesh Nagabhushana RSS_HASH_UDP = 3 /* UDP 4-tuple hash */ 23856b2bdd1SGireesh Nagabhushana }; 23956b2bdd1SGireesh Nagabhushana 24056b2bdd1SGireesh Nagabhushana enum { /* LE commands */ 24156b2bdd1SGireesh Nagabhushana LE_CMD_READ = 0x4, 24256b2bdd1SGireesh Nagabhushana LE_CMD_WRITE = 0xb 24356b2bdd1SGireesh Nagabhushana }; 24456b2bdd1SGireesh Nagabhushana 24556b2bdd1SGireesh Nagabhushana enum { /* LE request size */ 24656b2bdd1SGireesh Nagabhushana LE_SZ_NONE = 0, 24756b2bdd1SGireesh Nagabhushana LE_SZ_33 = 1, 24856b2bdd1SGireesh Nagabhushana LE_SZ_66 = 2, 24956b2bdd1SGireesh Nagabhushana LE_SZ_132 = 3, 25056b2bdd1SGireesh Nagabhushana LE_SZ_264 = 4, 25156b2bdd1SGireesh Nagabhushana LE_SZ_528 = 5 25256b2bdd1SGireesh Nagabhushana }; 25356b2bdd1SGireesh Nagabhushana 25456b2bdd1SGireesh Nagabhushana union opcode_tid { 25556b2bdd1SGireesh Nagabhushana __be32 opcode_tid; 25656b2bdd1SGireesh Nagabhushana __u8 opcode; 25756b2bdd1SGireesh Nagabhushana }; 25856b2bdd1SGireesh Nagabhushana 25956b2bdd1SGireesh Nagabhushana #define S_CPL_OPCODE 24 26056b2bdd1SGireesh Nagabhushana #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE) 26156b2bdd1SGireesh Nagabhushana #define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & 0xFF) 26256b2bdd1SGireesh Nagabhushana #define G_TID(x) ((x) & 0xFFFFFF) 26356b2bdd1SGireesh Nagabhushana 26456b2bdd1SGireesh Nagabhushana /* tid is assumed to be 24-bits */ 26556b2bdd1SGireesh Nagabhushana #define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid)) 26656b2bdd1SGireesh Nagabhushana 26756b2bdd1SGireesh Nagabhushana #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) 26856b2bdd1SGireesh Nagabhushana 26956b2bdd1SGireesh Nagabhushana /* extract the TID from a CPL command */ 27056b2bdd1SGireesh Nagabhushana #define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd)))) 27156b2bdd1SGireesh Nagabhushana 27256b2bdd1SGireesh Nagabhushana /* partitioning of TID fields that also carry a queue id */ 27356b2bdd1SGireesh Nagabhushana #define S_TID_TID 0 27456b2bdd1SGireesh Nagabhushana #define M_TID_TID 0x3fff 27556b2bdd1SGireesh Nagabhushana #define V_TID_TID(x) ((x) << S_TID_TID) 27656b2bdd1SGireesh Nagabhushana #define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID) 27756b2bdd1SGireesh Nagabhushana 27856b2bdd1SGireesh Nagabhushana #define S_TID_QID 14 27956b2bdd1SGireesh Nagabhushana #define M_TID_QID 0x3ff 28056b2bdd1SGireesh Nagabhushana #define V_TID_QID(x) ((x) << S_TID_QID) 28156b2bdd1SGireesh Nagabhushana #define G_TID_QID(x) (((x) >> S_TID_QID) & M_TID_QID) 28256b2bdd1SGireesh Nagabhushana 28356b2bdd1SGireesh Nagabhushana union opcode_info { 28456b2bdd1SGireesh Nagabhushana __be64 opcode_info; 28556b2bdd1SGireesh Nagabhushana __u8 opcode; 28656b2bdd1SGireesh Nagabhushana }; 28756b2bdd1SGireesh Nagabhushana 28856b2bdd1SGireesh Nagabhushana struct tcp_options { 28956b2bdd1SGireesh Nagabhushana __be16 mss; 29056b2bdd1SGireesh Nagabhushana __u8 wsf; 29156b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 29256b2bdd1SGireesh Nagabhushana __u8 :4; 29356b2bdd1SGireesh Nagabhushana __u8 unknown:1; 294*de483253SVishal Kulkarni __u8 ecn:1; 29556b2bdd1SGireesh Nagabhushana __u8 sack:1; 29656b2bdd1SGireesh Nagabhushana __u8 tstamp:1; 29756b2bdd1SGireesh Nagabhushana #else 29856b2bdd1SGireesh Nagabhushana __u8 tstamp:1; 29956b2bdd1SGireesh Nagabhushana __u8 sack:1; 300*de483253SVishal Kulkarni __u8 ecn:1; 30156b2bdd1SGireesh Nagabhushana __u8 unknown:1; 30256b2bdd1SGireesh Nagabhushana __u8 :4; 30356b2bdd1SGireesh Nagabhushana #endif 30456b2bdd1SGireesh Nagabhushana }; 30556b2bdd1SGireesh Nagabhushana 30656b2bdd1SGireesh Nagabhushana struct rss_header { 30756b2bdd1SGireesh Nagabhushana __u8 opcode; 30856b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 30956b2bdd1SGireesh Nagabhushana __u8 channel:2; 31056b2bdd1SGireesh Nagabhushana __u8 filter_hit:1; 31156b2bdd1SGireesh Nagabhushana __u8 filter_tid:1; 31256b2bdd1SGireesh Nagabhushana __u8 hash_type:2; 31356b2bdd1SGireesh Nagabhushana __u8 ipv6:1; 31456b2bdd1SGireesh Nagabhushana __u8 send2fw:1; 31556b2bdd1SGireesh Nagabhushana #else 31656b2bdd1SGireesh Nagabhushana __u8 send2fw:1; 31756b2bdd1SGireesh Nagabhushana __u8 ipv6:1; 31856b2bdd1SGireesh Nagabhushana __u8 hash_type:2; 31956b2bdd1SGireesh Nagabhushana __u8 filter_tid:1; 32056b2bdd1SGireesh Nagabhushana __u8 filter_hit:1; 32156b2bdd1SGireesh Nagabhushana __u8 channel:2; 32256b2bdd1SGireesh Nagabhushana #endif 32356b2bdd1SGireesh Nagabhushana __be16 qid; 32456b2bdd1SGireesh Nagabhushana __be32 hash_val; 32556b2bdd1SGireesh Nagabhushana }; 32656b2bdd1SGireesh Nagabhushana 32756b2bdd1SGireesh Nagabhushana #define S_HASHTYPE 20 32856b2bdd1SGireesh Nagabhushana #define M_HASHTYPE 0x3 32956b2bdd1SGireesh Nagabhushana #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE) 33056b2bdd1SGireesh Nagabhushana 33156b2bdd1SGireesh Nagabhushana #define S_QNUM 0 33256b2bdd1SGireesh Nagabhushana #define M_QNUM 0xFFFF 33356b2bdd1SGireesh Nagabhushana #define G_QNUM(x) (((x) >> S_QNUM) & M_QNUM) 33456b2bdd1SGireesh Nagabhushana 33556b2bdd1SGireesh Nagabhushana #ifndef CHELSIO_FW 33656b2bdd1SGireesh Nagabhushana struct work_request_hdr { 33756b2bdd1SGireesh Nagabhushana __be32 wr_hi; 33856b2bdd1SGireesh Nagabhushana __be32 wr_mid; 33956b2bdd1SGireesh Nagabhushana __be64 wr_lo; 34056b2bdd1SGireesh Nagabhushana }; 34156b2bdd1SGireesh Nagabhushana 34256b2bdd1SGireesh Nagabhushana /* wr_mid fields */ 34356b2bdd1SGireesh Nagabhushana #define S_WR_LEN16 0 34456b2bdd1SGireesh Nagabhushana #define M_WR_LEN16 0xFF 34556b2bdd1SGireesh Nagabhushana #define V_WR_LEN16(x) ((x) << S_WR_LEN16) 34656b2bdd1SGireesh Nagabhushana #define G_WR_LEN16(x) (((x) >> S_WR_LEN16) & M_WR_LEN16) 34756b2bdd1SGireesh Nagabhushana 34856b2bdd1SGireesh Nagabhushana /* wr_hi fields */ 34956b2bdd1SGireesh Nagabhushana #define S_WR_OP 24 35056b2bdd1SGireesh Nagabhushana #define M_WR_OP 0xFF 35156b2bdd1SGireesh Nagabhushana #define V_WR_OP(x) ((__u64)(x) << S_WR_OP) 35256b2bdd1SGireesh Nagabhushana #define G_WR_OP(x) (((x) >> S_WR_OP) & M_WR_OP) 35356b2bdd1SGireesh Nagabhushana 35456b2bdd1SGireesh Nagabhushana #define WR_HDR struct work_request_hdr wr 35556b2bdd1SGireesh Nagabhushana #define WR_HDR_SIZE sizeof (struct work_request_hdr) 35656b2bdd1SGireesh Nagabhushana #define RSS_HDR 35756b2bdd1SGireesh Nagabhushana #else 35856b2bdd1SGireesh Nagabhushana #define WR_HDR 35956b2bdd1SGireesh Nagabhushana #define WR_HDR_SIZE 0 36056b2bdd1SGireesh Nagabhushana #define RSS_HDR struct rss_header rss_hdr; 36156b2bdd1SGireesh Nagabhushana #endif 36256b2bdd1SGireesh Nagabhushana 36356b2bdd1SGireesh Nagabhushana /* option 0 fields */ 36456b2bdd1SGireesh Nagabhushana #define S_ACCEPT_MODE 0 36556b2bdd1SGireesh Nagabhushana #define M_ACCEPT_MODE 0x3 36656b2bdd1SGireesh Nagabhushana #define V_ACCEPT_MODE(x) ((x) << S_ACCEPT_MODE) 36756b2bdd1SGireesh Nagabhushana #define G_ACCEPT_MODE(x) (((x) >> S_ACCEPT_MODE) & M_ACCEPT_MODE) 36856b2bdd1SGireesh Nagabhushana 36956b2bdd1SGireesh Nagabhushana #define S_TX_CHAN 2 37056b2bdd1SGireesh Nagabhushana #define M_TX_CHAN 0x3 37156b2bdd1SGireesh Nagabhushana #define V_TX_CHAN(x) ((x) << S_TX_CHAN) 37256b2bdd1SGireesh Nagabhushana #define G_TX_CHAN(x) (((x) >> S_TX_CHAN) & M_TX_CHAN) 37356b2bdd1SGireesh Nagabhushana 37456b2bdd1SGireesh Nagabhushana #define S_NO_CONG 4 37556b2bdd1SGireesh Nagabhushana #define V_NO_CONG(x) ((x) << S_NO_CONG) 37656b2bdd1SGireesh Nagabhushana #define F_NO_CONG V_NO_CONG(1U) 37756b2bdd1SGireesh Nagabhushana 37856b2bdd1SGireesh Nagabhushana #define S_DELACK 5 37956b2bdd1SGireesh Nagabhushana #define V_DELACK(x) ((x) << S_DELACK) 38056b2bdd1SGireesh Nagabhushana #define F_DELACK V_DELACK(1U) 38156b2bdd1SGireesh Nagabhushana 38256b2bdd1SGireesh Nagabhushana #define S_INJECT_TIMER 6 38356b2bdd1SGireesh Nagabhushana #define V_INJECT_TIMER(x) ((x) << S_INJECT_TIMER) 38456b2bdd1SGireesh Nagabhushana #define F_INJECT_TIMER V_INJECT_TIMER(1U) 38556b2bdd1SGireesh Nagabhushana 38656b2bdd1SGireesh Nagabhushana #define S_NON_OFFLOAD 7 38756b2bdd1SGireesh Nagabhushana #define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD) 38856b2bdd1SGireesh Nagabhushana #define F_NON_OFFLOAD V_NON_OFFLOAD(1U) 38956b2bdd1SGireesh Nagabhushana 39056b2bdd1SGireesh Nagabhushana #define S_ULP_MODE 8 39156b2bdd1SGireesh Nagabhushana #define M_ULP_MODE 0xF 39256b2bdd1SGireesh Nagabhushana #define V_ULP_MODE(x) ((x) << S_ULP_MODE) 39356b2bdd1SGireesh Nagabhushana #define G_ULP_MODE(x) (((x) >> S_ULP_MODE) & M_ULP_MODE) 39456b2bdd1SGireesh Nagabhushana 39556b2bdd1SGireesh Nagabhushana #define S_RCV_BUFSIZ 12 39656b2bdd1SGireesh Nagabhushana #define M_RCV_BUFSIZ 0x3FFU 39756b2bdd1SGireesh Nagabhushana #define V_RCV_BUFSIZ(x) ((x) << S_RCV_BUFSIZ) 39856b2bdd1SGireesh Nagabhushana #define G_RCV_BUFSIZ(x) (((x) >> S_RCV_BUFSIZ) & M_RCV_BUFSIZ) 39956b2bdd1SGireesh Nagabhushana 40056b2bdd1SGireesh Nagabhushana #define S_DSCP 22 40156b2bdd1SGireesh Nagabhushana #define M_DSCP 0x3F 40256b2bdd1SGireesh Nagabhushana #define V_DSCP(x) ((x) << S_DSCP) 40356b2bdd1SGireesh Nagabhushana #define G_DSCP(x) (((x) >> S_DSCP) & M_DSCP) 40456b2bdd1SGireesh Nagabhushana 40556b2bdd1SGireesh Nagabhushana #define S_SMAC_SEL 28 40656b2bdd1SGireesh Nagabhushana #define M_SMAC_SEL 0xFF 40756b2bdd1SGireesh Nagabhushana #define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL) 40856b2bdd1SGireesh Nagabhushana #define G_SMAC_SEL(x) (((x) >> S_SMAC_SEL) & M_SMAC_SEL) 40956b2bdd1SGireesh Nagabhushana 41056b2bdd1SGireesh Nagabhushana #define S_L2T_IDX 36 41156b2bdd1SGireesh Nagabhushana #define M_L2T_IDX 0xFFF 41256b2bdd1SGireesh Nagabhushana #define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX) 41356b2bdd1SGireesh Nagabhushana #define G_L2T_IDX(x) (((x) >> S_L2T_IDX) & M_L2T_IDX) 41456b2bdd1SGireesh Nagabhushana 41556b2bdd1SGireesh Nagabhushana #define S_TCAM_BYPASS 48 41656b2bdd1SGireesh Nagabhushana #define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS) 41756b2bdd1SGireesh Nagabhushana #define F_TCAM_BYPASS V_TCAM_BYPASS(1ULL) 41856b2bdd1SGireesh Nagabhushana 41956b2bdd1SGireesh Nagabhushana #define S_NAGLE 49 42056b2bdd1SGireesh Nagabhushana #define V_NAGLE(x) ((__u64)(x) << S_NAGLE) 42156b2bdd1SGireesh Nagabhushana #define F_NAGLE V_NAGLE(1ULL) 42256b2bdd1SGireesh Nagabhushana 42356b2bdd1SGireesh Nagabhushana #define S_WND_SCALE 50 42456b2bdd1SGireesh Nagabhushana #define M_WND_SCALE 0xF 42556b2bdd1SGireesh Nagabhushana #define V_WND_SCALE(x) ((__u64)(x) << S_WND_SCALE) 42656b2bdd1SGireesh Nagabhushana #define G_WND_SCALE(x) (((x) >> S_WND_SCALE) & M_WND_SCALE) 42756b2bdd1SGireesh Nagabhushana 42856b2bdd1SGireesh Nagabhushana #define S_KEEP_ALIVE 54 42956b2bdd1SGireesh Nagabhushana #define V_KEEP_ALIVE(x) ((__u64)(x) << S_KEEP_ALIVE) 43056b2bdd1SGireesh Nagabhushana #define F_KEEP_ALIVE V_KEEP_ALIVE(1ULL) 43156b2bdd1SGireesh Nagabhushana 43256b2bdd1SGireesh Nagabhushana #define S_MAX_RT 55 43356b2bdd1SGireesh Nagabhushana #define M_MAX_RT 0xF 43456b2bdd1SGireesh Nagabhushana #define V_MAX_RT(x) ((__u64)(x) << S_MAX_RT) 43556b2bdd1SGireesh Nagabhushana #define G_MAX_RT(x) (((x) >> S_MAX_RT) & M_MAX_RT) 43656b2bdd1SGireesh Nagabhushana 43756b2bdd1SGireesh Nagabhushana #define S_MAX_RT_OVERRIDE 59 43856b2bdd1SGireesh Nagabhushana #define V_MAX_RT_OVERRIDE(x) ((__u64)(x) << S_MAX_RT_OVERRIDE) 43956b2bdd1SGireesh Nagabhushana #define F_MAX_RT_OVERRIDE V_MAX_RT_OVERRIDE(1ULL) 44056b2bdd1SGireesh Nagabhushana 44156b2bdd1SGireesh Nagabhushana #define S_MSS_IDX 60 44256b2bdd1SGireesh Nagabhushana #define M_MSS_IDX 0xF 44356b2bdd1SGireesh Nagabhushana #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX) 44456b2bdd1SGireesh Nagabhushana #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX) 44556b2bdd1SGireesh Nagabhushana 44656b2bdd1SGireesh Nagabhushana /* option 1 fields */ 44756b2bdd1SGireesh Nagabhushana #define S_SYN_RSS_ENABLE 0 44856b2bdd1SGireesh Nagabhushana #define V_SYN_RSS_ENABLE(x) ((x) << S_SYN_RSS_ENABLE) 44956b2bdd1SGireesh Nagabhushana #define F_SYN_RSS_ENABLE V_SYN_RSS_ENABLE(1U) 45056b2bdd1SGireesh Nagabhushana 45156b2bdd1SGireesh Nagabhushana #define S_SYN_RSS_USE_HASH 1 45256b2bdd1SGireesh Nagabhushana #define V_SYN_RSS_USE_HASH(x) ((x) << S_SYN_RSS_USE_HASH) 45356b2bdd1SGireesh Nagabhushana #define F_SYN_RSS_USE_HASH V_SYN_RSS_USE_HASH(1U) 45456b2bdd1SGireesh Nagabhushana 45556b2bdd1SGireesh Nagabhushana #define S_SYN_RSS_QUEUE 2 45656b2bdd1SGireesh Nagabhushana #define M_SYN_RSS_QUEUE 0x3FF 45756b2bdd1SGireesh Nagabhushana #define V_SYN_RSS_QUEUE(x) ((x) << S_SYN_RSS_QUEUE) 45856b2bdd1SGireesh Nagabhushana #define G_SYN_RSS_QUEUE(x) (((x) >> S_SYN_RSS_QUEUE) & M_SYN_RSS_QUEUE) 45956b2bdd1SGireesh Nagabhushana 46056b2bdd1SGireesh Nagabhushana #define S_LISTEN_INTF 12 46156b2bdd1SGireesh Nagabhushana #define M_LISTEN_INTF 0xFF 46256b2bdd1SGireesh Nagabhushana #define V_LISTEN_INTF(x) ((x) << S_LISTEN_INTF) 46356b2bdd1SGireesh Nagabhushana #define G_LISTEN_INTF(x) (((x) >> S_LISTEN_INTF) & M_LISTEN_INTF) 46456b2bdd1SGireesh Nagabhushana 46556b2bdd1SGireesh Nagabhushana #define S_LISTEN_FILTER 20 46656b2bdd1SGireesh Nagabhushana #define V_LISTEN_FILTER(x) ((x) << S_LISTEN_FILTER) 46756b2bdd1SGireesh Nagabhushana #define F_LISTEN_FILTER V_LISTEN_FILTER(1U) 46856b2bdd1SGireesh Nagabhushana 46956b2bdd1SGireesh Nagabhushana #define S_SYN_DEFENSE 21 47056b2bdd1SGireesh Nagabhushana #define V_SYN_DEFENSE(x) ((x) << S_SYN_DEFENSE) 47156b2bdd1SGireesh Nagabhushana #define F_SYN_DEFENSE V_SYN_DEFENSE(1U) 47256b2bdd1SGireesh Nagabhushana 47356b2bdd1SGireesh Nagabhushana #define S_CONN_POLICY 22 47456b2bdd1SGireesh Nagabhushana #define M_CONN_POLICY 0x3 47556b2bdd1SGireesh Nagabhushana #define V_CONN_POLICY(x) ((x) << S_CONN_POLICY) 47656b2bdd1SGireesh Nagabhushana #define G_CONN_POLICY(x) (((x) >> S_CONN_POLICY) & M_CONN_POLICY) 47756b2bdd1SGireesh Nagabhushana 478*de483253SVishal Kulkarni #define S_FILT_INFO 28 479*de483253SVishal Kulkarni #define M_FILT_INFO 0xfffffffffULL 480*de483253SVishal Kulkarni #define V_FILT_INFO(x) ((x) << S_FILT_INFO) 481*de483253SVishal Kulkarni #define G_FILT_INFO(x) (((x) >> S_FILT_INFO) & M_FILT_INFO) 482*de483253SVishal Kulkarni 48356b2bdd1SGireesh Nagabhushana /* option 2 fields */ 48456b2bdd1SGireesh Nagabhushana #define S_RSS_QUEUE 0 48556b2bdd1SGireesh Nagabhushana #define M_RSS_QUEUE 0x3FF 48656b2bdd1SGireesh Nagabhushana #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE) 48756b2bdd1SGireesh Nagabhushana #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE) 48856b2bdd1SGireesh Nagabhushana 48956b2bdd1SGireesh Nagabhushana #define S_RSS_QUEUE_VALID 10 49056b2bdd1SGireesh Nagabhushana #define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID) 49156b2bdd1SGireesh Nagabhushana #define F_RSS_QUEUE_VALID V_RSS_QUEUE_VALID(1U) 49256b2bdd1SGireesh Nagabhushana 49356b2bdd1SGireesh Nagabhushana #define S_RX_COALESCE_VALID 11 49456b2bdd1SGireesh Nagabhushana #define V_RX_COALESCE_VALID(x) ((x) << S_RX_COALESCE_VALID) 49556b2bdd1SGireesh Nagabhushana #define F_RX_COALESCE_VALID V_RX_COALESCE_VALID(1U) 49656b2bdd1SGireesh Nagabhushana 49756b2bdd1SGireesh Nagabhushana #define S_RX_COALESCE 12 49856b2bdd1SGireesh Nagabhushana #define M_RX_COALESCE 0x3 49956b2bdd1SGireesh Nagabhushana #define V_RX_COALESCE(x) ((x) << S_RX_COALESCE) 50056b2bdd1SGireesh Nagabhushana #define G_RX_COALESCE(x) (((x) >> S_RX_COALESCE) & M_RX_COALESCE) 50156b2bdd1SGireesh Nagabhushana 50256b2bdd1SGireesh Nagabhushana #define S_CONG_CNTRL 14 50356b2bdd1SGireesh Nagabhushana #define M_CONG_CNTRL 0x3 50456b2bdd1SGireesh Nagabhushana #define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL) 50556b2bdd1SGireesh Nagabhushana #define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL) 50656b2bdd1SGireesh Nagabhushana 50756b2bdd1SGireesh Nagabhushana #define S_PACE 16 50856b2bdd1SGireesh Nagabhushana #define M_PACE 0x3 50956b2bdd1SGireesh Nagabhushana #define V_PACE(x) ((x) << S_PACE) 51056b2bdd1SGireesh Nagabhushana #define G_PACE(x) (((x) >> S_PACE) & M_PACE) 51156b2bdd1SGireesh Nagabhushana 51256b2bdd1SGireesh Nagabhushana #define S_CONG_CNTRL_VALID 18 51356b2bdd1SGireesh Nagabhushana #define V_CONG_CNTRL_VALID(x) ((x) << S_CONG_CNTRL_VALID) 51456b2bdd1SGireesh Nagabhushana #define F_CONG_CNTRL_VALID V_CONG_CNTRL_VALID(1U) 51556b2bdd1SGireesh Nagabhushana 51656b2bdd1SGireesh Nagabhushana #define S_PACE_VALID 19 51756b2bdd1SGireesh Nagabhushana #define V_PACE_VALID(x) ((x) << S_PACE_VALID) 51856b2bdd1SGireesh Nagabhushana #define F_PACE_VALID V_PACE_VALID(1U) 51956b2bdd1SGireesh Nagabhushana 52056b2bdd1SGireesh Nagabhushana #define S_RX_FC_DISABLE 20 52156b2bdd1SGireesh Nagabhushana #define V_RX_FC_DISABLE(x) ((x) << S_RX_FC_DISABLE) 52256b2bdd1SGireesh Nagabhushana #define F_RX_FC_DISABLE V_RX_FC_DISABLE(1U) 52356b2bdd1SGireesh Nagabhushana 52456b2bdd1SGireesh Nagabhushana #define S_RX_FC_DDP 21 52556b2bdd1SGireesh Nagabhushana #define V_RX_FC_DDP(x) ((x) << S_RX_FC_DDP) 52656b2bdd1SGireesh Nagabhushana #define F_RX_FC_DDP V_RX_FC_DDP(1U) 52756b2bdd1SGireesh Nagabhushana 52856b2bdd1SGireesh Nagabhushana #define S_RX_FC_VALID 22 52956b2bdd1SGireesh Nagabhushana #define V_RX_FC_VALID(x) ((x) << S_RX_FC_VALID) 53056b2bdd1SGireesh Nagabhushana #define F_RX_FC_VALID V_RX_FC_VALID(1U) 53156b2bdd1SGireesh Nagabhushana 53256b2bdd1SGireesh Nagabhushana #define S_TX_QUEUE 23 53356b2bdd1SGireesh Nagabhushana #define M_TX_QUEUE 0x7 53456b2bdd1SGireesh Nagabhushana #define V_TX_QUEUE(x) ((x) << S_TX_QUEUE) 53556b2bdd1SGireesh Nagabhushana #define G_TX_QUEUE(x) (((x) >> S_TX_QUEUE) & M_TX_QUEUE) 53656b2bdd1SGireesh Nagabhushana 53756b2bdd1SGireesh Nagabhushana #define S_RX_CHANNEL 26 53856b2bdd1SGireesh Nagabhushana #define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL) 53956b2bdd1SGireesh Nagabhushana #define F_RX_CHANNEL V_RX_CHANNEL(1U) 54056b2bdd1SGireesh Nagabhushana 54156b2bdd1SGireesh Nagabhushana #define S_CCTRL_ECN 27 54256b2bdd1SGireesh Nagabhushana #define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN) 54356b2bdd1SGireesh Nagabhushana #define F_CCTRL_ECN V_CCTRL_ECN(1U) 54456b2bdd1SGireesh Nagabhushana 54556b2bdd1SGireesh Nagabhushana #define S_WND_SCALE_EN 28 54656b2bdd1SGireesh Nagabhushana #define V_WND_SCALE_EN(x) ((x) << S_WND_SCALE_EN) 54756b2bdd1SGireesh Nagabhushana #define F_WND_SCALE_EN V_WND_SCALE_EN(1U) 54856b2bdd1SGireesh Nagabhushana 54956b2bdd1SGireesh Nagabhushana #define S_TSTAMPS_EN 29 55056b2bdd1SGireesh Nagabhushana #define V_TSTAMPS_EN(x) ((x) << S_TSTAMPS_EN) 55156b2bdd1SGireesh Nagabhushana #define F_TSTAMPS_EN V_TSTAMPS_EN(1U) 55256b2bdd1SGireesh Nagabhushana 55356b2bdd1SGireesh Nagabhushana #define S_SACK_EN 30 55456b2bdd1SGireesh Nagabhushana #define V_SACK_EN(x) ((x) << S_SACK_EN) 55556b2bdd1SGireesh Nagabhushana #define F_SACK_EN V_SACK_EN(1U) 55656b2bdd1SGireesh Nagabhushana 557*de483253SVishal Kulkarni #define S_T5_OPT_2_VALID 31 558*de483253SVishal Kulkarni #define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID) 559*de483253SVishal Kulkarni #define F_T5_OPT_2_VALID V_T5_OPT_2_VALID(1U) 560*de483253SVishal Kulkarni 56156b2bdd1SGireesh Nagabhushana struct cpl_pass_open_req { 56256b2bdd1SGireesh Nagabhushana WR_HDR; 56356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 56456b2bdd1SGireesh Nagabhushana __be16 local_port; 56556b2bdd1SGireesh Nagabhushana __be16 peer_port; 56656b2bdd1SGireesh Nagabhushana __be32 local_ip; 56756b2bdd1SGireesh Nagabhushana __be32 peer_ip; 56856b2bdd1SGireesh Nagabhushana __be64 opt0; 56956b2bdd1SGireesh Nagabhushana __be64 opt1; 57056b2bdd1SGireesh Nagabhushana }; 57156b2bdd1SGireesh Nagabhushana 57256b2bdd1SGireesh Nagabhushana struct cpl_pass_open_req6 { 57356b2bdd1SGireesh Nagabhushana WR_HDR; 57456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 57556b2bdd1SGireesh Nagabhushana __be16 local_port; 57656b2bdd1SGireesh Nagabhushana __be16 peer_port; 57756b2bdd1SGireesh Nagabhushana __be64 local_ip_hi; 57856b2bdd1SGireesh Nagabhushana __be64 local_ip_lo; 57956b2bdd1SGireesh Nagabhushana __be64 peer_ip_hi; 58056b2bdd1SGireesh Nagabhushana __be64 peer_ip_lo; 58156b2bdd1SGireesh Nagabhushana __be64 opt0; 58256b2bdd1SGireesh Nagabhushana __be64 opt1; 58356b2bdd1SGireesh Nagabhushana }; 58456b2bdd1SGireesh Nagabhushana 58556b2bdd1SGireesh Nagabhushana struct cpl_pass_open_rpl { 58656b2bdd1SGireesh Nagabhushana RSS_HDR 58756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 58856b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 58956b2bdd1SGireesh Nagabhushana __u8 status; 59056b2bdd1SGireesh Nagabhushana }; 59156b2bdd1SGireesh Nagabhushana 59256b2bdd1SGireesh Nagabhushana struct cpl_pass_establish { 59356b2bdd1SGireesh Nagabhushana RSS_HDR 59456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 59556b2bdd1SGireesh Nagabhushana __be32 rsvd; 59656b2bdd1SGireesh Nagabhushana __be32 tos_stid; 59756b2bdd1SGireesh Nagabhushana __be16 mac_idx; 59856b2bdd1SGireesh Nagabhushana __be16 tcp_opt; 59956b2bdd1SGireesh Nagabhushana __be32 snd_isn; 60056b2bdd1SGireesh Nagabhushana __be32 rcv_isn; 60156b2bdd1SGireesh Nagabhushana }; 60256b2bdd1SGireesh Nagabhushana 60356b2bdd1SGireesh Nagabhushana /* cpl_pass_establish.tos_stid fields */ 60456b2bdd1SGireesh Nagabhushana #define S_PASS_OPEN_TID 0 60556b2bdd1SGireesh Nagabhushana #define M_PASS_OPEN_TID 0xFFFFFF 60656b2bdd1SGireesh Nagabhushana #define V_PASS_OPEN_TID(x) ((x) << S_PASS_OPEN_TID) 60756b2bdd1SGireesh Nagabhushana #define G_PASS_OPEN_TID(x) (((x) >> S_PASS_OPEN_TID) & M_PASS_OPEN_TID) 60856b2bdd1SGireesh Nagabhushana 60956b2bdd1SGireesh Nagabhushana #define S_PASS_OPEN_TOS 24 61056b2bdd1SGireesh Nagabhushana #define M_PASS_OPEN_TOS 0xFF 61156b2bdd1SGireesh Nagabhushana #define V_PASS_OPEN_TOS(x) ((x) << S_PASS_OPEN_TOS) 61256b2bdd1SGireesh Nagabhushana #define G_PASS_OPEN_TOS(x) (((x) >> S_PASS_OPEN_TOS) & M_PASS_OPEN_TOS) 61356b2bdd1SGireesh Nagabhushana 61456b2bdd1SGireesh Nagabhushana /* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */ 61556b2bdd1SGireesh Nagabhushana #define G_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1) 61656b2bdd1SGireesh Nagabhushana #define G_TCPOPT_SACK(x) (((x) >> 6) & 1) 61756b2bdd1SGireesh Nagabhushana #define G_TCPOPT_TSTAMP(x) (((x) >> 7) & 1) 61856b2bdd1SGireesh Nagabhushana #define G_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf) 61956b2bdd1SGireesh Nagabhushana #define G_TCPOPT_MSS(x) (((x) >> 12) & 0xf) 62056b2bdd1SGireesh Nagabhushana 62156b2bdd1SGireesh Nagabhushana struct cpl_pass_accept_req { 62256b2bdd1SGireesh Nagabhushana RSS_HDR 62356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 62456b2bdd1SGireesh Nagabhushana __be16 rsvd; 62556b2bdd1SGireesh Nagabhushana __be16 len; 62656b2bdd1SGireesh Nagabhushana __be32 hdr_len; 62756b2bdd1SGireesh Nagabhushana __be16 vlan; 62856b2bdd1SGireesh Nagabhushana __be16 l2info; 62956b2bdd1SGireesh Nagabhushana __be32 tos_stid; 63056b2bdd1SGireesh Nagabhushana struct tcp_options tcpopt; 63156b2bdd1SGireesh Nagabhushana }; 63256b2bdd1SGireesh Nagabhushana 63356b2bdd1SGireesh Nagabhushana /* cpl_pass_accept_req.hdr_len fields */ 63456b2bdd1SGireesh Nagabhushana #define S_SYN_RX_CHAN 0 63556b2bdd1SGireesh Nagabhushana #define M_SYN_RX_CHAN 0xF 63656b2bdd1SGireesh Nagabhushana #define V_SYN_RX_CHAN(x) ((x) << S_SYN_RX_CHAN) 63756b2bdd1SGireesh Nagabhushana #define G_SYN_RX_CHAN(x) (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN) 63856b2bdd1SGireesh Nagabhushana 63956b2bdd1SGireesh Nagabhushana #define S_TCP_HDR_LEN 10 64056b2bdd1SGireesh Nagabhushana #define M_TCP_HDR_LEN 0x3F 64156b2bdd1SGireesh Nagabhushana #define V_TCP_HDR_LEN(x) ((x) << S_TCP_HDR_LEN) 64256b2bdd1SGireesh Nagabhushana #define G_TCP_HDR_LEN(x) (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN) 64356b2bdd1SGireesh Nagabhushana 64456b2bdd1SGireesh Nagabhushana #define S_IP_HDR_LEN 16 64556b2bdd1SGireesh Nagabhushana #define M_IP_HDR_LEN 0x3FF 64656b2bdd1SGireesh Nagabhushana #define V_IP_HDR_LEN(x) ((x) << S_IP_HDR_LEN) 64756b2bdd1SGireesh Nagabhushana #define G_IP_HDR_LEN(x) (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN) 64856b2bdd1SGireesh Nagabhushana 64956b2bdd1SGireesh Nagabhushana #define S_ETH_HDR_LEN 26 650*de483253SVishal Kulkarni #define M_ETH_HDR_LEN 0x3F 65156b2bdd1SGireesh Nagabhushana #define V_ETH_HDR_LEN(x) ((x) << S_ETH_HDR_LEN) 65256b2bdd1SGireesh Nagabhushana #define G_ETH_HDR_LEN(x) (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN) 65356b2bdd1SGireesh Nagabhushana 65456b2bdd1SGireesh Nagabhushana /* cpl_pass_accept_req.l2info fields */ 65556b2bdd1SGireesh Nagabhushana #define S_SYN_MAC_IDX 0 65656b2bdd1SGireesh Nagabhushana #define M_SYN_MAC_IDX 0x1FF 65756b2bdd1SGireesh Nagabhushana #define V_SYN_MAC_IDX(x) ((x) << S_SYN_MAC_IDX) 65856b2bdd1SGireesh Nagabhushana #define G_SYN_MAC_IDX(x) (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX) 65956b2bdd1SGireesh Nagabhushana 66056b2bdd1SGireesh Nagabhushana #define S_SYN_XACT_MATCH 9 66156b2bdd1SGireesh Nagabhushana #define V_SYN_XACT_MATCH(x) ((x) << S_SYN_XACT_MATCH) 66256b2bdd1SGireesh Nagabhushana #define F_SYN_XACT_MATCH V_SYN_XACT_MATCH(1U) 66356b2bdd1SGireesh Nagabhushana 66456b2bdd1SGireesh Nagabhushana #define S_SYN_INTF 12 66556b2bdd1SGireesh Nagabhushana #define M_SYN_INTF 0xF 66656b2bdd1SGireesh Nagabhushana #define V_SYN_INTF(x) ((x) << S_SYN_INTF) 66756b2bdd1SGireesh Nagabhushana #define G_SYN_INTF(x) (((x) >> S_SYN_INTF) & M_SYN_INTF) 66856b2bdd1SGireesh Nagabhushana 66956b2bdd1SGireesh Nagabhushana struct cpl_pass_accept_rpl { 67056b2bdd1SGireesh Nagabhushana WR_HDR; 67156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 67256b2bdd1SGireesh Nagabhushana __be32 opt2; 67356b2bdd1SGireesh Nagabhushana __be64 opt0; 67456b2bdd1SGireesh Nagabhushana }; 67556b2bdd1SGireesh Nagabhushana 676*de483253SVishal Kulkarni struct cpl_t5_pass_accept_rpl { 677*de483253SVishal Kulkarni WR_HDR; 678*de483253SVishal Kulkarni union opcode_tid ot; 679*de483253SVishal Kulkarni __be32 opt2; 680*de483253SVishal Kulkarni __be64 opt0; 681*de483253SVishal Kulkarni __be32 iss; 682*de483253SVishal Kulkarni __be32 rsvd; 683*de483253SVishal Kulkarni }; 684*de483253SVishal Kulkarni 68556b2bdd1SGireesh Nagabhushana struct cpl_act_open_req { 68656b2bdd1SGireesh Nagabhushana WR_HDR; 68756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 68856b2bdd1SGireesh Nagabhushana __be16 local_port; 68956b2bdd1SGireesh Nagabhushana __be16 peer_port; 69056b2bdd1SGireesh Nagabhushana __be32 local_ip; 69156b2bdd1SGireesh Nagabhushana __be32 peer_ip; 69256b2bdd1SGireesh Nagabhushana __be64 opt0; 69356b2bdd1SGireesh Nagabhushana __be32 params; 69456b2bdd1SGireesh Nagabhushana __be32 opt2; 69556b2bdd1SGireesh Nagabhushana }; 69656b2bdd1SGireesh Nagabhushana 697*de483253SVishal Kulkarni #define S_FILTER_TUPLE 24 698*de483253SVishal Kulkarni #define M_FILTER_TUPLE 0xFFFFFFFFFF 699*de483253SVishal Kulkarni #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE) 700*de483253SVishal Kulkarni #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE) 701*de483253SVishal Kulkarni struct cpl_t5_act_open_req { 702*de483253SVishal Kulkarni WR_HDR; 703*de483253SVishal Kulkarni union opcode_tid ot; 704*de483253SVishal Kulkarni __be16 local_port; 705*de483253SVishal Kulkarni __be16 peer_port; 706*de483253SVishal Kulkarni __be32 local_ip; 707*de483253SVishal Kulkarni __be32 peer_ip; 708*de483253SVishal Kulkarni __be64 opt0; 709*de483253SVishal Kulkarni __be32 iss; 710*de483253SVishal Kulkarni __be32 opt2; 711*de483253SVishal Kulkarni __be64 params; 712*de483253SVishal Kulkarni }; 713*de483253SVishal Kulkarni 71456b2bdd1SGireesh Nagabhushana struct cpl_act_open_req6 { 71556b2bdd1SGireesh Nagabhushana WR_HDR; 71656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 71756b2bdd1SGireesh Nagabhushana __be16 local_port; 71856b2bdd1SGireesh Nagabhushana __be16 peer_port; 71956b2bdd1SGireesh Nagabhushana __be64 local_ip_hi; 72056b2bdd1SGireesh Nagabhushana __be64 local_ip_lo; 72156b2bdd1SGireesh Nagabhushana __be64 peer_ip_hi; 72256b2bdd1SGireesh Nagabhushana __be64 peer_ip_lo; 72356b2bdd1SGireesh Nagabhushana __be64 opt0; 72456b2bdd1SGireesh Nagabhushana __be32 params; 72556b2bdd1SGireesh Nagabhushana __be32 opt2; 72656b2bdd1SGireesh Nagabhushana }; 72756b2bdd1SGireesh Nagabhushana 728*de483253SVishal Kulkarni struct cpl_t5_act_open_req6 { 729*de483253SVishal Kulkarni WR_HDR; 730*de483253SVishal Kulkarni union opcode_tid ot; 731*de483253SVishal Kulkarni __be16 local_port; 732*de483253SVishal Kulkarni __be16 peer_port; 733*de483253SVishal Kulkarni __be64 local_ip_hi; 734*de483253SVishal Kulkarni __be64 local_ip_lo; 735*de483253SVishal Kulkarni __be64 peer_ip_hi; 736*de483253SVishal Kulkarni __be64 peer_ip_lo; 737*de483253SVishal Kulkarni __be64 opt0; 738*de483253SVishal Kulkarni __be32 iss; 739*de483253SVishal Kulkarni __be32 opt2; 740*de483253SVishal Kulkarni __be64 params; 741*de483253SVishal Kulkarni }; 742*de483253SVishal Kulkarni 74356b2bdd1SGireesh Nagabhushana struct cpl_act_open_rpl { 74456b2bdd1SGireesh Nagabhushana RSS_HDR 74556b2bdd1SGireesh Nagabhushana union opcode_tid ot; 74656b2bdd1SGireesh Nagabhushana __be32 atid_status; 74756b2bdd1SGireesh Nagabhushana }; 74856b2bdd1SGireesh Nagabhushana 74956b2bdd1SGireesh Nagabhushana /* cpl_act_open_rpl.atid_status fields */ 75056b2bdd1SGireesh Nagabhushana #define S_AOPEN_STATUS 0 75156b2bdd1SGireesh Nagabhushana #define M_AOPEN_STATUS 0xFF 75256b2bdd1SGireesh Nagabhushana #define V_AOPEN_STATUS(x) ((x) << S_AOPEN_STATUS) 75356b2bdd1SGireesh Nagabhushana #define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS) 75456b2bdd1SGireesh Nagabhushana 75556b2bdd1SGireesh Nagabhushana #define S_AOPEN_ATID 8 75656b2bdd1SGireesh Nagabhushana #define M_AOPEN_ATID 0xFFFFFF 75756b2bdd1SGireesh Nagabhushana #define V_AOPEN_ATID(x) ((x) << S_AOPEN_ATID) 75856b2bdd1SGireesh Nagabhushana #define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID) 75956b2bdd1SGireesh Nagabhushana 76056b2bdd1SGireesh Nagabhushana struct cpl_act_establish { 76156b2bdd1SGireesh Nagabhushana RSS_HDR 76256b2bdd1SGireesh Nagabhushana union opcode_tid ot; 76356b2bdd1SGireesh Nagabhushana __be32 rsvd; 76456b2bdd1SGireesh Nagabhushana __be32 tos_atid; 76556b2bdd1SGireesh Nagabhushana __be16 mac_idx; 76656b2bdd1SGireesh Nagabhushana __be16 tcp_opt; 76756b2bdd1SGireesh Nagabhushana __be32 snd_isn; 76856b2bdd1SGireesh Nagabhushana __be32 rcv_isn; 76956b2bdd1SGireesh Nagabhushana }; 77056b2bdd1SGireesh Nagabhushana 77156b2bdd1SGireesh Nagabhushana struct cpl_get_tcb { 77256b2bdd1SGireesh Nagabhushana WR_HDR; 77356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 77456b2bdd1SGireesh Nagabhushana __be16 reply_ctrl; 77556b2bdd1SGireesh Nagabhushana __be16 cookie; 77656b2bdd1SGireesh Nagabhushana }; 77756b2bdd1SGireesh Nagabhushana 77856b2bdd1SGireesh Nagabhushana /* cpl_get_tcb.reply_ctrl fields */ 77956b2bdd1SGireesh Nagabhushana #define S_QUEUENO 0 78056b2bdd1SGireesh Nagabhushana #define M_QUEUENO 0x3FF 78156b2bdd1SGireesh Nagabhushana #define V_QUEUENO(x) ((x) << S_QUEUENO) 78256b2bdd1SGireesh Nagabhushana #define G_QUEUENO(x) (((x) >> S_QUEUENO) & M_QUEUENO) 78356b2bdd1SGireesh Nagabhushana 78456b2bdd1SGireesh Nagabhushana #define S_REPLY_CHAN 14 78556b2bdd1SGireesh Nagabhushana #define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN) 78656b2bdd1SGireesh Nagabhushana #define F_REPLY_CHAN V_REPLY_CHAN(1U) 78756b2bdd1SGireesh Nagabhushana 78856b2bdd1SGireesh Nagabhushana #define S_NO_REPLY 15 78956b2bdd1SGireesh Nagabhushana #define V_NO_REPLY(x) ((x) << S_NO_REPLY) 79056b2bdd1SGireesh Nagabhushana #define F_NO_REPLY V_NO_REPLY(1U) 79156b2bdd1SGireesh Nagabhushana 79256b2bdd1SGireesh Nagabhushana struct cpl_get_tcb_rpl { 79356b2bdd1SGireesh Nagabhushana RSS_HDR 79456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 79556b2bdd1SGireesh Nagabhushana __u8 cookie; 79656b2bdd1SGireesh Nagabhushana __u8 status; 79756b2bdd1SGireesh Nagabhushana __be16 len; 79856b2bdd1SGireesh Nagabhushana }; 79956b2bdd1SGireesh Nagabhushana 80056b2bdd1SGireesh Nagabhushana struct cpl_set_tcb { 80156b2bdd1SGireesh Nagabhushana WR_HDR; 80256b2bdd1SGireesh Nagabhushana union opcode_tid ot; 80356b2bdd1SGireesh Nagabhushana __be16 reply_ctrl; 80456b2bdd1SGireesh Nagabhushana __be16 cookie; 80556b2bdd1SGireesh Nagabhushana }; 80656b2bdd1SGireesh Nagabhushana 80756b2bdd1SGireesh Nagabhushana struct cpl_set_tcb_field { 80856b2bdd1SGireesh Nagabhushana WR_HDR; 80956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 81056b2bdd1SGireesh Nagabhushana __be16 reply_ctrl; 81156b2bdd1SGireesh Nagabhushana __be16 word_cookie; 81256b2bdd1SGireesh Nagabhushana __be64 mask; 81356b2bdd1SGireesh Nagabhushana __be64 val; 81456b2bdd1SGireesh Nagabhushana }; 81556b2bdd1SGireesh Nagabhushana 816*de483253SVishal Kulkarni struct cpl_set_tcb_field_core { 817*de483253SVishal Kulkarni union opcode_tid ot; 818*de483253SVishal Kulkarni __be16 reply_ctrl; 819*de483253SVishal Kulkarni __be16 word_cookie; 820*de483253SVishal Kulkarni __be64 mask; 821*de483253SVishal Kulkarni __be64 val; 822*de483253SVishal Kulkarni }; 823*de483253SVishal Kulkarni 82456b2bdd1SGireesh Nagabhushana /* cpl_set_tcb_field.word_cookie fields */ 82556b2bdd1SGireesh Nagabhushana #define S_WORD 0 82656b2bdd1SGireesh Nagabhushana #define M_WORD 0x1F 82756b2bdd1SGireesh Nagabhushana #define V_WORD(x) ((x) << S_WORD) 82856b2bdd1SGireesh Nagabhushana #define G_WORD(x) (((x) >> S_WORD) & M_WORD) 82956b2bdd1SGireesh Nagabhushana 83056b2bdd1SGireesh Nagabhushana #define S_COOKIE 5 83156b2bdd1SGireesh Nagabhushana #define M_COOKIE 0x7 83256b2bdd1SGireesh Nagabhushana #define V_COOKIE(x) ((x) << S_COOKIE) 83356b2bdd1SGireesh Nagabhushana #define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE) 83456b2bdd1SGireesh Nagabhushana 83556b2bdd1SGireesh Nagabhushana struct cpl_set_tcb_rpl { 83656b2bdd1SGireesh Nagabhushana RSS_HDR 83756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 83856b2bdd1SGireesh Nagabhushana __be16 rsvd; 83956b2bdd1SGireesh Nagabhushana __u8 cookie; 84056b2bdd1SGireesh Nagabhushana __u8 status; 84156b2bdd1SGireesh Nagabhushana __be64 oldval; 84256b2bdd1SGireesh Nagabhushana }; 84356b2bdd1SGireesh Nagabhushana 84456b2bdd1SGireesh Nagabhushana struct cpl_close_con_req { 84556b2bdd1SGireesh Nagabhushana WR_HDR; 84656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 84756b2bdd1SGireesh Nagabhushana __be32 rsvd; 84856b2bdd1SGireesh Nagabhushana }; 84956b2bdd1SGireesh Nagabhushana 85056b2bdd1SGireesh Nagabhushana struct cpl_close_con_rpl { 85156b2bdd1SGireesh Nagabhushana RSS_HDR 85256b2bdd1SGireesh Nagabhushana union opcode_tid ot; 85356b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 85456b2bdd1SGireesh Nagabhushana __u8 status; 85556b2bdd1SGireesh Nagabhushana __be32 snd_nxt; 85656b2bdd1SGireesh Nagabhushana __be32 rcv_nxt; 85756b2bdd1SGireesh Nagabhushana }; 85856b2bdd1SGireesh Nagabhushana 85956b2bdd1SGireesh Nagabhushana struct cpl_close_listsvr_req { 86056b2bdd1SGireesh Nagabhushana WR_HDR; 86156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 86256b2bdd1SGireesh Nagabhushana __be16 reply_ctrl; 86356b2bdd1SGireesh Nagabhushana __be16 rsvd; 86456b2bdd1SGireesh Nagabhushana }; 86556b2bdd1SGireesh Nagabhushana 86656b2bdd1SGireesh Nagabhushana /* additional cpl_close_listsvr_req.reply_ctrl field */ 86756b2bdd1SGireesh Nagabhushana #define S_LISTSVR_IPV6 14 86856b2bdd1SGireesh Nagabhushana #define V_LISTSVR_IPV6(x) ((x) << S_LISTSVR_IPV6) 86956b2bdd1SGireesh Nagabhushana #define F_LISTSVR_IPV6 V_LISTSVR_IPV6(1U) 87056b2bdd1SGireesh Nagabhushana 87156b2bdd1SGireesh Nagabhushana struct cpl_close_listsvr_rpl { 87256b2bdd1SGireesh Nagabhushana RSS_HDR 87356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 87456b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 87556b2bdd1SGireesh Nagabhushana __u8 status; 87656b2bdd1SGireesh Nagabhushana }; 87756b2bdd1SGireesh Nagabhushana 87856b2bdd1SGireesh Nagabhushana struct cpl_abort_req_rss { 87956b2bdd1SGireesh Nagabhushana RSS_HDR 88056b2bdd1SGireesh Nagabhushana union opcode_tid ot; 88156b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 88256b2bdd1SGireesh Nagabhushana __u8 status; 88356b2bdd1SGireesh Nagabhushana }; 88456b2bdd1SGireesh Nagabhushana 88556b2bdd1SGireesh Nagabhushana struct cpl_abort_req { 88656b2bdd1SGireesh Nagabhushana WR_HDR; 88756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 88856b2bdd1SGireesh Nagabhushana __be32 rsvd0; 88956b2bdd1SGireesh Nagabhushana __u8 rsvd1; 89056b2bdd1SGireesh Nagabhushana __u8 cmd; 89156b2bdd1SGireesh Nagabhushana __u8 rsvd2[6]; 89256b2bdd1SGireesh Nagabhushana }; 89356b2bdd1SGireesh Nagabhushana 89456b2bdd1SGireesh Nagabhushana struct cpl_abort_rpl_rss { 89556b2bdd1SGireesh Nagabhushana RSS_HDR 89656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 89756b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 89856b2bdd1SGireesh Nagabhushana __u8 status; 89956b2bdd1SGireesh Nagabhushana }; 90056b2bdd1SGireesh Nagabhushana 90156b2bdd1SGireesh Nagabhushana struct cpl_abort_rpl { 90256b2bdd1SGireesh Nagabhushana WR_HDR; 90356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 90456b2bdd1SGireesh Nagabhushana __be32 rsvd0; 90556b2bdd1SGireesh Nagabhushana __u8 rsvd1; 90656b2bdd1SGireesh Nagabhushana __u8 cmd; 90756b2bdd1SGireesh Nagabhushana __u8 rsvd2[6]; 90856b2bdd1SGireesh Nagabhushana }; 90956b2bdd1SGireesh Nagabhushana 91056b2bdd1SGireesh Nagabhushana struct cpl_peer_close { 91156b2bdd1SGireesh Nagabhushana RSS_HDR 91256b2bdd1SGireesh Nagabhushana union opcode_tid ot; 91356b2bdd1SGireesh Nagabhushana __be32 rcv_nxt; 91456b2bdd1SGireesh Nagabhushana }; 91556b2bdd1SGireesh Nagabhushana 91656b2bdd1SGireesh Nagabhushana struct cpl_tid_release { 91756b2bdd1SGireesh Nagabhushana WR_HDR; 91856b2bdd1SGireesh Nagabhushana union opcode_tid ot; 91956b2bdd1SGireesh Nagabhushana __be32 rsvd; 92056b2bdd1SGireesh Nagabhushana }; 92156b2bdd1SGireesh Nagabhushana 92256b2bdd1SGireesh Nagabhushana struct tx_data_wr { 92356b2bdd1SGireesh Nagabhushana __be32 wr_hi; 92456b2bdd1SGireesh Nagabhushana __be32 wr_lo; 92556b2bdd1SGireesh Nagabhushana __be32 len; 92656b2bdd1SGireesh Nagabhushana __be32 flags; 92756b2bdd1SGireesh Nagabhushana __be32 sndseq; 92856b2bdd1SGireesh Nagabhushana __be32 param; 92956b2bdd1SGireesh Nagabhushana }; 93056b2bdd1SGireesh Nagabhushana 93156b2bdd1SGireesh Nagabhushana /* tx_data_wr.flags fields */ 93256b2bdd1SGireesh Nagabhushana #define S_TX_ACK_PAGES 21 93356b2bdd1SGireesh Nagabhushana #define M_TX_ACK_PAGES 0x7 93456b2bdd1SGireesh Nagabhushana #define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES) 93556b2bdd1SGireesh Nagabhushana #define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES) 93656b2bdd1SGireesh Nagabhushana 93756b2bdd1SGireesh Nagabhushana /* tx_data_wr.param fields */ 93856b2bdd1SGireesh Nagabhushana #define S_TX_PORT 0 93956b2bdd1SGireesh Nagabhushana #define M_TX_PORT 0x7 94056b2bdd1SGireesh Nagabhushana #define V_TX_PORT(x) ((x) << S_TX_PORT) 94156b2bdd1SGireesh Nagabhushana #define G_TX_PORT(x) (((x) >> S_TX_PORT) & M_TX_PORT) 94256b2bdd1SGireesh Nagabhushana 94356b2bdd1SGireesh Nagabhushana #define S_TX_MSS 4 94456b2bdd1SGireesh Nagabhushana #define M_TX_MSS 0xF 94556b2bdd1SGireesh Nagabhushana #define V_TX_MSS(x) ((x) << S_TX_MSS) 94656b2bdd1SGireesh Nagabhushana #define G_TX_MSS(x) (((x) >> S_TX_MSS) & M_TX_MSS) 94756b2bdd1SGireesh Nagabhushana 94856b2bdd1SGireesh Nagabhushana #define S_TX_QOS 8 94956b2bdd1SGireesh Nagabhushana #define M_TX_QOS 0xFF 95056b2bdd1SGireesh Nagabhushana #define V_TX_QOS(x) ((x) << S_TX_QOS) 95156b2bdd1SGireesh Nagabhushana #define G_TX_QOS(x) (((x) >> S_TX_QOS) & M_TX_QOS) 95256b2bdd1SGireesh Nagabhushana 95356b2bdd1SGireesh Nagabhushana #define S_TX_SNDBUF 16 95456b2bdd1SGireesh Nagabhushana #define M_TX_SNDBUF 0xFFFF 95556b2bdd1SGireesh Nagabhushana #define V_TX_SNDBUF(x) ((x) << S_TX_SNDBUF) 95656b2bdd1SGireesh Nagabhushana #define G_TX_SNDBUF(x) (((x) >> S_TX_SNDBUF) & M_TX_SNDBUF) 95756b2bdd1SGireesh Nagabhushana 95856b2bdd1SGireesh Nagabhushana struct cpl_tx_data { 95956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 96056b2bdd1SGireesh Nagabhushana __be32 len; 96156b2bdd1SGireesh Nagabhushana __be32 rsvd; 96256b2bdd1SGireesh Nagabhushana __be32 flags; 96356b2bdd1SGireesh Nagabhushana }; 96456b2bdd1SGireesh Nagabhushana 96556b2bdd1SGireesh Nagabhushana /* cpl_tx_data.flags fields */ 96656b2bdd1SGireesh Nagabhushana #define S_TX_PROXY 5 96756b2bdd1SGireesh Nagabhushana #define V_TX_PROXY(x) ((x) << S_TX_PROXY) 96856b2bdd1SGireesh Nagabhushana #define F_TX_PROXY V_TX_PROXY(1U) 96956b2bdd1SGireesh Nagabhushana 97056b2bdd1SGireesh Nagabhushana #define S_TX_ULP_SUBMODE 6 97156b2bdd1SGireesh Nagabhushana #define M_TX_ULP_SUBMODE 0xF 97256b2bdd1SGireesh Nagabhushana #define V_TX_ULP_SUBMODE(x) ((x) << S_TX_ULP_SUBMODE) 97356b2bdd1SGireesh Nagabhushana #define G_TX_ULP_SUBMODE(x) (((x) >> S_TX_ULP_SUBMODE) & M_TX_ULP_SUBMODE) 97456b2bdd1SGireesh Nagabhushana 97556b2bdd1SGireesh Nagabhushana #define S_TX_ULP_MODE 10 97656b2bdd1SGireesh Nagabhushana #define M_TX_ULP_MODE 0xF 97756b2bdd1SGireesh Nagabhushana #define V_TX_ULP_MODE(x) ((x) << S_TX_ULP_MODE) 97856b2bdd1SGireesh Nagabhushana #define G_TX_ULP_MODE(x) (((x) >> S_TX_ULP_MODE) & M_TX_ULP_MODE) 97956b2bdd1SGireesh Nagabhushana 98056b2bdd1SGireesh Nagabhushana #define S_TX_SHOVE 14 98156b2bdd1SGireesh Nagabhushana #define V_TX_SHOVE(x) ((x) << S_TX_SHOVE) 98256b2bdd1SGireesh Nagabhushana #define F_TX_SHOVE V_TX_SHOVE(1U) 98356b2bdd1SGireesh Nagabhushana 98456b2bdd1SGireesh Nagabhushana #define S_TX_MORE 15 98556b2bdd1SGireesh Nagabhushana #define V_TX_MORE(x) ((x) << S_TX_MORE) 98656b2bdd1SGireesh Nagabhushana #define F_TX_MORE V_TX_MORE(1U) 98756b2bdd1SGireesh Nagabhushana 98856b2bdd1SGireesh Nagabhushana #define S_TX_URG 16 98956b2bdd1SGireesh Nagabhushana #define V_TX_URG(x) ((x) << S_TX_URG) 99056b2bdd1SGireesh Nagabhushana #define F_TX_URG V_TX_URG(1U) 99156b2bdd1SGireesh Nagabhushana 99256b2bdd1SGireesh Nagabhushana #define S_TX_FLUSH 17 99356b2bdd1SGireesh Nagabhushana #define V_TX_FLUSH(x) ((x) << S_TX_FLUSH) 99456b2bdd1SGireesh Nagabhushana #define F_TX_FLUSH V_TX_FLUSH(1U) 99556b2bdd1SGireesh Nagabhushana 99656b2bdd1SGireesh Nagabhushana #define S_TX_SAVE 18 99756b2bdd1SGireesh Nagabhushana #define V_TX_SAVE(x) ((x) << S_TX_SAVE) 99856b2bdd1SGireesh Nagabhushana #define F_TX_SAVE V_TX_SAVE(1U) 99956b2bdd1SGireesh Nagabhushana 100056b2bdd1SGireesh Nagabhushana #define S_TX_TNL 19 100156b2bdd1SGireesh Nagabhushana #define V_TX_TNL(x) ((x) << S_TX_TNL) 100256b2bdd1SGireesh Nagabhushana #define F_TX_TNL V_TX_TNL(1U) 100356b2bdd1SGireesh Nagabhushana 100456b2bdd1SGireesh Nagabhushana /* additional tx_data_wr.flags fields */ 100556b2bdd1SGireesh Nagabhushana #define S_TX_CPU_IDX 0 100656b2bdd1SGireesh Nagabhushana #define M_TX_CPU_IDX 0x3F 100756b2bdd1SGireesh Nagabhushana #define V_TX_CPU_IDX(x) ((x) << S_TX_CPU_IDX) 100856b2bdd1SGireesh Nagabhushana #define G_TX_CPU_IDX(x) (((x) >> S_TX_CPU_IDX) & M_TX_CPU_IDX) 100956b2bdd1SGireesh Nagabhushana 101056b2bdd1SGireesh Nagabhushana #define S_TX_CLOSE 17 101156b2bdd1SGireesh Nagabhushana #define V_TX_CLOSE(x) ((x) << S_TX_CLOSE) 101256b2bdd1SGireesh Nagabhushana #define F_TX_CLOSE V_TX_CLOSE(1U) 101356b2bdd1SGireesh Nagabhushana 101456b2bdd1SGireesh Nagabhushana #define S_TX_INIT 18 101556b2bdd1SGireesh Nagabhushana #define V_TX_INIT(x) ((x) << S_TX_INIT) 101656b2bdd1SGireesh Nagabhushana #define F_TX_INIT V_TX_INIT(1U) 101756b2bdd1SGireesh Nagabhushana 101856b2bdd1SGireesh Nagabhushana #define S_TX_IMM_ACK 19 101956b2bdd1SGireesh Nagabhushana #define V_TX_IMM_ACK(x) ((x) << S_TX_IMM_ACK) 102056b2bdd1SGireesh Nagabhushana #define F_TX_IMM_ACK V_TX_IMM_ACK(1U) 102156b2bdd1SGireesh Nagabhushana 102256b2bdd1SGireesh Nagabhushana #define S_TX_IMM_DMA 20 102356b2bdd1SGireesh Nagabhushana #define V_TX_IMM_DMA(x) ((x) << S_TX_IMM_DMA) 102456b2bdd1SGireesh Nagabhushana #define F_TX_IMM_DMA V_TX_IMM_DMA(1U) 102556b2bdd1SGireesh Nagabhushana 102656b2bdd1SGireesh Nagabhushana struct cpl_tx_data_ack { 102756b2bdd1SGireesh Nagabhushana RSS_HDR 102856b2bdd1SGireesh Nagabhushana union opcode_tid ot; 102956b2bdd1SGireesh Nagabhushana __be32 snd_una; 103056b2bdd1SGireesh Nagabhushana }; 103156b2bdd1SGireesh Nagabhushana 103256b2bdd1SGireesh Nagabhushana struct cpl_wr_ack { /* TODO */ 103356b2bdd1SGireesh Nagabhushana RSS_HDR 103456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 103556b2bdd1SGireesh Nagabhushana __be16 credits; 103656b2bdd1SGireesh Nagabhushana __be16 rsvd; 103756b2bdd1SGireesh Nagabhushana __be32 snd_nxt; 103856b2bdd1SGireesh Nagabhushana __be32 snd_una; 103956b2bdd1SGireesh Nagabhushana }; 104056b2bdd1SGireesh Nagabhushana 104156b2bdd1SGireesh Nagabhushana struct cpl_tx_pkt_core { 104256b2bdd1SGireesh Nagabhushana __be32 ctrl0; 104356b2bdd1SGireesh Nagabhushana __be16 pack; 104456b2bdd1SGireesh Nagabhushana __be16 len; 104556b2bdd1SGireesh Nagabhushana __be64 ctrl1; 104656b2bdd1SGireesh Nagabhushana }; 104756b2bdd1SGireesh Nagabhushana 104856b2bdd1SGireesh Nagabhushana struct cpl_tx_pkt { 104956b2bdd1SGireesh Nagabhushana WR_HDR; 105056b2bdd1SGireesh Nagabhushana struct cpl_tx_pkt_core c; 105156b2bdd1SGireesh Nagabhushana }; 105256b2bdd1SGireesh Nagabhushana 105356b2bdd1SGireesh Nagabhushana #define cpl_tx_pkt_xt cpl_tx_pkt 105456b2bdd1SGireesh Nagabhushana 105556b2bdd1SGireesh Nagabhushana /* cpl_tx_pkt_core.ctrl0 fields */ 105656b2bdd1SGireesh Nagabhushana #define S_TXPKT_VF 0 105756b2bdd1SGireesh Nagabhushana #define M_TXPKT_VF 0xFF 105856b2bdd1SGireesh Nagabhushana #define V_TXPKT_VF(x) ((x) << S_TXPKT_VF) 105956b2bdd1SGireesh Nagabhushana #define G_TXPKT_VF(x) (((x) >> S_TXPKT_VF) & M_TXPKT_VF) 106056b2bdd1SGireesh Nagabhushana 106156b2bdd1SGireesh Nagabhushana #define S_TXPKT_PF 8 106256b2bdd1SGireesh Nagabhushana #define M_TXPKT_PF 0x7 106356b2bdd1SGireesh Nagabhushana #define V_TXPKT_PF(x) ((x) << S_TXPKT_PF) 106456b2bdd1SGireesh Nagabhushana #define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF) 106556b2bdd1SGireesh Nagabhushana 106656b2bdd1SGireesh Nagabhushana #define S_TXPKT_VF_VLD 11 106756b2bdd1SGireesh Nagabhushana #define V_TXPKT_VF_VLD(x) ((x) << S_TXPKT_VF_VLD) 106856b2bdd1SGireesh Nagabhushana #define F_TXPKT_VF_VLD V_TXPKT_VF_VLD(1U) 106956b2bdd1SGireesh Nagabhushana 107056b2bdd1SGireesh Nagabhushana #define S_TXPKT_OVLAN_IDX 12 107156b2bdd1SGireesh Nagabhushana #define M_TXPKT_OVLAN_IDX 0xF 107256b2bdd1SGireesh Nagabhushana #define V_TXPKT_OVLAN_IDX(x) ((x) << S_TXPKT_OVLAN_IDX) 107356b2bdd1SGireesh Nagabhushana #define G_TXPKT_OVLAN_IDX(x) (((x) >> S_TXPKT_OVLAN_IDX) & M_TXPKT_OVLAN_IDX) 107456b2bdd1SGireesh Nagabhushana 1075*de483253SVishal Kulkarni #define S_TXPKT_T5_OVLAN_IDX 12 1076*de483253SVishal Kulkarni #define M_TXPKT_T5_OVLAN_IDX 0x7 1077*de483253SVishal Kulkarni #define V_TXPKT_T5_OVLAN_IDX(x) ((x) << S_TXPKT_T5_OVLAN_IDX) 1078*de483253SVishal Kulkarni #define G_TXPKT_T5_OVLAN_IDX(x) (((x) >> S_TXPKT_T5_OVLAN_IDX) & \ 1079*de483253SVishal Kulkarni M_TXPKT_T5_OVLAN_IDX) 1080*de483253SVishal Kulkarni 108156b2bdd1SGireesh Nagabhushana #define S_TXPKT_INTF 16 108256b2bdd1SGireesh Nagabhushana #define M_TXPKT_INTF 0xF 108356b2bdd1SGireesh Nagabhushana #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF) 108456b2bdd1SGireesh Nagabhushana #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF) 108556b2bdd1SGireesh Nagabhushana 108656b2bdd1SGireesh Nagabhushana #define S_TXPKT_SPECIAL_STAT 20 108756b2bdd1SGireesh Nagabhushana #define V_TXPKT_SPECIAL_STAT(x) ((x) << S_TXPKT_SPECIAL_STAT) 108856b2bdd1SGireesh Nagabhushana #define F_TXPKT_SPECIAL_STAT V_TXPKT_SPECIAL_STAT(1U) 108956b2bdd1SGireesh Nagabhushana 1090*de483253SVishal Kulkarni #define S_TXPKT_T5_FCS_DIS 21 1091*de483253SVishal Kulkarni #define V_TXPKT_T5_FCS_DIS(x) ((x) << S_TXPKT_T5_FCS_DIS) 1092*de483253SVishal Kulkarni #define F_TXPKT_T5_FCS_DIS V_TXPKT_T5_FCS_DIS(1U) 1093*de483253SVishal Kulkarni 109456b2bdd1SGireesh Nagabhushana #define S_TXPKT_INS_OVLAN 21 109556b2bdd1SGireesh Nagabhushana #define V_TXPKT_INS_OVLAN(x) ((x) << S_TXPKT_INS_OVLAN) 109656b2bdd1SGireesh Nagabhushana #define F_TXPKT_INS_OVLAN V_TXPKT_INS_OVLAN(1U) 109756b2bdd1SGireesh Nagabhushana 1098*de483253SVishal Kulkarni #define S_TXPKT_T5_INS_OVLAN 15 1099*de483253SVishal Kulkarni #define V_TXPKT_T5_INS_OVLAN(x) ((x) << S_TXPKT_T5_INS_OVLAN) 1100*de483253SVishal Kulkarni #define F_TXPKT_T5_INS_OVLAN V_TXPKT_T5_INS_OVLAN(1U) 1101*de483253SVishal Kulkarni 110256b2bdd1SGireesh Nagabhushana #define S_TXPKT_STAT_DIS 22 110356b2bdd1SGireesh Nagabhushana #define V_TXPKT_STAT_DIS(x) ((x) << S_TXPKT_STAT_DIS) 110456b2bdd1SGireesh Nagabhushana #define F_TXPKT_STAT_DIS V_TXPKT_STAT_DIS(1U) 110556b2bdd1SGireesh Nagabhushana 110656b2bdd1SGireesh Nagabhushana #define S_TXPKT_LOOPBACK 23 110756b2bdd1SGireesh Nagabhushana #define V_TXPKT_LOOPBACK(x) ((x) << S_TXPKT_LOOPBACK) 110856b2bdd1SGireesh Nagabhushana #define F_TXPKT_LOOPBACK V_TXPKT_LOOPBACK(1U) 110956b2bdd1SGireesh Nagabhushana 1110*de483253SVishal Kulkarni #define S_TXPKT_TSTAMP 23 1111*de483253SVishal Kulkarni #define V_TXPKT_TSTAMP(x) ((x) << S_TXPKT_TSTAMP) 1112*de483253SVishal Kulkarni #define F_TXPKT_TSTAMP V_TXPKT_TSTAMP(1U) 1113*de483253SVishal Kulkarni 111456b2bdd1SGireesh Nagabhushana #define S_TXPKT_OPCODE 24 111556b2bdd1SGireesh Nagabhushana #define M_TXPKT_OPCODE 0xFF 111656b2bdd1SGireesh Nagabhushana #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE) 111756b2bdd1SGireesh Nagabhushana #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE) 111856b2bdd1SGireesh Nagabhushana 111956b2bdd1SGireesh Nagabhushana /* cpl_tx_pkt_core.ctrl1 fields */ 112056b2bdd1SGireesh Nagabhushana #define S_TXPKT_SA_IDX 0 112156b2bdd1SGireesh Nagabhushana #define M_TXPKT_SA_IDX 0xFFF 112256b2bdd1SGireesh Nagabhushana #define V_TXPKT_SA_IDX(x) ((x) << S_TXPKT_SA_IDX) 112356b2bdd1SGireesh Nagabhushana #define G_TXPKT_SA_IDX(x) (((x) >> S_TXPKT_SA_IDX) & M_TXPKT_SA_IDX) 112456b2bdd1SGireesh Nagabhushana 112556b2bdd1SGireesh Nagabhushana #define S_TXPKT_CSUM_END 12 112656b2bdd1SGireesh Nagabhushana #define M_TXPKT_CSUM_END 0xFF 112756b2bdd1SGireesh Nagabhushana #define V_TXPKT_CSUM_END(x) ((x) << S_TXPKT_CSUM_END) 112856b2bdd1SGireesh Nagabhushana #define G_TXPKT_CSUM_END(x) (((x) >> S_TXPKT_CSUM_END) & M_TXPKT_CSUM_END) 112956b2bdd1SGireesh Nagabhushana 113056b2bdd1SGireesh Nagabhushana #define S_TXPKT_CSUM_START 20 113156b2bdd1SGireesh Nagabhushana #define M_TXPKT_CSUM_START 0x3FF 113256b2bdd1SGireesh Nagabhushana #define V_TXPKT_CSUM_START(x) ((x) << S_TXPKT_CSUM_START) 113356b2bdd1SGireesh Nagabhushana #define G_TXPKT_CSUM_START(x) (((x) >> S_TXPKT_CSUM_START) & M_TXPKT_CSUM_START) 113456b2bdd1SGireesh Nagabhushana 113556b2bdd1SGireesh Nagabhushana #define S_TXPKT_IPHDR_LEN 20 113656b2bdd1SGireesh Nagabhushana #define M_TXPKT_IPHDR_LEN 0x3FFF 113756b2bdd1SGireesh Nagabhushana #define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN) 113856b2bdd1SGireesh Nagabhushana #define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN) 113956b2bdd1SGireesh Nagabhushana 114056b2bdd1SGireesh Nagabhushana #define S_TXPKT_CSUM_LOC 30 114156b2bdd1SGireesh Nagabhushana #define M_TXPKT_CSUM_LOC 0x3FF 114256b2bdd1SGireesh Nagabhushana #define V_TXPKT_CSUM_LOC(x) ((__u64)(x) << S_TXPKT_CSUM_LOC) 114356b2bdd1SGireesh Nagabhushana #define G_TXPKT_CSUM_LOC(x) (((x) >> S_TXPKT_CSUM_LOC) & M_TXPKT_CSUM_LOC) 114456b2bdd1SGireesh Nagabhushana 114556b2bdd1SGireesh Nagabhushana #define S_TXPKT_ETHHDR_LEN 34 114656b2bdd1SGireesh Nagabhushana #define M_TXPKT_ETHHDR_LEN 0x3F 114756b2bdd1SGireesh Nagabhushana #define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN) 114856b2bdd1SGireesh Nagabhushana #define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN) 114956b2bdd1SGireesh Nagabhushana 115056b2bdd1SGireesh Nagabhushana #define S_TXPKT_CSUM_TYPE 40 115156b2bdd1SGireesh Nagabhushana #define M_TXPKT_CSUM_TYPE 0xF 115256b2bdd1SGireesh Nagabhushana #define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE) 115356b2bdd1SGireesh Nagabhushana #define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE) 115456b2bdd1SGireesh Nagabhushana 115556b2bdd1SGireesh Nagabhushana #define S_TXPKT_VLAN 44 115656b2bdd1SGireesh Nagabhushana #define M_TXPKT_VLAN 0xFFFF 115756b2bdd1SGireesh Nagabhushana #define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN) 115856b2bdd1SGireesh Nagabhushana #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN) 115956b2bdd1SGireesh Nagabhushana 116056b2bdd1SGireesh Nagabhushana #define S_TXPKT_VLAN_VLD 60 116156b2bdd1SGireesh Nagabhushana #define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD) 116256b2bdd1SGireesh Nagabhushana #define F_TXPKT_VLAN_VLD V_TXPKT_VLAN_VLD(1ULL) 116356b2bdd1SGireesh Nagabhushana 116456b2bdd1SGireesh Nagabhushana #define S_TXPKT_IPSEC 61 116556b2bdd1SGireesh Nagabhushana #define V_TXPKT_IPSEC(x) ((__u64)(x) << S_TXPKT_IPSEC) 116656b2bdd1SGireesh Nagabhushana #define F_TXPKT_IPSEC V_TXPKT_IPSEC(1ULL) 116756b2bdd1SGireesh Nagabhushana 116856b2bdd1SGireesh Nagabhushana #define S_TXPKT_IPCSUM_DIS 62 116956b2bdd1SGireesh Nagabhushana #define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS) 117056b2bdd1SGireesh Nagabhushana #define F_TXPKT_IPCSUM_DIS V_TXPKT_IPCSUM_DIS(1ULL) 117156b2bdd1SGireesh Nagabhushana 117256b2bdd1SGireesh Nagabhushana #define S_TXPKT_L4CSUM_DIS 63 117356b2bdd1SGireesh Nagabhushana #define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS) 117456b2bdd1SGireesh Nagabhushana #define F_TXPKT_L4CSUM_DIS V_TXPKT_L4CSUM_DIS(1ULL) 117556b2bdd1SGireesh Nagabhushana 1176*de483253SVishal Kulkarni struct cpl_tx_pkt_lso_core{ 117756b2bdd1SGireesh Nagabhushana __be32 lso_ctrl; 117856b2bdd1SGireesh Nagabhushana __be16 ipid_ofst; 117956b2bdd1SGireesh Nagabhushana __be16 mss; 118056b2bdd1SGireesh Nagabhushana __be32 seqno_offset; 118156b2bdd1SGireesh Nagabhushana __be32 len; 118256b2bdd1SGireesh Nagabhushana /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 118356b2bdd1SGireesh Nagabhushana }; 118456b2bdd1SGireesh Nagabhushana 1185*de483253SVishal Kulkarni struct cpl_tx_pkt_lso { 1186*de483253SVishal Kulkarni WR_HDR; 1187*de483253SVishal Kulkarni struct cpl_tx_pkt_lso_core c; 1188*de483253SVishal Kulkarni /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1189*de483253SVishal Kulkarni }; 1190*de483253SVishal Kulkarni 1191*de483253SVishal Kulkarni struct cpl_tx_pkt_ufo_core { 1192*de483253SVishal Kulkarni __be16 ethlen; 1193*de483253SVishal Kulkarni __be16 iplen; 1194*de483253SVishal Kulkarni __be16 udplen; 1195*de483253SVishal Kulkarni __be16 mss; 1196*de483253SVishal Kulkarni __be32 len; 1197*de483253SVishal Kulkarni __be32 r1; 1198*de483253SVishal Kulkarni /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1199*de483253SVishal Kulkarni }; 1200*de483253SVishal Kulkarni 1201*de483253SVishal Kulkarni struct cpl_tx_pkt_ufo { 1202*de483253SVishal Kulkarni WR_HDR; 1203*de483253SVishal Kulkarni struct cpl_tx_pkt_ufo_core c; 1204*de483253SVishal Kulkarni /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 1205*de483253SVishal Kulkarni }; 1206*de483253SVishal Kulkarni 1207*de483253SVishal Kulkarni /* cpl_tx_pkt_lso_core.lso_ctrl fields */ 120856b2bdd1SGireesh Nagabhushana #define S_LSO_TCPHDR_LEN 0 120956b2bdd1SGireesh Nagabhushana #define M_LSO_TCPHDR_LEN 0xF 121056b2bdd1SGireesh Nagabhushana #define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN) 121156b2bdd1SGireesh Nagabhushana #define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN) 121256b2bdd1SGireesh Nagabhushana 121356b2bdd1SGireesh Nagabhushana #define S_LSO_IPHDR_LEN 4 121456b2bdd1SGireesh Nagabhushana #define M_LSO_IPHDR_LEN 0xFFF 121556b2bdd1SGireesh Nagabhushana #define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN) 121656b2bdd1SGireesh Nagabhushana #define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN) 121756b2bdd1SGireesh Nagabhushana 121856b2bdd1SGireesh Nagabhushana #define S_LSO_ETHHDR_LEN 16 121956b2bdd1SGireesh Nagabhushana #define M_LSO_ETHHDR_LEN 0xF 122056b2bdd1SGireesh Nagabhushana #define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN) 122156b2bdd1SGireesh Nagabhushana #define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN) 122256b2bdd1SGireesh Nagabhushana 122356b2bdd1SGireesh Nagabhushana #define S_LSO_IPV6 20 122456b2bdd1SGireesh Nagabhushana #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6) 122556b2bdd1SGireesh Nagabhushana #define F_LSO_IPV6 V_LSO_IPV6(1U) 122656b2bdd1SGireesh Nagabhushana 122756b2bdd1SGireesh Nagabhushana #define S_LSO_OFLD_ENCAP 21 122856b2bdd1SGireesh Nagabhushana #define V_LSO_OFLD_ENCAP(x) ((x) << S_LSO_OFLD_ENCAP) 122956b2bdd1SGireesh Nagabhushana #define F_LSO_OFLD_ENCAP V_LSO_OFLD_ENCAP(1U) 123056b2bdd1SGireesh Nagabhushana 123156b2bdd1SGireesh Nagabhushana #define S_LSO_LAST_SLICE 22 123256b2bdd1SGireesh Nagabhushana #define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE) 123356b2bdd1SGireesh Nagabhushana #define F_LSO_LAST_SLICE V_LSO_LAST_SLICE(1U) 123456b2bdd1SGireesh Nagabhushana 123556b2bdd1SGireesh Nagabhushana #define S_LSO_FIRST_SLICE 23 123656b2bdd1SGireesh Nagabhushana #define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE) 123756b2bdd1SGireesh Nagabhushana #define F_LSO_FIRST_SLICE V_LSO_FIRST_SLICE(1U) 123856b2bdd1SGireesh Nagabhushana 123956b2bdd1SGireesh Nagabhushana #define S_LSO_OPCODE 24 124056b2bdd1SGireesh Nagabhushana #define M_LSO_OPCODE 0xFF 124156b2bdd1SGireesh Nagabhushana #define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE) 124256b2bdd1SGireesh Nagabhushana #define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE) 124356b2bdd1SGireesh Nagabhushana 1244*de483253SVishal Kulkarni #define S_LSO_T5_XFER_SIZE 0 1245*de483253SVishal Kulkarni #define M_LSO_T5_XFER_SIZE 0xFFFFFFF 1246*de483253SVishal Kulkarni #define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE) 1247*de483253SVishal Kulkarni #define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE) 1248*de483253SVishal Kulkarni 1249*de483253SVishal Kulkarni /* cpl_tx_pkt_lso_core.mss fields */ 125056b2bdd1SGireesh Nagabhushana #define S_LSO_MSS 0 125156b2bdd1SGireesh Nagabhushana #define M_LSO_MSS 0x3FFF 125256b2bdd1SGireesh Nagabhushana #define V_LSO_MSS(x) ((x) << S_LSO_MSS) 125356b2bdd1SGireesh Nagabhushana #define G_LSO_MSS(x) (((x) >> S_LSO_MSS) & M_LSO_MSS) 125456b2bdd1SGireesh Nagabhushana 125556b2bdd1SGireesh Nagabhushana #define S_LSO_IPID_SPLIT 15 125656b2bdd1SGireesh Nagabhushana #define V_LSO_IPID_SPLIT(x) ((x) << S_LSO_IPID_SPLIT) 125756b2bdd1SGireesh Nagabhushana #define F_LSO_IPID_SPLIT V_LSO_IPID_SPLIT(1U) 125856b2bdd1SGireesh Nagabhushana 1259*de483253SVishal Kulkarni struct cpl_tx_pkt_fso { 126056b2bdd1SGireesh Nagabhushana WR_HDR; 1261*de483253SVishal Kulkarni __be32 fso_ctrl; 1262*de483253SVishal Kulkarni __be16 seqcnt_ofst; 1263*de483253SVishal Kulkarni __be16 mtu; 1264*de483253SVishal Kulkarni __be32 param_offset; 1265*de483253SVishal Kulkarni __be32 len; 1266*de483253SVishal Kulkarni /* encapsulated CPL (TX_PKT or TX_PKT_XT) follows here */ 1267*de483253SVishal Kulkarni }; 1268*de483253SVishal Kulkarni 1269*de483253SVishal Kulkarni /* cpl_tx_pkt_fso.fso_ctrl fields different from cpl_tx_pkt_lso.lso_ctrl */ 1270*de483253SVishal Kulkarni #define S_FSO_XCHG_CLASS 21 1271*de483253SVishal Kulkarni #define V_FSO_XCHG_CLASS(x) ((x) << S_FSO_XCHG_CLASS) 1272*de483253SVishal Kulkarni #define F_FSO_XCHG_CLASS V_FSO_XCHG_CLASS(1U) 1273*de483253SVishal Kulkarni 1274*de483253SVishal Kulkarni #define S_FSO_INITIATOR 20 1275*de483253SVishal Kulkarni #define V_FSO_INITIATOR(x) ((x) << S_FSO_INITIATOR) 1276*de483253SVishal Kulkarni #define F_FSO_INITIATOR V_FSO_INITIATOR(1U) 1277*de483253SVishal Kulkarni 1278*de483253SVishal Kulkarni #define S_FSO_FCHDR_LEN 12 1279*de483253SVishal Kulkarni #define M_FSO_FCHDR_LEN 0xF 1280*de483253SVishal Kulkarni #define V_FSO_FCHDR_LEN(x) ((x) << S_FSO_FCHDR_LEN) 1281*de483253SVishal Kulkarni #define G_FSO_FCHDR_LEN(x) (((x) >> S_FSO_FCHDR_LEN) & M_FSO_FCHDR_LEN) 1282*de483253SVishal Kulkarni 128356b2bdd1SGireesh Nagabhushana struct cpl_iscsi_hdr_no_rss { 128456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 128556b2bdd1SGireesh Nagabhushana __be16 pdu_len_ddp; 128656b2bdd1SGireesh Nagabhushana __be16 len; 128756b2bdd1SGireesh Nagabhushana __be32 seq; 128856b2bdd1SGireesh Nagabhushana __be16 urg; 128956b2bdd1SGireesh Nagabhushana __u8 rsvd; 129056b2bdd1SGireesh Nagabhushana __u8 status; 129156b2bdd1SGireesh Nagabhushana }; 129256b2bdd1SGireesh Nagabhushana 1293*de483253SVishal Kulkarni struct cpl_tx_data_iso { 1294*de483253SVishal Kulkarni WR_HDR; 1295*de483253SVishal Kulkarni __be32 iso_ctrl; 1296*de483253SVishal Kulkarni __u8 rsvd; 1297*de483253SVishal Kulkarni __u8 ahs_len; 1298*de483253SVishal Kulkarni __be16 mss; 1299*de483253SVishal Kulkarni __be32 burst_size; 1300*de483253SVishal Kulkarni __be32 len; 1301*de483253SVishal Kulkarni /* encapsulated CPL_TX_DATA follows here */ 1302*de483253SVishal Kulkarni }; 1303*de483253SVishal Kulkarni 1304*de483253SVishal Kulkarni /* cpl_tx_data_iso.iso_ctrl fields different from cpl_tx_pkt_lso.lso_ctrl */ 1305*de483253SVishal Kulkarni #define S_ISO_CPLHDR_LEN 18 1306*de483253SVishal Kulkarni #define M_ISO_CPLHDR_LEN 0xF 1307*de483253SVishal Kulkarni #define V_ISO_CPLHDR_LEN(x) ((x) << S_ISO_CPLHDR_LEN) 1308*de483253SVishal Kulkarni #define G_ISO_CPLHDR_LEN(x) (((x) >> S_ISO_CPLHDR_LEN) & M_ISO_CPLHDR_LEN) 1309*de483253SVishal Kulkarni 1310*de483253SVishal Kulkarni #define S_ISO_HDR_CRC 17 1311*de483253SVishal Kulkarni #define V_ISO_HDR_CRC(x) ((x) << S_ISO_HDR_CRC) 1312*de483253SVishal Kulkarni #define F_ISO_HDR_CRC V_ISO_HDR_CRC(1U) 1313*de483253SVishal Kulkarni 1314*de483253SVishal Kulkarni #define S_ISO_DATA_CRC 16 1315*de483253SVishal Kulkarni #define V_ISO_DATA_CRC(x) ((x) << S_ISO_DATA_CRC) 1316*de483253SVishal Kulkarni #define F_ISO_DATA_CRC V_ISO_DATA_CRC(1U) 1317*de483253SVishal Kulkarni 1318*de483253SVishal Kulkarni #define S_ISO_IMD_DATA_EN 15 1319*de483253SVishal Kulkarni #define V_ISO_IMD_DATA_EN(x) ((x) << S_ISO_IMD_DATA_EN) 1320*de483253SVishal Kulkarni #define F_ISO_IMD_DATA_EN V_ISO_IMD_DATA_EN(1U) 1321*de483253SVishal Kulkarni 1322*de483253SVishal Kulkarni #define S_ISO_PDU_TYPE 13 1323*de483253SVishal Kulkarni #define M_ISO_PDU_TYPE 0x3 1324*de483253SVishal Kulkarni #define V_ISO_PDU_TYPE(x) ((x) << S_ISO_PDU_TYPE) 1325*de483253SVishal Kulkarni #define G_ISO_PDU_TYPE(x) (((x) >> S_ISO_PDU_TYPE) & M_ISO_PDU_TYPE) 1326*de483253SVishal Kulkarni 132756b2bdd1SGireesh Nagabhushana struct cpl_iscsi_hdr { 132856b2bdd1SGireesh Nagabhushana RSS_HDR 132956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 133056b2bdd1SGireesh Nagabhushana __be16 pdu_len_ddp; 133156b2bdd1SGireesh Nagabhushana __be16 len; 133256b2bdd1SGireesh Nagabhushana __be32 seq; 133356b2bdd1SGireesh Nagabhushana __be16 urg; 133456b2bdd1SGireesh Nagabhushana __u8 rsvd; 133556b2bdd1SGireesh Nagabhushana __u8 status; 133656b2bdd1SGireesh Nagabhushana }; 133756b2bdd1SGireesh Nagabhushana 133856b2bdd1SGireesh Nagabhushana /* cpl_iscsi_hdr.pdu_len_ddp fields */ 133956b2bdd1SGireesh Nagabhushana #define S_ISCSI_PDU_LEN 0 134056b2bdd1SGireesh Nagabhushana #define M_ISCSI_PDU_LEN 0x7FFF 134156b2bdd1SGireesh Nagabhushana #define V_ISCSI_PDU_LEN(x) ((x) << S_ISCSI_PDU_LEN) 134256b2bdd1SGireesh Nagabhushana #define G_ISCSI_PDU_LEN(x) (((x) >> S_ISCSI_PDU_LEN) & M_ISCSI_PDU_LEN) 134356b2bdd1SGireesh Nagabhushana 134456b2bdd1SGireesh Nagabhushana #define S_ISCSI_DDP 15 134556b2bdd1SGireesh Nagabhushana #define V_ISCSI_DDP(x) ((x) << S_ISCSI_DDP) 134656b2bdd1SGireesh Nagabhushana #define F_ISCSI_DDP V_ISCSI_DDP(1U) 134756b2bdd1SGireesh Nagabhushana 1348*de483253SVishal Kulkarni struct cpl_iscsi_data { 1349*de483253SVishal Kulkarni RSS_HDR 1350*de483253SVishal Kulkarni union opcode_tid ot; 1351*de483253SVishal Kulkarni __u8 rsvd0[2]; 1352*de483253SVishal Kulkarni __be16 len; 1353*de483253SVishal Kulkarni __be32 seq; 1354*de483253SVishal Kulkarni __be16 urg; 1355*de483253SVishal Kulkarni __u8 rsvd1; 1356*de483253SVishal Kulkarni __u8 status; 1357*de483253SVishal Kulkarni }; 1358*de483253SVishal Kulkarni 135956b2bdd1SGireesh Nagabhushana struct cpl_rx_data { 136056b2bdd1SGireesh Nagabhushana RSS_HDR 136156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 136256b2bdd1SGireesh Nagabhushana __be16 rsvd; 136356b2bdd1SGireesh Nagabhushana __be16 len; 136456b2bdd1SGireesh Nagabhushana __be32 seq; 136556b2bdd1SGireesh Nagabhushana __be16 urg; 136656b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 136756b2bdd1SGireesh Nagabhushana __u8 dack_mode:2; 136856b2bdd1SGireesh Nagabhushana __u8 psh:1; 136956b2bdd1SGireesh Nagabhushana __u8 heartbeat:1; 137056b2bdd1SGireesh Nagabhushana __u8 ddp_off:1; 137156b2bdd1SGireesh Nagabhushana __u8 :3; 137256b2bdd1SGireesh Nagabhushana #else 137356b2bdd1SGireesh Nagabhushana __u8 :3; 137456b2bdd1SGireesh Nagabhushana __u8 ddp_off:1; 137556b2bdd1SGireesh Nagabhushana __u8 heartbeat:1; 137656b2bdd1SGireesh Nagabhushana __u8 psh:1; 137756b2bdd1SGireesh Nagabhushana __u8 dack_mode:2; 137856b2bdd1SGireesh Nagabhushana #endif 137956b2bdd1SGireesh Nagabhushana __u8 status; 138056b2bdd1SGireesh Nagabhushana }; 138156b2bdd1SGireesh Nagabhushana 138256b2bdd1SGireesh Nagabhushana struct cpl_fcoe_hdr { 138356b2bdd1SGireesh Nagabhushana RSS_HDR 138456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 138556b2bdd1SGireesh Nagabhushana __be16 oxid; 138656b2bdd1SGireesh Nagabhushana __be16 len; 138756b2bdd1SGireesh Nagabhushana __be32 rctl_fctl; 138856b2bdd1SGireesh Nagabhushana __u8 cs_ctl; 138956b2bdd1SGireesh Nagabhushana __u8 df_ctl; 139056b2bdd1SGireesh Nagabhushana __u8 sof; 139156b2bdd1SGireesh Nagabhushana __u8 eof; 139256b2bdd1SGireesh Nagabhushana __be16 seq_cnt; 139356b2bdd1SGireesh Nagabhushana __u8 seq_id; 139456b2bdd1SGireesh Nagabhushana __u8 type; 139556b2bdd1SGireesh Nagabhushana __be32 param; 139656b2bdd1SGireesh Nagabhushana }; 139756b2bdd1SGireesh Nagabhushana 1398*de483253SVishal Kulkarni struct cpl_fcoe_data { 1399*de483253SVishal Kulkarni RSS_HDR 1400*de483253SVishal Kulkarni union opcode_tid ot; 1401*de483253SVishal Kulkarni __u8 rsvd0[2]; 1402*de483253SVishal Kulkarni __be16 len; 1403*de483253SVishal Kulkarni __be32 seq; 1404*de483253SVishal Kulkarni __u8 rsvd1[3]; 1405*de483253SVishal Kulkarni __u8 status; 1406*de483253SVishal Kulkarni }; 1407*de483253SVishal Kulkarni 140856b2bdd1SGireesh Nagabhushana struct cpl_rx_urg_notify { 140956b2bdd1SGireesh Nagabhushana RSS_HDR 141056b2bdd1SGireesh Nagabhushana union opcode_tid ot; 141156b2bdd1SGireesh Nagabhushana __be32 seq; 141256b2bdd1SGireesh Nagabhushana }; 141356b2bdd1SGireesh Nagabhushana 141456b2bdd1SGireesh Nagabhushana struct cpl_rx_urg_pkt { 141556b2bdd1SGireesh Nagabhushana RSS_HDR 141656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 141756b2bdd1SGireesh Nagabhushana __be16 rsvd; 141856b2bdd1SGireesh Nagabhushana __be16 len; 141956b2bdd1SGireesh Nagabhushana }; 142056b2bdd1SGireesh Nagabhushana 142156b2bdd1SGireesh Nagabhushana struct cpl_rx_data_ack { 142256b2bdd1SGireesh Nagabhushana WR_HDR; 142356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 142456b2bdd1SGireesh Nagabhushana __be32 credit_dack; 142556b2bdd1SGireesh Nagabhushana }; 142656b2bdd1SGireesh Nagabhushana 1427*de483253SVishal Kulkarni struct cpl_rx_data_ack_core { 1428*de483253SVishal Kulkarni union opcode_tid ot; 1429*de483253SVishal Kulkarni __be32 credit_dack; 1430*de483253SVishal Kulkarni }; 1431*de483253SVishal Kulkarni 143256b2bdd1SGireesh Nagabhushana /* cpl_rx_data_ack.ack_seq fields */ 143356b2bdd1SGireesh Nagabhushana #define S_RX_CREDITS 0 143456b2bdd1SGireesh Nagabhushana #define M_RX_CREDITS 0x3FFFFFF 143556b2bdd1SGireesh Nagabhushana #define V_RX_CREDITS(x) ((x) << S_RX_CREDITS) 143656b2bdd1SGireesh Nagabhushana #define G_RX_CREDITS(x) (((x) >> S_RX_CREDITS) & M_RX_CREDITS) 143756b2bdd1SGireesh Nagabhushana 143856b2bdd1SGireesh Nagabhushana #define S_RX_MODULATE_TX 26 143956b2bdd1SGireesh Nagabhushana #define V_RX_MODULATE_TX(x) ((x) << S_RX_MODULATE_TX) 144056b2bdd1SGireesh Nagabhushana #define F_RX_MODULATE_TX V_RX_MODULATE_TX(1U) 144156b2bdd1SGireesh Nagabhushana 144256b2bdd1SGireesh Nagabhushana #define S_RX_MODULATE_RX 27 144356b2bdd1SGireesh Nagabhushana #define V_RX_MODULATE_RX(x) ((x) << S_RX_MODULATE_RX) 144456b2bdd1SGireesh Nagabhushana #define F_RX_MODULATE_RX V_RX_MODULATE_RX(1U) 144556b2bdd1SGireesh Nagabhushana 144656b2bdd1SGireesh Nagabhushana #define S_RX_FORCE_ACK 28 144756b2bdd1SGireesh Nagabhushana #define V_RX_FORCE_ACK(x) ((x) << S_RX_FORCE_ACK) 144856b2bdd1SGireesh Nagabhushana #define F_RX_FORCE_ACK V_RX_FORCE_ACK(1U) 144956b2bdd1SGireesh Nagabhushana 145056b2bdd1SGireesh Nagabhushana #define S_RX_DACK_MODE 29 145156b2bdd1SGireesh Nagabhushana #define M_RX_DACK_MODE 0x3 145256b2bdd1SGireesh Nagabhushana #define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE) 145356b2bdd1SGireesh Nagabhushana #define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE) 145456b2bdd1SGireesh Nagabhushana 145556b2bdd1SGireesh Nagabhushana #define S_RX_DACK_CHANGE 31 145656b2bdd1SGireesh Nagabhushana #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE) 145756b2bdd1SGireesh Nagabhushana #define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U) 145856b2bdd1SGireesh Nagabhushana 145956b2bdd1SGireesh Nagabhushana struct cpl_rx_ddp_complete { 146056b2bdd1SGireesh Nagabhushana RSS_HDR 146156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 146256b2bdd1SGireesh Nagabhushana __be32 ddp_report; 146356b2bdd1SGireesh Nagabhushana __be32 rcv_nxt; 146456b2bdd1SGireesh Nagabhushana __be32 rsvd; 146556b2bdd1SGireesh Nagabhushana }; 146656b2bdd1SGireesh Nagabhushana 146756b2bdd1SGireesh Nagabhushana struct cpl_rx_data_ddp { 146856b2bdd1SGireesh Nagabhushana RSS_HDR 146956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 147056b2bdd1SGireesh Nagabhushana __be16 urg; 147156b2bdd1SGireesh Nagabhushana __be16 len; 147256b2bdd1SGireesh Nagabhushana __be32 seq; 147356b2bdd1SGireesh Nagabhushana union { 147456b2bdd1SGireesh Nagabhushana __be32 nxt_seq; 147556b2bdd1SGireesh Nagabhushana __be32 ddp_report; 147656b2bdd1SGireesh Nagabhushana } u; 147756b2bdd1SGireesh Nagabhushana __be32 ulp_crc; 147856b2bdd1SGireesh Nagabhushana __be32 ddpvld; 147956b2bdd1SGireesh Nagabhushana }; 148056b2bdd1SGireesh Nagabhushana 1481*de483253SVishal Kulkarni #define cpl_rx_iscsi_ddp cpl_rx_data_ddp 1482*de483253SVishal Kulkarni 148356b2bdd1SGireesh Nagabhushana struct cpl_rx_fcoe_ddp { 148456b2bdd1SGireesh Nagabhushana RSS_HDR 148556b2bdd1SGireesh Nagabhushana union opcode_tid ot; 148656b2bdd1SGireesh Nagabhushana __be16 rsvd; 148756b2bdd1SGireesh Nagabhushana __be16 len; 148856b2bdd1SGireesh Nagabhushana __be32 seq; 148956b2bdd1SGireesh Nagabhushana __be32 ddp_report; 149056b2bdd1SGireesh Nagabhushana __be32 ulp_crc; 149156b2bdd1SGireesh Nagabhushana __be32 ddpvld; 149256b2bdd1SGireesh Nagabhushana }; 149356b2bdd1SGireesh Nagabhushana 1494*de483253SVishal Kulkarni struct cpl_rx_data_dif { 1495*de483253SVishal Kulkarni RSS_HDR 1496*de483253SVishal Kulkarni union opcode_tid ot; 1497*de483253SVishal Kulkarni __be16 ddp_len; 1498*de483253SVishal Kulkarni __be16 msg_len; 1499*de483253SVishal Kulkarni __be32 seq; 1500*de483253SVishal Kulkarni union { 1501*de483253SVishal Kulkarni __be32 nxt_seq; 1502*de483253SVishal Kulkarni __be32 ddp_report; 1503*de483253SVishal Kulkarni } u; 1504*de483253SVishal Kulkarni __be32 err_vec; 1505*de483253SVishal Kulkarni __be32 ddpvld; 1506*de483253SVishal Kulkarni }; 1507*de483253SVishal Kulkarni 1508*de483253SVishal Kulkarni struct cpl_rx_iscsi_dif { 1509*de483253SVishal Kulkarni RSS_HDR 1510*de483253SVishal Kulkarni union opcode_tid ot; 1511*de483253SVishal Kulkarni __be16 ddp_len; 1512*de483253SVishal Kulkarni __be16 msg_len; 1513*de483253SVishal Kulkarni __be32 seq; 1514*de483253SVishal Kulkarni union { 1515*de483253SVishal Kulkarni __be32 nxt_seq; 1516*de483253SVishal Kulkarni __be32 ddp_report; 1517*de483253SVishal Kulkarni } u; 1518*de483253SVishal Kulkarni __be32 ulp_crc; 1519*de483253SVishal Kulkarni __be32 ddpvld; 1520*de483253SVishal Kulkarni __u8 rsvd0[8]; 1521*de483253SVishal Kulkarni __be32 err_vec; 1522*de483253SVishal Kulkarni __u8 rsvd1[4]; 1523*de483253SVishal Kulkarni }; 1524*de483253SVishal Kulkarni 1525*de483253SVishal Kulkarni struct cpl_rx_fcoe_dif { 1526*de483253SVishal Kulkarni RSS_HDR 1527*de483253SVishal Kulkarni union opcode_tid ot; 1528*de483253SVishal Kulkarni __be16 ddp_len; 1529*de483253SVishal Kulkarni __be16 msg_len; 1530*de483253SVishal Kulkarni __be32 seq; 1531*de483253SVishal Kulkarni __be32 ddp_report; 1532*de483253SVishal Kulkarni __be32 err_vec; 1533*de483253SVishal Kulkarni __be32 ddpvld; 1534*de483253SVishal Kulkarni }; 1535*de483253SVishal Kulkarni 1536*de483253SVishal Kulkarni /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddpvld fields */ 153756b2bdd1SGireesh Nagabhushana #define S_DDP_VALID 15 153856b2bdd1SGireesh Nagabhushana #define M_DDP_VALID 0x1FFFF 153956b2bdd1SGireesh Nagabhushana #define V_DDP_VALID(x) ((x) << S_DDP_VALID) 154056b2bdd1SGireesh Nagabhushana #define G_DDP_VALID(x) (((x) >> S_DDP_VALID) & M_DDP_VALID) 154156b2bdd1SGireesh Nagabhushana 154256b2bdd1SGireesh Nagabhushana #define S_DDP_PPOD_MISMATCH 15 154356b2bdd1SGireesh Nagabhushana #define V_DDP_PPOD_MISMATCH(x) ((x) << S_DDP_PPOD_MISMATCH) 154456b2bdd1SGireesh Nagabhushana #define F_DDP_PPOD_MISMATCH V_DDP_PPOD_MISMATCH(1U) 154556b2bdd1SGireesh Nagabhushana 154656b2bdd1SGireesh Nagabhushana #define S_DDP_PDU 16 154756b2bdd1SGireesh Nagabhushana #define V_DDP_PDU(x) ((x) << S_DDP_PDU) 154856b2bdd1SGireesh Nagabhushana #define F_DDP_PDU V_DDP_PDU(1U) 154956b2bdd1SGireesh Nagabhushana 155056b2bdd1SGireesh Nagabhushana #define S_DDP_LLIMIT_ERR 17 155156b2bdd1SGireesh Nagabhushana #define V_DDP_LLIMIT_ERR(x) ((x) << S_DDP_LLIMIT_ERR) 155256b2bdd1SGireesh Nagabhushana #define F_DDP_LLIMIT_ERR V_DDP_LLIMIT_ERR(1U) 155356b2bdd1SGireesh Nagabhushana 155456b2bdd1SGireesh Nagabhushana #define S_DDP_PPOD_PARITY_ERR 18 155556b2bdd1SGireesh Nagabhushana #define V_DDP_PPOD_PARITY_ERR(x) ((x) << S_DDP_PPOD_PARITY_ERR) 155656b2bdd1SGireesh Nagabhushana #define F_DDP_PPOD_PARITY_ERR V_DDP_PPOD_PARITY_ERR(1U) 155756b2bdd1SGireesh Nagabhushana 155856b2bdd1SGireesh Nagabhushana #define S_DDP_PADDING_ERR 19 155956b2bdd1SGireesh Nagabhushana #define V_DDP_PADDING_ERR(x) ((x) << S_DDP_PADDING_ERR) 156056b2bdd1SGireesh Nagabhushana #define F_DDP_PADDING_ERR V_DDP_PADDING_ERR(1U) 156156b2bdd1SGireesh Nagabhushana 156256b2bdd1SGireesh Nagabhushana #define S_DDP_HDRCRC_ERR 20 156356b2bdd1SGireesh Nagabhushana #define V_DDP_HDRCRC_ERR(x) ((x) << S_DDP_HDRCRC_ERR) 156456b2bdd1SGireesh Nagabhushana #define F_DDP_HDRCRC_ERR V_DDP_HDRCRC_ERR(1U) 156556b2bdd1SGireesh Nagabhushana 156656b2bdd1SGireesh Nagabhushana #define S_DDP_DATACRC_ERR 21 156756b2bdd1SGireesh Nagabhushana #define V_DDP_DATACRC_ERR(x) ((x) << S_DDP_DATACRC_ERR) 156856b2bdd1SGireesh Nagabhushana #define F_DDP_DATACRC_ERR V_DDP_DATACRC_ERR(1U) 156956b2bdd1SGireesh Nagabhushana 157056b2bdd1SGireesh Nagabhushana #define S_DDP_INVALID_TAG 22 157156b2bdd1SGireesh Nagabhushana #define V_DDP_INVALID_TAG(x) ((x) << S_DDP_INVALID_TAG) 157256b2bdd1SGireesh Nagabhushana #define F_DDP_INVALID_TAG V_DDP_INVALID_TAG(1U) 157356b2bdd1SGireesh Nagabhushana 157456b2bdd1SGireesh Nagabhushana #define S_DDP_ULIMIT_ERR 23 157556b2bdd1SGireesh Nagabhushana #define V_DDP_ULIMIT_ERR(x) ((x) << S_DDP_ULIMIT_ERR) 157656b2bdd1SGireesh Nagabhushana #define F_DDP_ULIMIT_ERR V_DDP_ULIMIT_ERR(1U) 157756b2bdd1SGireesh Nagabhushana 157856b2bdd1SGireesh Nagabhushana #define S_DDP_OFFSET_ERR 24 157956b2bdd1SGireesh Nagabhushana #define V_DDP_OFFSET_ERR(x) ((x) << S_DDP_OFFSET_ERR) 158056b2bdd1SGireesh Nagabhushana #define F_DDP_OFFSET_ERR V_DDP_OFFSET_ERR(1U) 158156b2bdd1SGireesh Nagabhushana 158256b2bdd1SGireesh Nagabhushana #define S_DDP_COLOR_ERR 25 158356b2bdd1SGireesh Nagabhushana #define V_DDP_COLOR_ERR(x) ((x) << S_DDP_COLOR_ERR) 158456b2bdd1SGireesh Nagabhushana #define F_DDP_COLOR_ERR V_DDP_COLOR_ERR(1U) 158556b2bdd1SGireesh Nagabhushana 158656b2bdd1SGireesh Nagabhushana #define S_DDP_TID_MISMATCH 26 158756b2bdd1SGireesh Nagabhushana #define V_DDP_TID_MISMATCH(x) ((x) << S_DDP_TID_MISMATCH) 158856b2bdd1SGireesh Nagabhushana #define F_DDP_TID_MISMATCH V_DDP_TID_MISMATCH(1U) 158956b2bdd1SGireesh Nagabhushana 159056b2bdd1SGireesh Nagabhushana #define S_DDP_INVALID_PPOD 27 159156b2bdd1SGireesh Nagabhushana #define V_DDP_INVALID_PPOD(x) ((x) << S_DDP_INVALID_PPOD) 159256b2bdd1SGireesh Nagabhushana #define F_DDP_INVALID_PPOD V_DDP_INVALID_PPOD(1U) 159356b2bdd1SGireesh Nagabhushana 159456b2bdd1SGireesh Nagabhushana #define S_DDP_ULP_MODE 28 159556b2bdd1SGireesh Nagabhushana #define M_DDP_ULP_MODE 0xF 159656b2bdd1SGireesh Nagabhushana #define V_DDP_ULP_MODE(x) ((x) << S_DDP_ULP_MODE) 159756b2bdd1SGireesh Nagabhushana #define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE) 159856b2bdd1SGireesh Nagabhushana 1599*de483253SVishal Kulkarni /* cpl_rx_{data,iscsi,fcoe}_{ddp,dif}.ddp_report fields */ 160056b2bdd1SGireesh Nagabhushana #define S_DDP_OFFSET 0 160156b2bdd1SGireesh Nagabhushana #define M_DDP_OFFSET 0xFFFFFF 160256b2bdd1SGireesh Nagabhushana #define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET) 160356b2bdd1SGireesh Nagabhushana #define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET) 160456b2bdd1SGireesh Nagabhushana 160556b2bdd1SGireesh Nagabhushana #define S_DDP_DACK_MODE 24 160656b2bdd1SGireesh Nagabhushana #define M_DDP_DACK_MODE 0x3 160756b2bdd1SGireesh Nagabhushana #define V_DDP_DACK_MODE(x) ((x) << S_DDP_DACK_MODE) 160856b2bdd1SGireesh Nagabhushana #define G_DDP_DACK_MODE(x) (((x) >> S_DDP_DACK_MODE) & M_DDP_DACK_MODE) 160956b2bdd1SGireesh Nagabhushana 161056b2bdd1SGireesh Nagabhushana #define S_DDP_BUF_IDX 26 161156b2bdd1SGireesh Nagabhushana #define V_DDP_BUF_IDX(x) ((x) << S_DDP_BUF_IDX) 161256b2bdd1SGireesh Nagabhushana #define F_DDP_BUF_IDX V_DDP_BUF_IDX(1U) 161356b2bdd1SGireesh Nagabhushana 161456b2bdd1SGireesh Nagabhushana #define S_DDP_URG 27 161556b2bdd1SGireesh Nagabhushana #define V_DDP_URG(x) ((x) << S_DDP_URG) 161656b2bdd1SGireesh Nagabhushana #define F_DDP_URG V_DDP_URG(1U) 161756b2bdd1SGireesh Nagabhushana 161856b2bdd1SGireesh Nagabhushana #define S_DDP_PSH 28 161956b2bdd1SGireesh Nagabhushana #define V_DDP_PSH(x) ((x) << S_DDP_PSH) 162056b2bdd1SGireesh Nagabhushana #define F_DDP_PSH V_DDP_PSH(1U) 162156b2bdd1SGireesh Nagabhushana 162256b2bdd1SGireesh Nagabhushana #define S_DDP_BUF_COMPLETE 29 162356b2bdd1SGireesh Nagabhushana #define V_DDP_BUF_COMPLETE(x) ((x) << S_DDP_BUF_COMPLETE) 162456b2bdd1SGireesh Nagabhushana #define F_DDP_BUF_COMPLETE V_DDP_BUF_COMPLETE(1U) 162556b2bdd1SGireesh Nagabhushana 162656b2bdd1SGireesh Nagabhushana #define S_DDP_BUF_TIMED_OUT 30 162756b2bdd1SGireesh Nagabhushana #define V_DDP_BUF_TIMED_OUT(x) ((x) << S_DDP_BUF_TIMED_OUT) 162856b2bdd1SGireesh Nagabhushana #define F_DDP_BUF_TIMED_OUT V_DDP_BUF_TIMED_OUT(1U) 162956b2bdd1SGireesh Nagabhushana 163056b2bdd1SGireesh Nagabhushana #define S_DDP_INV 31 163156b2bdd1SGireesh Nagabhushana #define V_DDP_INV(x) ((x) << S_DDP_INV) 163256b2bdd1SGireesh Nagabhushana #define F_DDP_INV V_DDP_INV(1U) 163356b2bdd1SGireesh Nagabhushana 163456b2bdd1SGireesh Nagabhushana struct cpl_rx_pkt { 163556b2bdd1SGireesh Nagabhushana RSS_HDR 163656b2bdd1SGireesh Nagabhushana __u8 opcode; 163756b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 163856b2bdd1SGireesh Nagabhushana __u8 iff:4; 163956b2bdd1SGireesh Nagabhushana __u8 csum_calc:1; 164056b2bdd1SGireesh Nagabhushana __u8 ipmi_pkt:1; 164156b2bdd1SGireesh Nagabhushana __u8 vlan_ex:1; 164256b2bdd1SGireesh Nagabhushana __u8 ip_frag:1; 164356b2bdd1SGireesh Nagabhushana #else 164456b2bdd1SGireesh Nagabhushana __u8 ip_frag:1; 164556b2bdd1SGireesh Nagabhushana __u8 vlan_ex:1; 164656b2bdd1SGireesh Nagabhushana __u8 ipmi_pkt:1; 164756b2bdd1SGireesh Nagabhushana __u8 csum_calc:1; 164856b2bdd1SGireesh Nagabhushana __u8 iff:4; 164956b2bdd1SGireesh Nagabhushana #endif 165056b2bdd1SGireesh Nagabhushana __be16 csum; 165156b2bdd1SGireesh Nagabhushana __be16 vlan; 165256b2bdd1SGireesh Nagabhushana __be16 len; 165356b2bdd1SGireesh Nagabhushana __be32 l2info; 165456b2bdd1SGireesh Nagabhushana __be16 hdr_len; 165556b2bdd1SGireesh Nagabhushana __be16 err_vec; 165656b2bdd1SGireesh Nagabhushana }; 165756b2bdd1SGireesh Nagabhushana 165856b2bdd1SGireesh Nagabhushana /* rx_pkt.l2info fields */ 165956b2bdd1SGireesh Nagabhushana #define S_RX_ETHHDR_LEN 0 166056b2bdd1SGireesh Nagabhushana #define M_RX_ETHHDR_LEN 0x1F 166156b2bdd1SGireesh Nagabhushana #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) 166256b2bdd1SGireesh Nagabhushana #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) 166356b2bdd1SGireesh Nagabhushana 1664*de483253SVishal Kulkarni #define S_RX_T5_ETHHDR_LEN 0 1665*de483253SVishal Kulkarni #define M_RX_T5_ETHHDR_LEN 0x3F 1666*de483253SVishal Kulkarni #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN) 1667*de483253SVishal Kulkarni #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN) 1668*de483253SVishal Kulkarni 166956b2bdd1SGireesh Nagabhushana #define S_RX_PKTYPE 5 167056b2bdd1SGireesh Nagabhushana #define M_RX_PKTYPE 0x7 167156b2bdd1SGireesh Nagabhushana #define V_RX_PKTYPE(x) ((x) << S_RX_PKTYPE) 167256b2bdd1SGireesh Nagabhushana #define G_RX_PKTYPE(x) (((x) >> S_RX_PKTYPE) & M_RX_PKTYPE) 167356b2bdd1SGireesh Nagabhushana 1674*de483253SVishal Kulkarni #define S_RX_T5_DATYPE 6 1675*de483253SVishal Kulkarni #define M_RX_T5_DATYPE 0x3 1676*de483253SVishal Kulkarni #define V_RX_T5_DATYPE(x) ((x) << S_RX_T5_DATYPE) 1677*de483253SVishal Kulkarni #define G_RX_T5_DATYPE(x) (((x) >> S_RX_T5_DATYPE) & M_RX_T5_DATYPE) 1678*de483253SVishal Kulkarni 167956b2bdd1SGireesh Nagabhushana #define S_RX_MACIDX 8 168056b2bdd1SGireesh Nagabhushana #define M_RX_MACIDX 0x1FF 168156b2bdd1SGireesh Nagabhushana #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) 168256b2bdd1SGireesh Nagabhushana #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX) 168356b2bdd1SGireesh Nagabhushana 1684*de483253SVishal Kulkarni #define S_RX_T5_PKTYPE 17 1685*de483253SVishal Kulkarni #define M_RX_T5_PKTYPE 0x7 1686*de483253SVishal Kulkarni #define V_RX_T5_PKTYPE(x) ((x) << S_RX_T5_PKTYPE) 1687*de483253SVishal Kulkarni #define G_RX_T5_PKTYPE(x) (((x) >> S_RX_T5_PKTYPE) & M_RX_T5_PKTYPE) 1688*de483253SVishal Kulkarni 168956b2bdd1SGireesh Nagabhushana #define S_RX_DATYPE 18 169056b2bdd1SGireesh Nagabhushana #define M_RX_DATYPE 0x3 169156b2bdd1SGireesh Nagabhushana #define V_RX_DATYPE(x) ((x) << S_RX_DATYPE) 169256b2bdd1SGireesh Nagabhushana #define G_RX_DATYPE(x) (((x) >> S_RX_DATYPE) & M_RX_DATYPE) 169356b2bdd1SGireesh Nagabhushana 169456b2bdd1SGireesh Nagabhushana #define S_RXF_PSH 20 169556b2bdd1SGireesh Nagabhushana #define V_RXF_PSH(x) ((x) << S_RXF_PSH) 169656b2bdd1SGireesh Nagabhushana #define F_RXF_PSH V_RXF_PSH(1U) 169756b2bdd1SGireesh Nagabhushana 169856b2bdd1SGireesh Nagabhushana #define S_RXF_SYN 21 169956b2bdd1SGireesh Nagabhushana #define V_RXF_SYN(x) ((x) << S_RXF_SYN) 170056b2bdd1SGireesh Nagabhushana #define F_RXF_SYN V_RXF_SYN(1U) 170156b2bdd1SGireesh Nagabhushana 170256b2bdd1SGireesh Nagabhushana #define S_RXF_UDP 22 170356b2bdd1SGireesh Nagabhushana #define V_RXF_UDP(x) ((x) << S_RXF_UDP) 170456b2bdd1SGireesh Nagabhushana #define F_RXF_UDP V_RXF_UDP(1U) 170556b2bdd1SGireesh Nagabhushana 170656b2bdd1SGireesh Nagabhushana #define S_RXF_TCP 23 170756b2bdd1SGireesh Nagabhushana #define V_RXF_TCP(x) ((x) << S_RXF_TCP) 170856b2bdd1SGireesh Nagabhushana #define F_RXF_TCP V_RXF_TCP(1U) 170956b2bdd1SGireesh Nagabhushana 171056b2bdd1SGireesh Nagabhushana #define S_RXF_IP 24 171156b2bdd1SGireesh Nagabhushana #define V_RXF_IP(x) ((x) << S_RXF_IP) 171256b2bdd1SGireesh Nagabhushana #define F_RXF_IP V_RXF_IP(1U) 171356b2bdd1SGireesh Nagabhushana 171456b2bdd1SGireesh Nagabhushana #define S_RXF_IP6 25 171556b2bdd1SGireesh Nagabhushana #define V_RXF_IP6(x) ((x) << S_RXF_IP6) 171656b2bdd1SGireesh Nagabhushana #define F_RXF_IP6 V_RXF_IP6(1U) 171756b2bdd1SGireesh Nagabhushana 171856b2bdd1SGireesh Nagabhushana #define S_RXF_SYN_COOKIE 26 171956b2bdd1SGireesh Nagabhushana #define V_RXF_SYN_COOKIE(x) ((x) << S_RXF_SYN_COOKIE) 172056b2bdd1SGireesh Nagabhushana #define F_RXF_SYN_COOKIE V_RXF_SYN_COOKIE(1U) 172156b2bdd1SGireesh Nagabhushana 172256b2bdd1SGireesh Nagabhushana #define S_RXF_FCOE 26 172356b2bdd1SGireesh Nagabhushana #define V_RXF_FCOE(x) ((x) << S_RXF_FCOE) 172456b2bdd1SGireesh Nagabhushana #define F_RXF_FCOE V_RXF_FCOE(1U) 172556b2bdd1SGireesh Nagabhushana 172656b2bdd1SGireesh Nagabhushana #define S_RXF_LRO 27 172756b2bdd1SGireesh Nagabhushana #define V_RXF_LRO(x) ((x) << S_RXF_LRO) 172856b2bdd1SGireesh Nagabhushana #define F_RXF_LRO V_RXF_LRO(1U) 172956b2bdd1SGireesh Nagabhushana 173056b2bdd1SGireesh Nagabhushana #define S_RX_CHAN 28 173156b2bdd1SGireesh Nagabhushana #define M_RX_CHAN 0xF 173256b2bdd1SGireesh Nagabhushana #define V_RX_CHAN(x) ((x) << S_RX_CHAN) 173356b2bdd1SGireesh Nagabhushana #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN) 173456b2bdd1SGireesh Nagabhushana 173556b2bdd1SGireesh Nagabhushana /* rx_pkt.hdr_len fields */ 173656b2bdd1SGireesh Nagabhushana #define S_RX_TCPHDR_LEN 0 173756b2bdd1SGireesh Nagabhushana #define M_RX_TCPHDR_LEN 0x3F 173856b2bdd1SGireesh Nagabhushana #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN) 173956b2bdd1SGireesh Nagabhushana #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN) 174056b2bdd1SGireesh Nagabhushana 174156b2bdd1SGireesh Nagabhushana #define S_RX_IPHDR_LEN 6 174256b2bdd1SGireesh Nagabhushana #define M_RX_IPHDR_LEN 0x3FF 174356b2bdd1SGireesh Nagabhushana #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN) 174456b2bdd1SGireesh Nagabhushana #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN) 174556b2bdd1SGireesh Nagabhushana 174656b2bdd1SGireesh Nagabhushana /* rx_pkt.err_vec fields */ 174756b2bdd1SGireesh Nagabhushana #define S_RXERR_OR 0 174856b2bdd1SGireesh Nagabhushana #define V_RXERR_OR(x) ((x) << S_RXERR_OR) 174956b2bdd1SGireesh Nagabhushana #define F_RXERR_OR V_RXERR_OR(1U) 175056b2bdd1SGireesh Nagabhushana 175156b2bdd1SGireesh Nagabhushana #define S_RXERR_MAC 1 175256b2bdd1SGireesh Nagabhushana #define V_RXERR_MAC(x) ((x) << S_RXERR_MAC) 175356b2bdd1SGireesh Nagabhushana #define F_RXERR_MAC V_RXERR_MAC(1U) 175456b2bdd1SGireesh Nagabhushana 175556b2bdd1SGireesh Nagabhushana #define S_RXERR_IPVERS 2 175656b2bdd1SGireesh Nagabhushana #define V_RXERR_IPVERS(x) ((x) << S_RXERR_IPVERS) 175756b2bdd1SGireesh Nagabhushana #define F_RXERR_IPVERS V_RXERR_IPVERS(1U) 175856b2bdd1SGireesh Nagabhushana 175956b2bdd1SGireesh Nagabhushana #define S_RXERR_FRAG 3 176056b2bdd1SGireesh Nagabhushana #define V_RXERR_FRAG(x) ((x) << S_RXERR_FRAG) 176156b2bdd1SGireesh Nagabhushana #define F_RXERR_FRAG V_RXERR_FRAG(1U) 176256b2bdd1SGireesh Nagabhushana 176356b2bdd1SGireesh Nagabhushana #define S_RXERR_ATTACK 4 176456b2bdd1SGireesh Nagabhushana #define V_RXERR_ATTACK(x) ((x) << S_RXERR_ATTACK) 176556b2bdd1SGireesh Nagabhushana #define F_RXERR_ATTACK V_RXERR_ATTACK(1U) 176656b2bdd1SGireesh Nagabhushana 176756b2bdd1SGireesh Nagabhushana #define S_RXERR_ETHHDR_LEN 5 176856b2bdd1SGireesh Nagabhushana #define V_RXERR_ETHHDR_LEN(x) ((x) << S_RXERR_ETHHDR_LEN) 176956b2bdd1SGireesh Nagabhushana #define F_RXERR_ETHHDR_LEN V_RXERR_ETHHDR_LEN(1U) 177056b2bdd1SGireesh Nagabhushana 177156b2bdd1SGireesh Nagabhushana #define S_RXERR_IPHDR_LEN 6 177256b2bdd1SGireesh Nagabhushana #define V_RXERR_IPHDR_LEN(x) ((x) << S_RXERR_IPHDR_LEN) 177356b2bdd1SGireesh Nagabhushana #define F_RXERR_IPHDR_LEN V_RXERR_IPHDR_LEN(1U) 177456b2bdd1SGireesh Nagabhushana 177556b2bdd1SGireesh Nagabhushana #define S_RXERR_TCPHDR_LEN 7 177656b2bdd1SGireesh Nagabhushana #define V_RXERR_TCPHDR_LEN(x) ((x) << S_RXERR_TCPHDR_LEN) 177756b2bdd1SGireesh Nagabhushana #define F_RXERR_TCPHDR_LEN V_RXERR_TCPHDR_LEN(1U) 177856b2bdd1SGireesh Nagabhushana 177956b2bdd1SGireesh Nagabhushana #define S_RXERR_PKT_LEN 8 178056b2bdd1SGireesh Nagabhushana #define V_RXERR_PKT_LEN(x) ((x) << S_RXERR_PKT_LEN) 178156b2bdd1SGireesh Nagabhushana #define F_RXERR_PKT_LEN V_RXERR_PKT_LEN(1U) 178256b2bdd1SGireesh Nagabhushana 178356b2bdd1SGireesh Nagabhushana #define S_RXERR_TCP_OPT 9 178456b2bdd1SGireesh Nagabhushana #define V_RXERR_TCP_OPT(x) ((x) << S_RXERR_TCP_OPT) 178556b2bdd1SGireesh Nagabhushana #define F_RXERR_TCP_OPT V_RXERR_TCP_OPT(1U) 178656b2bdd1SGireesh Nagabhushana 178756b2bdd1SGireesh Nagabhushana #define S_RXERR_IPCSUM 12 178856b2bdd1SGireesh Nagabhushana #define V_RXERR_IPCSUM(x) ((x) << S_RXERR_IPCSUM) 178956b2bdd1SGireesh Nagabhushana #define F_RXERR_IPCSUM V_RXERR_IPCSUM(1U) 179056b2bdd1SGireesh Nagabhushana 179156b2bdd1SGireesh Nagabhushana #define S_RXERR_CSUM 13 179256b2bdd1SGireesh Nagabhushana #define V_RXERR_CSUM(x) ((x) << S_RXERR_CSUM) 179356b2bdd1SGireesh Nagabhushana #define F_RXERR_CSUM V_RXERR_CSUM(1U) 179456b2bdd1SGireesh Nagabhushana 179556b2bdd1SGireesh Nagabhushana #define S_RXERR_PING 14 179656b2bdd1SGireesh Nagabhushana #define V_RXERR_PING(x) ((x) << S_RXERR_PING) 179756b2bdd1SGireesh Nagabhushana #define F_RXERR_PING V_RXERR_PING(1U) 179856b2bdd1SGireesh Nagabhushana 179956b2bdd1SGireesh Nagabhushana struct cpl_trace_pkt { 180056b2bdd1SGireesh Nagabhushana RSS_HDR 180156b2bdd1SGireesh Nagabhushana __u8 opcode; 180256b2bdd1SGireesh Nagabhushana __u8 intf; 180356b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 180456b2bdd1SGireesh Nagabhushana __u8 runt:4; 180556b2bdd1SGireesh Nagabhushana __u8 filter_hit:4; 180656b2bdd1SGireesh Nagabhushana __u8 :6; 180756b2bdd1SGireesh Nagabhushana __u8 err:1; 180856b2bdd1SGireesh Nagabhushana __u8 trunc:1; 180956b2bdd1SGireesh Nagabhushana #else 181056b2bdd1SGireesh Nagabhushana __u8 filter_hit:4; 181156b2bdd1SGireesh Nagabhushana __u8 runt:4; 181256b2bdd1SGireesh Nagabhushana __u8 trunc:1; 181356b2bdd1SGireesh Nagabhushana __u8 err:1; 181456b2bdd1SGireesh Nagabhushana __u8 :6; 181556b2bdd1SGireesh Nagabhushana #endif 181656b2bdd1SGireesh Nagabhushana __be16 rsvd; 181756b2bdd1SGireesh Nagabhushana __be16 len; 181856b2bdd1SGireesh Nagabhushana __be64 tstamp; 181956b2bdd1SGireesh Nagabhushana }; 182056b2bdd1SGireesh Nagabhushana 1821*de483253SVishal Kulkarni struct cpl_t5_trace_pkt { 1822*de483253SVishal Kulkarni RSS_HDR 1823*de483253SVishal Kulkarni __u8 opcode; 1824*de483253SVishal Kulkarni __u8 intf; 1825*de483253SVishal Kulkarni #if defined(__LITTLE_ENDIAN_BITFIELD) 1826*de483253SVishal Kulkarni __u8 runt:4; 1827*de483253SVishal Kulkarni __u8 filter_hit:4; 1828*de483253SVishal Kulkarni __u8 :6; 1829*de483253SVishal Kulkarni __u8 err:1; 1830*de483253SVishal Kulkarni __u8 trunc:1; 1831*de483253SVishal Kulkarni #else 1832*de483253SVishal Kulkarni __u8 filter_hit:4; 1833*de483253SVishal Kulkarni __u8 runt:4; 1834*de483253SVishal Kulkarni __u8 trunc:1; 1835*de483253SVishal Kulkarni __u8 err:1; 1836*de483253SVishal Kulkarni __u8 :6; 1837*de483253SVishal Kulkarni #endif 1838*de483253SVishal Kulkarni __be16 rsvd; 1839*de483253SVishal Kulkarni __be16 len; 1840*de483253SVishal Kulkarni __be64 tstamp; 1841*de483253SVishal Kulkarni __be64 rsvd1; 1842*de483253SVishal Kulkarni }; 1843*de483253SVishal Kulkarni 184456b2bdd1SGireesh Nagabhushana struct cpl_rte_delete_req { 184556b2bdd1SGireesh Nagabhushana WR_HDR; 184656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 184756b2bdd1SGireesh Nagabhushana __be32 params; 184856b2bdd1SGireesh Nagabhushana }; 184956b2bdd1SGireesh Nagabhushana 185056b2bdd1SGireesh Nagabhushana /* {cpl_rte_delete_req, cpl_rte_read_req}.params fields */ 185156b2bdd1SGireesh Nagabhushana #define S_RTE_REQ_LUT_IX 8 185256b2bdd1SGireesh Nagabhushana #define M_RTE_REQ_LUT_IX 0x7FF 185356b2bdd1SGireesh Nagabhushana #define V_RTE_REQ_LUT_IX(x) ((x) << S_RTE_REQ_LUT_IX) 185456b2bdd1SGireesh Nagabhushana #define G_RTE_REQ_LUT_IX(x) (((x) >> S_RTE_REQ_LUT_IX) & M_RTE_REQ_LUT_IX) 185556b2bdd1SGireesh Nagabhushana 185656b2bdd1SGireesh Nagabhushana #define S_RTE_REQ_LUT_BASE 19 185756b2bdd1SGireesh Nagabhushana #define M_RTE_REQ_LUT_BASE 0x7FF 185856b2bdd1SGireesh Nagabhushana #define V_RTE_REQ_LUT_BASE(x) ((x) << S_RTE_REQ_LUT_BASE) 185956b2bdd1SGireesh Nagabhushana #define G_RTE_REQ_LUT_BASE(x) (((x) >> S_RTE_REQ_LUT_BASE) & M_RTE_REQ_LUT_BASE) 186056b2bdd1SGireesh Nagabhushana 186156b2bdd1SGireesh Nagabhushana #define S_RTE_READ_REQ_SELECT 31 186256b2bdd1SGireesh Nagabhushana #define V_RTE_READ_REQ_SELECT(x) ((x) << S_RTE_READ_REQ_SELECT) 186356b2bdd1SGireesh Nagabhushana #define F_RTE_READ_REQ_SELECT V_RTE_READ_REQ_SELECT(1U) 186456b2bdd1SGireesh Nagabhushana 186556b2bdd1SGireesh Nagabhushana struct cpl_rte_delete_rpl { 186656b2bdd1SGireesh Nagabhushana RSS_HDR 186756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 186856b2bdd1SGireesh Nagabhushana __u8 status; 186956b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 187056b2bdd1SGireesh Nagabhushana }; 187156b2bdd1SGireesh Nagabhushana 187256b2bdd1SGireesh Nagabhushana struct cpl_rte_write_req { 187356b2bdd1SGireesh Nagabhushana WR_HDR; 187456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 187556b2bdd1SGireesh Nagabhushana __u32 write_sel; 187656b2bdd1SGireesh Nagabhushana __be32 lut_params; 187756b2bdd1SGireesh Nagabhushana __be32 l2t_idx; 187856b2bdd1SGireesh Nagabhushana __be32 netmask; 187956b2bdd1SGireesh Nagabhushana __be32 faddr; 188056b2bdd1SGireesh Nagabhushana }; 188156b2bdd1SGireesh Nagabhushana 188256b2bdd1SGireesh Nagabhushana /* cpl_rte_write_req.write_sel fields */ 188356b2bdd1SGireesh Nagabhushana #define S_RTE_WR_L2TIDX 31 188456b2bdd1SGireesh Nagabhushana #define V_RTE_WR_L2TIDX(x) ((x) << S_RTE_WR_L2TIDX) 188556b2bdd1SGireesh Nagabhushana #define F_RTE_WR_L2TIDX V_RTE_WR_L2TIDX(1U) 188656b2bdd1SGireesh Nagabhushana 188756b2bdd1SGireesh Nagabhushana #define S_RTE_WR_FADDR 30 188856b2bdd1SGireesh Nagabhushana #define V_RTE_WR_FADDR(x) ((x) << S_RTE_WR_FADDR) 188956b2bdd1SGireesh Nagabhushana #define F_RTE_WR_FADDR V_RTE_WR_FADDR(1U) 189056b2bdd1SGireesh Nagabhushana 189156b2bdd1SGireesh Nagabhushana /* cpl_rte_write_req.lut_params fields */ 189256b2bdd1SGireesh Nagabhushana #define S_RTE_WR_LUT_IX 10 189356b2bdd1SGireesh Nagabhushana #define M_RTE_WR_LUT_IX 0x7FF 189456b2bdd1SGireesh Nagabhushana #define V_RTE_WR_LUT_IX(x) ((x) << S_RTE_WR_LUT_IX) 189556b2bdd1SGireesh Nagabhushana #define G_RTE_WR_LUT_IX(x) (((x) >> S_RTE_WR_LUT_IX) & M_RTE_WR_LUT_IX) 189656b2bdd1SGireesh Nagabhushana 189756b2bdd1SGireesh Nagabhushana #define S_RTE_WR_LUT_BASE 21 189856b2bdd1SGireesh Nagabhushana #define M_RTE_WR_LUT_BASE 0x7FF 189956b2bdd1SGireesh Nagabhushana #define V_RTE_WR_LUT_BASE(x) ((x) << S_RTE_WR_LUT_BASE) 190056b2bdd1SGireesh Nagabhushana #define G_RTE_WR_LUT_BASE(x) (((x) >> S_RTE_WR_LUT_BASE) & M_RTE_WR_LUT_BASE) 190156b2bdd1SGireesh Nagabhushana 190256b2bdd1SGireesh Nagabhushana struct cpl_rte_write_rpl { 190356b2bdd1SGireesh Nagabhushana RSS_HDR 190456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 190556b2bdd1SGireesh Nagabhushana __u8 status; 190656b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 190756b2bdd1SGireesh Nagabhushana }; 190856b2bdd1SGireesh Nagabhushana 190956b2bdd1SGireesh Nagabhushana struct cpl_rte_read_req { 191056b2bdd1SGireesh Nagabhushana WR_HDR; 191156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 191256b2bdd1SGireesh Nagabhushana __be32 params; 191356b2bdd1SGireesh Nagabhushana }; 191456b2bdd1SGireesh Nagabhushana 191556b2bdd1SGireesh Nagabhushana struct cpl_rte_read_rpl { 191656b2bdd1SGireesh Nagabhushana RSS_HDR 191756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 191856b2bdd1SGireesh Nagabhushana __u8 status; 191956b2bdd1SGireesh Nagabhushana __u8 rsvd; 192056b2bdd1SGireesh Nagabhushana __be16 l2t_idx; 192156b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 192256b2bdd1SGireesh Nagabhushana __u32 :30; 192356b2bdd1SGireesh Nagabhushana __u32 select:1; 192456b2bdd1SGireesh Nagabhushana #else 192556b2bdd1SGireesh Nagabhushana __u32 select:1; 192656b2bdd1SGireesh Nagabhushana __u32 :30; 192756b2bdd1SGireesh Nagabhushana #endif 192856b2bdd1SGireesh Nagabhushana __be32 addr; 192956b2bdd1SGireesh Nagabhushana }; 193056b2bdd1SGireesh Nagabhushana 193156b2bdd1SGireesh Nagabhushana struct cpl_l2t_write_req { 193256b2bdd1SGireesh Nagabhushana WR_HDR; 193356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 193456b2bdd1SGireesh Nagabhushana __be16 params; 193556b2bdd1SGireesh Nagabhushana __be16 l2t_idx; 193656b2bdd1SGireesh Nagabhushana __be16 vlan; 193756b2bdd1SGireesh Nagabhushana __u8 dst_mac[6]; 193856b2bdd1SGireesh Nagabhushana }; 193956b2bdd1SGireesh Nagabhushana 194056b2bdd1SGireesh Nagabhushana /* cpl_l2t_write_req.params fields */ 194156b2bdd1SGireesh Nagabhushana #define S_L2T_W_INFO 2 194256b2bdd1SGireesh Nagabhushana #define M_L2T_W_INFO 0x3F 194356b2bdd1SGireesh Nagabhushana #define V_L2T_W_INFO(x) ((x) << S_L2T_W_INFO) 194456b2bdd1SGireesh Nagabhushana #define G_L2T_W_INFO(x) (((x) >> S_L2T_W_INFO) & M_L2T_W_INFO) 194556b2bdd1SGireesh Nagabhushana 194656b2bdd1SGireesh Nagabhushana #define S_L2T_W_PORT 8 1947*de483253SVishal Kulkarni #define M_L2T_W_PORT 0x3 194856b2bdd1SGireesh Nagabhushana #define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT) 194956b2bdd1SGireesh Nagabhushana #define G_L2T_W_PORT(x) (((x) >> S_L2T_W_PORT) & M_L2T_W_PORT) 195056b2bdd1SGireesh Nagabhushana 1951*de483253SVishal Kulkarni #define S_L2T_W_LPBK 10 1952*de483253SVishal Kulkarni #define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK) 1953*de483253SVishal Kulkarni #define F_L2T_W_PKBK V_L2T_W_LPBK(1U) 1954*de483253SVishal Kulkarni 1955*de483253SVishal Kulkarni #define S_L2T_W_ARPMISS 11 1956*de483253SVishal Kulkarni #define V_L2T_W_ARPMISS(x) ((x) << S_L2T_W_ARPMISS) 1957*de483253SVishal Kulkarni #define F_L2T_W_ARPMISS V_L2T_W_ARPMISS(1U) 1958*de483253SVishal Kulkarni 195956b2bdd1SGireesh Nagabhushana #define S_L2T_W_NOREPLY 15 196056b2bdd1SGireesh Nagabhushana #define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY) 196156b2bdd1SGireesh Nagabhushana #define F_L2T_W_NOREPLY V_L2T_W_NOREPLY(1U) 196256b2bdd1SGireesh Nagabhushana 1963*de483253SVishal Kulkarni #define CPL_L2T_VLAN_NONE 0xfff 1964*de483253SVishal Kulkarni 196556b2bdd1SGireesh Nagabhushana struct cpl_l2t_write_rpl { 196656b2bdd1SGireesh Nagabhushana RSS_HDR 196756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 196856b2bdd1SGireesh Nagabhushana __u8 status; 196956b2bdd1SGireesh Nagabhushana __u8 rsvd[3]; 197056b2bdd1SGireesh Nagabhushana }; 197156b2bdd1SGireesh Nagabhushana 197256b2bdd1SGireesh Nagabhushana struct cpl_l2t_read_req { 197356b2bdd1SGireesh Nagabhushana WR_HDR; 197456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 197556b2bdd1SGireesh Nagabhushana __be32 l2t_idx; 197656b2bdd1SGireesh Nagabhushana }; 197756b2bdd1SGireesh Nagabhushana 197856b2bdd1SGireesh Nagabhushana struct cpl_l2t_read_rpl { 197956b2bdd1SGireesh Nagabhushana RSS_HDR 198056b2bdd1SGireesh Nagabhushana union opcode_tid ot; 198156b2bdd1SGireesh Nagabhushana __u8 status; 198256b2bdd1SGireesh Nagabhushana #if defined(__LITTLE_ENDIAN_BITFIELD) 198356b2bdd1SGireesh Nagabhushana __u8 :4; 198456b2bdd1SGireesh Nagabhushana __u8 iff:4; 198556b2bdd1SGireesh Nagabhushana #else 198656b2bdd1SGireesh Nagabhushana __u8 iff:4; 198756b2bdd1SGireesh Nagabhushana __u8 :4; 198856b2bdd1SGireesh Nagabhushana #endif 198956b2bdd1SGireesh Nagabhushana __be16 vlan; 199056b2bdd1SGireesh Nagabhushana __be16 info; 199156b2bdd1SGireesh Nagabhushana __u8 dst_mac[6]; 199256b2bdd1SGireesh Nagabhushana }; 199356b2bdd1SGireesh Nagabhushana 199456b2bdd1SGireesh Nagabhushana struct cpl_smt_write_req { 199556b2bdd1SGireesh Nagabhushana WR_HDR; 199656b2bdd1SGireesh Nagabhushana union opcode_tid ot; 199756b2bdd1SGireesh Nagabhushana __be32 params; 199856b2bdd1SGireesh Nagabhushana __be16 pfvf1; 199956b2bdd1SGireesh Nagabhushana __u8 src_mac1[6]; 200056b2bdd1SGireesh Nagabhushana __be16 pfvf0; 200156b2bdd1SGireesh Nagabhushana __u8 src_mac0[6]; 200256b2bdd1SGireesh Nagabhushana }; 200356b2bdd1SGireesh Nagabhushana 2004*de483253SVishal Kulkarni struct cpl_smt_write_rpl { 2005*de483253SVishal Kulkarni RSS_HDR 2006*de483253SVishal Kulkarni union opcode_tid ot; 2007*de483253SVishal Kulkarni __u8 status; 2008*de483253SVishal Kulkarni __u8 rsvd[3]; 2009*de483253SVishal Kulkarni }; 2010*de483253SVishal Kulkarni 2011*de483253SVishal Kulkarni struct cpl_smt_read_req { 2012*de483253SVishal Kulkarni WR_HDR; 2013*de483253SVishal Kulkarni union opcode_tid ot; 2014*de483253SVishal Kulkarni __be32 params; 2015*de483253SVishal Kulkarni }; 2016*de483253SVishal Kulkarni 2017*de483253SVishal Kulkarni struct cpl_smt_read_rpl { 2018*de483253SVishal Kulkarni RSS_HDR 2019*de483253SVishal Kulkarni union opcode_tid ot; 2020*de483253SVishal Kulkarni __u8 status; 2021*de483253SVishal Kulkarni __u8 ovlan_idx; 2022*de483253SVishal Kulkarni __be16 rsvd; 2023*de483253SVishal Kulkarni __be16 pfvf1; 2024*de483253SVishal Kulkarni __u8 src_mac1[6]; 2025*de483253SVishal Kulkarni __be16 pfvf0; 2026*de483253SVishal Kulkarni __u8 src_mac0[6]; 2027*de483253SVishal Kulkarni }; 2028*de483253SVishal Kulkarni 202956b2bdd1SGireesh Nagabhushana /* cpl_smt_{read,write}_req.params fields */ 203056b2bdd1SGireesh Nagabhushana #define S_SMTW_OVLAN_IDX 16 203156b2bdd1SGireesh Nagabhushana #define M_SMTW_OVLAN_IDX 0xF 203256b2bdd1SGireesh Nagabhushana #define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX) 203356b2bdd1SGireesh Nagabhushana #define G_SMTW_OVLAN_IDX(x) (((x) >> S_SMTW_OVLAN_IDX) & M_SMTW_OVLAN_IDX) 203456b2bdd1SGireesh Nagabhushana 203556b2bdd1SGireesh Nagabhushana #define S_SMTW_IDX 20 203656b2bdd1SGireesh Nagabhushana #define M_SMTW_IDX 0x7F 203756b2bdd1SGireesh Nagabhushana #define V_SMTW_IDX(x) ((x) << S_SMTW_IDX) 203856b2bdd1SGireesh Nagabhushana #define G_SMTW_IDX(x) (((x) >> S_SMTW_IDX) & M_SMTW_IDX) 203956b2bdd1SGireesh Nagabhushana 204056b2bdd1SGireesh Nagabhushana #define S_SMTW_NORPL 31 204156b2bdd1SGireesh Nagabhushana #define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL) 204256b2bdd1SGireesh Nagabhushana #define F_SMTW_NORPL V_SMTW_NORPL(1U) 204356b2bdd1SGireesh Nagabhushana 204456b2bdd1SGireesh Nagabhushana /* cpl_smt_{read,write}_req.pfvf? fields */ 204556b2bdd1SGireesh Nagabhushana #define S_SMTW_VF 0 204656b2bdd1SGireesh Nagabhushana #define M_SMTW_VF 0xFF 204756b2bdd1SGireesh Nagabhushana #define V_SMTW_VF(x) ((x) << S_SMTW_VF) 204856b2bdd1SGireesh Nagabhushana #define G_SMTW_VF(x) (((x) >> S_SMTW_VF) & M_SMTW_VF) 204956b2bdd1SGireesh Nagabhushana 205056b2bdd1SGireesh Nagabhushana #define S_SMTW_PF 8 205156b2bdd1SGireesh Nagabhushana #define M_SMTW_PF 0x7 205256b2bdd1SGireesh Nagabhushana #define V_SMTW_PF(x) ((x) << S_SMTW_PF) 205356b2bdd1SGireesh Nagabhushana #define G_SMTW_PF(x) (((x) >> S_SMTW_PF) & M_SMTW_PF) 205456b2bdd1SGireesh Nagabhushana 205556b2bdd1SGireesh Nagabhushana #define S_SMTW_VF_VLD 11 205656b2bdd1SGireesh Nagabhushana #define V_SMTW_VF_VLD(x) ((x) << S_SMTW_VF_VLD) 205756b2bdd1SGireesh Nagabhushana #define F_SMTW_VF_VLD V_SMTW_VF_VLD(1U) 205856b2bdd1SGireesh Nagabhushana 2059*de483253SVishal Kulkarni struct cpl_tag_write_req { 2060*de483253SVishal Kulkarni WR_HDR; 2061*de483253SVishal Kulkarni union opcode_tid ot; 2062*de483253SVishal Kulkarni __be32 params; 2063*de483253SVishal Kulkarni __be64 tag_val; 2064*de483253SVishal Kulkarni }; 2065*de483253SVishal Kulkarni 2066*de483253SVishal Kulkarni struct cpl_tag_write_rpl { 2067*de483253SVishal Kulkarni 206856b2bdd1SGireesh Nagabhushana RSS_HDR 206956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 207056b2bdd1SGireesh Nagabhushana __u8 status; 2071*de483253SVishal Kulkarni __u8 rsvd[2]; 2072*de483253SVishal Kulkarni __u8 idx; 207356b2bdd1SGireesh Nagabhushana }; 207456b2bdd1SGireesh Nagabhushana 2075*de483253SVishal Kulkarni struct cpl_tag_read_req { 207656b2bdd1SGireesh Nagabhushana WR_HDR; 207756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 207856b2bdd1SGireesh Nagabhushana __be32 params; 207956b2bdd1SGireesh Nagabhushana }; 208056b2bdd1SGireesh Nagabhushana 2081*de483253SVishal Kulkarni struct cpl_tag_read_rpl { 208256b2bdd1SGireesh Nagabhushana RSS_HDR 208356b2bdd1SGireesh Nagabhushana union opcode_tid ot; 208456b2bdd1SGireesh Nagabhushana __u8 status; 2085*de483253SVishal Kulkarni #if defined(__LITTLE_ENDIAN_BITFIELD) 2086*de483253SVishal Kulkarni __u8 :4; 2087*de483253SVishal Kulkarni __u8 tag_len:1; 2088*de483253SVishal Kulkarni __u8 :2; 2089*de483253SVishal Kulkarni __u8 ins_enable:1; 2090*de483253SVishal Kulkarni #else 2091*de483253SVishal Kulkarni __u8 ins_enable:1; 2092*de483253SVishal Kulkarni __u8 :2; 2093*de483253SVishal Kulkarni __u8 tag_len:1; 2094*de483253SVishal Kulkarni __u8 :4; 2095*de483253SVishal Kulkarni #endif 2096*de483253SVishal Kulkarni __u8 rsvd; 2097*de483253SVishal Kulkarni __u8 tag_idx; 2098*de483253SVishal Kulkarni __be64 tag_val; 209956b2bdd1SGireesh Nagabhushana }; 210056b2bdd1SGireesh Nagabhushana 2101*de483253SVishal Kulkarni /* cpl_tag{read,write}_req.params fields */ 2102*de483253SVishal Kulkarni #define S_TAGW_IDX 0 2103*de483253SVishal Kulkarni #define M_TAGW_IDX 0x7F 2104*de483253SVishal Kulkarni #define V_TAGW_IDX(x) ((x) << S_TAGW_IDX) 2105*de483253SVishal Kulkarni #define G_TAGW_IDX(x) (((x) >> S_TAGW_IDX) & M_TAGW_IDX) 2106*de483253SVishal Kulkarni 2107*de483253SVishal Kulkarni #define S_TAGW_LEN 20 2108*de483253SVishal Kulkarni #define V_TAGW_LEN(x) ((x) << S_TAGW_LEN) 2109*de483253SVishal Kulkarni #define F_TAGW_LEN V_TAGW_LEN(1U) 2110*de483253SVishal Kulkarni 2111*de483253SVishal Kulkarni #define S_TAGW_INS_ENABLE 23 2112*de483253SVishal Kulkarni #define V_TAGW_INS_ENABLE(x) ((x) << S_TAGW_INS_ENABLE) 2113*de483253SVishal Kulkarni #define F_TAGW_INS_ENABLE V_TAGW_INS_ENABLE(1U) 2114*de483253SVishal Kulkarni 2115*de483253SVishal Kulkarni #define S_TAGW_NORPL 31 2116*de483253SVishal Kulkarni #define V_TAGW_NORPL(x) ((x) << S_TAGW_NORPL) 2117*de483253SVishal Kulkarni #define F_TAGW_NORPL V_TAGW_NORPL(1U) 2118*de483253SVishal Kulkarni 211956b2bdd1SGireesh Nagabhushana struct cpl_barrier { 212056b2bdd1SGireesh Nagabhushana WR_HDR; 212156b2bdd1SGireesh Nagabhushana __u8 opcode; 212256b2bdd1SGireesh Nagabhushana __u8 chan_map; 212356b2bdd1SGireesh Nagabhushana __be16 rsvd0; 212456b2bdd1SGireesh Nagabhushana __be32 rsvd1; 212556b2bdd1SGireesh Nagabhushana }; 212656b2bdd1SGireesh Nagabhushana 212756b2bdd1SGireesh Nagabhushana /* cpl_barrier.chan_map fields */ 212856b2bdd1SGireesh Nagabhushana #define S_CHAN_MAP 4 212956b2bdd1SGireesh Nagabhushana #define M_CHAN_MAP 0xF 213056b2bdd1SGireesh Nagabhushana #define V_CHAN_MAP(x) ((x) << S_CHAN_MAP) 213156b2bdd1SGireesh Nagabhushana #define G_CHAN_MAP(x) (((x) >> S_CHAN_MAP) & M_CHAN_MAP) 213256b2bdd1SGireesh Nagabhushana 213356b2bdd1SGireesh Nagabhushana struct cpl_error { 213456b2bdd1SGireesh Nagabhushana RSS_HDR 213556b2bdd1SGireesh Nagabhushana union opcode_tid ot; 213656b2bdd1SGireesh Nagabhushana __be32 error; 213756b2bdd1SGireesh Nagabhushana }; 213856b2bdd1SGireesh Nagabhushana 213956b2bdd1SGireesh Nagabhushana struct cpl_hit_notify { 214056b2bdd1SGireesh Nagabhushana RSS_HDR 214156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 214256b2bdd1SGireesh Nagabhushana __be32 rsvd; 214356b2bdd1SGireesh Nagabhushana __be32 info; 214456b2bdd1SGireesh Nagabhushana __be32 reason; 214556b2bdd1SGireesh Nagabhushana }; 214656b2bdd1SGireesh Nagabhushana 214756b2bdd1SGireesh Nagabhushana struct cpl_pkt_notify { 214856b2bdd1SGireesh Nagabhushana RSS_HDR 214956b2bdd1SGireesh Nagabhushana union opcode_tid ot; 215056b2bdd1SGireesh Nagabhushana __be16 rsvd; 215156b2bdd1SGireesh Nagabhushana __be16 len; 215256b2bdd1SGireesh Nagabhushana __be32 info; 215356b2bdd1SGireesh Nagabhushana __be32 reason; 215456b2bdd1SGireesh Nagabhushana }; 215556b2bdd1SGireesh Nagabhushana 215656b2bdd1SGireesh Nagabhushana /* cpl_{hit,pkt}_notify.info fields */ 215756b2bdd1SGireesh Nagabhushana #define S_NTFY_MAC_IDX 0 215856b2bdd1SGireesh Nagabhushana #define M_NTFY_MAC_IDX 0x1FF 215956b2bdd1SGireesh Nagabhushana #define V_NTFY_MAC_IDX(x) ((x) << S_NTFY_MAC_IDX) 216056b2bdd1SGireesh Nagabhushana #define G_NTFY_MAC_IDX(x) (((x) >> S_NTFY_MAC_IDX) & M_NTFY_MAC_IDX) 216156b2bdd1SGireesh Nagabhushana 216256b2bdd1SGireesh Nagabhushana #define S_NTFY_INTF 10 216356b2bdd1SGireesh Nagabhushana #define M_NTFY_INTF 0xF 216456b2bdd1SGireesh Nagabhushana #define V_NTFY_INTF(x) ((x) << S_NTFY_INTF) 216556b2bdd1SGireesh Nagabhushana #define G_NTFY_INTF(x) (((x) >> S_NTFY_INTF) & M_NTFY_INTF) 216656b2bdd1SGireesh Nagabhushana 216756b2bdd1SGireesh Nagabhushana #define S_NTFY_TCPHDR_LEN 14 216856b2bdd1SGireesh Nagabhushana #define M_NTFY_TCPHDR_LEN 0xF 216956b2bdd1SGireesh Nagabhushana #define V_NTFY_TCPHDR_LEN(x) ((x) << S_NTFY_TCPHDR_LEN) 217056b2bdd1SGireesh Nagabhushana #define G_NTFY_TCPHDR_LEN(x) (((x) >> S_NTFY_TCPHDR_LEN) & M_NTFY_TCPHDR_LEN) 217156b2bdd1SGireesh Nagabhushana 217256b2bdd1SGireesh Nagabhushana #define S_NTFY_IPHDR_LEN 18 217356b2bdd1SGireesh Nagabhushana #define M_NTFY_IPHDR_LEN 0x1FF 217456b2bdd1SGireesh Nagabhushana #define V_NTFY_IPHDR_LEN(x) ((x) << S_NTFY_IPHDR_LEN) 217556b2bdd1SGireesh Nagabhushana #define G_NTFY_IPHDR_LEN(x) (((x) >> S_NTFY_IPHDR_LEN) & M_NTFY_IPHDR_LEN) 217656b2bdd1SGireesh Nagabhushana 217756b2bdd1SGireesh Nagabhushana #define S_NTFY_ETHHDR_LEN 27 217856b2bdd1SGireesh Nagabhushana #define M_NTFY_ETHHDR_LEN 0x1F 217956b2bdd1SGireesh Nagabhushana #define V_NTFY_ETHHDR_LEN(x) ((x) << S_NTFY_ETHHDR_LEN) 218056b2bdd1SGireesh Nagabhushana #define G_NTFY_ETHHDR_LEN(x) (((x) >> S_NTFY_ETHHDR_LEN) & M_NTFY_ETHHDR_LEN) 218156b2bdd1SGireesh Nagabhushana 2182*de483253SVishal Kulkarni #define S_NTFY_T5_IPHDR_LEN 18 2183*de483253SVishal Kulkarni #define M_NTFY_T5_IPHDR_LEN 0xFF 2184*de483253SVishal Kulkarni #define V_NTFY_T5_IPHDR_LEN(x) ((x) << S_NTFY_T5_IPHDR_LEN) 2185*de483253SVishal Kulkarni #define G_NTFY_T5_IPHDR_LEN(x) (((x) >> S_NTFY_T5_IPHDR_LEN) & M_NTFY_T5_IPHDR_LEN) 2186*de483253SVishal Kulkarni 2187*de483253SVishal Kulkarni #define S_NTFY_T5_ETHHDR_LEN 26 2188*de483253SVishal Kulkarni #define M_NTFY_T5_ETHHDR_LEN 0x3F 2189*de483253SVishal Kulkarni #define V_NTFY_T5_ETHHDR_LEN(x) ((x) << S_NTFY_T5_ETHHDR_LEN) 2190*de483253SVishal Kulkarni #define G_NTFY_T5_ETHHDR_LEN(x) (((x) >> S_NTFY_T5_ETHHDR_LEN) & M_NTFY_T5_ETHHDR_LEN) 2191*de483253SVishal Kulkarni 219256b2bdd1SGireesh Nagabhushana struct cpl_rdma_terminate { 219356b2bdd1SGireesh Nagabhushana RSS_HDR 219456b2bdd1SGireesh Nagabhushana union opcode_tid ot; 219556b2bdd1SGireesh Nagabhushana __be16 rsvd; 219656b2bdd1SGireesh Nagabhushana __be16 len; 219756b2bdd1SGireesh Nagabhushana }; 219856b2bdd1SGireesh Nagabhushana 219956b2bdd1SGireesh Nagabhushana struct cpl_set_le_req { 220056b2bdd1SGireesh Nagabhushana WR_HDR; 220156b2bdd1SGireesh Nagabhushana union opcode_tid ot; 220256b2bdd1SGireesh Nagabhushana __be16 reply_ctrl; 220356b2bdd1SGireesh Nagabhushana __be16 params; 220456b2bdd1SGireesh Nagabhushana __be64 mask_hi; 220556b2bdd1SGireesh Nagabhushana __be64 mask_lo; 220656b2bdd1SGireesh Nagabhushana __be64 val_hi; 220756b2bdd1SGireesh Nagabhushana __be64 val_lo; 220856b2bdd1SGireesh Nagabhushana }; 220956b2bdd1SGireesh Nagabhushana 221056b2bdd1SGireesh Nagabhushana /* cpl_set_le_req.reply_ctrl additional fields */ 221156b2bdd1SGireesh Nagabhushana #define S_LE_REQ_IP6 13 221256b2bdd1SGireesh Nagabhushana #define V_LE_REQ_IP6(x) ((x) << S_LE_REQ_IP6) 221356b2bdd1SGireesh Nagabhushana #define F_LE_REQ_IP6 V_LE_REQ_IP6(1U) 221456b2bdd1SGireesh Nagabhushana 221556b2bdd1SGireesh Nagabhushana /* cpl_set_le_req.params fields */ 221656b2bdd1SGireesh Nagabhushana #define S_LE_CHAN 0 221756b2bdd1SGireesh Nagabhushana #define M_LE_CHAN 0x3 221856b2bdd1SGireesh Nagabhushana #define V_LE_CHAN(x) ((x) << S_LE_CHAN) 221956b2bdd1SGireesh Nagabhushana #define G_LE_CHAN(x) (((x) >> S_LE_CHAN) & M_LE_CHAN) 222056b2bdd1SGireesh Nagabhushana 222156b2bdd1SGireesh Nagabhushana #define S_LE_OFFSET 5 222256b2bdd1SGireesh Nagabhushana #define M_LE_OFFSET 0x7 222356b2bdd1SGireesh Nagabhushana #define V_LE_OFFSET(x) ((x) << S_LE_OFFSET) 222456b2bdd1SGireesh Nagabhushana #define G_LE_OFFSET(x) (((x) >> S_LE_OFFSET) & M_LE_OFFSET) 222556b2bdd1SGireesh Nagabhushana 222656b2bdd1SGireesh Nagabhushana #define S_LE_MORE 8 222756b2bdd1SGireesh Nagabhushana #define V_LE_MORE(x) ((x) << S_LE_MORE) 222856b2bdd1SGireesh Nagabhushana #define F_LE_MORE V_LE_MORE(1U) 222956b2bdd1SGireesh Nagabhushana 223056b2bdd1SGireesh Nagabhushana #define S_LE_REQSIZE 9 223156b2bdd1SGireesh Nagabhushana #define M_LE_REQSIZE 0x7 223256b2bdd1SGireesh Nagabhushana #define V_LE_REQSIZE(x) ((x) << S_LE_REQSIZE) 223356b2bdd1SGireesh Nagabhushana #define G_LE_REQSIZE(x) (((x) >> S_LE_REQSIZE) & M_LE_REQSIZE) 223456b2bdd1SGireesh Nagabhushana 223556b2bdd1SGireesh Nagabhushana #define S_LE_REQCMD 12 223656b2bdd1SGireesh Nagabhushana #define M_LE_REQCMD 0xF 223756b2bdd1SGireesh Nagabhushana #define V_LE_REQCMD(x) ((x) << S_LE_REQCMD) 223856b2bdd1SGireesh Nagabhushana #define G_LE_REQCMD(x) (((x) >> S_LE_REQCMD) & M_LE_REQCMD) 223956b2bdd1SGireesh Nagabhushana 224056b2bdd1SGireesh Nagabhushana struct cpl_set_le_rpl { 224156b2bdd1SGireesh Nagabhushana RSS_HDR 224256b2bdd1SGireesh Nagabhushana union opcode_tid ot; 224356b2bdd1SGireesh Nagabhushana __u8 chan; 224456b2bdd1SGireesh Nagabhushana __u8 info; 224556b2bdd1SGireesh Nagabhushana __be16 len; 224656b2bdd1SGireesh Nagabhushana }; 224756b2bdd1SGireesh Nagabhushana 224856b2bdd1SGireesh Nagabhushana /* cpl_set_le_rpl.info fields */ 224956b2bdd1SGireesh Nagabhushana #define S_LE_RSPCMD 0 225056b2bdd1SGireesh Nagabhushana #define M_LE_RSPCMD 0xF 225156b2bdd1SGireesh Nagabhushana #define V_LE_RSPCMD(x) ((x) << S_LE_RSPCMD) 225256b2bdd1SGireesh Nagabhushana #define G_LE_RSPCMD(x) (((x) >> S_LE_RSPCMD) & M_LE_RSPCMD) 225356b2bdd1SGireesh Nagabhushana 225456b2bdd1SGireesh Nagabhushana #define S_LE_RSPSIZE 4 225556b2bdd1SGireesh Nagabhushana #define M_LE_RSPSIZE 0x7 225656b2bdd1SGireesh Nagabhushana #define V_LE_RSPSIZE(x) ((x) << S_LE_RSPSIZE) 225756b2bdd1SGireesh Nagabhushana #define G_LE_RSPSIZE(x) (((x) >> S_LE_RSPSIZE) & M_LE_RSPSIZE) 225856b2bdd1SGireesh Nagabhushana 225956b2bdd1SGireesh Nagabhushana #define S_LE_RSPTYPE 7 226056b2bdd1SGireesh Nagabhushana #define V_LE_RSPTYPE(x) ((x) << S_LE_RSPTYPE) 226156b2bdd1SGireesh Nagabhushana #define F_LE_RSPTYPE V_LE_RSPTYPE(1U) 226256b2bdd1SGireesh Nagabhushana 226356b2bdd1SGireesh Nagabhushana struct cpl_sge_egr_update { 226456b2bdd1SGireesh Nagabhushana RSS_HDR 226556b2bdd1SGireesh Nagabhushana __be32 opcode_qid; 226656b2bdd1SGireesh Nagabhushana __be16 cidx; 226756b2bdd1SGireesh Nagabhushana __be16 pidx; 226856b2bdd1SGireesh Nagabhushana }; 226956b2bdd1SGireesh Nagabhushana 227056b2bdd1SGireesh Nagabhushana /* cpl_sge_egr_update.ot fields */ 227156b2bdd1SGireesh Nagabhushana #define S_EGR_QID 0 227256b2bdd1SGireesh Nagabhushana #define M_EGR_QID 0x1FFFF 227356b2bdd1SGireesh Nagabhushana #define V_EGR_QID(x) ((x) << S_EGR_QID) 227456b2bdd1SGireesh Nagabhushana #define G_EGR_QID(x) (((x) >> S_EGR_QID) & M_EGR_QID) 227556b2bdd1SGireesh Nagabhushana 2276*de483253SVishal Kulkarni /* cpl_fw*.type values */ 2277*de483253SVishal Kulkarni enum { 2278*de483253SVishal Kulkarni FW_TYPE_CMD_RPL = 0, 2279*de483253SVishal Kulkarni FW_TYPE_WR_RPL = 1, 2280*de483253SVishal Kulkarni FW_TYPE_CQE = 2, 2281*de483253SVishal Kulkarni FW_TYPE_OFLD_CONNECTION_WR_RPL = 3, 2282*de483253SVishal Kulkarni FW_TYPE_RSSCPL = 4, 2283*de483253SVishal Kulkarni }; 2284*de483253SVishal Kulkarni 228556b2bdd1SGireesh Nagabhushana struct cpl_fw2_pld { 228656b2bdd1SGireesh Nagabhushana RSS_HDR 228756b2bdd1SGireesh Nagabhushana u8 opcode; 228856b2bdd1SGireesh Nagabhushana u8 rsvd[5]; 228956b2bdd1SGireesh Nagabhushana __be16 len; 229056b2bdd1SGireesh Nagabhushana }; 229156b2bdd1SGireesh Nagabhushana 229256b2bdd1SGireesh Nagabhushana struct cpl_fw4_pld { 229356b2bdd1SGireesh Nagabhushana RSS_HDR 229456b2bdd1SGireesh Nagabhushana u8 opcode; 229556b2bdd1SGireesh Nagabhushana u8 rsvd0[3]; 229656b2bdd1SGireesh Nagabhushana u8 type; 229756b2bdd1SGireesh Nagabhushana u8 rsvd1; 229856b2bdd1SGireesh Nagabhushana __be16 len; 229956b2bdd1SGireesh Nagabhushana __be64 data; 230056b2bdd1SGireesh Nagabhushana __be64 rsvd2; 230156b2bdd1SGireesh Nagabhushana }; 230256b2bdd1SGireesh Nagabhushana 230356b2bdd1SGireesh Nagabhushana struct cpl_fw6_pld { 230456b2bdd1SGireesh Nagabhushana RSS_HDR 230556b2bdd1SGireesh Nagabhushana u8 opcode; 230656b2bdd1SGireesh Nagabhushana u8 rsvd[5]; 230756b2bdd1SGireesh Nagabhushana __be16 len; 230856b2bdd1SGireesh Nagabhushana __be64 data[4]; 230956b2bdd1SGireesh Nagabhushana }; 231056b2bdd1SGireesh Nagabhushana 231156b2bdd1SGireesh Nagabhushana struct cpl_fw2_msg { 231256b2bdd1SGireesh Nagabhushana RSS_HDR 231356b2bdd1SGireesh Nagabhushana union opcode_info oi; 231456b2bdd1SGireesh Nagabhushana }; 231556b2bdd1SGireesh Nagabhushana 231656b2bdd1SGireesh Nagabhushana struct cpl_fw4_msg { 231756b2bdd1SGireesh Nagabhushana RSS_HDR 231856b2bdd1SGireesh Nagabhushana u8 opcode; 231956b2bdd1SGireesh Nagabhushana u8 type; 232056b2bdd1SGireesh Nagabhushana __be16 rsvd0; 232156b2bdd1SGireesh Nagabhushana __be32 rsvd1; 232256b2bdd1SGireesh Nagabhushana __be64 data[2]; 232356b2bdd1SGireesh Nagabhushana }; 232456b2bdd1SGireesh Nagabhushana 232556b2bdd1SGireesh Nagabhushana struct cpl_fw4_ack { 232656b2bdd1SGireesh Nagabhushana RSS_HDR 232756b2bdd1SGireesh Nagabhushana union opcode_tid ot; 232856b2bdd1SGireesh Nagabhushana u8 credits; 232956b2bdd1SGireesh Nagabhushana u8 rsvd0[2]; 233056b2bdd1SGireesh Nagabhushana u8 flags; 233156b2bdd1SGireesh Nagabhushana __be32 snd_nxt; 233256b2bdd1SGireesh Nagabhushana __be32 snd_una; 233356b2bdd1SGireesh Nagabhushana __be64 rsvd1; 233456b2bdd1SGireesh Nagabhushana }; 233556b2bdd1SGireesh Nagabhushana 233656b2bdd1SGireesh Nagabhushana enum { 233756b2bdd1SGireesh Nagabhushana CPL_FW4_ACK_FLAGS_SEQVAL = 0x1, /* seqn valid */ 233856b2bdd1SGireesh Nagabhushana CPL_FW4_ACK_FLAGS_CH = 0x2, /* channel change complete */ 233956b2bdd1SGireesh Nagabhushana CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */ 234056b2bdd1SGireesh Nagabhushana }; 234156b2bdd1SGireesh Nagabhushana 234256b2bdd1SGireesh Nagabhushana struct cpl_fw6_msg { 234356b2bdd1SGireesh Nagabhushana RSS_HDR 234456b2bdd1SGireesh Nagabhushana u8 opcode; 234556b2bdd1SGireesh Nagabhushana u8 type; 234656b2bdd1SGireesh Nagabhushana __be16 rsvd0; 234756b2bdd1SGireesh Nagabhushana __be32 rsvd1; 234856b2bdd1SGireesh Nagabhushana __be64 data[4]; 234956b2bdd1SGireesh Nagabhushana }; 235056b2bdd1SGireesh Nagabhushana 235156b2bdd1SGireesh Nagabhushana /* cpl_fw6_msg.type values */ 235256b2bdd1SGireesh Nagabhushana enum { 2353*de483253SVishal Kulkarni FW6_TYPE_CMD_RPL = FW_TYPE_CMD_RPL, 2354*de483253SVishal Kulkarni FW6_TYPE_WR_RPL = FW_TYPE_WR_RPL, 2355*de483253SVishal Kulkarni FW6_TYPE_CQE = FW_TYPE_CQE, 2356*de483253SVishal Kulkarni FW6_TYPE_OFLD_CONNECTION_WR_RPL = FW_TYPE_OFLD_CONNECTION_WR_RPL, 2357*de483253SVishal Kulkarni FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL, 2358*de483253SVishal Kulkarni 2359*de483253SVishal Kulkarni NUM_FW6_TYPES 2360*de483253SVishal Kulkarni }; 2361*de483253SVishal Kulkarni 2362*de483253SVishal Kulkarni struct cpl_fw6_msg_ofld_connection_wr_rpl { 2363*de483253SVishal Kulkarni __u64 cookie; 2364*de483253SVishal Kulkarni __be32 tid; /* or atid in case of active failure */ 2365*de483253SVishal Kulkarni __u8 t_state; 2366*de483253SVishal Kulkarni __u8 retval; 2367*de483253SVishal Kulkarni __u8 rsvd[2]; 236856b2bdd1SGireesh Nagabhushana }; 236956b2bdd1SGireesh Nagabhushana 237056b2bdd1SGireesh Nagabhushana /* ULP_TX opcodes */ 237156b2bdd1SGireesh Nagabhushana enum { 237256b2bdd1SGireesh Nagabhushana ULP_TX_MEM_READ = 2, 237356b2bdd1SGireesh Nagabhushana ULP_TX_MEM_WRITE = 3, 237456b2bdd1SGireesh Nagabhushana ULP_TX_PKT = 4 237556b2bdd1SGireesh Nagabhushana }; 237656b2bdd1SGireesh Nagabhushana 237756b2bdd1SGireesh Nagabhushana enum { 237856b2bdd1SGireesh Nagabhushana ULP_TX_SC_NOOP = 0x80, 237956b2bdd1SGireesh Nagabhushana ULP_TX_SC_IMM = 0x81, 238056b2bdd1SGireesh Nagabhushana ULP_TX_SC_DSGL = 0x82, 238156b2bdd1SGireesh Nagabhushana ULP_TX_SC_ISGL = 0x83 238256b2bdd1SGireesh Nagabhushana }; 238356b2bdd1SGireesh Nagabhushana 238456b2bdd1SGireesh Nagabhushana #define S_ULPTX_CMD 24 238556b2bdd1SGireesh Nagabhushana #define M_ULPTX_CMD 0xFF 238656b2bdd1SGireesh Nagabhushana #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD) 238756b2bdd1SGireesh Nagabhushana 238856b2bdd1SGireesh Nagabhushana #define S_ULPTX_LEN16 0 238956b2bdd1SGireesh Nagabhushana #define M_ULPTX_LEN16 0xFF 239056b2bdd1SGireesh Nagabhushana #define V_ULPTX_LEN16(x) ((x) << S_ULPTX_LEN16) 239156b2bdd1SGireesh Nagabhushana 239256b2bdd1SGireesh Nagabhushana #define S_ULP_TX_SC_MORE 23 239356b2bdd1SGireesh Nagabhushana #define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE) 239456b2bdd1SGireesh Nagabhushana #define F_ULP_TX_SC_MORE V_ULP_TX_SC_MORE(1U) 239556b2bdd1SGireesh Nagabhushana 239656b2bdd1SGireesh Nagabhushana struct ulptx_sge_pair { 239756b2bdd1SGireesh Nagabhushana __be32 len[2]; 239856b2bdd1SGireesh Nagabhushana __be64 addr[2]; 239956b2bdd1SGireesh Nagabhushana }; 240056b2bdd1SGireesh Nagabhushana 240156b2bdd1SGireesh Nagabhushana struct ulptx_sgl { 240256b2bdd1SGireesh Nagabhushana __be32 cmd_nsge; 240356b2bdd1SGireesh Nagabhushana __be32 len0; 240456b2bdd1SGireesh Nagabhushana __be64 addr0; 240556b2bdd1SGireesh Nagabhushana #if !(defined C99_NOT_SUPPORTED) 240656b2bdd1SGireesh Nagabhushana struct ulptx_sge_pair sge[]; 240756b2bdd1SGireesh Nagabhushana #endif 240856b2bdd1SGireesh Nagabhushana }; 240956b2bdd1SGireesh Nagabhushana 241056b2bdd1SGireesh Nagabhushana struct ulptx_isge { 241156b2bdd1SGireesh Nagabhushana __be32 stag; 241256b2bdd1SGireesh Nagabhushana __be32 len; 241356b2bdd1SGireesh Nagabhushana __be64 target_ofst; 241456b2bdd1SGireesh Nagabhushana }; 241556b2bdd1SGireesh Nagabhushana 241656b2bdd1SGireesh Nagabhushana struct ulptx_isgl { 241756b2bdd1SGireesh Nagabhushana __be32 cmd_nisge; 241856b2bdd1SGireesh Nagabhushana __be32 rsvd; 241956b2bdd1SGireesh Nagabhushana #if !(defined C99_NOT_SUPPORTED) 242056b2bdd1SGireesh Nagabhushana struct ulptx_isge sge[]; 242156b2bdd1SGireesh Nagabhushana #endif 242256b2bdd1SGireesh Nagabhushana }; 242356b2bdd1SGireesh Nagabhushana 242456b2bdd1SGireesh Nagabhushana struct ulptx_idata { 242556b2bdd1SGireesh Nagabhushana __be32 cmd_more; 242656b2bdd1SGireesh Nagabhushana __be32 len; 242756b2bdd1SGireesh Nagabhushana }; 242856b2bdd1SGireesh Nagabhushana 242956b2bdd1SGireesh Nagabhushana #define S_ULPTX_NSGE 0 243056b2bdd1SGireesh Nagabhushana #define M_ULPTX_NSGE 0xFFFF 243156b2bdd1SGireesh Nagabhushana #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE) 243256b2bdd1SGireesh Nagabhushana 243356b2bdd1SGireesh Nagabhushana struct ulp_mem_io { 243456b2bdd1SGireesh Nagabhushana WR_HDR; 243556b2bdd1SGireesh Nagabhushana __be32 cmd; 243656b2bdd1SGireesh Nagabhushana __be32 len16; /* command length */ 243756b2bdd1SGireesh Nagabhushana __be32 dlen; /* data length in 32-byte units */ 243856b2bdd1SGireesh Nagabhushana __be32 lock_addr; 243956b2bdd1SGireesh Nagabhushana }; 244056b2bdd1SGireesh Nagabhushana 244156b2bdd1SGireesh Nagabhushana /* additional ulp_mem_io.cmd fields */ 244256b2bdd1SGireesh Nagabhushana #define S_ULP_MEMIO_ORDER 23 244356b2bdd1SGireesh Nagabhushana #define V_ULP_MEMIO_ORDER(x) ((x) << S_ULP_MEMIO_ORDER) 244456b2bdd1SGireesh Nagabhushana #define F_ULP_MEMIO_ORDER V_ULP_MEMIO_ORDER(1U) 244556b2bdd1SGireesh Nagabhushana 2446*de483253SVishal Kulkarni #define S_T5_ULP_MEMIO_IMM 23 2447*de483253SVishal Kulkarni #define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM) 2448*de483253SVishal Kulkarni #define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U) 2449*de483253SVishal Kulkarni 2450*de483253SVishal Kulkarni #define S_T5_ULP_MEMIO_ORDER 22 2451*de483253SVishal Kulkarni #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER) 2452*de483253SVishal Kulkarni #define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U) 2453*de483253SVishal Kulkarni 245456b2bdd1SGireesh Nagabhushana /* ulp_mem_io.lock_addr fields */ 245556b2bdd1SGireesh Nagabhushana #define S_ULP_MEMIO_ADDR 0 245656b2bdd1SGireesh Nagabhushana #define M_ULP_MEMIO_ADDR 0x7FFFFFF 245756b2bdd1SGireesh Nagabhushana #define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR) 245856b2bdd1SGireesh Nagabhushana 245956b2bdd1SGireesh Nagabhushana #define S_ULP_MEMIO_LOCK 31 246056b2bdd1SGireesh Nagabhushana #define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK) 246156b2bdd1SGireesh Nagabhushana #define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U) 246256b2bdd1SGireesh Nagabhushana 246356b2bdd1SGireesh Nagabhushana /* ulp_mem_io.dlen fields */ 246456b2bdd1SGireesh Nagabhushana #define S_ULP_MEMIO_DATA_LEN 0 246556b2bdd1SGireesh Nagabhushana #define M_ULP_MEMIO_DATA_LEN 0x1F 246656b2bdd1SGireesh Nagabhushana #define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN) 246756b2bdd1SGireesh Nagabhushana 2468*de483253SVishal Kulkarni /* ULP_TXPKT field values */ 2469*de483253SVishal Kulkarni enum { 2470*de483253SVishal Kulkarni ULP_TXPKT_DEST_TP = 0, 2471*de483253SVishal Kulkarni ULP_TXPKT_DEST_SGE, 2472*de483253SVishal Kulkarni ULP_TXPKT_DEST_UP, 2473*de483253SVishal Kulkarni ULP_TXPKT_DEST_DEVNULL, 2474*de483253SVishal Kulkarni }; 2475*de483253SVishal Kulkarni 247656b2bdd1SGireesh Nagabhushana struct ulp_txpkt { 247756b2bdd1SGireesh Nagabhushana __be32 cmd_dest; 247856b2bdd1SGireesh Nagabhushana __be32 len; 247956b2bdd1SGireesh Nagabhushana }; 248056b2bdd1SGireesh Nagabhushana 248156b2bdd1SGireesh Nagabhushana /* ulp_txpkt.cmd_dest fields */ 248256b2bdd1SGireesh Nagabhushana #define S_ULP_TXPKT_DEST 16 248356b2bdd1SGireesh Nagabhushana #define M_ULP_TXPKT_DEST 0x3 248456b2bdd1SGireesh Nagabhushana #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST) 248556b2bdd1SGireesh Nagabhushana 248656b2bdd1SGireesh Nagabhushana #define S_ULP_TXPKT_FID 4 248756b2bdd1SGireesh Nagabhushana #define M_ULP_TXPKT_FID 0x7ff 248856b2bdd1SGireesh Nagabhushana #define V_ULP_TXPKT_FID(x) ((x) << S_ULP_TXPKT_FID) 248956b2bdd1SGireesh Nagabhushana 2490*de483253SVishal Kulkarni #define S_ULP_TXPKT_RO 3 2491*de483253SVishal Kulkarni #define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO) 2492*de483253SVishal Kulkarni #define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U) 2493*de483253SVishal Kulkarni 249456b2bdd1SGireesh Nagabhushana #endif /* __CXGBE_T4_MSG_H */ 2495