xref: /illumos-gate/usr/src/uts/common/io/chxge/osdep.h (revision d39a76e7)
1*d39a76e7Sxw /*
2*d39a76e7Sxw  * CDDL HEADER START
3*d39a76e7Sxw  *
4*d39a76e7Sxw  * The contents of this file are subject to the terms of the
5*d39a76e7Sxw  * Common Development and Distribution License (the "License").
6*d39a76e7Sxw  * You may not use this file except in compliance with the License.
7*d39a76e7Sxw  *
8*d39a76e7Sxw  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*d39a76e7Sxw  * or http://www.opensolaris.org/os/licensing.
10*d39a76e7Sxw  * See the License for the specific language governing permissions
11*d39a76e7Sxw  * and limitations under the License.
12*d39a76e7Sxw  *
13*d39a76e7Sxw  * When distributing Covered Code, include this CDDL HEADER in each
14*d39a76e7Sxw  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*d39a76e7Sxw  * If applicable, add the following below this CDDL HEADER, with the
16*d39a76e7Sxw  * fields enclosed by brackets "[]" replaced with your own identifying
17*d39a76e7Sxw  * information: Portions Copyright [yyyy] [name of copyright owner]
18*d39a76e7Sxw  *
19*d39a76e7Sxw  * CDDL HEADER END
20*d39a76e7Sxw  */
21*d39a76e7Sxw 
22*d39a76e7Sxw /*
23*d39a76e7Sxw  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*d39a76e7Sxw  * Use is subject to license terms.
25*d39a76e7Sxw  */
26*d39a76e7Sxw 
27*d39a76e7Sxw /*
28*d39a76e7Sxw  * This file is part of the Chelsio T1 Ethernet driver.
29*d39a76e7Sxw  *
30*d39a76e7Sxw  * Copyright (C) 2003-2005 Chelsio Communications.  All rights reserved.
31*d39a76e7Sxw  */
32*d39a76e7Sxw 
33*d39a76e7Sxw #ifndef _CHELSIO_OSDEP_H
34*d39a76e7Sxw #define	_CHELSIO_OSDEP_H
35*d39a76e7Sxw 
36*d39a76e7Sxw #pragma ident	"%Z%%M%	%I%	%E% SMI"
37*d39a76e7Sxw 
38*d39a76e7Sxw #ifdef __cplusplus
39*d39a76e7Sxw extern "C" {
40*d39a76e7Sxw #endif
41*d39a76e7Sxw 
42*d39a76e7Sxw /*
43*d39a76e7Sxw  * Solaris includes
44*d39a76e7Sxw  */
45*d39a76e7Sxw #define	BIG_ENDIAN 4321
46*d39a76e7Sxw #define	LITTLE_ENDIAN 1234
47*d39a76e7Sxw #if defined(__sparc)
48*d39a76e7Sxw #define	BYTE_ORDER BIG_ENDIAN
49*d39a76e7Sxw #else
50*d39a76e7Sxw #define	BYTE_ORDER LITTLE_ENDIAN
51*d39a76e7Sxw #endif
52*d39a76e7Sxw 
53*d39a76e7Sxw #include <sys/types.h>
54*d39a76e7Sxw #include <sys/systm.h>
55*d39a76e7Sxw #include <sys/param.h>
56*d39a76e7Sxw #include <sys/kmem.h>
57*d39a76e7Sxw #include <sys/stropts.h>
58*d39a76e7Sxw #include <sys/cmn_err.h>
59*d39a76e7Sxw #include <sys/varargs.h>
60*d39a76e7Sxw #include <sys/stream.h>
61*d39a76e7Sxw #include <sys/ddi.h>
62*d39a76e7Sxw #include <sys/dlpi.h>
63*d39a76e7Sxw #include <sys/ethernet.h>
64*d39a76e7Sxw #include <sys/gld.h>
65*d39a76e7Sxw #include "ostypes.h"
66*d39a76e7Sxw 
67*d39a76e7Sxw #include "oschtoe.h"
68*d39a76e7Sxw #include "ch_compat.h"
69*d39a76e7Sxw 
70*d39a76e7Sxw #include "ch.h"
71*d39a76e7Sxw 
72*d39a76e7Sxw #define	FILE_IDENT(a) static char *id = a
73*d39a76e7Sxw 
74*d39a76e7Sxw #define	ETH_ALEN 6
75*d39a76e7Sxw 
76*d39a76e7Sxw typedef struct ch peobj;
77*d39a76e7Sxw typedef uint32_t u_int32_t;
78*d39a76e7Sxw typedef uint16_t u_int16_t;
79*d39a76e7Sxw typedef	kstat_t	*p_kstat_t;
80*d39a76e7Sxw 
81*d39a76e7Sxw #define	os_printf printf
82*d39a76e7Sxw 
83*d39a76e7Sxw #define	memcpy(dst, src, cnt) bcopy((src), (dst), (cnt))
84*d39a76e7Sxw 
85*d39a76e7Sxw #define	adapter_name(chp) (chp->ch_name)
86*d39a76e7Sxw 
87*d39a76e7Sxw typedef struct ch adapter_t;
88*d39a76e7Sxw 
89*d39a76e7Sxw #define	DELAY_US(x) DELAY(x)
90*d39a76e7Sxw #define	DELAY_MS(x) DELAY(1000*(x))
91*d39a76e7Sxw 
92*d39a76e7Sxw #define	TPI_LOCK(obj)	mutex_enter(&obj->ch_lock);
93*d39a76e7Sxw #define	TPI_UNLOCK(obj)	mutex_exit(&obj->ch_lock);
94*d39a76e7Sxw #define	MAC_LOCK(lock)	mutex_enter(&(lock))
95*d39a76e7Sxw #define	MAC_UNLOCK(lock)	mutex_exit(&(lock))
96*d39a76e7Sxw #define	__tpi_read  tpi_read
97*d39a76e7Sxw #define	__tpi_write tpi_write
98*d39a76e7Sxw 
99*d39a76e7Sxw struct t1_rx_mode {
100*d39a76e7Sxw 	struct ch *chp;
101*d39a76e7Sxw 	struct ch_mc *mc;
102*d39a76e7Sxw };
103*d39a76e7Sxw 
104*d39a76e7Sxw #define	t1_rx_mode_promisc(rmp)  (rmp->chp->ch_flags & PEPROMISC)
105*d39a76e7Sxw #define	t1_rx_mode_allmulti(rmp) (rmp->chp->ch_flags & PEALLMULTI)
106*d39a76e7Sxw #define	t1_rx_mode_mc_cnt(rmp)   (rmp->chp->ch_mc_cnt)
107*d39a76e7Sxw uint8_t *t1_get_next_mcaddr(struct t1_rx_mode *);
108*d39a76e7Sxw 
109*d39a76e7Sxw #define	__devinit
110*d39a76e7Sxw 
111*d39a76e7Sxw void t1_os_elmer0_ext_intr(adapter_t *adapter);
112*d39a76e7Sxw 
113*d39a76e7Sxw void t1_os_link_changed(ch_t *adapter, int port_id, int link_status,
114*d39a76e7Sxw     int speed, int duplex, int fc);
115*d39a76e7Sxw 
116*d39a76e7Sxw #define	CH_DBG(fmt, ...)
117*d39a76e7Sxw 
118*d39a76e7Sxw #define	CH_MSG(fmt, ...)
119*d39a76e7Sxw 
120*d39a76e7Sxw #define	t1_os_set_hw_addr(a, b, c) memcpy(a->port[b].enaddr, c, ETH_ALEN)
121*d39a76e7Sxw 
122*d39a76e7Sxw /* kludge for now */
123*d39a76e7Sxw #define	port_name(adapter, i) "chxge"
124*d39a76e7Sxw 
125*d39a76e7Sxw #define	SPINLOCK kmutex_t
126*d39a76e7Sxw #define	SPIN_LOCK_INIT(x) mutex_init(&(x), NULL, MUTEX_DRIVER, NULL);
127*d39a76e7Sxw #undef SPIN_LOCK
128*d39a76e7Sxw #define	SPIN_LOCK(x) mutex_enter(&(x))
129*d39a76e7Sxw #define	SPIN_UNLOCK(x) mutex_exit(&(x))
130*d39a76e7Sxw #define	SPIN_TRYLOCK(x) mutex_tryenter(&(x))
131*d39a76e7Sxw #define	SPIN_LOCK_DESTROY(x) mutex_destroy(&(x))
132*d39a76e7Sxw 
133*d39a76e7Sxw typedef struct ch_cyclic_s {
134*d39a76e7Sxw 	timeout_id_t timer;
135*d39a76e7Sxw 	void (*func)(void *);
136*d39a76e7Sxw 	void *arg;
137*d39a76e7Sxw 	clock_t period;
138*d39a76e7Sxw } ch_cyclic_t, *p_ch_cyclic_t;
139*d39a76e7Sxw 
140*d39a76e7Sxw void ch_init_cyclic(void *, p_ch_cyclic_t, void (*)(void *), void *);
141*d39a76e7Sxw void ch_start_cyclic(p_ch_cyclic_t, unsigned long);
142*d39a76e7Sxw void ch_stop_cyclic(p_ch_cyclic_t);
143*d39a76e7Sxw void ch_cyclic(p_ch_cyclic_t);
144*d39a76e7Sxw 
145*d39a76e7Sxw #ifdef __cplusplus
146*d39a76e7Sxw }
147*d39a76e7Sxw #endif
148*d39a76e7Sxw 
149*d39a76e7Sxw #endif /* _CHELSIO_OSDEP_H */
150