1eef4f27bSRobert Mustacchi /* 2eef4f27bSRobert Mustacchi * Copyright 2014-2017 Cavium, Inc. 3eef4f27bSRobert Mustacchi * The contents of this file are subject to the terms of the Common Development 4eef4f27bSRobert Mustacchi * and Distribution License, v.1, (the "License"). 5eef4f27bSRobert Mustacchi * 6eef4f27bSRobert Mustacchi * You may not use this file except in compliance with the License. 7eef4f27bSRobert Mustacchi * 8eef4f27bSRobert Mustacchi * You can obtain a copy of the License at available 9eef4f27bSRobert Mustacchi * at http://opensource.org/licenses/CDDL-1.0 10eef4f27bSRobert Mustacchi * 11eef4f27bSRobert Mustacchi * See the License for the specific language governing permissions and 12eef4f27bSRobert Mustacchi * limitations under the License. 13eef4f27bSRobert Mustacchi */ 14eef4f27bSRobert Mustacchi 15eef4f27bSRobert Mustacchi #ifndef _RXP_HSI_H 16eef4f27bSRobert Mustacchi #define _RXP_HSI_H 17eef4f27bSRobert Mustacchi 18eef4f27bSRobert Mustacchi #define RSS_TABLE_MAX 128 19eef4f27bSRobert Mustacchi 20eef4f27bSRobert Mustacchi // Offset of xxx_hsi in 32 bit words from beginning of scratchpad 21eef4f27bSRobert Mustacchi #define RXP_HSI_OFFSET 0x4 22eef4f27bSRobert Mustacchi 23eef4f27bSRobert Mustacchi typedef struct _rxp_hsi_t { 24eef4f27bSRobert Mustacchi fw_version_t version; 25*55fea89dSDan Cross u32_t rxp_knum; 26eef4f27bSRobert Mustacchi u32_t rxp_flood; 27*55fea89dSDan Cross u32_t ric; 28*55fea89dSDan Cross u32_t l2_forward_to_mcp; 29*55fea89dSDan Cross u32_t tcp_syn_dos_defense; 30*55fea89dSDan Cross u32_t rss_enable; 31*55fea89dSDan Cross u32_t rss_table_size; 32*55fea89dSDan Cross u8_t rss_table[RSS_TABLE_MAX]; 33*55fea89dSDan Cross u32_t rxp_os_flag; 34*55fea89dSDan Cross u32_t discard_all; 35*55fea89dSDan Cross u32_t rxp_num_discard_all; 36*55fea89dSDan Cross u32_t rtca; 37*55fea89dSDan Cross u32_t rtcc; 38eef4f27bSRobert Mustacchi u32_t rxp_pm_ctrl; 39eef4f27bSRobert Mustacchi #define L2_NORMAL_MODE 0 40eef4f27bSRobert Mustacchi #define L2_EMC_RXQ_MODE_ENABLE 1 41eef4f27bSRobert Mustacchi #define L2_EMC_RXQ_MODE_DISABLE 2 42*55fea89dSDan Cross u32_t ooo_pkt_cnt; 43*55fea89dSDan Cross u32_t l2_cu_cnt; 44eef4f27bSRobert Mustacchi u32_t rxp_invalid_context_cnt; 45*55fea89dSDan Cross u64_t rxp_unicast_bytes_rcvd; 46eef4f27bSRobert Mustacchi u64_t rxp_multicast_bytes_rcvd; 47eef4f27bSRobert Mustacchi u64_t rxp_broadcast_bytes_rcvd; 48eef4f27bSRobert Mustacchi u64_t volatile idle_count; 49eef4f27bSRobert Mustacchi u32_t hash_lookup[12][256]; 50eef4f27bSRobert Mustacchi u32_t ulp_out_of_order_packets; // number of OOO packets that were received in L5 connections 51eef4f27bSRobert Mustacchi u32_t cps_index; 52eef4f27bSRobert Mustacchi u32_t cps_array[32]; 53eef4f27bSRobert Mustacchi u32_t iscsi_rq_size; // number of RQ buffers. Note this is not size of page table 54eef4f27bSRobert Mustacchi u32_t iscsi_rq_buf_size; // size of receive buffer in RQ 55eef4f27bSRobert Mustacchi u32_t iscsi_err_bitmap[2]; // Error/Warning bitmap ("1" for warning) 56eef4f27bSRobert Mustacchi u32_t iscsi_tcp_config; // Configuration register - Enable/Disable of DA/KA mechanisms 57eef4f27bSRobert Mustacchi u32_t iscsi_teton_l4_cmd_offset; // Teton only: offset of L4 ccell command array 58eef4f27bSRobert Mustacchi u32_t iscsi_teton_l5_offset; // Teton only: offset of L5 section 59eef4f27bSRobert Mustacchi u32_t iscsi_teton_l5_cmd_offset; // Teton only: offset of L5 ccell command array 60eef4f27bSRobert Mustacchi u32_t iscsi_task_offset; // offset of the task array 61eef4f27bSRobert Mustacchi u32_t iscsi_r2tq_offset; // offset of R2TQ section 62*55fea89dSDan Cross u32_t iscsi_max_num_of_tasks; // maximal number of pending tasks 63eef4f27bSRobert Mustacchi u32_t iscsi_max_num_of_ccells; // maximal number of ccells 64eef4f27bSRobert Mustacchi 65*55fea89dSDan Cross u64_t iscsi_rxp_unicast_bytes_rcvd; 66eef4f27bSRobert Mustacchi u64_t iscsi_rxp_multicast_bytes_rcvd; 67eef4f27bSRobert Mustacchi u64_t iscsi_rxp_broadcast_bytes_rcvd; 68eef4f27bSRobert Mustacchi u32_t after_fin_pkt_cnt; // number of packets that came after FIN 69eef4f27bSRobert Mustacchi u32_t extra_fin_pkt_cnt; // extra FIN packets that came after FIN 70*55fea89dSDan Cross u32_t vmq_netq_cnt; // number of vmq or netq 71*55fea89dSDan Cross u32_t hw_filter_ctx_offset; 72eef4f27bSRobert Mustacchi u32_t iooo_rx_cid; 73eef4f27bSRobert Mustacchi u32_t iooo_flags; 74eef4f27bSRobert Mustacchi u32_t iooo_dbg_size; 75eef4f27bSRobert Mustacchi u32_t iooo_dbg_ptr; 76eef4f27bSRobert Mustacchi u32_t ooo_cu_pkt_cnt; 77eef4f27bSRobert Mustacchi u32_t ooo_cu_pkt_drop_cnt; 78eef4f27bSRobert Mustacchi u32_t ooo_max_blk_reach_cnt; 79eef4f27bSRobert Mustacchi u32_t ooo_max_blk_pkt_drop_cnt; 80eef4f27bSRobert Mustacchi u32_t cu_rate_limiter_enable; 81eef4f27bSRobert Mustacchi u32_t ooo_max_blk_per_conn; 82eef4f27bSRobert Mustacchi u64_t rxp_total_bytes_rcvd; 83eef4f27bSRobert Mustacchi } rxp_hsi_t; 84eef4f27bSRobert Mustacchi 85eef4f27bSRobert Mustacchi // This macro can be used for little or big endian 32-bit system 86eef4f27bSRobert Mustacchi #define RXP_HSI_OFFSETOFF(m) (OFFSETOF(rxp_hsi_t,m) + 0x10) 87eef4f27bSRobert Mustacchi #define RXP_HSI_SIZEOF(m) (sizeof (((rxp_hsi_t *)0)->m)) 88eef4f27bSRobert Mustacchi 89*55fea89dSDan Cross // Calling the following macro will actually get optimized during compile 90*55fea89dSDan Cross // time. Its sole purpose is to ensure HSI variables cannot be modified/moved 91eef4f27bSRobert Mustacchi // unnoticed scratch[10240] 0xe0000 (RW/Reset: undefined) 92eef4f27bSRobert Mustacchi #define TEST_RXP_HSI(){ \ 93eef4f27bSRobert Mustacchi if (0){ \ 94eef4f27bSRobert Mustacchi 1/(RXP_HSI_OFFSETOFF(version) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x000) && \ 95eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_knum) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x010) && \ 96eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_flood) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x014) && \ 97eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ric) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x018) && \ 98eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(l2_forward_to_mcp) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x01c) && \ 99eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(tcp_syn_dos_defense) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x020) && \ 100eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rss_enable) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x024) && \ 101eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rss_table_size) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x028) && \ 102eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rss_table) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x02c) && \ 103eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_os_flag) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0ac) && \ 104eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(discard_all) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0b0) && \ 105eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_num_discard_all) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0b4) && \ 106eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rtca) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0b8) && \ 107eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rtcc) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0bc) && \ 108eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_pm_ctrl) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0c0) && \ 109eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_pkt_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0c4) && \ 110eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(l2_cu_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0c8) && \ 111eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_invalid_context_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0cc) && \ 112eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_unicast_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0d0) && \ 113eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_multicast_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0d8) && \ 114eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_broadcast_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0e0) && \ 115eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(idle_count) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0e8) && \ 116eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(hash_lookup) == (RXP_HSI_OFFSET * sizeof(u32_t) + 0x0f0) && \ 117eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ulp_out_of_order_packets) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x30f0) && \ 118eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(cps_index) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x30f4) && \ 119eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(cps_array) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x30f8) && \ 120eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_rq_size) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3178) && \ 121eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_rq_buf_size) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x317c) && \ 122eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_err_bitmap[0]) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3180) && \ 123eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_err_bitmap[1]) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3184) && \ 124eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_tcp_config) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3188) && \ 125eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_teton_l4_cmd_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x318c) && \ 126eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_teton_l5_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3190) && \ 127eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_teton_l5_cmd_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3194) && \ 128eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_task_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x3198) && \ 129eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_r2tq_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x319c) && \ 130eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_max_num_of_tasks) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31a0) && \ 131eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_max_num_of_ccells) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31a4) && \ 132eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_rxp_unicast_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31a8) && \ 133eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_rxp_multicast_bytes_rcvd)== (RXP_HSI_OFFSET * sizeof(u32_t) +0x31b0) && \ 134eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iscsi_rxp_broadcast_bytes_rcvd)== (RXP_HSI_OFFSET * sizeof(u32_t) +0x31b8) && \ 135eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(after_fin_pkt_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31c0) && \ 136eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(extra_fin_pkt_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31c4) && \ 137eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(vmq_netq_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31c8) && \ 138eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(hw_filter_ctx_offset) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31cc) && \ 139eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iooo_rx_cid) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31d0) && \ 140eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iooo_flags) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31d4) && \ 141eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iooo_dbg_size) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31d8) && \ 142eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(iooo_dbg_ptr) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31dc) && \ 143eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_cu_pkt_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31e0) && \ 144eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_cu_pkt_drop_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31e4) && \ 145eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_max_blk_reach_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31e8) && \ 146eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_max_blk_pkt_drop_cnt) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31ec) && \ 147eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(cu_rate_limiter_enable) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31f0) && \ 148eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(ooo_max_blk_per_conn) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31f4) && \ 149eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_total_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) +0x31f8) && \ 150eef4f27bSRobert Mustacchi RXP_HSI_OFFSETOFF(rxp_total_bytes_rcvd)+RXP_HSI_SIZEOF(rxp_total_bytes_rcvd) == (RXP_HSI_OFFSET * sizeof(u32_t) + sizeof(rxp_hsi_t)));}} 151eef4f27bSRobert Mustacchi #endif 152eef4f27bSRobert Mustacchi 153