1/*
2 * Copyright 2014-2017 Cavium, Inc.
3 * The contents of this file are subject to the terms of the Common Development
4 * and Distribution License, v.1,  (the "License").
5 *
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the License at available
9 * at http://opensource.org/licenses/CDDL-1.0
10 *
11 * See the License for the specific language governing permissions and
12 * limitations under the License.
13 */
14
15
16#ifndef _l2_defs_h_
17#define _l2_defs_h_
18
19
20typedef struct tx_bidx_boff_b{
21    u16_t bidx;
22    u16_t boff;
23}tx_bidx_boff_b_t;
24
25typedef struct tx_bidx_boff_l{
26    u16_t boff;
27    u16_t bidx;
28}tx_bidx_boff_l_t;
29
30#if defined(LITTLE_ENDIAN)
31    typedef tx_bidx_boff_l_t tx_bidx_boff_t;
32#elif defined(BIG_ENDIAN)
33    typedef tx_bidx_boff_b_t tx_bidx_boff_t;
34#endif
35
36
37typedef struct bd_scan_b{
38    u32_t cmd;
39
40    u32_t len;
41
42    u16_t flags;
43    u16_t vlan_tag;
44    u16_t reserved;
45    u16_t unused_13;
46    tx_bidx_boff_t bidx_boff_current;
47    tx_bidx_boff_t bidx_boff_prev;
48    u32_t bseq_current;
49    u32_t bseq_prev;
50}bd_scan_b_t;
51
52typedef struct bd_scan_l{
53    u32_t cmd;
54
55    u32_t len;
56
57    u16_t vlan_tag;
58    u16_t flags;
59
60    u16_t unused_13;
61    u16_t reserved;
62    tx_bidx_boff_t bidx_boff_current;
63    tx_bidx_boff_t bidx_boff_prev;
64    u32_t bseq_current;
65    u32_t bseq_prev;
66}bd_scan_l_t;
67
68#if defined(LITTLE_ENDIAN)
69    typedef bd_scan_l_t bd_scan_t;
70#elif defined(BIG_ENDIAN)
71    typedef bd_scan_b_t bd_scan_t;
72#endif
73
74
75#if defined(LITTLE_ENDIAN)
76struct idx16_fields_t {
77    u16_t   idx : 15;
78	u16_t 	msb : 1;
79};
80#elif defined(BIG_ENDIAN)
81struct idx16_fields_t {
82	u16_t 	msb : 1;
83	u16_t   idx : 15;
84};
85#endif
86
87union idx16_union_t {
88    struct idx16_fields_t   fields;
89    u16_t                   idx16;
90};
91
92// Refer to Timer Architecture document.
93// The timers have different sizes, however, the LSB of each timer indicates
94// whether the timer is armed or dis-armed (a value of '1' indicates that the
95// timer is dis-armed, a value of '0' indicates that the timer is armed). The
96// MSB of each timer indicates whether the timer value has rolled over during
97// the course of operation. Thus a 32-bit timer is essentially a 30-bit timer
98// with the MSB and LSB used for different purposes.
99#define MAX_TMR1_CNT_LIMIT                     0x3FFFFFFF // 30-bit timer
100#define TMR1_TICKS_PER_SEC                     1000
101#define TMR1_MSEC(x)                                  \
102        ((u32_t)((x) * TMR1_TICKS_PER_SEC/1000) ?     \
103         (u32_t)((x) * TMR1_TICKS_PER_SEC/1000) : 1)
104
105#define MAX_TMR2_CNT_LIMIT                     0x3FFF     // 14-bit timer
106#define TMR2_TICKS_PER_SEC                     100
107#define TMR2_MSEC(x)                                  \
108        ((u32_t)((x) * TMR2_TICKS_PER_SEC/1000) ?     \
109         (u32_t)((x) * TMR2_TICKS_PER_SEC/1000) : 1)
110
111#define MAX_TMR3_CNT_LIMIT                     0x3FFF     // 14-bit timer
112#define TMR3_TICKS_PER_SEC                     1000
113#define TMR3_MSEC(x)                                  \
114        ((u32_t)((x) * TMR3_TICKS_PER_SEC/1000) ?     \
115         (u32_t)((x) * TMR3_TICKS_PER_SEC/1000) : 1)
116
117#define MAX_TMR4_CNT_LIMIT                     0x3FFF     // 14-bit timer
118#define TMR4_TICKS_PER_SEC                     10
119#define TMR4_MSEC(x)                                  \
120        ((u32_t)((x) * TMR4_TICKS_PER_SEC/1000) ?     \
121         (u32_t)((x) * TMR4_TICKS_PER_SEC/1000) : 1)
122
123#define MAX_TMR5_CNT_LIMIT                     0x3FFF     // 14-bit timer
124#define TMR5_TICKS_PER_SEC                     10000
125#define TMR5_MSEC(x)                                  \
126        ((u32_t)((x) * TMR5_TICKS_PER_SEC/1000) ?     \
127         (u32_t)((x) * TMR5_TICKS_PER_SEC/1000) : 1)
128
129
130/*
131 *  l2_bd_chain_context_b definition
132 */
133typedef struct l2_bd_chain_context_b
134{
135    u8_t  l2ctx_ctx_type;
136            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE              (0xf<<4)
137            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED    (0<<4)
138            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE        (1<<4)
139
140    u8_t  l2ctx_ctx_size;
141    u8_t  l2ctx_bd_pre_read;
142    // L2 flow control watermarks b0-b3 and b4-b7 are the low and high
143    // watermark respectively
144    u8_t  l2ctx_watermarks;
145    u8_t  l2ctx_sb_num;
146    u8_t  l2ctx_krnlq_id;
147    u16_t l2ctx_host_bdidx;
148    u32_t l2ctx_host_bseq;
149    u32_t l2ctx_nx_bseq;
150    u32_t l2ctx_nx_bdhaddr_hi;
151    u32_t l2ctx_nx_bdhaddr_lo;
152    u16_t l2ctx_v2p_flags;
153        // only valid in Linux for Flow control (maintained by RV2P)
154        #define L2CTX_V2P_FLAGS_PAUSE    (1<<0)
155    u16_t l2ctx_nx_bdidx;
156    u8_t  unused_1;
157    u8_t  l2ctx_queue_type;
158    u8_t  l2ctx_filter_type;
159    u8_t  reserved;
160    u16_t unused_2;
161    u16_t l2ctx_max_pkt_len;       // max L2 pkt length the RX BD can accomodate
162    u32_t unused[7];
163    u16_t l2ctx_vmq_lookahead_sz;   /* VMQ look ahead size */
164    // Following fields are for LINUX only (jumbo pkt mode)
165    u8_t  l2ctx_pg_bd_pre_read;
166    u8_t  unused_4;
167    u16_t unused_5;
168    u16_t l2ctx_host_pg_bidx;
169    u16_t l2ctx_skb_buf_size;
170    u16_t l2ctx_pg_buf_size;
171    u16_t unused_6;
172    u16_t l2ctx_rbdc_key;
173    u32_t l2ctx_nx_pg_bdhaddr_hi;
174    u32_t l2ctx_nx_pg_bdhaddr_lo;
175    u16_t unused_7;
176    u16_t l2ctx_nx_pg_bdidx;
177    u32_t unused_8[9];
178} l2_bd_chain_context_b_t;
179
180
181/*
182 *  l2_bd_chain_context_l definition
183 */
184typedef struct l2_bd_chain_context_l
185{
186    // L2 flow control watermarks b0-b3 and b4-b7 are the low and high
187    // watermark respectively  (Linux L2 flow control only)
188    u8_t  l2ctx_watermarks;
189    u8_t  l2ctx_bd_pre_read;
190    u8_t  l2ctx_ctx_size;
191    u8_t  l2ctx_ctx_type;
192            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE              (0xf<<4)
193            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED    (0<<4)
194            #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE        (1<<4)
195
196    u16_t l2ctx_host_bdidx;
197    u8_t  l2ctx_krnlq_id;
198    u8_t  l2ctx_sb_num;    // Linux only
199    u32_t l2ctx_host_bseq;
200    u32_t l2ctx_nx_bseq;
201    u32_t l2ctx_nx_bdhaddr_hi;
202    u32_t l2ctx_nx_bdhaddr_lo;
203    u16_t l2ctx_nx_bdidx;
204    u16_t l2ctx_v2p_flags;
205        // only valid in Linux for Flow control (maintained by RV2P)
206        #define L2CTX_V2P_FLAGS_PAUSE    (1<<0)
207    u8_t  reserved;
208    u8_t  l2ctx_filter_type;
209    u8_t  l2ctx_queue_type;
210    u8_t  unused_1;
211    u16_t l2ctx_max_pkt_len;       // max L2 pkt length the RX BD can accomodate
212    u16_t unused_2;
213    u32_t unused[7];
214    u8_t  unused_4;
215    u8_t  l2ctx_pg_bd_pre_read;     // Linux jumbo pkt mode only
216    u16_t l2ctx_vmq_lookahead_sz;
217    // Following fields are for LINUX only (jumbo pkt mode)
218    u16_t l2ctx_host_pg_bidx;
219    u16_t unused_5;
220    u16_t l2ctx_pg_buf_size;
221    u16_t l2ctx_skb_buf_size;
222    u16_t l2ctx_rbdc_key;
223    u16_t unused_6;
224    u32_t l2ctx_nx_pg_bdhaddr_hi;
225    u32_t l2ctx_nx_pg_bdhaddr_lo;
226    u16_t l2ctx_nx_pg_bdidx;
227    u16_t unused_7;
228    u32_t unused_8[9];
229} l2_bd_chain_context_l_t;
230
231
232/*
233 * l2_bd_chain_context select
234 */
235#if defined(LITTLE_ENDIAN)
236    typedef l2_bd_chain_context_l_t l2_bd_chain_context_t;
237#elif defined(BIG_ENDIAN)
238#if defined(CONFIG_PPC64) || defined(__sparc)
239    typedef l2_bd_chain_context_l_t l2_bd_chain_context_t;
240#else
241    typedef l2_bd_chain_context_b_t l2_bd_chain_context_t;
242#endif
243#endif
244
245/*
246 *  tcp_context_cmd_cell_b_te definition
247 */
248typedef struct tcp_context_cmd_cell_b_te
249{
250    u8_t ccell_cmd_type;
251
252    u8_t ccell_est_nbd;
253    u16_t ccell_tx_host_bidx;
254    u32_t ccell_tx_mss;
255
256    u32_t ccell_tx_host_bseq;
257    u32_t ccell_tsch_bseq;
258    u32_t ccell_tbdr_bseq;
259    tx_bidx_boff_t  ccell_tbdr_bidx_boff;
260#if defined(_ANSI_C_)
261    // compiler switch is to avoid complaints from some ANSI compilers
262    // (e.g. Solaris) that don't support unnamed union
263    struct {
264        u32_t hi;
265        u32_t lo;
266    } ccell_tbdr_bhaddr;
267#else
268    union {
269        struct {
270            u32_t ccell_tbdr_bhaddr_hi;
271            u32_t ccell_tbdr_bhaddr_lo;
272        };
273        u64_t ccell_tbdr_bhaddr;
274    };
275#endif
276    tx_bidx_boff_t ccell_txp_bidx_boff;
277    u32_t ccell_txp_bseq;
278} tcp_context_cmd_cell_b_te_t;
279
280
281
282/*
283 *  tcp_context_cmd_cell_l_te definition
284 */
285typedef struct tcp_context_cmd_cell_l_te
286{
287    u16_t ccell_tx_host_bidx;
288    u8_t ccell_est_nbd;
289    u8_t ccell_cmd_type;
290    u32_t ccell_tx_mss;
291
292    u32_t ccell_tx_host_bseq;
293    u32_t ccell_tsch_bseq;
294    u32_t ccell_tbdr_bseq;
295    tx_bidx_boff_t  ccell_tbdr_bidx_boff;
296    struct {
297        u32_t hi;
298        u32_t lo;
299    } ccell_tbdr_bhaddr;
300    tx_bidx_boff_t ccell_txp_bidx_boff;
301    u32_t ccell_txp_bseq;
302} tcp_context_cmd_cell_l_te_t;
303
304
305typedef struct tcp_context_cmd_cell_b_xi
306{
307    u8_t ccell_cmd_type;
308        #define CCELL_CMD_TYPE_TYPE                         (0xf<<0)
309            #define CCELL_CMD_TYPE_TYPE_L2                  (0<<0)
310            #define CCELL_CMD_TYPE_TYPE_TCP                 (1<<0)
311            #define CCELL_CMD_TYPE_TYPE_L5_CHAIN            (2<<0)
312            #define CCELL_CMD_TYPE_TYPE_SEND_L5_PGTBL       (3<<0)
313            #define CCELL_CMD_TYPE_TYPE_WRITE_L5_PGTBL      (4<<0)
314            #define CCELL_CMD_TYPE_TYPE_RDREQ_L5_PGTBL      (5<<0)
315            #define CCELL_CMD_TYPE_TYPE_L5_DONOTHING        (6<<0)
316            #define CCELL_CMD_TYPE_TYPE_7_L5_PGTBL          (7<<0)
317            #define CCELL_CMD_TYPE_TYPE_8_CHAIN             (8<<0)
318            #define CCELL_CMD_TYPE_TYPE_9_CHAIN             (9<<0)
319            #define CCELL_CMD_TYPE_TYPE_10_CHAIN            (10<<0)
320            #define CCELL_CMD_TYPE_TYPE_11_PGTBL            (11<<0)
321            #define CCELL_CMD_TYPE_TYPE_12_PGTBL            (12<<0)
322            #define CCELL_CMD_TYPE_TYPE_13_PGTBL            (13<<0)
323            #define CCELL_CMD_TYPE_TYPE_14_PGTBL            (14<<0)
324            #define CCELL_CMD_TYPE_TYPE_15_PGTBL            (15<<0)
325        #define CCELL_CMD_TYPE_PG_SZ                        (0xf<<4)
326            #define CCELL_CMD_TYPE_PG_SZ_256                (0<<4)
327            #define CCELL_CMD_TYPE_PG_SZ_512                (1<<4)
328            #define CCELL_CMD_TYPE_PG_SZ_1K                 (2<<4)
329            #define CCELL_CMD_TYPE_PG_SZ_2K                 (3<<4)
330            #define CCELL_CMD_TYPE_PG_SZ_4K                 (4<<4)
331            #define CCELL_CMD_TYPE_PG_SZ_8K                 (5<<4)
332            #define CCELL_CMD_TYPE_PG_SZ_16K                (6<<4)
333            #define CCELL_CMD_TYPE_PG_SZ_32K                (7<<4)
334            #define CCELL_CMD_TYPE_PG_SZ_64K                (8<<4)
335            #define CCELL_CMD_TYPE_PG_SZ_128K               (9<<4)
336            #define CCELL_CMD_TYPE_PG_SZ_256K               (10<<4)
337            #define CCELL_CMD_TYPE_PG_SZ_512K               (11<<4)
338            #define CCELL_CMD_TYPE_PG_SZ_1M                 (12<<4)
339            #define CCELL_CMD_TYPE_PG_SZ_2M                 (13<<4)
340            #define CCELL_CMD_TYPE_PG_SZ_4M                 (14<<4)
341            #define CCELL_CMD_TYPE_PG_SZ_8M                 (15<<4)
342    u8_t ccell_est_nbd;
343    u16_t ccell_tx_host_bidx;
344    u32_t ccell_tx_mss;
345        #define CCELL_TX_MSS_MSS                            (0x3fffL<<0)
346        #define CCELL_TX_MSS_MULT                           (0x7ffL<<14)
347        #define CCELL_TX_MSS_PESS_ON                        (1UL<<25)
348        #define CCELL_TX_MSS_OH                             (0x3fL<<26)
349    u32_t ccell_tx_host_bseq;
350    u32_t ccell_tsch_bseq;
351    u32_t ccell_tbdr_bseq;
352    tx_bidx_boff_t  ccell_tbdr_bidx_boff;
353#if defined(_ANSI_C_)
354    // compiler switch is to avoid complaints from some ANSI compilers
355    // (e.g. Solaris) that don't support unnamed union
356    struct {
357        u32_t hi;
358        u32_t lo;
359    } ccell_tbdr_bhaddr;
360#else
361    union {
362        struct {
363            u32_t ccell_tbdr_bhaddr_hi;
364            u32_t ccell_tbdr_bhaddr_lo;
365        };
366        u64_t ccell_tbdr_bhaddr;
367    };
368#endif
369    tx_bidx_boff_t ccell_txp_bidx_boff;
370    u32_t ccell_txp_bseq;
371    u8_t ccell_reserved0[3];
372    const u8_t ccell_tcmd_fnum; // NOTE: FW must NEVER change or initialize this field!
373    u32_t reserved1;            // 8 byte alignment
374} tcp_context_cmd_cell_b_xi_t;
375
376
377
378
379/*
380 *  tcp_context_cmd_cell_l_xi definition
381 */
382typedef struct tcp_context_cmd_cell_l_xi
383{
384    u16_t ccell_tx_host_bidx;
385    u8_t ccell_est_nbd;
386    u8_t ccell_cmd_type;
387        #define CCELL_CMD_TYPE_TYPE                         (0xf<<0)
388            #define CCELL_CMD_TYPE_TYPE_L2                  (0<<0)
389            #define CCELL_CMD_TYPE_TYPE_TCP                 (1<<0)
390            #define CCELL_CMD_TYPE_TYPE_L5_CHAIN            (2<<0)
391            #define CCELL_CMD_TYPE_TYPE_SEND_L5_PGTBL       (3<<0)
392            #define CCELL_CMD_TYPE_TYPE_WRITE_L5_PGTBL      (4<<0)
393            #define CCELL_CMD_TYPE_TYPE_RDREQ_L5_PGTBL      (5<<0)
394            #define CCELL_CMD_TYPE_TYPE_L5_DONOTHING        (6<<0)
395            #define CCELL_CMD_TYPE_TYPE_7_L5_PGTBL          (7<<0)
396            #define CCELL_CMD_TYPE_TYPE_8_CHAIN             (8<<0)
397            #define CCELL_CMD_TYPE_TYPE_9_CHAIN             (9<<0)
398            #define CCELL_CMD_TYPE_TYPE_10_CHAIN            (10<<0)
399            #define CCELL_CMD_TYPE_TYPE_11_PGTBL            (11<<0)
400            #define CCELL_CMD_TYPE_TYPE_12_PGTBL            (12<<0)
401            #define CCELL_CMD_TYPE_TYPE_13_PGTBL            (13<<0)
402            #define CCELL_CMD_TYPE_TYPE_14_PGTBL            (14<<0)
403            #define CCELL_CMD_TYPE_TYPE_15_PGTBL            (15<<0)
404        #define CCELL_CMD_TYPE_PG_SZ                        (0xf<<4)
405            #define CCELL_CMD_TYPE_PG_SZ_256                (0<<4)
406            #define CCELL_CMD_TYPE_PG_SZ_512                (1<<4)
407            #define CCELL_CMD_TYPE_PG_SZ_1K                 (2<<4)
408            #define CCELL_CMD_TYPE_PG_SZ_2K                 (3<<4)
409            #define CCELL_CMD_TYPE_PG_SZ_4K                 (4<<4)
410            #define CCELL_CMD_TYPE_PG_SZ_8K                 (5<<4)
411            #define CCELL_CMD_TYPE_PG_SZ_16K                (6<<4)
412            #define CCELL_CMD_TYPE_PG_SZ_32K                (7<<4)
413            #define CCELL_CMD_TYPE_PG_SZ_64K                (8<<4)
414            #define CCELL_CMD_TYPE_PG_SZ_128K               (9<<4)
415            #define CCELL_CMD_TYPE_PG_SZ_256K               (10<<4)
416            #define CCELL_CMD_TYPE_PG_SZ_512K               (11<<4)
417            #define CCELL_CMD_TYPE_PG_SZ_1M                 (12<<4)
418            #define CCELL_CMD_TYPE_PG_SZ_2M                 (13<<4)
419            #define CCELL_CMD_TYPE_PG_SZ_4M                 (14<<4)
420            #define CCELL_CMD_TYPE_PG_SZ_8M                 (15<<4)
421
422    u32_t ccell_tx_mss;
423        #define CCELL_TX_MSS_MSS                            (0x3fffL<<0)
424        #define CCELL_TX_MSS_MULT                           (0x7ffL<<14)
425        #define CCELL_TX_MSS_PESS_ON                        (1UL<<25)
426        #define CCELL_TX_MSS_OH                             (0x3fL<<26)
427
428    u32_t ccell_tx_host_bseq;
429    u32_t ccell_tsch_bseq;
430    u32_t ccell_tbdr_bseq;
431    tx_bidx_boff_t  ccell_tbdr_bidx_boff;
432    struct {
433        u32_t hi;
434        u32_t lo;
435    } ccell_tbdr_bhaddr;
436    tx_bidx_boff_t ccell_txp_bidx_boff;
437    u32_t ccell_txp_bseq;
438    const u8_t ccell_tcmd_fnum; // NOTE: FW must NEVER change or initialize this field!
439    u8_t ccell_reserved0[3];
440    u32_t reserved1;            // 8 byte alignment
441} tcp_context_cmd_cell_l_xi_t;
442
443
444/*
445 * tcp_context_cmd_cell select
446 */
447#if defined(LITTLE_ENDIAN)
448    typedef tcp_context_cmd_cell_l_te_t tcp_context_cmd_cell_te_t;
449    typedef tcp_context_cmd_cell_l_xi_t tcp_context_cmd_cell_xi_t;
450#elif defined(BIG_ENDIAN)
451#if defined(CONFIG_PPC64) || defined(__sparc)
452    typedef tcp_context_cmd_cell_l_te_t tcp_context_cmd_cell_te_t;
453    typedef tcp_context_cmd_cell_l_xi_t tcp_context_cmd_cell_xi_t;
454#else
455    typedef tcp_context_cmd_cell_b_te_t tcp_context_cmd_cell_te_t;
456    typedef tcp_context_cmd_cell_b_xi_t tcp_context_cmd_cell_xi_t;
457#endif
458#endif
459
460/*
461 *  pg_context_b definition
462 */
463typedef struct pg_context_b
464{
465    u8_t pg_type;
466        #define PG_TYPE_TYPE                                (0xf<<4)
467            #define PG_TYPE_TYPE_EMPTY                      (0<<4)
468            #define PG_TYPE_TYPE_L2                         (1<<4)
469            #define PG_TYPE_TYPE_TCP                        (2<<4)
470            #define PG_TYPE_TYPE_L5                         (3<<4)
471            #define PG_TYPE_TYPE_L2_BD_CHN                  (4<<4)
472            #define PG_TYPE_TYPE_PG                         (5<<4)
473
474    u8_t pg_size;
475    u8_t pg_krnlq_id;     // Xinan and X1V only
476    u8_t unused_0;
477    u32_t unused_1[2];
478    u32_t pg_timer1;
479    u16_t pg_timer2;
480    u16_t pg_timer3;
481    u16_t pg_timer4;
482    u16_t pg_timer5;
483    u8_t pg_l2hdr_nbytes;
484    u8_t pg_flags;
485        #define PG_FLAGS_SNAP_ENCAP                         (1<<0)
486        #define PG_FLAGS_VLAN_TAGGING                       (1<<1)
487
488    u8_t pg_da[6];
489    u8_t pg_sa[6];
490    u16_t pg_etype;
491    u16_t pg_vlan_tag;
492    u16_t pg_ipid_start;
493    u16_t pg_ipid_count;
494    u16_t unused_2;
495} pg_context_b_t;
496
497
498/*
499 *  pg_context_l definition
500 */
501typedef struct pg_context_l
502{
503    u8_t unused_0;
504    u8_t pg_krnlq_id;     // Xinan and X1V only
505    u8_t pg_size;
506    u8_t pg_type;
507        #define PG_TYPE_TYPE                                (0xf<<4)
508            #define PG_TYPE_TYPE_EMPTY                      (0<<4)
509            #define PG_TYPE_TYPE_L2                         (1<<4)
510            #define PG_TYPE_TYPE_TCP                        (2<<4)
511            #define PG_TYPE_TYPE_L5                         (3<<4)
512            #define PG_TYPE_TYPE_L2_BD_CHN                  (4<<4)
513            #define PG_TYPE_TYPE_PG                         (5<<4)
514    u32_t unused_1[2];
515
516    u32_t pg_timer1;
517    u16_t pg_timer3;
518    u16_t pg_timer2;
519    u16_t pg_timer5;
520    u16_t pg_timer4;
521    u8_t pg_da[6];
522    u8_t pg_flags;
523        #define PG_FLAGS_SNAP_ENCAP                         (1<<0)
524        #define PG_FLAGS_VLAN_TAGGING                       (1<<1)
525
526    u8_t pg_l2hdr_nbytes;
527    u8_t pg_sa[6];
528    u16_t pg_etype;
529    u16_t pg_ipid_start;
530    u16_t pg_vlan_tag;
531    u16_t unused_2;
532    u16_t pg_ipid_count;
533} pg_context_l_t;
534
535
536/*
537 * pg_context select
538 */
539#if defined(LITTLE_ENDIAN)
540    typedef pg_context_l_t pg_context_t;
541#elif defined(BIG_ENDIAN)
542    typedef pg_context_b_t pg_context_t;
543#endif
544
545
546
547
548#endif /* _l2_defs_h_ */
549
550
551