18eea8e2ap/*
28eea8e2ap * CDDL HEADER START
38eea8e2ap *
48eea8e2ap * The contents of this file are subject to the terms of the
58eea8e2ap * Common Development and Distribution License, Version 1.0 only
68eea8e2ap * (the "License").  You may not use this file except in compliance
78eea8e2ap * with the License.
88eea8e2ap *
98eea8e2ap * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
108eea8e2ap * or http://www.opensolaris.org/os/licensing.
118eea8e2ap * See the License for the specific language governing permissions
128eea8e2ap * and limitations under the License.
138eea8e2ap *
148eea8e2ap * When distributing Covered Code, include this CDDL HEADER in each
158eea8e2ap * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
168eea8e2ap * If applicable, add the following below this CDDL HEADER, with the
178eea8e2ap * fields enclosed by brackets "[]" replaced with your own identifying
188eea8e2ap * information: Portions Copyright [yyyy] [name of copyright owner]
198eea8e2ap *
208eea8e2ap * CDDL HEADER END
218eea8e2ap */
228eea8e2ap/*
238eea8e2ap * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
248eea8e2ap * Use is subject to license terms.
258eea8e2ap */
268eea8e2ap
278eea8e2ap#pragma ident	"%Z%%M%	%I%	%E% SMI"
288eea8e2ap
298eea8e2ap/*
308eea8e2ap * dcam_reg.c
318eea8e2ap *
328eea8e2ap * dcam1394 driver.  Control register access support.
338eea8e2ap */
348eea8e2ap
358eea8e2ap#include <sys/tnf_probe.h>
368eea8e2ap#include <sys/1394/targets/dcam1394/dcam_reg.h>
378eea8e2ap
388eea8e2ap
398eea8e2ap/*
408eea8e2ap * dcam_reg_read
418eea8e2ap */
428eea8e2apint
438eea8e2apdcam_reg_read(dcam_state_t *soft_state, dcam1394_reg_io_t *arg)
448eea8e2ap{
458eea8e2ap	cmd1394_cmd_t	*cmdp;
468eea8e2ap
478eea8e2ap	if (t1394_alloc_cmd(soft_state->sl_handle, 1, &cmdp) != DDI_SUCCESS) {
488eea8e2ap		return (-1);
498eea8e2ap	}
508eea8e2ap
518eea8e2ap	cmdp->cmd_type = CMD1394_ASYNCH_RD_QUAD;
528eea8e2ap	cmdp->cmd_addr = 0x0000FFFFF0F00000 |
538eea8e2ap	    (uint64_t)(arg->offs & 0x00000FFC);
548eea8e2ap	cmdp->cmd_options = CMD1394_BLOCKING;
558eea8e2ap
568eea8e2ap#ifdef GRAPHICS_DELAY
578eea8e2ap	/*
588eea8e2ap	 * This delay should not be necessary, but was added for some
598eea8e2ap	 * unknown reason.  Should it ever be determined that it
608eea8e2ap	 * is necessary, this delay should be reenabled.
618eea8e2ap	 */
628eea8e2ap	delay(drv_usectohz(500));
638eea8e2ap#endif
648eea8e2ap
658eea8e2ap	if (t1394_read(soft_state->sl_handle, cmdp) != DDI_SUCCESS) {
668eea8e2ap		(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
678eea8e2ap		return (-1);
688eea8e2ap	}
698eea8e2ap
708eea8e2ap	if (cmdp->cmd_result != DDI_SUCCESS) {
718eea8e2ap		(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
728eea8e2ap		return (-1);
738eea8e2ap	}
748eea8e2ap
758eea8e2ap	/* perform endian adjustment */
768eea8e2ap	cmdp->cmd_u.q.quadlet_data = T1394_DATA32(cmdp->cmd_u.q.quadlet_data);
778eea8e2ap	arg->val = cmdp->cmd_u.q.quadlet_data;
788eea8e2ap
798eea8e2ap	(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
808eea8e2ap
818eea8e2ap	return (0);
828eea8e2ap}
838eea8e2ap
848eea8e2ap
858eea8e2ap/*
868eea8e2ap * dcam_reg_write
878eea8e2ap */
888eea8e2apint
898eea8e2apdcam_reg_write(dcam_state_t *soft_state, dcam1394_reg_io_t *arg)
908eea8e2ap{
918eea8e2ap	cmd1394_cmd_t	*cmdp;
928eea8e2ap
938eea8e2ap	if (t1394_alloc_cmd(soft_state->sl_handle, 0, &cmdp) != DDI_SUCCESS) {
948eea8e2ap		return (-1);
958eea8e2ap	}
968eea8e2ap
978eea8e2ap	cmdp->cmd_type = CMD1394_ASYNCH_WR_QUAD;
988eea8e2ap	cmdp->cmd_addr = 0x0000FFFFF0F00000 |
998eea8e2ap	    (uint64_t)(arg->offs & 0x00000FFC);
1008eea8e2ap	cmdp->cmd_options = CMD1394_BLOCKING;
1018eea8e2ap
1028eea8e2ap	/* perform endian adjustment */
1038eea8e2ap	cmdp->cmd_u.q.quadlet_data = T1394_DATA32(arg->val);
1048eea8e2ap
1058eea8e2ap#ifdef GRAPHICS_DELAY
1068eea8e2ap	/*
1078eea8e2ap	 * See the description in dcam_reg_read() above.
1088eea8e2ap	 */
1098eea8e2ap	delay(drv_usectohz(500));
1108eea8e2ap#endif
1118eea8e2ap
1128eea8e2ap	if (t1394_write(soft_state->sl_handle, cmdp) != DDI_SUCCESS) {
1138eea8e2ap		(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
1148eea8e2ap		return (-1);
1158eea8e2ap	}
1168eea8e2ap
1178eea8e2ap	if (cmdp->cmd_result != DDI_SUCCESS) {
1188eea8e2ap		(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
1198eea8e2ap		return (-1);
1208eea8e2ap	}
1218eea8e2ap
1228eea8e2ap	(void) t1394_free_cmd(soft_state->sl_handle, 0, &cmdp);
1238eea8e2ap
1248eea8e2ap	return (0);
1258eea8e2ap}
126