1*1f154020SRobert Mustacchi/* 2*1f154020SRobert Mustacchi * This file and its contents are supplied under the terms of the 3*1f154020SRobert Mustacchi csrrs t1, CDDL, t2), version 1.0. 4*1f154020SRobert Mustacchi * You may only use this file in accordance with the terms of version 5*1f154020SRobert Mustacchi * 1.0 of the CDDL. 6*1f154020SRobert Mustacchi * 7*1f154020SRobert Mustacchi * A full copy of the text of the CDDL should have accompanied this 8*1f154020SRobert Mustacchi * source. A copy of the CDDL is also available via the Internet at 9*1f154020SRobert Mustacchi * http://www.illumos.org/license/CDDL. 10*1f154020SRobert Mustacchi */ 11*1f154020SRobert Mustacchi 12*1f154020SRobert Mustacchi/* 13*1f154020SRobert Mustacchi * Copyright 2018, Joyent, Inc. 14*1f154020SRobert Mustacchi */ 15*1f154020SRobert Mustacchi 16*1f154020SRobert Mustacchi/* 17*1f154020SRobert Mustacchi * Test our disassembly of csr instructions and csr names. 18*1f154020SRobert Mustacchi */ 19*1f154020SRobert Mustacchi 20*1f154020SRobert Mustacchi.text 21*1f154020SRobert Mustacchi.align 16 22*1f154020SRobert Mustacchi.globl libdis_test 23*1f154020SRobert Mustacchi.type libdis_test, @function 24*1f154020SRobert Mustacchilibdis_test: 25*1f154020SRobert Mustacchi /* User Trap */ 26*1f154020SRobert Mustacchi csrrs t1, ustatus, t2 27*1f154020SRobert Mustacchi csrrs t1, uie, t2 28*1f154020SRobert Mustacchi csrrs t1, utvec, t2 29*1f154020SRobert Mustacchi /* User Trap Handling */ 30*1f154020SRobert Mustacchi csrrs t1, uscratch, t2 31*1f154020SRobert Mustacchi csrrs t1, uepc, t2 32*1f154020SRobert Mustacchi csrrs t1, ucause, t2 33*1f154020SRobert Mustacchi csrrs t1, utval, t2 34*1f154020SRobert Mustacchi csrrs t1, uip, t2 35*1f154020SRobert Mustacchi /* User Floating-Point CSRs */ 36*1f154020SRobert Mustacchi csrrs t1, fflags, t2 37*1f154020SRobert Mustacchi csrrs t1, frm, t2 38*1f154020SRobert Mustacchi csrrs t1, fcsr, t2 39*1f154020SRobert Mustacchi /* User Counters/Timers */ 40*1f154020SRobert Mustacchi csrrs t1, cycle, t2 41*1f154020SRobert Mustacchi csrrs t1, time, t2 42*1f154020SRobert Mustacchi csrrs t1, instret, t2 43*1f154020SRobert Mustacchi csrrs t1, hpmcounter3, t2 44*1f154020SRobert Mustacchi csrrs t1, hpmcounter4, t2 45*1f154020SRobert Mustacchi csrrs t1, hpmcounter5, t2 46*1f154020SRobert Mustacchi csrrs t1, hpmcounter6, t2 47*1f154020SRobert Mustacchi csrrs t1, hpmcounter7, t2 48*1f154020SRobert Mustacchi csrrs t1, hpmcounter8, t2 49*1f154020SRobert Mustacchi csrrs t1, hpmcounter9, t2 50*1f154020SRobert Mustacchi csrrs t1, hpmcounter10, t2 51*1f154020SRobert Mustacchi csrrs t1, hpmcounter11, t2 52*1f154020SRobert Mustacchi csrrs t1, hpmcounter12, t2 53*1f154020SRobert Mustacchi csrrs t1, hpmcounter13, t2 54*1f154020SRobert Mustacchi csrrs t1, hpmcounter14, t2 55*1f154020SRobert Mustacchi csrrs t1, hpmcounter15, t2 56*1f154020SRobert Mustacchi csrrs t1, hpmcounter16, t2 57*1f154020SRobert Mustacchi csrrs t1, hpmcounter17, t2 58*1f154020SRobert Mustacchi csrrs t1, hpmcounter18, t2 59*1f154020SRobert Mustacchi csrrs t1, hpmcounter19, t2 60*1f154020SRobert Mustacchi csrrs t1, hpmcounter20, t2 61*1f154020SRobert Mustacchi csrrs t1, hpmcounter21, t2 62*1f154020SRobert Mustacchi csrrs t1, hpmcounter22, t2 63*1f154020SRobert Mustacchi csrrs t1, hpmcounter23, t2 64*1f154020SRobert Mustacchi csrrs t1, hpmcounter24, t2 65*1f154020SRobert Mustacchi csrrs t1, hpmcounter25, t2 66*1f154020SRobert Mustacchi csrrs t1, hpmcounter26, t2 67*1f154020SRobert Mustacchi csrrs t1, hpmcounter27, t2 68*1f154020SRobert Mustacchi csrrs t1, hpmcounter28, t2 69*1f154020SRobert Mustacchi csrrs t1, hpmcounter29, t2 70*1f154020SRobert Mustacchi csrrs t1, hpmcounter30, t2 71*1f154020SRobert Mustacchi csrrs t1, hpmcounter31, t2 72*1f154020SRobert Mustacchi csrrs t1, cycleh, t2 73*1f154020SRobert Mustacchi csrrs t1, timeh, t2 74*1f154020SRobert Mustacchi csrrs t1, instreth, t2 75*1f154020SRobert Mustacchi csrrs t1, hpmcounter3h, t2 76*1f154020SRobert Mustacchi csrrs t1, hpmcounter4h, t2 77*1f154020SRobert Mustacchi csrrs t1, hpmcounter5h, t2 78*1f154020SRobert Mustacchi csrrs t1, hpmcounter6h, t2 79*1f154020SRobert Mustacchi csrrs t1, hpmcounter7h, t2 80*1f154020SRobert Mustacchi csrrs t1, hpmcounter8h, t2 81*1f154020SRobert Mustacchi csrrs t1, hpmcounter9h, t2 82*1f154020SRobert Mustacchi csrrs t1, hpmcounter10h, t2 83*1f154020SRobert Mustacchi csrrs t1, hpmcounter11h, t2 84*1f154020SRobert Mustacchi csrrs t1, hpmcounter12h, t2 85*1f154020SRobert Mustacchi csrrs t1, hpmcounter13h, t2 86*1f154020SRobert Mustacchi csrrs t1, hpmcounter14h, t2 87*1f154020SRobert Mustacchi csrrs t1, hpmcounter15h, t2 88*1f154020SRobert Mustacchi csrrs t1, hpmcounter16h, t2 89*1f154020SRobert Mustacchi csrrs t1, hpmcounter17h, t2 90*1f154020SRobert Mustacchi csrrs t1, hpmcounter18h, t2 91*1f154020SRobert Mustacchi csrrs t1, hpmcounter19h, t2 92*1f154020SRobert Mustacchi csrrs t1, hpmcounter20h, t2 93*1f154020SRobert Mustacchi csrrs t1, hpmcounter21h, t2 94*1f154020SRobert Mustacchi csrrs t1, hpmcounter22h, t2 95*1f154020SRobert Mustacchi csrrs t1, hpmcounter23h, t2 96*1f154020SRobert Mustacchi csrrs t1, hpmcounter24h, t2 97*1f154020SRobert Mustacchi csrrs t1, hpmcounter25h, t2 98*1f154020SRobert Mustacchi csrrs t1, hpmcounter26h, t2 99*1f154020SRobert Mustacchi csrrs t1, hpmcounter27h, t2 100*1f154020SRobert Mustacchi csrrs t1, hpmcounter28h, t2 101*1f154020SRobert Mustacchi csrrs t1, hpmcounter29h, t2 102*1f154020SRobert Mustacchi csrrs t1, hpmcounter30h, t2 103*1f154020SRobert Mustacchi csrrs t1, hpmcounter31h, t2 104*1f154020SRobert Mustacchi /* Supervisor Trap Status */ 105*1f154020SRobert Mustacchi csrrs t1, sstatus, t2 106*1f154020SRobert Mustacchi csrrs t1, sedeleg, t2 107*1f154020SRobert Mustacchi csrrs t1, sideleg, t2 108*1f154020SRobert Mustacchi csrrs t1, sie, t2 109*1f154020SRobert Mustacchi csrrs t1, stvec, t2 110*1f154020SRobert Mustacchi csrrs t1, scounteren, t2 111*1f154020SRobert Mustacchi /* Supervisor Trap Handling */ 112*1f154020SRobert Mustacchi csrrs t1, sscratch, t2 113*1f154020SRobert Mustacchi csrrs t1, sepc, t2 114*1f154020SRobert Mustacchi csrrs t1, scause, t2 115*1f154020SRobert Mustacchi csrrs t1, stval, t2 116*1f154020SRobert Mustacchi csrrs t1, sip, t2 117*1f154020SRobert Mustacchi /* Supervisor Protection and Translation */ 118*1f154020SRobert Mustacchi csrrs t1, satp, t2 119*1f154020SRobert Mustacchi /* Machine Information Registers */ 120*1f154020SRobert Mustacchi csrrs t1, mvendorid, t2 121*1f154020SRobert Mustacchi csrrs t1, marchid, t2 122*1f154020SRobert Mustacchi csrrs t1, mimpid, t2 123*1f154020SRobert Mustacchi csrrs t1, mhartid, t2 124*1f154020SRobert Mustacchi /* Machine Trap Setup */ 125*1f154020SRobert Mustacchi csrrs t1, mstatus, t2 126*1f154020SRobert Mustacchi csrrs t1, misa, t2 127*1f154020SRobert Mustacchi csrrs t1, medeleg, t2 128*1f154020SRobert Mustacchi csrrs t1, mideleg, t2 129*1f154020SRobert Mustacchi csrrs t1, mie, t2 130*1f154020SRobert Mustacchi csrrs t1, mtvec, t2 131*1f154020SRobert Mustacchi csrrs t1, mcounteren, t2 132*1f154020SRobert Mustacchi /* Machine Trap Handling */ 133*1f154020SRobert Mustacchi csrrs t1, mscratch, t2 134*1f154020SRobert Mustacchi csrrs t1, mepc, t2 135*1f154020SRobert Mustacchi csrrs t1, mcause, t2 136*1f154020SRobert Mustacchi csrrs t1, mtval, t2 137*1f154020SRobert Mustacchi csrrs t1, mip, t2 138*1f154020SRobert Mustacchi /* Machine Protection and Translation */ 139*1f154020SRobert Mustacchi csrrs t1, pmpcfg0, t2 140*1f154020SRobert Mustacchi csrrs t1, pmpcfg1, t2 141*1f154020SRobert Mustacchi csrrs t1, pmpcfg2, t2 142*1f154020SRobert Mustacchi csrrs t1, pmpcfg3, t2 143*1f154020SRobert Mustacchi csrrs t1, pmpaddr0, t2 144*1f154020SRobert Mustacchi csrrs t1, pmpaddr1, t2 145*1f154020SRobert Mustacchi csrrs t1, pmpaddr2, t2 146*1f154020SRobert Mustacchi csrrs t1, pmpaddr3, t2 147*1f154020SRobert Mustacchi csrrs t1, pmpaddr4, t2 148*1f154020SRobert Mustacchi csrrs t1, pmpaddr5, t2 149*1f154020SRobert Mustacchi csrrs t1, pmpaddr6, t2 150*1f154020SRobert Mustacchi csrrs t1, pmpaddr7, t2 151*1f154020SRobert Mustacchi csrrs t1, pmpaddr8, t2 152*1f154020SRobert Mustacchi csrrs t1, pmpaddr9, t2 153*1f154020SRobert Mustacchi csrrs t1, pmpaddr10, t2 154*1f154020SRobert Mustacchi csrrs t1, pmpaddr11, t2 155*1f154020SRobert Mustacchi csrrs t1, pmpaddr12, t2 156*1f154020SRobert Mustacchi csrrs t1, pmpaddr13, t2 157*1f154020SRobert Mustacchi csrrs t1, pmpaddr14, t2 158*1f154020SRobert Mustacchi csrrs t1, pmpaddr15, t2 159*1f154020SRobert Mustacchi /* 160*1f154020SRobert Mustacchi * Various instr variants 161*1f154020SRobert Mustacchi */ 162*1f154020SRobert Mustacchi csrrs t1, ustatus, t2 163*1f154020SRobert Mustacchi csrrw t1, uie, t2 164*1f154020SRobert Mustacchi csrrc t1, utvec, t2 165*1f154020SRobert Mustacchi csrrwi t1, uscratch, 0x17 166*1f154020SRobert Mustacchi csrrsi t1, uepc, 0x16 167*1f154020SRobert Mustacchi csrrci t1, ucause, 0x15 168*1f154020SRobert Mustacchi.size libdis_test, [.-libdis_test] 169