120c794b3Sgavinm /*
220c794b3Sgavinm  * CDDL HEADER START
320c794b3Sgavinm  *
420c794b3Sgavinm  * The contents of this file are subject to the terms of the
520c794b3Sgavinm  * Common Development and Distribution License (the "License").
620c794b3Sgavinm  * You may not use this file except in compliance with the License.
720c794b3Sgavinm  *
820c794b3Sgavinm  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
920c794b3Sgavinm  * or http://www.opensolaris.org/os/licensing.
1020c794b3Sgavinm  * See the License for the specific language governing permissions
1120c794b3Sgavinm  * and limitations under the License.
1220c794b3Sgavinm  *
1320c794b3Sgavinm  * When distributing Covered Code, include this CDDL HEADER in each
1420c794b3Sgavinm  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1520c794b3Sgavinm  * If applicable, add the following below this CDDL HEADER, with the
1620c794b3Sgavinm  * fields enclosed by brackets "[]" replaced with your own identifying
1720c794b3Sgavinm  * information: Portions Copyright [yyyy] [name of copyright owner]
1820c794b3Sgavinm  *
1920c794b3Sgavinm  * CDDL HEADER END
2020c794b3Sgavinm  */
2120c794b3Sgavinm 
2220c794b3Sgavinm /*
23b8201470SSrihari Venkatesan  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
2420c794b3Sgavinm  * Use is subject to license terms.
2520c794b3Sgavinm  */
2620c794b3Sgavinm 
2720c794b3Sgavinm /*
2820c794b3Sgavinm  * AMD memory enumeration
2920c794b3Sgavinm  */
3020c794b3Sgavinm 
3120c794b3Sgavinm #include <sys/types.h>
3220c794b3Sgavinm #include <unistd.h>
3320c794b3Sgavinm #include <stropts.h>
3420c794b3Sgavinm #include <sys/fm/protocol.h>
3520c794b3Sgavinm #include <sys/mc.h>
3620c794b3Sgavinm #include <sys/mc_amd.h>
3720c794b3Sgavinm #include <fm/topo_mod.h>
3820c794b3Sgavinm #include <strings.h>
3920c794b3Sgavinm #include <sys/stat.h>
4020c794b3Sgavinm #include <fcntl.h>
4120c794b3Sgavinm 
4220c794b3Sgavinm #include "chip.h"
4320c794b3Sgavinm 
4420c794b3Sgavinm #define	MAX_CHANNUM	1
4520c794b3Sgavinm #define	MAX_DIMMNUM	7
4620c794b3Sgavinm #define	MAX_CSNUM	7
4720c794b3Sgavinm 
4820c794b3Sgavinm static const topo_pgroup_info_t cs_pgroup =
4920c794b3Sgavinm 	{ PGNAME(CS), TOPO_STABILITY_PRIVATE, TOPO_STABILITY_PRIVATE, 1 };
5020c794b3Sgavinm static const topo_pgroup_info_t dimm_pgroup =
5120c794b3Sgavinm 	{ PGNAME(DIMM), TOPO_STABILITY_PRIVATE, TOPO_STABILITY_PRIVATE, 1 };
5220c794b3Sgavinm static const topo_pgroup_info_t mc_pgroup =
5320c794b3Sgavinm 	{ PGNAME(MCT), TOPO_STABILITY_PRIVATE, TOPO_STABILITY_PRIVATE, 1 };
5420c794b3Sgavinm static const topo_pgroup_info_t rank_pgroup =
5520c794b3Sgavinm 	{ PGNAME(RANK), TOPO_STABILITY_PRIVATE, TOPO_STABILITY_PRIVATE, 1 };
5620c794b3Sgavinm static const topo_pgroup_info_t chan_pgroup =
5720c794b3Sgavinm 	{ PGNAME(CHAN), TOPO_STABILITY_PRIVATE, TOPO_STABILITY_PRIVATE, 1 };
5820c794b3Sgavinm 
5920c794b3Sgavinm static const topo_method_t dimm_methods[] = {
6020c794b3Sgavinm 	{ SIMPLE_DIMM_LBL, "Property method", 0,
6120c794b3Sgavinm 	    TOPO_STABILITY_INTERNAL, simple_dimm_label},
6220c794b3Sgavinm 	{ SIMPLE_DIMM_LBL_MP, "Property method", 0,
6320c794b3Sgavinm 	    TOPO_STABILITY_INTERNAL, simple_dimm_label_mp},
6420c794b3Sgavinm 	{ SEQ_DIMM_LBL, "Property method", 0,
6520c794b3Sgavinm 	    TOPO_STABILITY_INTERNAL, seq_dimm_label},
662cb5535aSrobj 	{ G4_DIMM_LBL, "Property method", 0,
672cb5535aSrobj 	    TOPO_STABILITY_INTERNAL, g4_dimm_label},
68918a0d8aSrobj 	{ G12F_DIMM_LBL, "Property method", 0,
69918a0d8aSrobj 	    TOPO_STABILITY_INTERNAL, g12f_dimm_label},
702cb5535aSrobj 	{ GET_DIMM_SERIAL, "Property method", 0,
712cb5535aSrobj 	    TOPO_STABILITY_INTERNAL, get_dimm_serial},
7220c794b3Sgavinm 	{ NULL }
7320c794b3Sgavinm };
7420c794b3Sgavinm 
75e4b86885SCheng Sean Ye const topo_method_t rank_methods[] = {
7620c794b3Sgavinm 	{ TOPO_METH_ASRU_COMPUTE, TOPO_METH_ASRU_COMPUTE_DESC,
7720c794b3Sgavinm 	    TOPO_METH_ASRU_COMPUTE_VERSION, TOPO_STABILITY_INTERNAL,
7820c794b3Sgavinm 	    mem_asru_compute },
792cb5535aSrobj 	{ TOPO_METH_PRESENT, TOPO_METH_PRESENT_DESC,
802cb5535aSrobj 	    TOPO_METH_PRESENT_VERSION, TOPO_STABILITY_INTERNAL,
812cb5535aSrobj 	    rank_fmri_present },
8225c6ff4bSstephh 	{ TOPO_METH_REPLACED, TOPO_METH_REPLACED_DESC,
8325c6ff4bSstephh 	    TOPO_METH_REPLACED_VERSION, TOPO_STABILITY_INTERNAL,
8425c6ff4bSstephh 	    rank_fmri_replaced },
8520c794b3Sgavinm 	{ NULL }
8620c794b3Sgavinm };
8720c794b3Sgavinm 
88e4b86885SCheng Sean Ye const topo_method_t ntv_page_retire_methods[] = {
89e4b86885SCheng Sean Ye 	{ TOPO_METH_RETIRE, TOPO_METH_RETIRE_DESC,
90e4b86885SCheng Sean Ye 	    TOPO_METH_RETIRE_VERSION, TOPO_STABILITY_INTERNAL,
91e4b86885SCheng Sean Ye 	    ntv_page_retire },
92e4b86885SCheng Sean Ye 	{ TOPO_METH_UNRETIRE, TOPO_METH_UNRETIRE_DESC,
93e4b86885SCheng Sean Ye 	    TOPO_METH_UNRETIRE_VERSION, TOPO_STABILITY_INTERNAL,
94e4b86885SCheng Sean Ye 	    ntv_page_unretire },
95e4b86885SCheng Sean Ye 	{ TOPO_METH_SERVICE_STATE, TOPO_METH_SERVICE_STATE_DESC,
96e4b86885SCheng Sean Ye 	    TOPO_METH_SERVICE_STATE_VERSION, TOPO_STABILITY_INTERNAL,
97e4b86885SCheng Sean Ye 	    ntv_page_service_state },
98e4b86885SCheng Sean Ye 	{ NULL }
99e4b86885SCheng Sean Ye };
100e4b86885SCheng Sean Ye 
101*074bb90dSTom Pothier /*
102*074bb90dSTom Pothier  * Serials, Labels are obtained from SMBIOS, so
103*074bb90dSTom Pothier  * we leave out the related methods, any other
104*074bb90dSTom Pothier  * methods that will be added to gen_cs_methods
105*074bb90dSTom Pothier  * should be added to x86pi_gen_cs_methods too
106*074bb90dSTom Pothier  */
107*074bb90dSTom Pothier static const topo_method_t x86pi_gen_cs_methods[] = {
108*074bb90dSTom Pothier 	{ TOPO_METH_ASRU_COMPUTE, TOPO_METH_ASRU_COMPUTE_DESC,
109*074bb90dSTom Pothier 	    TOPO_METH_ASRU_COMPUTE_VERSION, TOPO_STABILITY_INTERNAL,
110*074bb90dSTom Pothier 	    mem_asru_compute },
111*074bb90dSTom Pothier 	{ NULL }
112*074bb90dSTom Pothier };
113*074bb90dSTom Pothier 
11420c794b3Sgavinm static const topo_method_t gen_cs_methods[] = {
11520c794b3Sgavinm 	{ TOPO_METH_ASRU_COMPUTE, TOPO_METH_ASRU_COMPUTE_DESC,
11620c794b3Sgavinm 	    TOPO_METH_ASRU_COMPUTE_VERSION, TOPO_STABILITY_INTERNAL,
11720c794b3Sgavinm 	    mem_asru_compute },
1185108f83cSrobj 	{ SIMPLE_CS_LBL_MP, "Property method", 0,
1195108f83cSrobj 	    TOPO_STABILITY_INTERNAL, simple_cs_label_mp},
12088045cffSRobert Johnston 	{ GET_DIMM_SERIAL, "Property method", 0,
12188045cffSRobert Johnston 	    TOPO_STABILITY_INTERNAL, get_dimm_serial},
12220c794b3Sgavinm 	{ NULL }
12320c794b3Sgavinm };
12420c794b3Sgavinm 
12520c794b3Sgavinm static nvlist_t *cs_fmri[MC_CHIP_NCS];
12620c794b3Sgavinm 
12720c794b3Sgavinm /*
12820c794b3Sgavinm  * Called when there is no memory-controller driver to provide topology
12920c794b3Sgavinm  * information.  Generate a maximal memory topology that is appropriate
13020c794b3Sgavinm  * for the chip revision.  The memory-controller node has already been
13120c794b3Sgavinm  * bound as mcnode, and the parent of that is cnode.
13220c794b3Sgavinm  *
13320c794b3Sgavinm  * We create a tree of dram-channel and chip-select nodes below the
13420c794b3Sgavinm  * memory-controller node.  There will be two dram channels and 8 chip-selects
13520c794b3Sgavinm  * below each, regardless of actual socket type, processor revision and so on.
13620c794b3Sgavinm  * This is adequate for generic diagnosis up to family 0x10 revision C.
13720c794b3Sgavinm  * When support for revision D is implemented (or maybe C) we should take
13820c794b3Sgavinm  * the opportunity to rework the topology tree completely (socket change will
13920c794b3Sgavinm  * mean there can be no diagnosis history tied to the topology).
14020c794b3Sgavinm  */
14120c794b3Sgavinm /*ARGSUSED*/
14220c794b3Sgavinm static int
143*074bb90dSTom Pothier amd_generic_mc_create(topo_mod_t *mod, uint16_t smbid, tnode_t *cnode,
144*074bb90dSTom Pothier     tnode_t *mcnode, int family, int model, int stepping, nvlist_t *auth)
14520c794b3Sgavinm {
14620c794b3Sgavinm 	int chan, cs;
14720c794b3Sgavinm 
14820c794b3Sgavinm 	/*
14920c794b3Sgavinm 	 * Elsewhere we have already returned for families less than 0xf.
15020c794b3Sgavinm 	 * This "generic" topology is adequate for all of family 0xf and
151b8201470SSrihari Venkatesan 	 * for revisions A, B and C of family 0x10 (for the list of models
152b8201470SSrihari Venkatesan 	 * in each revision, refer to usr/src/uts/i86pc/os/cpuid_subr.c).
153ce0bfb39SSrihari Venkatesan 	 * We cover all family 0x10 models, till model 8.
15420c794b3Sgavinm 	 */
155ce0bfb39SSrihari Venkatesan 	if (family > 0x10 || (family == 0x10 && model > 8))
15620c794b3Sgavinm 		return (1);
15720c794b3Sgavinm 
15820c794b3Sgavinm 	if (topo_node_range_create(mod, mcnode, CHAN_NODE_NAME, 0,
15920c794b3Sgavinm 	    MAX_CHANNUM) < 0) {
16020c794b3Sgavinm 		whinge(mod, NULL, "amd_generic_mc_create: range create for "
16120c794b3Sgavinm 		    "channels failed\n");
16220c794b3Sgavinm 		return (-1);
16320c794b3Sgavinm 	}
16420c794b3Sgavinm 
16520c794b3Sgavinm 	for (chan = 0; chan <= MAX_CHANNUM; chan++) {
16620c794b3Sgavinm 		tnode_t *chnode;
16720c794b3Sgavinm 		nvlist_t *fmri;
16820c794b3Sgavinm 		int err;
16920c794b3Sgavinm 
17020c794b3Sgavinm 		if (mkrsrc(mod, mcnode, CHAN_NODE_NAME, chan, auth,
17120c794b3Sgavinm 		    &fmri) != 0) {
17220c794b3Sgavinm 			whinge(mod, NULL, "amd_generic_mc_create: mkrsrc "
17320c794b3Sgavinm 			    "failed\n");
17420c794b3Sgavinm 			return (-1);
17520c794b3Sgavinm 		}
17620c794b3Sgavinm 
17720c794b3Sgavinm 		if ((chnode = topo_node_bind(mod, mcnode, CHAN_NODE_NAME,
17820c794b3Sgavinm 		    chan, fmri)) == NULL) {
17920c794b3Sgavinm 			nvlist_free(fmri);
18020c794b3Sgavinm 			whinge(mod, NULL, "amd_generic_mc_create: node "
18120c794b3Sgavinm 			    "bind failed\n");
18220c794b3Sgavinm 			return (-1);
18320c794b3Sgavinm 		}
18420c794b3Sgavinm 
18520c794b3Sgavinm 		nvlist_free(fmri);
18620c794b3Sgavinm 
18720c794b3Sgavinm 		(void) topo_pgroup_create(chnode, &chan_pgroup, &err);
18820c794b3Sgavinm 
18920c794b3Sgavinm 		(void) topo_prop_set_string(chnode, PGNAME(CHAN), "channel",
19020c794b3Sgavinm 		    TOPO_PROP_IMMUTABLE, chan == 0 ? "A" : "B", &err);
19120c794b3Sgavinm 
192*074bb90dSTom Pothier 		if (FM_AWARE_SMBIOS(mod)) {
193*074bb90dSTom Pothier 			if (topo_node_label_set(chnode, NULL, &err) == -1)
194*074bb90dSTom Pothier 				whinge(mod, NULL, "amd_generic_mc_create: "
195*074bb90dSTom Pothier 				    "topo_node_label_set\n");
196*074bb90dSTom Pothier 			if (topo_node_fru_set(chnode, NULL, 0, &err) != 0)
197*074bb90dSTom Pothier 				whinge(mod, NULL, "amd_generic_mc_create: "
198*074bb90dSTom Pothier 				    "topo_node_fru_set failed\n");
199*074bb90dSTom Pothier 		}
200*074bb90dSTom Pothier 
20120c794b3Sgavinm 		if (topo_node_range_create(mod, chnode, CS_NODE_NAME,
20220c794b3Sgavinm 		    0, MAX_CSNUM) < 0) {
20320c794b3Sgavinm 			whinge(mod, NULL, "amd_generic_mc_create: "
20420c794b3Sgavinm 			    "range create for cs failed\n");
20520c794b3Sgavinm 			return (-1);
20620c794b3Sgavinm 		}
20720c794b3Sgavinm 
20820c794b3Sgavinm 		for (cs = 0; cs <= MAX_CSNUM; cs++) {
20920c794b3Sgavinm 			tnode_t *csnode;
21020c794b3Sgavinm 
21120c794b3Sgavinm 			if (mkrsrc(mod, chnode, CS_NODE_NAME, cs, auth,
21220c794b3Sgavinm 			    &fmri) != 0) {
21320c794b3Sgavinm 				whinge(mod, NULL, "amd_generic_mc_create: "
21420c794b3Sgavinm 				    "mkrsrc for cs failed\n");
21520c794b3Sgavinm 				return (-1);
21620c794b3Sgavinm 			}
21720c794b3Sgavinm 
21820c794b3Sgavinm 			if ((csnode = topo_node_bind(mod, chnode, CS_NODE_NAME,
21920c794b3Sgavinm 			    cs, fmri)) == NULL) {
22020c794b3Sgavinm 				nvlist_free(fmri);
22120c794b3Sgavinm 				whinge(mod, NULL, "amd_generic_mc_create: "
22220c794b3Sgavinm 				    "bind for cs failed\n");
22320c794b3Sgavinm 				return (-1);
22420c794b3Sgavinm 			}
22520c794b3Sgavinm 
22620c794b3Sgavinm 			/*
22720c794b3Sgavinm 			 * Dynamic ASRU for page faults within a chip-select.
22820c794b3Sgavinm 			 * The topology does not represent pages (there are
22920c794b3Sgavinm 			 * too many) so when a page is faulted we generate
23020c794b3Sgavinm 			 * an ASRU to represent the individual page.
231*074bb90dSTom Pothier 			 * If SMBIOS meets FMA needs, derive labels & serials
232*074bb90dSTom Pothier 			 * for DIMMS and apply to chip-select nodes.
233*074bb90dSTom Pothier 			 * If deriving from SMBIOS, skip IPMI
23420c794b3Sgavinm 			 */
235*074bb90dSTom Pothier 			if (FM_AWARE_SMBIOS(mod)) {
236*074bb90dSTom Pothier 				if (topo_method_register(mod, csnode,
237*074bb90dSTom Pothier 				    x86pi_gen_cs_methods) < 0)
238*074bb90dSTom Pothier 					whinge(mod, NULL,
239*074bb90dSTom Pothier 					    "amd_generic_mc_create: "
240*074bb90dSTom Pothier 					    "method registration failed\n");
241*074bb90dSTom Pothier 			} else {
242*074bb90dSTom Pothier 				if (topo_method_register(mod, csnode,
243*074bb90dSTom Pothier 				    gen_cs_methods) < 0)
244*074bb90dSTom Pothier 					whinge(mod, NULL,
245*074bb90dSTom Pothier 					    "amd_generic_mc_create: method"
246*074bb90dSTom Pothier 					    "registration failed\n");
247*074bb90dSTom Pothier 			}
24820c794b3Sgavinm 
24920c794b3Sgavinm 			(void) topo_node_asru_set(csnode, fmri,
25020c794b3Sgavinm 			    TOPO_ASRU_COMPUTE, &err);
25120c794b3Sgavinm 			nvlist_free(fmri);
252*074bb90dSTom Pothier 
253*074bb90dSTom Pothier 			/*
254*074bb90dSTom Pothier 			 * If SMBIOS meets FMA needs, set DIMM as the FRU for
255*074bb90dSTom Pothier 			 * the chip-select node. Use the channel & chip-select
256*074bb90dSTom Pothier 			 * numbers to get the DIMM instance.
257*074bb90dSTom Pothier 			 * Send via inst : dram channel number
258*074bb90dSTom Pothier 			 * Receive via inst : dimm instance
259*074bb90dSTom Pothier 			 */
260*074bb90dSTom Pothier 			if (FM_AWARE_SMBIOS(mod)) {
261*074bb90dSTom Pothier 				int inst;
262*074bb90dSTom Pothier 				id_t dimm_smbid;
263*074bb90dSTom Pothier 				const char *serial;
264*074bb90dSTom Pothier 				const char *part;
265*074bb90dSTom Pothier 				const char *rev;
266*074bb90dSTom Pothier 				char *label;
267*074bb90dSTom Pothier 
268*074bb90dSTom Pothier 				(void) topo_pgroup_create(csnode,
269*074bb90dSTom Pothier 				    &cs_pgroup, &err);
270*074bb90dSTom Pothier 				inst = chan;
271*074bb90dSTom Pothier 				dimm_smbid = memnode_to_smbiosid(smbid,
272*074bb90dSTom Pothier 				    CS_NODE_NAME, cs, &inst);
273*074bb90dSTom Pothier 				serial = chip_serial_smbios_get(mod,
274*074bb90dSTom Pothier 				    dimm_smbid);
275*074bb90dSTom Pothier 				part = chip_part_smbios_get(mod,
276*074bb90dSTom Pothier 				    dimm_smbid);
277*074bb90dSTom Pothier 				rev = chip_rev_smbios_get(mod, dimm_smbid);
278*074bb90dSTom Pothier 				label = (char *)chip_label_smbios_get(mod,
279*074bb90dSTom Pothier 				    chnode, dimm_smbid, NULL);
280*074bb90dSTom Pothier 
281*074bb90dSTom Pothier 				(void) topo_prop_set_string(csnode, PGNAME(CS),
282*074bb90dSTom Pothier 				    FM_FMRI_HC_SERIAL_ID, TOPO_PROP_IMMUTABLE,
283*074bb90dSTom Pothier 				    serial, &err);
284*074bb90dSTom Pothier 				(void) topo_prop_set_string(csnode, PGNAME(CS),
285*074bb90dSTom Pothier 				    FM_FMRI_HC_PART, TOPO_PROP_IMMUTABLE,
286*074bb90dSTom Pothier 				    part, &err);
287*074bb90dSTom Pothier 				(void) topo_prop_set_string(csnode, PGNAME(CS),
288*074bb90dSTom Pothier 				    FM_FMRI_HC_REVISION, TOPO_PROP_IMMUTABLE,
289*074bb90dSTom Pothier 				    rev, &err);
290*074bb90dSTom Pothier 
291*074bb90dSTom Pothier 				/*
292*074bb90dSTom Pothier 				 * We apply DIMM labels to chip-select nodes,
293*074bb90dSTom Pothier 				 * FRU for chip-selects should be DIMMs, and
294*074bb90dSTom Pothier 				 * we do not derive dimm nodes for Family 0x10
295*074bb90dSTom Pothier 				 * so FRU fmri is NULL, but FRU Labels are set,
296*074bb90dSTom Pothier 				 * the FRU labels point to the DIMM.
297*074bb90dSTom Pothier 				 */
298*074bb90dSTom Pothier 				(void) topo_node_label_set(csnode, label, &err);
299*074bb90dSTom Pothier 				topo_mod_strfree(mod, label);
300*074bb90dSTom Pothier 			}
30120c794b3Sgavinm 		}
30220c794b3Sgavinm 	}
30320c794b3Sgavinm 
30420c794b3Sgavinm 	return (0);
30520c794b3Sgavinm }
30620c794b3Sgavinm 
30720c794b3Sgavinm static nvlist_t *
30820c794b3Sgavinm amd_lookup_by_mcid(topo_mod_t *mod, topo_instance_t id)
30920c794b3Sgavinm {
31020c794b3Sgavinm 	mc_snapshot_info_t mcs;
31120c794b3Sgavinm 	void *buf = NULL;
31220c794b3Sgavinm 	uint8_t ver;
31320c794b3Sgavinm 
31420c794b3Sgavinm 	nvlist_t *nvl = NULL;
31520c794b3Sgavinm 	char path[64];
31620c794b3Sgavinm 	int fd, err;
31720c794b3Sgavinm 
31820c794b3Sgavinm 	(void) snprintf(path, sizeof (path), "/dev/mc/mc%d", id);
31920c794b3Sgavinm 	fd = open(path, O_RDONLY);
32020c794b3Sgavinm 
32120c794b3Sgavinm 	if (fd == -1) {
32220c794b3Sgavinm 		/*
32320c794b3Sgavinm 		 * Some v20z and v40z systems may have had the 3rd-party
32420c794b3Sgavinm 		 * NWSnps packagae installed which installs a /dev/mc
32520c794b3Sgavinm 		 * link.  So try again via /devices.
32620c794b3Sgavinm 		 */
32720c794b3Sgavinm 		(void) snprintf(path, sizeof (path),
32820c794b3Sgavinm 		    "/devices/pci@0,0/pci1022,1102@%x,2:mc-amd",
32920c794b3Sgavinm 		    MC_AMD_DEV_OFFSET + id);
33020c794b3Sgavinm 		fd = open(path, O_RDONLY);
33120c794b3Sgavinm 	}
33220c794b3Sgavinm 
33320c794b3Sgavinm 	if (fd == -1)
33420c794b3Sgavinm 		return (NULL);	/* do not whinge */
33520c794b3Sgavinm 
33620c794b3Sgavinm 	if (ioctl(fd, MC_IOC_SNAPSHOT_INFO, &mcs) == -1 ||
33720c794b3Sgavinm 	    (buf = topo_mod_alloc(mod, mcs.mcs_size)) == NULL ||
33820c794b3Sgavinm 	    ioctl(fd, MC_IOC_SNAPSHOT, buf) == -1) {
33920c794b3Sgavinm 
34020c794b3Sgavinm 		whinge(mod, NULL, "mc failed to snapshot %s: %s\n",
34120c794b3Sgavinm 		    path, strerror(errno));
34220c794b3Sgavinm 
34320c794b3Sgavinm 		free(buf);
34420c794b3Sgavinm 		(void) close(fd);
34520c794b3Sgavinm 		return (NULL);
34620c794b3Sgavinm 	}
34720c794b3Sgavinm 
34820c794b3Sgavinm 	(void) close(fd);
34920c794b3Sgavinm 	err = nvlist_unpack(buf, mcs.mcs_size, &nvl, 0);
35020c794b3Sgavinm 	topo_mod_free(mod, buf, mcs.mcs_size);
35120c794b3Sgavinm 
35220c794b3Sgavinm 	if (nvlist_lookup_uint8(nvl, MC_NVLIST_VERSTR, &ver) != 0) {
35320c794b3Sgavinm 		whinge(mod, NULL, "mc nvlist is not versioned\n");
35420c794b3Sgavinm 		nvlist_free(nvl);
35520c794b3Sgavinm 		return (NULL);
35620c794b3Sgavinm 	} else if (ver != MC_NVLIST_VERS1) {
35720c794b3Sgavinm 		whinge(mod, NULL, "mc nvlist version mismatch\n");
35820c794b3Sgavinm 		nvlist_free(nvl);
35920c794b3Sgavinm 		return (NULL);
36020c794b3Sgavinm 	}
36120c794b3Sgavinm 
36220c794b3Sgavinm 	return (err ? NULL : nvl);
36320c794b3Sgavinm }
36420c794b3Sgavinm 
36520c794b3Sgavinm int
36620c794b3Sgavinm amd_rank_create(topo_mod_t *mod, tnode_t *pnode, nvlist_t *dimmnvl,
36720c794b3Sgavinm     nvlist_t *auth)
36820c794b3Sgavinm {
36920c794b3Sgavinm 	uint64_t *csnumarr;
37020c794b3Sgavinm 	char **csnamearr;
37120c794b3Sgavinm 	uint_t ncs, ncsname;
37220c794b3Sgavinm 	tnode_t *ranknode;
37320c794b3Sgavinm 	nvlist_t *fmri, *pfmri = NULL;
37420c794b3Sgavinm 	uint64_t dsz, rsz;
37520c794b3Sgavinm 	int nerr = 0;
37620c794b3Sgavinm 	int err;
37720c794b3Sgavinm 	int i;
37820c794b3Sgavinm 
37920c794b3Sgavinm 	if (nvlist_lookup_uint64_array(dimmnvl, "csnums", &csnumarr,
38020c794b3Sgavinm 	    &ncs) != 0 || nvlist_lookup_string_array(dimmnvl, "csnames",
38120c794b3Sgavinm 	    &csnamearr, &ncsname) != 0 || ncs != ncsname) {
38220c794b3Sgavinm 		whinge(mod, &nerr, "amd_rank_create: "
38320c794b3Sgavinm 		    "csnums/csnames extraction failed\n");
38420c794b3Sgavinm 		return (nerr);
38520c794b3Sgavinm 	}
38620c794b3Sgavinm 
38720c794b3Sgavinm 	if (topo_node_resource(pnode, &pfmri, &err) < 0) {
38820c794b3Sgavinm 		whinge(mod, &nerr, "amd_rank_create: parent fmri lookup "
38920c794b3Sgavinm 		    "failed\n");
39020c794b3Sgavinm 		return (nerr);
39120c794b3Sgavinm 	}
39220c794b3Sgavinm 
39320c794b3Sgavinm 	if (topo_node_range_create(mod, pnode, RANK_NODE_NAME, 0, ncs) < 0) {
39420c794b3Sgavinm 		whinge(mod, &nerr, "amd_rank_create: range create failed\n");
39520c794b3Sgavinm 		nvlist_free(pfmri);
39620c794b3Sgavinm 		return (nerr);
39720c794b3Sgavinm 	}
39820c794b3Sgavinm 
39920c794b3Sgavinm 	if (topo_prop_get_uint64(pnode, PGNAME(DIMM), "size", &dsz,
40020c794b3Sgavinm 	    &err) == 0) {
40120c794b3Sgavinm 		rsz = dsz / ncs;
40220c794b3Sgavinm 	} else {
40320c794b3Sgavinm 		whinge(mod, &nerr, "amd_rank_create: parent dimm has no "
40420c794b3Sgavinm 		    "size\n");
40520c794b3Sgavinm 		return (nerr);
40620c794b3Sgavinm 	}
40720c794b3Sgavinm 
40820c794b3Sgavinm 	for (i = 0; i < ncs; i++) {
40920c794b3Sgavinm 		if (mkrsrc(mod, pnode, RANK_NODE_NAME, i, auth, &fmri) < 0) {
41020c794b3Sgavinm 			whinge(mod, &nerr, "amd_rank_create: mkrsrc failed\n");
41120c794b3Sgavinm 			continue;
41220c794b3Sgavinm 		}
41320c794b3Sgavinm 
41420c794b3Sgavinm 		if ((ranknode = topo_node_bind(mod, pnode, RANK_NODE_NAME, i,
41520c794b3Sgavinm 		    fmri)) == NULL) {
41620c794b3Sgavinm 			nvlist_free(fmri);
41720c794b3Sgavinm 			whinge(mod, &nerr, "amd_rank_create: node bind "
41820c794b3Sgavinm 			    "failed\n");
41920c794b3Sgavinm 			continue;
42020c794b3Sgavinm 		}
42120c794b3Sgavinm 
42220c794b3Sgavinm 		nvlist_free(fmri);
423*074bb90dSTom Pothier 		if (FM_AWARE_SMBIOS(mod))
424*074bb90dSTom Pothier 			(void) topo_node_fru_set(ranknode, NULL, 0, &err);
425*074bb90dSTom Pothier 		else
426*074bb90dSTom Pothier 			(void) topo_node_fru_set(ranknode, pfmri, 0, &err);
42720c794b3Sgavinm 
42820c794b3Sgavinm 		/*
42920c794b3Sgavinm 		 * If a rank is faulted the asru is the associated
43020c794b3Sgavinm 		 * chip-select, but if a page within a rank is faulted
43120c794b3Sgavinm 		 * the asru is just that page.  Hence the dual preconstructed
43220c794b3Sgavinm 		 * and computed ASRU.
43320c794b3Sgavinm 		 */
43420c794b3Sgavinm 		if (topo_method_register(mod, ranknode, rank_methods) < 0)
43520c794b3Sgavinm 			whinge(mod, &nerr, "amd_rank_create: "
43620c794b3Sgavinm 			    "topo_method_register failed");
43720c794b3Sgavinm 
438e4b86885SCheng Sean Ye 		if (! is_xpv() && topo_method_register(mod, ranknode,
439e4b86885SCheng Sean Ye 		    ntv_page_retire_methods) < 0)
440e4b86885SCheng Sean Ye 			whinge(mod, &nerr, "amd_rank_create: "
441e4b86885SCheng Sean Ye 			    "topo_method_register failed");
442e4b86885SCheng Sean Ye 
44320c794b3Sgavinm 		(void) topo_node_asru_set(ranknode, cs_fmri[csnumarr[i]],
44420c794b3Sgavinm 		    TOPO_ASRU_COMPUTE, &err);
44520c794b3Sgavinm 
44620c794b3Sgavinm 		(void) topo_pgroup_create(ranknode, &rank_pgroup, &err);
44720c794b3Sgavinm 
44820c794b3Sgavinm 		(void) topo_prop_set_uint64(ranknode, PGNAME(RANK), "size",
44920c794b3Sgavinm 		    TOPO_PROP_IMMUTABLE, rsz, &err);
45020c794b3Sgavinm 
45120c794b3Sgavinm 		(void) topo_prop_set_string(ranknode, PGNAME(RANK), "csname",
45220c794b3Sgavinm 		    TOPO_PROP_IMMUTABLE, csnamearr[i], &err);
45320c794b3Sgavinm 
45420c794b3Sgavinm 		(void) topo_prop_set_uint64(ranknode, PGNAME(RANK), "csnum",
45520c794b3Sgavinm 		    TOPO_PROP_IMMUTABLE, csnumarr[i], &err);
45620c794b3Sgavinm 	}
45720c794b3Sgavinm 
45820c794b3Sgavinm 	nvlist_free(pfmri);
45920c794b3Sgavinm 
46020c794b3Sgavinm 	return (nerr);
46120c794b3Sgavinm }
46220c794b3Sgavinm 
46320c794b3Sgavinm static int
464*074bb90dSTom Pothier amd_dimm_create(topo_mod_t *mod, uint16_t chip_smbid, tnode_t *pnode,
465*074bb90dSTom Pothier     const char *name, nvlist_t *mc, nvlist_t *auth)
46620c794b3Sgavinm {
46720c794b3Sgavinm 	int i, err, nerr = 0;
468*074bb90dSTom Pothier 	int perr = 0;
46920c794b3Sgavinm 	nvpair_t *nvp;
47020c794b3Sgavinm 	tnode_t *dimmnode;
471e4b86885SCheng Sean Ye 	nvlist_t *fmri, **dimmarr = NULL;
47220c794b3Sgavinm 	uint64_t num;
47320c794b3Sgavinm 	uint_t ndimm;
474*074bb90dSTom Pothier 	id_t smbid;
475*074bb90dSTom Pothier 	const char *serial;
476*074bb90dSTom Pothier 	const char *part;
477*074bb90dSTom Pothier 	const char *rev;
47820c794b3Sgavinm 
47920c794b3Sgavinm 	if (nvlist_lookup_nvlist_array(mc, "dimmlist", &dimmarr, &ndimm) != 0) {
48020c794b3Sgavinm 		whinge(mod, NULL, "amd_dimm_create: dimmlist lookup failed\n");
48120c794b3Sgavinm 		return (-1);
48220c794b3Sgavinm 	}
48320c794b3Sgavinm 
48420c794b3Sgavinm 	if (ndimm == 0)
48520c794b3Sgavinm 		return (0);	/* no dimms present on this node */
48620c794b3Sgavinm 
48720c794b3Sgavinm 	if (topo_node_range_create(mod, pnode, name, 0, MAX_DIMMNUM) < 0) {
48820c794b3Sgavinm 		whinge(mod, NULL, "amd_dimm_create: range create failed\n");
48920c794b3Sgavinm 		return (-1);
49020c794b3Sgavinm 	}
49120c794b3Sgavinm 
49220c794b3Sgavinm 	for (i = 0; i < ndimm; i++) {
49320c794b3Sgavinm 		if (nvlist_lookup_uint64(dimmarr[i], "num", &num) != 0) {
49420c794b3Sgavinm 			whinge(mod, &nerr, "amd_dimm_create: dimm num property "
49520c794b3Sgavinm 			    "missing\n");
49620c794b3Sgavinm 			continue;
49720c794b3Sgavinm 		}
49820c794b3Sgavinm 
49920c794b3Sgavinm 		if (mkrsrc(mod, pnode, name, num, auth, &fmri) < 0) {
50020c794b3Sgavinm 			whinge(mod, &nerr, "amd_dimm_create: mkrsrc failed\n");
50120c794b3Sgavinm 			continue;
50220c794b3Sgavinm 		}
503*074bb90dSTom Pothier 		if (FM_AWARE_SMBIOS(mod)) {
504*074bb90dSTom Pothier 			smbid = memnode_to_smbiosid(chip_smbid, DIMM_NODE_NAME,
505*074bb90dSTom Pothier 			    i, NULL);
506*074bb90dSTom Pothier 			serial = chip_serial_smbios_get(mod, smbid);
507*074bb90dSTom Pothier 			part = chip_part_smbios_get(mod, smbid);
508*074bb90dSTom Pothier 			rev = chip_rev_smbios_get(mod, smbid);
509*074bb90dSTom Pothier 			perr += nvlist_add_string(fmri, FM_FMRI_HC_SERIAL_ID,
510*074bb90dSTom Pothier 			    serial);
511*074bb90dSTom Pothier 			perr += nvlist_add_string(fmri, FM_FMRI_HC_PART,
512*074bb90dSTom Pothier 			    part);
513*074bb90dSTom Pothier 			perr += nvlist_add_string(fmri, FM_FMRI_HC_REVISION,
514*074bb90dSTom Pothier 			    rev);
515*074bb90dSTom Pothier 
516*074bb90dSTom Pothier 			if (perr != 0)
517*074bb90dSTom Pothier 				whinge(mod, NULL, "amd_dimm_create:"
518*074bb90dSTom Pothier 				    "nvlist_add_string failed\n");
519*074bb90dSTom Pothier 		}
52020c794b3Sgavinm 
52120c794b3Sgavinm 		if ((dimmnode = topo_node_bind(mod, pnode, name, num, fmri))
52220c794b3Sgavinm 		    == NULL) {
52320c794b3Sgavinm 			nvlist_free(fmri);
52420c794b3Sgavinm 			whinge(mod, &nerr, "amd_dimm_create: node bind "
52520c794b3Sgavinm 			    "failed\n");
52620c794b3Sgavinm 			continue;
52720c794b3Sgavinm 		}
52820c794b3Sgavinm 
529*074bb90dSTom Pothier 		if (!FM_AWARE_SMBIOS(mod))
530*074bb90dSTom Pothier 			if (topo_method_register(mod,
531*074bb90dSTom Pothier 			    dimmnode, dimm_methods) < 0)
532*074bb90dSTom Pothier 				whinge(mod, &nerr, "amd_dimm_create: "
533*074bb90dSTom Pothier 				    "topo_method_register failed");
534*074bb90dSTom Pothier 
535*074bb90dSTom Pothier 		(void) topo_pgroup_create(dimmnode, &dimm_pgroup, &err);
536*074bb90dSTom Pothier 
537*074bb90dSTom Pothier 		if (FM_AWARE_SMBIOS(mod)) {
538*074bb90dSTom Pothier 			char *label;
539*074bb90dSTom Pothier 
540*074bb90dSTom Pothier 			nvlist_free(fmri);
541*074bb90dSTom Pothier 			(void) topo_node_resource(dimmnode,
542*074bb90dSTom Pothier 			    &fmri, &err);
543*074bb90dSTom Pothier 
544*074bb90dSTom Pothier 			label = (char *)chip_label_smbios_get(mod,
545*074bb90dSTom Pothier 			    pnode, smbid, NULL);
546*074bb90dSTom Pothier 			if (topo_node_label_set(dimmnode, label,
547*074bb90dSTom Pothier 			    &perr) == -1)
548*074bb90dSTom Pothier 				topo_mod_dprintf(mod, "Failed"
549*074bb90dSTom Pothier 				    "to set label\n");
550*074bb90dSTom Pothier 			topo_mod_strfree(mod, label);
551*074bb90dSTom Pothier 
552*074bb90dSTom Pothier 			(void) topo_prop_set_string(dimmnode, PGNAME(DIMM),
553*074bb90dSTom Pothier 			    FM_FMRI_HC_SERIAL_ID, TOPO_PROP_IMMUTABLE,
554*074bb90dSTom Pothier 			    serial, &err);
555*074bb90dSTom Pothier 			(void) topo_prop_set_string(dimmnode, PGNAME(DIMM),
556*074bb90dSTom Pothier 			    FM_FMRI_HC_PART, TOPO_PROP_IMMUTABLE,
557*074bb90dSTom Pothier 			    part, &err);
558*074bb90dSTom Pothier 			(void) topo_prop_set_string(dimmnode, PGNAME(DIMM),
559*074bb90dSTom Pothier 			    FM_FMRI_HC_REVISION, TOPO_PROP_IMMUTABLE,
560*074bb90dSTom Pothier 			    rev, &err);
561*074bb90dSTom Pothier 		}
56220c794b3Sgavinm 
563e4b86885SCheng Sean Ye 		(void) topo_node_asru_set(dimmnode, fmri, 0, &err);
56420c794b3Sgavinm 		(void) topo_node_fru_set(dimmnode, fmri, 0, &err);
56520c794b3Sgavinm 		nvlist_free(fmri);
56620c794b3Sgavinm 
56720c794b3Sgavinm 		for (nvp = nvlist_next_nvpair(dimmarr[i], NULL); nvp != NULL;
56820c794b3Sgavinm 		    nvp = nvlist_next_nvpair(dimmarr[i], nvp)) {
56920c794b3Sgavinm 			if (nvpair_type(nvp) == DATA_TYPE_UINT64_ARRAY &&
57020c794b3Sgavinm 			    strcmp(nvpair_name(nvp), "csnums") == 0 ||
57120c794b3Sgavinm 			    nvpair_type(nvp) == DATA_TYPE_STRING_ARRAY &&
57220c794b3Sgavinm 			    strcmp(nvpair_name(nvp), "csnames") == 0)
57320c794b3Sgavinm 				continue;	/* used in amd_rank_create() */
57420c794b3Sgavinm 
57520c794b3Sgavinm 			nerr += nvprop_add(mod, nvp, PGNAME(DIMM), dimmnode);
57620c794b3Sgavinm 		}
57720c794b3Sgavinm 
57820c794b3Sgavinm 		nerr += amd_rank_create(mod, dimmnode, dimmarr[i], auth);
57920c794b3Sgavinm 	}
58020c794b3Sgavinm 
58120c794b3Sgavinm 	return (nerr == 0 ? 0 : -1);
58220c794b3Sgavinm }
58320c794b3Sgavinm 
58420c794b3Sgavinm static int
58520c794b3Sgavinm amd_cs_create(topo_mod_t *mod, tnode_t *pnode, const char *name, nvlist_t *mc,
58620c794b3Sgavinm     nvlist_t *auth)
58720c794b3Sgavinm {
58820c794b3Sgavinm 	int i, err, nerr = 0;
58920c794b3Sgavinm 	nvpair_t *nvp;
59020c794b3Sgavinm 	tnode_t *csnode;
59120c794b3Sgavinm 	nvlist_t *fmri, **csarr = NULL;
59220c794b3Sgavinm 	uint64_t csnum;
59320c794b3Sgavinm 	uint_t ncs;
59420c794b3Sgavinm 
59520c794b3Sgavinm 	if (nvlist_lookup_nvlist_array(mc, "cslist", &csarr, &ncs) != 0)
59620c794b3Sgavinm 		return (-1);
59720c794b3Sgavinm 
59820c794b3Sgavinm 	if (ncs == 0)
59920c794b3Sgavinm 		return (0);	/* no chip-selects configured on this node */
60020c794b3Sgavinm 
60120c794b3Sgavinm 	if (topo_node_range_create(mod, pnode, name, 0, MAX_CSNUM) < 0)
60220c794b3Sgavinm 		return (-1);
60320c794b3Sgavinm 
60420c794b3Sgavinm 	for (i = 0; i < ncs; i++) {
60520c794b3Sgavinm 		if (nvlist_lookup_uint64(csarr[i], "num", &csnum) != 0) {
60620c794b3Sgavinm 			whinge(mod, &nerr, "amd_cs_create: cs num property "
60720c794b3Sgavinm 			    "missing\n");
60820c794b3Sgavinm 			continue;
60920c794b3Sgavinm 		}
61020c794b3Sgavinm 
61120c794b3Sgavinm 		if (mkrsrc(mod, pnode, name, csnum, auth, &fmri) != 0) {
61220c794b3Sgavinm 			whinge(mod, &nerr, "amd_cs_create: mkrsrc failed\n");
61320c794b3Sgavinm 			continue;
61420c794b3Sgavinm 		}
61520c794b3Sgavinm 
61620c794b3Sgavinm 		if ((csnode = topo_node_bind(mod, pnode, name, csnum, fmri))
61720c794b3Sgavinm 		    == NULL) {
61820c794b3Sgavinm 			nvlist_free(fmri);
61920c794b3Sgavinm 			whinge(mod, &nerr, "amd_cs_create: node bind failed\n");
62020c794b3Sgavinm 			continue;
62120c794b3Sgavinm 		}
62220c794b3Sgavinm 
62320c794b3Sgavinm 		cs_fmri[csnum] = fmri;	/* nvlist will be freed in mc_create */
62420c794b3Sgavinm 
62520c794b3Sgavinm 		(void) topo_node_asru_set(csnode, fmri, 0, &err);
62620c794b3Sgavinm 
627b7d3956bSstephh 		(void) topo_node_fru_set(csnode, fmri, 0, &err);
628b7d3956bSstephh 
62920c794b3Sgavinm 		(void) topo_pgroup_create(csnode, &cs_pgroup, &err);
63020c794b3Sgavinm 
63120c794b3Sgavinm 		for (nvp = nvlist_next_nvpair(csarr[i], NULL); nvp != NULL;
63220c794b3Sgavinm 		    nvp = nvlist_next_nvpair(csarr[i], nvp)) {
63320c794b3Sgavinm 			nerr += nvprop_add(mod, nvp, PGNAME(CS), csnode);
63420c794b3Sgavinm 		}
63520c794b3Sgavinm 	}
63620c794b3Sgavinm 
63720c794b3Sgavinm 	return (nerr == 0 ? 0 : -1);
63820c794b3Sgavinm }
63920c794b3Sgavinm 
64020c794b3Sgavinm static int
64120c794b3Sgavinm amd_dramchan_create(topo_mod_t *mod, tnode_t *pnode, const char *name,
64220c794b3Sgavinm     nvlist_t *auth)
64320c794b3Sgavinm {
64420c794b3Sgavinm 	tnode_t *chnode;
64520c794b3Sgavinm 	nvlist_t *fmri;
64620c794b3Sgavinm 	char *socket;
64720c794b3Sgavinm 	int i, nchan;
648b7d3956bSstephh 	nvlist_t *pfmri = NULL;
64920c794b3Sgavinm 	int err, nerr = 0;
65020c794b3Sgavinm 
65120c794b3Sgavinm 	/*
65220c794b3Sgavinm 	 * We will enumerate the number of channels present even if only
65320c794b3Sgavinm 	 * channel A is in use (i.e., running in 64-bit mode).  Only
65420c794b3Sgavinm 	 * the socket 754 package has a single channel.
65520c794b3Sgavinm 	 */
65620c794b3Sgavinm 	if (topo_prop_get_string(pnode, PGNAME(MCT), "socket",
65720c794b3Sgavinm 	    &socket, &err) == 0 && strcmp(socket, "Socket 754") == 0)
65820c794b3Sgavinm 		nchan = 1;
65920c794b3Sgavinm 	else
66020c794b3Sgavinm 		nchan = 2;
66120c794b3Sgavinm 
66220c794b3Sgavinm 	topo_mod_strfree(mod, socket);
66320c794b3Sgavinm 
66420c794b3Sgavinm 	if (topo_node_range_create(mod, pnode, name, 0, nchan - 1) < 0)
66520c794b3Sgavinm 		return (-1);
66620c794b3Sgavinm 
667b7d3956bSstephh 	(void) topo_node_fru(pnode, &pfmri, NULL, &err);
668b7d3956bSstephh 
66920c794b3Sgavinm 	for (i = 0; i < nchan; i++) {
67020c794b3Sgavinm 		if (mkrsrc(mod, pnode, name, i, auth, &fmri) != 0) {
67120c794b3Sgavinm 			whinge(mod, &nerr, "amd_dramchan_create: mkrsrc "
67220c794b3Sgavinm 			    "failed\n");
67320c794b3Sgavinm 			continue;
67420c794b3Sgavinm 		}
67520c794b3Sgavinm 
67620c794b3Sgavinm 		if ((chnode = topo_node_bind(mod, pnode, name, i, fmri))
67720c794b3Sgavinm 		    == NULL) {
67820c794b3Sgavinm 			nvlist_free(fmri);
67920c794b3Sgavinm 			whinge(mod, &nerr, "amd_dramchan_create: node bind "
68020c794b3Sgavinm 			    "failed\n");
68120c794b3Sgavinm 			continue;
68220c794b3Sgavinm 		}
68320c794b3Sgavinm 
684b7d3956bSstephh 		(void) topo_node_asru_set(chnode, fmri, 0, &err);
685b7d3956bSstephh 		if (pfmri)
686b7d3956bSstephh 			(void) topo_node_fru_set(chnode, pfmri, 0, &err);
687b7d3956bSstephh 
68820c794b3Sgavinm 		nvlist_free(fmri);
68920c794b3Sgavinm 
69020c794b3Sgavinm 		(void) topo_pgroup_create(chnode, &chan_pgroup, &err);
69120c794b3Sgavinm 
69220c794b3Sgavinm 		(void) topo_prop_set_string(chnode, PGNAME(CHAN), "channel",
69320c794b3Sgavinm 		    TOPO_PROP_IMMUTABLE, i == 0 ? "A" : "B", &err);
69420c794b3Sgavinm 	}
695b7d3956bSstephh 	if (pfmri)
696b7d3956bSstephh 		nvlist_free(pfmri);
69720c794b3Sgavinm 
69820c794b3Sgavinm 	return (nerr == 0 ? 0 : -1);
69920c794b3Sgavinm }
70020c794b3Sgavinm 
70120c794b3Sgavinm static int
70220c794b3Sgavinm amd_htconfig(topo_mod_t *mod, tnode_t *cnode, nvlist_t *htnvl)
70320c794b3Sgavinm {
70420c794b3Sgavinm 	nvpair_t *nvp;
70520c794b3Sgavinm 	int nerr = 0;
70620c794b3Sgavinm 
70720c794b3Sgavinm 	if (strcmp(topo_node_name(cnode), CHIP_NODE_NAME) != 0) {
70820c794b3Sgavinm 		whinge(mod, &nerr, "amd_htconfig: must pass a chip node!");
70920c794b3Sgavinm 		return (-1);
71020c794b3Sgavinm 	}
71120c794b3Sgavinm 
71220c794b3Sgavinm 	for (nvp = nvlist_next_nvpair(htnvl, NULL); nvp != NULL;
71320c794b3Sgavinm 	    nvp = nvlist_next_nvpair(htnvl, nvp)) {
71420c794b3Sgavinm 		if (nvprop_add(mod, nvp, PGNAME(CHIP), cnode) != 0)
71520c794b3Sgavinm 			nerr++;
71620c794b3Sgavinm 	}
71720c794b3Sgavinm 
71820c794b3Sgavinm 	return (nerr == 0 ? 0 : -1);
71920c794b3Sgavinm }
72020c794b3Sgavinm 
72120c794b3Sgavinm void
722*074bb90dSTom Pothier amd_mc_create(topo_mod_t *mod, uint16_t smbid, tnode_t *pnode, const char *name,
723*074bb90dSTom Pothier     nvlist_t *auth, int family, int model, int stepping, int *nerrp)
72420c794b3Sgavinm {
72520c794b3Sgavinm 	tnode_t *mcnode;
72620c794b3Sgavinm 	nvlist_t *fmri;
72720c794b3Sgavinm 	nvpair_t *nvp;
72820c794b3Sgavinm 	nvlist_t *mc = NULL;
7291db96d3bSCheng Sean Ye 	int i, err;
730*074bb90dSTom Pothier 	char *serial = NULL;
731*074bb90dSTom Pothier 	char *part = NULL;
732*074bb90dSTom Pothier 	char *rev = NULL;
73320c794b3Sgavinm 
73420c794b3Sgavinm 	/*
73520c794b3Sgavinm 	 * Return with no error for anything before AMD family 0xf - we
73620c794b3Sgavinm 	 * won't generate even a generic memory topolofy for earlier
73720c794b3Sgavinm 	 * families.
73820c794b3Sgavinm 	 */
73920c794b3Sgavinm 	if (family < 0xf)
74020c794b3Sgavinm 		return;
74120c794b3Sgavinm 
742*074bb90dSTom Pothier 	if (FM_AWARE_SMBIOS(mod)) {
743*074bb90dSTom Pothier 		(void) topo_node_resource(pnode, &fmri, &err);
744*074bb90dSTom Pothier 		(void) nvlist_lookup_string(fmri, "serial", &serial);
745*074bb90dSTom Pothier 		(void) nvlist_lookup_string(fmri, "part", &part);
746*074bb90dSTom Pothier 		(void) nvlist_lookup_string(fmri, "revision", &rev);
747*074bb90dSTom Pothier 	}
748*074bb90dSTom Pothier 
74920c794b3Sgavinm 	if (mkrsrc(mod, pnode, name, 0, auth, &fmri) != 0) {
75020c794b3Sgavinm 		whinge(mod, nerrp, "mc_create: mkrsrc failed\n");
75120c794b3Sgavinm 		return;
75220c794b3Sgavinm 	}
75320c794b3Sgavinm 
75420c794b3Sgavinm 	if (topo_node_range_create(mod, pnode, name, 0, 0) < 0) {
75520c794b3Sgavinm 		nvlist_free(fmri);
75620c794b3Sgavinm 		whinge(mod, nerrp, "mc_create: node range create failed\n");
75720c794b3Sgavinm 		return;
75820c794b3Sgavinm 	}
75920c794b3Sgavinm 
760*074bb90dSTom Pothier 	if (FM_AWARE_SMBIOS(mod)) {
761*074bb90dSTom Pothier 		(void) nvlist_add_string(fmri, "serial", serial);
762*074bb90dSTom Pothier 		(void) nvlist_add_string(fmri, "part", part);
763*074bb90dSTom Pothier 		(void) nvlist_add_string(fmri, "revision", rev);
764*074bb90dSTom Pothier 	}
765*074bb90dSTom Pothier 
76620c794b3Sgavinm 	if ((mcnode = topo_node_bind(mod, pnode, name, 0,
76720c794b3Sgavinm 	    fmri)) == NULL) {
76820c794b3Sgavinm 		nvlist_free(mc);
76920c794b3Sgavinm 		topo_node_range_destroy(pnode, name);
77020c794b3Sgavinm 		nvlist_free(fmri);
77120c794b3Sgavinm 		whinge(mod, nerrp, "mc_create: mc bind failed\n");
77220c794b3Sgavinm 		return;
77320c794b3Sgavinm 	}
7741db96d3bSCheng Sean Ye 	if (topo_node_fru_set(mcnode, NULL, 0, &err) < 0)
7751db96d3bSCheng Sean Ye 		whinge(mod, nerrp, "mc_create: topo_node_fru_set failed\n");
7761db96d3bSCheng Sean Ye 
777*074bb90dSTom Pothier 	if (FM_AWARE_SMBIOS(mod)) {
778*074bb90dSTom Pothier 		if (topo_node_label_set(mcnode, NULL, &err) == -1)
779*074bb90dSTom Pothier 			topo_mod_dprintf(mod, "Failed to set label\n");
780*074bb90dSTom Pothier 	}
781*074bb90dSTom Pothier 
78220c794b3Sgavinm 	nvlist_free(fmri);
78320c794b3Sgavinm 
78420c794b3Sgavinm 	if ((mc = amd_lookup_by_mcid(mod, topo_node_instance(pnode))) == NULL) {
78520c794b3Sgavinm 		/*
78620c794b3Sgavinm 		 * If a memory-controller driver exists for this chip model
78720c794b3Sgavinm 		 * it has not attached or has otherwise malfunctioned;
78820c794b3Sgavinm 		 * alternatively no memory-controller driver exists for this
78920c794b3Sgavinm 		 * (presumably newly-released) cpu model.  We fallback to
79020c794b3Sgavinm 		 * creating a generic maximal topology.
79120c794b3Sgavinm 		 */
792*074bb90dSTom Pothier 		if (amd_generic_mc_create(mod, smbid, pnode, mcnode,
79320c794b3Sgavinm 		    family, model, stepping, auth) != 0)
7941db96d3bSCheng Sean Ye 			whinge(mod, nerrp,
7951db96d3bSCheng Sean Ye 			    "mc_create: amd_generic_mc_create failed\n");
79620c794b3Sgavinm 		return;
79720c794b3Sgavinm 	}
79820c794b3Sgavinm 
79920c794b3Sgavinm 	/*
80020c794b3Sgavinm 	 * Add memory controller properties
80120c794b3Sgavinm 	 */
8021db96d3bSCheng Sean Ye 	if (topo_pgroup_create(mcnode, &mc_pgroup, &err) < 0)
8031db96d3bSCheng Sean Ye 		whinge(mod, nerrp, "mc_create: topo_pgroup_create failed\n");
80420c794b3Sgavinm 
80520c794b3Sgavinm 	for (nvp = nvlist_next_nvpair(mc, NULL); nvp != NULL;
80620c794b3Sgavinm 	    nvp = nvlist_next_nvpair(mc, nvp)) {
80720c794b3Sgavinm 		char *name = nvpair_name(nvp);
80820c794b3Sgavinm 		data_type_t type = nvpair_type(nvp);
80920c794b3Sgavinm 
81020c794b3Sgavinm 		if (type == DATA_TYPE_NVLIST_ARRAY &&
81120c794b3Sgavinm 		    (strcmp(name, "cslist") == 0 ||
81220c794b3Sgavinm 		    strcmp(name, "dimmlist") == 0)) {
81320c794b3Sgavinm 			continue;
81420c794b3Sgavinm 		} else if (type == DATA_TYPE_UINT8 &&
81520c794b3Sgavinm 		    strcmp(name, MC_NVLIST_VERSTR) == 0) {
81620c794b3Sgavinm 			continue;
81720c794b3Sgavinm 		} else if (type == DATA_TYPE_NVLIST &&
81820c794b3Sgavinm 		    strcmp(name, "htconfig") == 0) {
81920c794b3Sgavinm 			nvlist_t *htnvl;
82020c794b3Sgavinm 
82120c794b3Sgavinm 			(void) nvpair_value_nvlist(nvp, &htnvl);
82220c794b3Sgavinm 			if (amd_htconfig(mod, pnode, htnvl) != 0)
8231db96d3bSCheng Sean Ye 				whinge(mod, nerrp,
8241db96d3bSCheng Sean Ye 				    "mc_create: amd_htconfig failed\n");
82520c794b3Sgavinm 		} else {
82620c794b3Sgavinm 			if (nvprop_add(mod, nvp, PGNAME(MCT), mcnode) != 0)
8271db96d3bSCheng Sean Ye 				whinge(mod, nerrp,
8281db96d3bSCheng Sean Ye 				    "mc_create: nvprop_add failed\n");
82920c794b3Sgavinm 		}
83020c794b3Sgavinm 	}
83120c794b3Sgavinm 
83220c794b3Sgavinm 	if (amd_dramchan_create(mod, mcnode, CHAN_NODE_NAME, auth) != 0 ||
83320c794b3Sgavinm 	    amd_cs_create(mod, mcnode, CS_NODE_NAME, mc, auth) != 0 ||
834*074bb90dSTom Pothier 	    amd_dimm_create(mod, smbid, mcnode, DIMM_NODE_NAME, mc, auth) != 0)
8351db96d3bSCheng Sean Ye 		whinge(mod, nerrp, "mc_create: create children failed\n");
83620c794b3Sgavinm 
83720c794b3Sgavinm 	/*
83820c794b3Sgavinm 	 * Free the fmris for the chip-selects allocated in amd_cs_create
83920c794b3Sgavinm 	 */
84020c794b3Sgavinm 	for (i = 0; i < MC_CHIP_NCS; i++) {
84120c794b3Sgavinm 		if (cs_fmri[i] != NULL) {
84220c794b3Sgavinm 			nvlist_free(cs_fmri[i]);
84320c794b3Sgavinm 			cs_fmri[i] = NULL;
84420c794b3Sgavinm 		}
84520c794b3Sgavinm 	}
84620c794b3Sgavinm 
84720c794b3Sgavinm 	nvlist_free(mc);
84820c794b3Sgavinm }
849