17c478bd9Sstevel@tonic-gate /* rtl8139.c - etherboot driver for the Realtek 8139 chipset
27c478bd9Sstevel@tonic-gate
37c478bd9Sstevel@tonic-gate ported from the linux driver written by Donald Becker
47c478bd9Sstevel@tonic-gate by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
57c478bd9Sstevel@tonic-gate
67c478bd9Sstevel@tonic-gate This software may be used and distributed according to the terms
77c478bd9Sstevel@tonic-gate of the GNU Public License, incorporated herein by reference.
87c478bd9Sstevel@tonic-gate
97c478bd9Sstevel@tonic-gate changes to the original driver:
107c478bd9Sstevel@tonic-gate - removed support for interrupts, switching to polling mode (yuck!)
117c478bd9Sstevel@tonic-gate - removed support for the 8129 chip (external MII)
127c478bd9Sstevel@tonic-gate
137c478bd9Sstevel@tonic-gate */
147c478bd9Sstevel@tonic-gate
157c478bd9Sstevel@tonic-gate /*********************************************************************/
167c478bd9Sstevel@tonic-gate /* Revision History */
177c478bd9Sstevel@tonic-gate /*********************************************************************/
187c478bd9Sstevel@tonic-gate
197c478bd9Sstevel@tonic-gate /*
207c478bd9Sstevel@tonic-gate 28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
217c478bd9Sstevel@tonic-gate Put in virt_to_bus calls to allow Etherboot relocation.
227c478bd9Sstevel@tonic-gate
237c478bd9Sstevel@tonic-gate 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
247c478bd9Sstevel@tonic-gate Following email from Hyun-Joon Cha, added a disable routine, otherwise
257c478bd9Sstevel@tonic-gate NIC remains live and can crash the kernel later.
267c478bd9Sstevel@tonic-gate
277c478bd9Sstevel@tonic-gate 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
287c478bd9Sstevel@tonic-gate Shuffled things around, removed the leftovers from the 8129 support
297c478bd9Sstevel@tonic-gate that was in the Linux driver and added a bit more 8139 definitions.
307c478bd9Sstevel@tonic-gate Moved the 8K receive buffer to a fixed, available address outside the
317c478bd9Sstevel@tonic-gate 0x98000-0x9ffff range. This is a bit of a hack, but currently the only
327c478bd9Sstevel@tonic-gate way to make room for the Etherboot features that need substantial amounts
337c478bd9Sstevel@tonic-gate of code like the ANSI console support. Currently the buffer is just below
347c478bd9Sstevel@tonic-gate 0x10000, so this even conforms to the tagged boot image specification,
357c478bd9Sstevel@tonic-gate which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
367c478bd9Sstevel@tonic-gate interpretation of this "reserved" is that Etherboot may do whatever it
377c478bd9Sstevel@tonic-gate likes, as long as its environment is kept intact (like the BIOS
387c478bd9Sstevel@tonic-gate variables). Hopefully fixed rtl_poll() once and for all. The symptoms
397c478bd9Sstevel@tonic-gate were that if Etherboot was left at the boot menu for several minutes, the
407c478bd9Sstevel@tonic-gate first eth_poll failed. Seems like I am the only person who does this.
417c478bd9Sstevel@tonic-gate First of all I fixed the debugging code and then set out for a long bug
427c478bd9Sstevel@tonic-gate hunting session. It took me about a week full time work - poking around
437c478bd9Sstevel@tonic-gate various places in the driver, reading Don Becker's and Jeff Garzik's Linux
447c478bd9Sstevel@tonic-gate driver and even the FreeBSD driver (what a piece of crap!) - and
457c478bd9Sstevel@tonic-gate eventually spotted the nasty thing: the transmit routine was acknowledging
467c478bd9Sstevel@tonic-gate each and every interrupt pending, including the RxOverrun and RxFIFIOver
477c478bd9Sstevel@tonic-gate interrupts. This confused the RTL8139 thoroughly. It destroyed the
487c478bd9Sstevel@tonic-gate Rx ring contents by dumping the 2K FIFO contents right where we wanted to
497c478bd9Sstevel@tonic-gate get the next packet. Oh well, what fun.
507c478bd9Sstevel@tonic-gate
517c478bd9Sstevel@tonic-gate 18 Jan 2000 mdc@thinguin.org (Marty Connor)
527c478bd9Sstevel@tonic-gate Drastically simplified error handling. Basically, if any error
537c478bd9Sstevel@tonic-gate in transmission or reception occurs, the card is reset.
547c478bd9Sstevel@tonic-gate Also, pointed all transmit descriptors to the same buffer to
557c478bd9Sstevel@tonic-gate save buffer space. This should decrease driver size and avoid
567c478bd9Sstevel@tonic-gate corruption because of exceeding 32K during runtime.
577c478bd9Sstevel@tonic-gate
587c478bd9Sstevel@tonic-gate 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
597c478bd9Sstevel@tonic-gate rtl_poll was quite broken: it used the RxOK interrupt flag instead
607c478bd9Sstevel@tonic-gate of the RxBufferEmpty flag which often resulted in very bad
617c478bd9Sstevel@tonic-gate transmission performace - below 1kBytes/s.
627c478bd9Sstevel@tonic-gate
637c478bd9Sstevel@tonic-gate */
647c478bd9Sstevel@tonic-gate
657c478bd9Sstevel@tonic-gate #include "etherboot.h"
667c478bd9Sstevel@tonic-gate #include "nic.h"
677c478bd9Sstevel@tonic-gate #include "pci.h"
687c478bd9Sstevel@tonic-gate #include "timer.h"
697c478bd9Sstevel@tonic-gate
707c478bd9Sstevel@tonic-gate #define RTL_TIMEOUT (1*TICKS_PER_SEC)
717c478bd9Sstevel@tonic-gate
727c478bd9Sstevel@tonic-gate /* PCI Tuning Parameters
737c478bd9Sstevel@tonic-gate Threshold is bytes transferred to chip before transmission starts. */
747c478bd9Sstevel@tonic-gate #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
757c478bd9Sstevel@tonic-gate #define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
767c478bd9Sstevel@tonic-gate #define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
777c478bd9Sstevel@tonic-gate #define TX_DMA_BURST 4 /* Calculate as 16<<val. */
787c478bd9Sstevel@tonic-gate #define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */
797c478bd9Sstevel@tonic-gate #define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */
807c478bd9Sstevel@tonic-gate #define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
817c478bd9Sstevel@tonic-gate #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
827c478bd9Sstevel@tonic-gate
837c478bd9Sstevel@tonic-gate #undef DEBUG_TX
847c478bd9Sstevel@tonic-gate #undef DEBUG_RX
857c478bd9Sstevel@tonic-gate
867c478bd9Sstevel@tonic-gate /* Symbolic offsets to registers. */
877c478bd9Sstevel@tonic-gate enum RTL8139_registers {
887c478bd9Sstevel@tonic-gate MAC0=0, /* Ethernet hardware address. */
897c478bd9Sstevel@tonic-gate MAR0=8, /* Multicast filter. */
907c478bd9Sstevel@tonic-gate TxStatus0=0x10, /* Transmit status (four 32bit registers). */
917c478bd9Sstevel@tonic-gate TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
927c478bd9Sstevel@tonic-gate RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
937c478bd9Sstevel@tonic-gate ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
947c478bd9Sstevel@tonic-gate IntrMask=0x3C, IntrStatus=0x3E,
957c478bd9Sstevel@tonic-gate TxConfig=0x40, RxConfig=0x44,
967c478bd9Sstevel@tonic-gate Timer=0x48, /* general-purpose counter. */
977c478bd9Sstevel@tonic-gate RxMissed=0x4C, /* 24 bits valid, write clears. */
987c478bd9Sstevel@tonic-gate Cfg9346=0x50, Config0=0x51, Config1=0x52,
997c478bd9Sstevel@tonic-gate TimerIntrReg=0x54, /* intr if gp counter reaches this value */
1007c478bd9Sstevel@tonic-gate MediaStatus=0x58,
1017c478bd9Sstevel@tonic-gate Config3=0x59,
1027c478bd9Sstevel@tonic-gate MultiIntr=0x5C,
1037c478bd9Sstevel@tonic-gate RevisionID=0x5E, /* revision of the RTL8139 chip */
1047c478bd9Sstevel@tonic-gate TxSummary=0x60,
1057c478bd9Sstevel@tonic-gate MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
1067c478bd9Sstevel@tonic-gate NWayExpansion=0x6A,
1077c478bd9Sstevel@tonic-gate DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
1087c478bd9Sstevel@tonic-gate NWayTestReg=0x70,
1097c478bd9Sstevel@tonic-gate RxCnt=0x72, /* packet received counter */
1107c478bd9Sstevel@tonic-gate CSCR=0x74, /* chip status and configuration register */
1117c478bd9Sstevel@tonic-gate PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
1127c478bd9Sstevel@tonic-gate /* from 0x84 onwards are a number of power management/wakeup frame
1137c478bd9Sstevel@tonic-gate * definitions we will probably never need to know about. */
1147c478bd9Sstevel@tonic-gate };
1157c478bd9Sstevel@tonic-gate
1167c478bd9Sstevel@tonic-gate enum RxEarlyStatusBits {
1177c478bd9Sstevel@tonic-gate ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
1187c478bd9Sstevel@tonic-gate };
1197c478bd9Sstevel@tonic-gate
1207c478bd9Sstevel@tonic-gate enum ChipCmdBits {
1217c478bd9Sstevel@tonic-gate CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
1227c478bd9Sstevel@tonic-gate
1237c478bd9Sstevel@tonic-gate enum IntrMaskBits {
1247c478bd9Sstevel@tonic-gate SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
1257c478bd9Sstevel@tonic-gate FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
1267c478bd9Sstevel@tonic-gate TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
1277c478bd9Sstevel@tonic-gate };
1287c478bd9Sstevel@tonic-gate
1297c478bd9Sstevel@tonic-gate /* Interrupt register bits, using my own meaningful names. */
1307c478bd9Sstevel@tonic-gate enum IntrStatusBits {
1317c478bd9Sstevel@tonic-gate PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
1327c478bd9Sstevel@tonic-gate RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
1337c478bd9Sstevel@tonic-gate TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
1347c478bd9Sstevel@tonic-gate };
1357c478bd9Sstevel@tonic-gate enum TxStatusBits {
1367c478bd9Sstevel@tonic-gate TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
1377c478bd9Sstevel@tonic-gate TxOutOfWindow=0x20000000, TxAborted=0x40000000,
1387c478bd9Sstevel@tonic-gate TxCarrierLost=0x80000000,
1397c478bd9Sstevel@tonic-gate };
1407c478bd9Sstevel@tonic-gate enum RxStatusBits {
1417c478bd9Sstevel@tonic-gate RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
1427c478bd9Sstevel@tonic-gate RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
1437c478bd9Sstevel@tonic-gate RxBadAlign=0x0002, RxStatusOK=0x0001,
1447c478bd9Sstevel@tonic-gate };
1457c478bd9Sstevel@tonic-gate
1467c478bd9Sstevel@tonic-gate enum MediaStatusBits {
1477c478bd9Sstevel@tonic-gate MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
1487c478bd9Sstevel@tonic-gate MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
1497c478bd9Sstevel@tonic-gate };
1507c478bd9Sstevel@tonic-gate
1517c478bd9Sstevel@tonic-gate enum MIIBMCRBits {
1527c478bd9Sstevel@tonic-gate BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
1537c478bd9Sstevel@tonic-gate BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
1547c478bd9Sstevel@tonic-gate };
1557c478bd9Sstevel@tonic-gate
1567c478bd9Sstevel@tonic-gate enum CSCRBits {
1577c478bd9Sstevel@tonic-gate CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
1587c478bd9Sstevel@tonic-gate CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
1597c478bd9Sstevel@tonic-gate CSCR_LinkDownCmd=0x0f3c0,
1607c478bd9Sstevel@tonic-gate };
1617c478bd9Sstevel@tonic-gate
1627c478bd9Sstevel@tonic-gate /* Bits in RxConfig. */
1637c478bd9Sstevel@tonic-gate enum rx_mode_bits {
1647c478bd9Sstevel@tonic-gate RxCfgWrap=0x80,
1657c478bd9Sstevel@tonic-gate AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
1667c478bd9Sstevel@tonic-gate AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
1677c478bd9Sstevel@tonic-gate };
1687c478bd9Sstevel@tonic-gate
1697c478bd9Sstevel@tonic-gate static unsigned int cur_rx,cur_tx;
1707c478bd9Sstevel@tonic-gate
1717c478bd9Sstevel@tonic-gate /* The RTL8139 can only transmit from a contiguous, aligned memory block. */
1727c478bd9Sstevel@tonic-gate static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
1737c478bd9Sstevel@tonic-gate static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
1747c478bd9Sstevel@tonic-gate
1757c478bd9Sstevel@tonic-gate static int rtl8139_probe(struct dev *dev, struct pci_device *pci);
1767c478bd9Sstevel@tonic-gate static int read_eeprom(struct nic *nic, int location, int addr_len);
1777c478bd9Sstevel@tonic-gate static void rtl_reset(struct nic *nic);
1787c478bd9Sstevel@tonic-gate static void rtl_transmit(struct nic *nic, const char *destaddr,
1797c478bd9Sstevel@tonic-gate unsigned int type, unsigned int len, const char *data);
1807c478bd9Sstevel@tonic-gate static int rtl_poll(struct nic *nic, int retrieve);
1817c478bd9Sstevel@tonic-gate static void rtl_disable(struct dev *);
1827c478bd9Sstevel@tonic-gate static void rtl_irq(struct nic *nic, irq_action_t action);
1837c478bd9Sstevel@tonic-gate
1847c478bd9Sstevel@tonic-gate
rtl8139_probe(struct dev * dev,struct pci_device * pci)1857c478bd9Sstevel@tonic-gate static int rtl8139_probe(struct dev *dev, struct pci_device *pci)
1867c478bd9Sstevel@tonic-gate {
1877c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *)dev;
1887c478bd9Sstevel@tonic-gate int i;
1897c478bd9Sstevel@tonic-gate int speed10, fullduplex;
1907c478bd9Sstevel@tonic-gate int addr_len;
1917c478bd9Sstevel@tonic-gate unsigned short *ap = (unsigned short*)nic->node_addr;
1927c478bd9Sstevel@tonic-gate
1937c478bd9Sstevel@tonic-gate /* There are enough "RTL8139" strings on the console already, so
1947c478bd9Sstevel@tonic-gate * be brief and concentrate on the interesting pieces of info... */
1957c478bd9Sstevel@tonic-gate printf(" - ");
1967c478bd9Sstevel@tonic-gate
1977c478bd9Sstevel@tonic-gate /* Mask the bit that says "this is an io addr" */
1987c478bd9Sstevel@tonic-gate nic->ioaddr = pci->ioaddr & ~3;
1997c478bd9Sstevel@tonic-gate
2007c478bd9Sstevel@tonic-gate /* Copy IRQ from PCI information */
2017c478bd9Sstevel@tonic-gate nic->irqno = pci->irq;
2027c478bd9Sstevel@tonic-gate
2037c478bd9Sstevel@tonic-gate adjust_pci_device(pci);
2047c478bd9Sstevel@tonic-gate
2057c478bd9Sstevel@tonic-gate /* Bring the chip out of low-power mode. */
2067c478bd9Sstevel@tonic-gate outb(0x00, nic->ioaddr + Config1);
2077c478bd9Sstevel@tonic-gate
2087c478bd9Sstevel@tonic-gate addr_len = read_eeprom(nic,0,8) == 0x8129 ? 8 : 6;
2097c478bd9Sstevel@tonic-gate for (i = 0; i < 3; i++)
2107c478bd9Sstevel@tonic-gate *ap++ = read_eeprom(nic,i + 7,addr_len);
2117c478bd9Sstevel@tonic-gate
2127c478bd9Sstevel@tonic-gate speed10 = inb(nic->ioaddr + MediaStatus) & MSRSpeed10;
2137c478bd9Sstevel@tonic-gate fullduplex = inw(nic->ioaddr + MII_BMCR) & BMCRDuplex;
2147c478bd9Sstevel@tonic-gate printf("ioaddr %#hX, irq %d, addr %! %sMbps %s-duplex\n", nic->ioaddr,
2157c478bd9Sstevel@tonic-gate nic->irqno, nic->node_addr, speed10 ? "10" : "100",
2167c478bd9Sstevel@tonic-gate fullduplex ? "full" : "half");
2177c478bd9Sstevel@tonic-gate
2187c478bd9Sstevel@tonic-gate rtl_reset(nic);
2197c478bd9Sstevel@tonic-gate
2207c478bd9Sstevel@tonic-gate if (inb(nic->ioaddr + MediaStatus) & MSRLinkFail) {
2217c478bd9Sstevel@tonic-gate printf("Cable not connected or other link failure\n");
2227c478bd9Sstevel@tonic-gate return(0);
2237c478bd9Sstevel@tonic-gate }
2247c478bd9Sstevel@tonic-gate
2257c478bd9Sstevel@tonic-gate dev->disable = rtl_disable;
2267c478bd9Sstevel@tonic-gate nic->poll = rtl_poll;
2277c478bd9Sstevel@tonic-gate nic->transmit = rtl_transmit;
2287c478bd9Sstevel@tonic-gate nic->irq = rtl_irq;
2297c478bd9Sstevel@tonic-gate
2307c478bd9Sstevel@tonic-gate return 1;
2317c478bd9Sstevel@tonic-gate }
2327c478bd9Sstevel@tonic-gate
2337c478bd9Sstevel@tonic-gate /* Serial EEPROM section. */
2347c478bd9Sstevel@tonic-gate
2357c478bd9Sstevel@tonic-gate /* EEPROM_Ctrl bits. */
2367c478bd9Sstevel@tonic-gate #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
2377c478bd9Sstevel@tonic-gate #define EE_CS 0x08 /* EEPROM chip select. */
2387c478bd9Sstevel@tonic-gate #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
2397c478bd9Sstevel@tonic-gate #define EE_WRITE_0 0x00
2407c478bd9Sstevel@tonic-gate #define EE_WRITE_1 0x02
2417c478bd9Sstevel@tonic-gate #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
2427c478bd9Sstevel@tonic-gate #define EE_ENB (0x80 | EE_CS)
2437c478bd9Sstevel@tonic-gate
2447c478bd9Sstevel@tonic-gate /*
2457c478bd9Sstevel@tonic-gate Delay between EEPROM clock transitions.
2467c478bd9Sstevel@tonic-gate No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
2477c478bd9Sstevel@tonic-gate */
2487c478bd9Sstevel@tonic-gate
2497c478bd9Sstevel@tonic-gate #define eeprom_delay() inl(ee_addr)
2507c478bd9Sstevel@tonic-gate
2517c478bd9Sstevel@tonic-gate /* The EEPROM commands include the alway-set leading bit. */
2527c478bd9Sstevel@tonic-gate #define EE_WRITE_CMD (5)
2537c478bd9Sstevel@tonic-gate #define EE_READ_CMD (6)
2547c478bd9Sstevel@tonic-gate #define EE_ERASE_CMD (7)
2557c478bd9Sstevel@tonic-gate
read_eeprom(struct nic * nic,int location,int addr_len)2567c478bd9Sstevel@tonic-gate static int read_eeprom(struct nic *nic, int location, int addr_len)
2577c478bd9Sstevel@tonic-gate {
2587c478bd9Sstevel@tonic-gate int i;
2597c478bd9Sstevel@tonic-gate unsigned int retval = 0;
2607c478bd9Sstevel@tonic-gate long ee_addr = nic->ioaddr + Cfg9346;
2617c478bd9Sstevel@tonic-gate int read_cmd = location | (EE_READ_CMD << addr_len);
2627c478bd9Sstevel@tonic-gate
2637c478bd9Sstevel@tonic-gate outb(EE_ENB & ~EE_CS, ee_addr);
2647c478bd9Sstevel@tonic-gate outb(EE_ENB, ee_addr);
2657c478bd9Sstevel@tonic-gate eeprom_delay();
2667c478bd9Sstevel@tonic-gate
2677c478bd9Sstevel@tonic-gate /* Shift the read command bits out. */
2687c478bd9Sstevel@tonic-gate for (i = 4 + addr_len; i >= 0; i--) {
2697c478bd9Sstevel@tonic-gate int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
2707c478bd9Sstevel@tonic-gate outb(EE_ENB | dataval, ee_addr);
2717c478bd9Sstevel@tonic-gate eeprom_delay();
2727c478bd9Sstevel@tonic-gate outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
2737c478bd9Sstevel@tonic-gate eeprom_delay();
2747c478bd9Sstevel@tonic-gate }
2757c478bd9Sstevel@tonic-gate outb(EE_ENB, ee_addr);
2767c478bd9Sstevel@tonic-gate eeprom_delay();
2777c478bd9Sstevel@tonic-gate
2787c478bd9Sstevel@tonic-gate for (i = 16; i > 0; i--) {
2797c478bd9Sstevel@tonic-gate outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
2807c478bd9Sstevel@tonic-gate eeprom_delay();
2817c478bd9Sstevel@tonic-gate retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
2827c478bd9Sstevel@tonic-gate outb(EE_ENB, ee_addr);
2837c478bd9Sstevel@tonic-gate eeprom_delay();
2847c478bd9Sstevel@tonic-gate }
2857c478bd9Sstevel@tonic-gate
2867c478bd9Sstevel@tonic-gate /* Terminate the EEPROM access. */
2877c478bd9Sstevel@tonic-gate outb(~EE_CS, ee_addr);
2887c478bd9Sstevel@tonic-gate eeprom_delay();
2897c478bd9Sstevel@tonic-gate return retval;
2907c478bd9Sstevel@tonic-gate }
2917c478bd9Sstevel@tonic-gate
2927c478bd9Sstevel@tonic-gate static const unsigned int rtl8139_rx_config =
2937c478bd9Sstevel@tonic-gate (RX_BUF_LEN_IDX << 11) |
2947c478bd9Sstevel@tonic-gate (RX_FIFO_THRESH << 13) |
2957c478bd9Sstevel@tonic-gate (RX_DMA_BURST << 8);
2967c478bd9Sstevel@tonic-gate
set_rx_mode(struct nic * nic)2977c478bd9Sstevel@tonic-gate static void set_rx_mode(struct nic *nic) {
2987c478bd9Sstevel@tonic-gate unsigned int mc_filter[2];
2997c478bd9Sstevel@tonic-gate int rx_mode;
3007c478bd9Sstevel@tonic-gate /* !IFF_PROMISC */
3017c478bd9Sstevel@tonic-gate rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
3027c478bd9Sstevel@tonic-gate mc_filter[1] = mc_filter[0] = 0xffffffff;
3037c478bd9Sstevel@tonic-gate
3047c478bd9Sstevel@tonic-gate outl(rtl8139_rx_config | rx_mode, nic->ioaddr + RxConfig);
3057c478bd9Sstevel@tonic-gate
3067c478bd9Sstevel@tonic-gate outl(mc_filter[0], nic->ioaddr + MAR0 + 0);
3077c478bd9Sstevel@tonic-gate outl(mc_filter[1], nic->ioaddr + MAR0 + 4);
3087c478bd9Sstevel@tonic-gate }
3097c478bd9Sstevel@tonic-gate
rtl_reset(struct nic * nic)3107c478bd9Sstevel@tonic-gate static void rtl_reset(struct nic* nic)
3117c478bd9Sstevel@tonic-gate {
3127c478bd9Sstevel@tonic-gate int i;
3137c478bd9Sstevel@tonic-gate
3147c478bd9Sstevel@tonic-gate outb(CmdReset, nic->ioaddr + ChipCmd);
3157c478bd9Sstevel@tonic-gate
3167c478bd9Sstevel@tonic-gate cur_rx = 0;
3177c478bd9Sstevel@tonic-gate cur_tx = 0;
3187c478bd9Sstevel@tonic-gate
3197c478bd9Sstevel@tonic-gate /* Give the chip 10ms to finish the reset. */
3207c478bd9Sstevel@tonic-gate load_timer2(10*TICKS_PER_MS);
3217c478bd9Sstevel@tonic-gate while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 &&
3227c478bd9Sstevel@tonic-gate timer2_running())
3237c478bd9Sstevel@tonic-gate /* wait */;
3247c478bd9Sstevel@tonic-gate
3257c478bd9Sstevel@tonic-gate for (i = 0; i < ETH_ALEN; i++)
3267c478bd9Sstevel@tonic-gate outb(nic->node_addr[i], nic->ioaddr + MAC0 + i);
3277c478bd9Sstevel@tonic-gate
3287c478bd9Sstevel@tonic-gate /* Must enable Tx/Rx before setting transfer thresholds! */
3297c478bd9Sstevel@tonic-gate outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
3307c478bd9Sstevel@tonic-gate outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8),
3317c478bd9Sstevel@tonic-gate nic->ioaddr + RxConfig); /* accept no frames yet! */
3327c478bd9Sstevel@tonic-gate outl((TX_DMA_BURST<<8)|0x03000000, nic->ioaddr + TxConfig);
3337c478bd9Sstevel@tonic-gate
3347c478bd9Sstevel@tonic-gate /* The Linux driver changes Config1 here to use a different LED pattern
3357c478bd9Sstevel@tonic-gate * for half duplex or full/autodetect duplex (for full/autodetect, the
3367c478bd9Sstevel@tonic-gate * outputs are TX/RX, Link10/100, FULL, while for half duplex it uses
3377c478bd9Sstevel@tonic-gate * TX/RX, Link100, Link10). This is messy, because it doesn't match
3387c478bd9Sstevel@tonic-gate * the inscription on the mounting bracket. It should not be changed
3397c478bd9Sstevel@tonic-gate * from the configuration EEPROM default, because the card manufacturer
3407c478bd9Sstevel@tonic-gate * should have set that to match the card. */
3417c478bd9Sstevel@tonic-gate
3427c478bd9Sstevel@tonic-gate #ifdef DEBUG_RX
3437c478bd9Sstevel@tonic-gate printf("rx ring address is %X\n",(unsigned long)rx_ring);
3447c478bd9Sstevel@tonic-gate #endif
3457c478bd9Sstevel@tonic-gate outl((unsigned long)virt_to_bus(rx_ring), nic->ioaddr + RxBuf);
3467c478bd9Sstevel@tonic-gate
3477c478bd9Sstevel@tonic-gate
3487c478bd9Sstevel@tonic-gate
3497c478bd9Sstevel@tonic-gate /* If we add multicast support, the MAR0 register would have to be
3507c478bd9Sstevel@tonic-gate * initialized to 0xffffffffffffffff (two 32 bit accesses). Etherboot
3517c478bd9Sstevel@tonic-gate * only needs broadcast (for ARP/RARP/BOOTP/DHCP) and unicast. */
3527c478bd9Sstevel@tonic-gate
3537c478bd9Sstevel@tonic-gate outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
3547c478bd9Sstevel@tonic-gate
3557c478bd9Sstevel@tonic-gate outl(rtl8139_rx_config, nic->ioaddr + RxConfig);
3567c478bd9Sstevel@tonic-gate
3577c478bd9Sstevel@tonic-gate /* Start the chip's Tx and Rx process. */
3587c478bd9Sstevel@tonic-gate outl(0, nic->ioaddr + RxMissed);
3597c478bd9Sstevel@tonic-gate
3607c478bd9Sstevel@tonic-gate /* set_rx_mode */
3617c478bd9Sstevel@tonic-gate set_rx_mode(nic);
3627c478bd9Sstevel@tonic-gate
3637c478bd9Sstevel@tonic-gate /* Disable all known interrupts by setting the interrupt mask. */
3647c478bd9Sstevel@tonic-gate outw(0, nic->ioaddr + IntrMask);
3657c478bd9Sstevel@tonic-gate }
3667c478bd9Sstevel@tonic-gate
rtl_transmit(struct nic * nic,const char * destaddr,unsigned int type,unsigned int len,const char * data)3677c478bd9Sstevel@tonic-gate static void rtl_transmit(struct nic *nic, const char *destaddr,
3687c478bd9Sstevel@tonic-gate unsigned int type, unsigned int len, const char *data)
3697c478bd9Sstevel@tonic-gate {
3707c478bd9Sstevel@tonic-gate unsigned int status, to, nstype;
3717c478bd9Sstevel@tonic-gate unsigned long txstatus;
3727c478bd9Sstevel@tonic-gate
3737c478bd9Sstevel@tonic-gate /* nstype assignment moved up here to avoid gcc 3.0.3 compiler bug */
3747c478bd9Sstevel@tonic-gate nstype = htons(type);
3757c478bd9Sstevel@tonic-gate memcpy(tx_buffer, destaddr, ETH_ALEN);
3767c478bd9Sstevel@tonic-gate memcpy(tx_buffer + ETH_ALEN, nic->node_addr, ETH_ALEN);
3777c478bd9Sstevel@tonic-gate memcpy(tx_buffer + 2 * ETH_ALEN, &nstype, 2);
3787c478bd9Sstevel@tonic-gate memcpy(tx_buffer + ETH_HLEN, data, len);
3797c478bd9Sstevel@tonic-gate
3807c478bd9Sstevel@tonic-gate len += ETH_HLEN;
3817c478bd9Sstevel@tonic-gate #ifdef DEBUG_TX
3827c478bd9Sstevel@tonic-gate printf("sending %d bytes ethtype %hX\n", len, type);
3837c478bd9Sstevel@tonic-gate #endif
3847c478bd9Sstevel@tonic-gate
3857c478bd9Sstevel@tonic-gate /* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
3867c478bd9Sstevel@tonic-gate * bytes are sent automatically for the FCS, totalling to 64 bytes). */
3877c478bd9Sstevel@tonic-gate while (len < ETH_ZLEN) {
3887c478bd9Sstevel@tonic-gate tx_buffer[len++] = '\0';
3897c478bd9Sstevel@tonic-gate }
3907c478bd9Sstevel@tonic-gate
3917c478bd9Sstevel@tonic-gate outl((unsigned long)virt_to_bus(tx_buffer), nic->ioaddr + TxAddr0 + cur_tx*4);
3927c478bd9Sstevel@tonic-gate outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
3937c478bd9Sstevel@tonic-gate nic->ioaddr + TxStatus0 + cur_tx*4);
3947c478bd9Sstevel@tonic-gate
3957c478bd9Sstevel@tonic-gate to = currticks() + RTL_TIMEOUT;
3967c478bd9Sstevel@tonic-gate
3977c478bd9Sstevel@tonic-gate do {
3987c478bd9Sstevel@tonic-gate status = inw(nic->ioaddr + IntrStatus);
3997c478bd9Sstevel@tonic-gate /* Only acknlowledge interrupt sources we can properly handle
4007c478bd9Sstevel@tonic-gate * here - the RxOverflow/RxFIFOOver MUST be handled in the
4017c478bd9Sstevel@tonic-gate * rtl_poll() function. */
4027c478bd9Sstevel@tonic-gate outw(status & (TxOK | TxErr | PCIErr), nic->ioaddr + IntrStatus);
4037c478bd9Sstevel@tonic-gate if ((status & (TxOK | TxErr | PCIErr)) != 0) break;
4047c478bd9Sstevel@tonic-gate } while (currticks() < to);
4057c478bd9Sstevel@tonic-gate
4067c478bd9Sstevel@tonic-gate txstatus = inl(nic->ioaddr+ TxStatus0 + cur_tx*4);
4077c478bd9Sstevel@tonic-gate
4087c478bd9Sstevel@tonic-gate if (status & TxOK) {
4097c478bd9Sstevel@tonic-gate cur_tx = (cur_tx + 1) % NUM_TX_DESC;
4107c478bd9Sstevel@tonic-gate #ifdef DEBUG_TX
4117c478bd9Sstevel@tonic-gate printf("tx done (%d ticks), status %hX txstatus %X\n",
4127c478bd9Sstevel@tonic-gate to-currticks(), status, txstatus);
4137c478bd9Sstevel@tonic-gate #endif
4147c478bd9Sstevel@tonic-gate } else {
4157c478bd9Sstevel@tonic-gate #ifdef DEBUG_TX
4167c478bd9Sstevel@tonic-gate printf("tx timeout/error (%d ticks), status %hX txstatus %X\n",
4177c478bd9Sstevel@tonic-gate currticks()-to, status, txstatus);
4187c478bd9Sstevel@tonic-gate #endif
4197c478bd9Sstevel@tonic-gate rtl_reset(nic);
4207c478bd9Sstevel@tonic-gate }
4217c478bd9Sstevel@tonic-gate }
4227c478bd9Sstevel@tonic-gate
rtl_poll(struct nic * nic,int retrieve)4237c478bd9Sstevel@tonic-gate static int rtl_poll(struct nic *nic, int retrieve)
4247c478bd9Sstevel@tonic-gate {
4257c478bd9Sstevel@tonic-gate unsigned int status;
4267c478bd9Sstevel@tonic-gate unsigned int ring_offs;
4277c478bd9Sstevel@tonic-gate unsigned int rx_size, rx_status;
4287c478bd9Sstevel@tonic-gate
4297c478bd9Sstevel@tonic-gate if (inb(nic->ioaddr + ChipCmd) & RxBufEmpty) {
4307c478bd9Sstevel@tonic-gate return 0;
4317c478bd9Sstevel@tonic-gate }
4327c478bd9Sstevel@tonic-gate
4337c478bd9Sstevel@tonic-gate /* There is a packet ready */
4347c478bd9Sstevel@tonic-gate if ( ! retrieve ) return 1;
4357c478bd9Sstevel@tonic-gate
4367c478bd9Sstevel@tonic-gate status = inw(nic->ioaddr + IntrStatus);
4377c478bd9Sstevel@tonic-gate /* See below for the rest of the interrupt acknowledges. */
4387c478bd9Sstevel@tonic-gate outw(status & ~(RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
4397c478bd9Sstevel@tonic-gate
4407c478bd9Sstevel@tonic-gate #ifdef DEBUG_RX
4417c478bd9Sstevel@tonic-gate printf("rtl_poll: int %hX ", status);
4427c478bd9Sstevel@tonic-gate #endif
4437c478bd9Sstevel@tonic-gate
4447c478bd9Sstevel@tonic-gate ring_offs = cur_rx % RX_BUF_LEN;
4457c478bd9Sstevel@tonic-gate rx_status = *(unsigned int*)(rx_ring + ring_offs);
4467c478bd9Sstevel@tonic-gate rx_size = rx_status >> 16;
4477c478bd9Sstevel@tonic-gate rx_status &= 0xffff;
4487c478bd9Sstevel@tonic-gate
4497c478bd9Sstevel@tonic-gate if ((rx_status & (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) ||
4507c478bd9Sstevel@tonic-gate (rx_size < ETH_ZLEN) || (rx_size > ETH_FRAME_LEN + 4)) {
4517c478bd9Sstevel@tonic-gate printf("rx error %hX\n", rx_status);
4527c478bd9Sstevel@tonic-gate rtl_reset(nic); /* this clears all interrupts still pending */
4537c478bd9Sstevel@tonic-gate return 0;
4547c478bd9Sstevel@tonic-gate }
4557c478bd9Sstevel@tonic-gate
4567c478bd9Sstevel@tonic-gate /* Received a good packet */
4577c478bd9Sstevel@tonic-gate nic->packetlen = rx_size - 4; /* no one cares about the FCS */
4587c478bd9Sstevel@tonic-gate if (ring_offs+4+rx_size-4 > RX_BUF_LEN) {
4597c478bd9Sstevel@tonic-gate int semi_count = RX_BUF_LEN - ring_offs - 4;
4607c478bd9Sstevel@tonic-gate
4617c478bd9Sstevel@tonic-gate memcpy(nic->packet, rx_ring + ring_offs + 4, semi_count);
4627c478bd9Sstevel@tonic-gate memcpy(nic->packet+semi_count, rx_ring, rx_size-4-semi_count);
4637c478bd9Sstevel@tonic-gate #ifdef DEBUG_RX
4647c478bd9Sstevel@tonic-gate printf("rx packet %d+%d bytes", semi_count,rx_size-4-semi_count);
4657c478bd9Sstevel@tonic-gate #endif
4667c478bd9Sstevel@tonic-gate } else {
4677c478bd9Sstevel@tonic-gate memcpy(nic->packet, rx_ring + ring_offs + 4, nic->packetlen);
4687c478bd9Sstevel@tonic-gate #ifdef DEBUG_RX
4697c478bd9Sstevel@tonic-gate printf("rx packet %d bytes", rx_size-4);
4707c478bd9Sstevel@tonic-gate #endif
4717c478bd9Sstevel@tonic-gate }
4727c478bd9Sstevel@tonic-gate #ifdef DEBUG_RX
4737c478bd9Sstevel@tonic-gate printf(" at %X type %hhX%hhX rxstatus %hX\n",
4747c478bd9Sstevel@tonic-gate (unsigned long)(rx_ring+ring_offs+4),
4757c478bd9Sstevel@tonic-gate nic->packet[12], nic->packet[13], rx_status);
4767c478bd9Sstevel@tonic-gate #endif
4777c478bd9Sstevel@tonic-gate cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
4787c478bd9Sstevel@tonic-gate outw(cur_rx - 16, nic->ioaddr + RxBufPtr);
4797c478bd9Sstevel@tonic-gate /* See RTL8139 Programming Guide V0.1 for the official handling of
4807c478bd9Sstevel@tonic-gate * Rx overflow situations. The document itself contains basically no
4817c478bd9Sstevel@tonic-gate * usable information, except for a few exception handling rules. */
4827c478bd9Sstevel@tonic-gate outw(status & (RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
4837c478bd9Sstevel@tonic-gate return 1;
4847c478bd9Sstevel@tonic-gate }
4857c478bd9Sstevel@tonic-gate
rtl_irq(struct nic * nic,irq_action_t action)4867c478bd9Sstevel@tonic-gate static void rtl_irq(struct nic *nic, irq_action_t action)
4877c478bd9Sstevel@tonic-gate {
4887c478bd9Sstevel@tonic-gate unsigned int mask;
4897c478bd9Sstevel@tonic-gate /* Bit of a guess as to which interrupts we should allow */
4907c478bd9Sstevel@tonic-gate unsigned int interested = ROK | RER | RXOVW | FOVW | SERR;
4917c478bd9Sstevel@tonic-gate
4927c478bd9Sstevel@tonic-gate switch ( action ) {
4937c478bd9Sstevel@tonic-gate case DISABLE :
4947c478bd9Sstevel@tonic-gate case ENABLE :
4957c478bd9Sstevel@tonic-gate mask = inw(nic->ioaddr + IntrMask);
4967c478bd9Sstevel@tonic-gate mask = mask & ~interested;
4977c478bd9Sstevel@tonic-gate if ( action == ENABLE ) mask = mask | interested;
4987c478bd9Sstevel@tonic-gate outw(mask, nic->ioaddr + IntrMask);
4997c478bd9Sstevel@tonic-gate break;
5007c478bd9Sstevel@tonic-gate case FORCE :
5017c478bd9Sstevel@tonic-gate /* Apparently writing a 1 to this read-only bit of a
5027c478bd9Sstevel@tonic-gate * read-only and otherwise unrelated register will
5037c478bd9Sstevel@tonic-gate * force an interrupt. If you ever want to see how
5047c478bd9Sstevel@tonic-gate * not to write a datasheet, read the one for the
5057c478bd9Sstevel@tonic-gate * RTL8139...
5067c478bd9Sstevel@tonic-gate */
5077c478bd9Sstevel@tonic-gate outb(EROK, nic->ioaddr + RxEarlyStatus);
5087c478bd9Sstevel@tonic-gate break;
5097c478bd9Sstevel@tonic-gate }
5107c478bd9Sstevel@tonic-gate }
5117c478bd9Sstevel@tonic-gate
rtl_disable(struct dev * dev)5127c478bd9Sstevel@tonic-gate static void rtl_disable(struct dev *dev)
5137c478bd9Sstevel@tonic-gate {
5147c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *)dev;
5157c478bd9Sstevel@tonic-gate /* merge reset and disable */
5167c478bd9Sstevel@tonic-gate rtl_reset(nic);
5177c478bd9Sstevel@tonic-gate
5187c478bd9Sstevel@tonic-gate /* reset the chip */
5197c478bd9Sstevel@tonic-gate outb(CmdReset, nic->ioaddr + ChipCmd);
5207c478bd9Sstevel@tonic-gate
5217c478bd9Sstevel@tonic-gate /* 10 ms timeout */
5227c478bd9Sstevel@tonic-gate load_timer2(10*TICKS_PER_MS);
5237c478bd9Sstevel@tonic-gate while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
5247c478bd9Sstevel@tonic-gate /* wait */;
5257c478bd9Sstevel@tonic-gate }
5267c478bd9Sstevel@tonic-gate
5277c478bd9Sstevel@tonic-gate static struct pci_id rtl8139_nics[] = {
5287c478bd9Sstevel@tonic-gate PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129"),
5297c478bd9Sstevel@tonic-gate PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139"),
5307c478bd9Sstevel@tonic-gate PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B"),
5317c478bd9Sstevel@tonic-gate PCI_ROM(0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX"),
5327c478bd9Sstevel@tonic-gate PCI_ROM(0x1113, 0x1211, "smc1211-1", "SMC EZ10/100"),
5337c478bd9Sstevel@tonic-gate PCI_ROM(0x1112, 0x1211, "smc1211", "SMC EZ10/100"),
5347c478bd9Sstevel@tonic-gate PCI_ROM(0x1500, 0x1360, "delta8139", "Delta Electronics 8139"),
5357c478bd9Sstevel@tonic-gate PCI_ROM(0x4033, 0x1360, "addtron8139", "Addtron Technology 8139"),
5367c478bd9Sstevel@tonic-gate PCI_ROM(0x1186, 0x1340, "dfe690txd", "D-Link DFE690TXD"),
5377c478bd9Sstevel@tonic-gate PCI_ROM(0x13d1, 0xab06, "fe2000vx", "AboCom FE2000VX"),
5387c478bd9Sstevel@tonic-gate PCI_ROM(0x1259, 0xa117, "allied8139", "Allied Telesyn 8139"),
5397c478bd9Sstevel@tonic-gate PCI_ROM(0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX"),
5407c478bd9Sstevel@tonic-gate PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX"),
5417c478bd9Sstevel@tonic-gate PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139"),
5427c478bd9Sstevel@tonic-gate };
5437c478bd9Sstevel@tonic-gate
5447c478bd9Sstevel@tonic-gate struct pci_driver rtl8139_driver = {
5457c478bd9Sstevel@tonic-gate .type = NIC_DRIVER,
5467c478bd9Sstevel@tonic-gate .name = "RTL8139",
5477c478bd9Sstevel@tonic-gate .probe = rtl8139_probe,
5487c478bd9Sstevel@tonic-gate .ids = rtl8139_nics,
5497c478bd9Sstevel@tonic-gate .id_count = sizeof(rtl8139_nics)/sizeof(rtl8139_nics[0]),
5507c478bd9Sstevel@tonic-gate .class = 0,
5517c478bd9Sstevel@tonic-gate };
552