17c478bd9Sstevel@tonic-gate /**************************************************************************
27c478bd9Sstevel@tonic-gate * forcedeth.c -- Etherboot device driver for the NVIDIA nForce
37c478bd9Sstevel@tonic-gate * media access controllers.
47c478bd9Sstevel@tonic-gate *
57c478bd9Sstevel@tonic-gate * Note: This driver is based on the Linux driver that was based on
67c478bd9Sstevel@tonic-gate * a cleanroom reimplementation which was based on reverse
77c478bd9Sstevel@tonic-gate * engineered documentation written by Carl-Daniel Hailfinger
87c478bd9Sstevel@tonic-gate * and Andrew de Quincey. It's neither supported nor endorsed
97c478bd9Sstevel@tonic-gate * by NVIDIA Corp. Use at your own risk.
107c478bd9Sstevel@tonic-gate *
117c478bd9Sstevel@tonic-gate * Written 2004 by Timothy Legge <tlegge@rogers.com>
127c478bd9Sstevel@tonic-gate *
137c478bd9Sstevel@tonic-gate * This program is free software; you can redistribute it and/or modify
147c478bd9Sstevel@tonic-gate * it under the terms of the GNU General Public License as published by
157c478bd9Sstevel@tonic-gate * the Free Software Foundation; either version 2 of the License, or
167c478bd9Sstevel@tonic-gate * (at your option) any later version.
177c478bd9Sstevel@tonic-gate *
187c478bd9Sstevel@tonic-gate * This program is distributed in the hope that it will be useful,
197c478bd9Sstevel@tonic-gate * but WITHOUT ANY WARRANTY; without even the implied warranty of
207c478bd9Sstevel@tonic-gate * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
217c478bd9Sstevel@tonic-gate * GNU General Public License for more details.
227c478bd9Sstevel@tonic-gate *
237c478bd9Sstevel@tonic-gate * You should have received a copy of the GNU General Public License
247c478bd9Sstevel@tonic-gate * along with this program; if not, write to the Free Software
257c478bd9Sstevel@tonic-gate * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
267c478bd9Sstevel@tonic-gate *
277c478bd9Sstevel@tonic-gate * Portions of this code based on:
287c478bd9Sstevel@tonic-gate * forcedeth: Ethernet driver for NVIDIA nForce media access controllers:
297c478bd9Sstevel@tonic-gate *
307c478bd9Sstevel@tonic-gate * (C) 2003 Manfred Spraul
317c478bd9Sstevel@tonic-gate * See Linux Driver for full information
327c478bd9Sstevel@tonic-gate *
337c478bd9Sstevel@tonic-gate * Linux Driver Version 0.22, 19 Jan 2004
347c478bd9Sstevel@tonic-gate *
357c478bd9Sstevel@tonic-gate *
367c478bd9Sstevel@tonic-gate * REVISION HISTORY:
377c478bd9Sstevel@tonic-gate * ================
387c478bd9Sstevel@tonic-gate * v1.0 01-31-2004 timlegge Initial port of Linux driver
397c478bd9Sstevel@tonic-gate * v1.1 02-03-2004 timlegge Large Clean up, first release
407c478bd9Sstevel@tonic-gate *
417c478bd9Sstevel@tonic-gate * Indent Options: indent -kr -i8
427c478bd9Sstevel@tonic-gate ***************************************************************************/
437c478bd9Sstevel@tonic-gate
447c478bd9Sstevel@tonic-gate /* to get some global routines like printf */
457c478bd9Sstevel@tonic-gate #include "etherboot.h"
467c478bd9Sstevel@tonic-gate /* to get the interface to the body of the program */
477c478bd9Sstevel@tonic-gate #include "nic.h"
487c478bd9Sstevel@tonic-gate /* to get the PCI support functions, if this is a PCI NIC */
497c478bd9Sstevel@tonic-gate #include "pci.h"
507c478bd9Sstevel@tonic-gate /* Include timer support functions */
517c478bd9Sstevel@tonic-gate #include "timer.h"
527c478bd9Sstevel@tonic-gate
537c478bd9Sstevel@tonic-gate #define drv_version "v1.1"
547c478bd9Sstevel@tonic-gate #define drv_date "02-03-2004"
557c478bd9Sstevel@tonic-gate
567c478bd9Sstevel@tonic-gate //#define TFTM_DEBUG
577c478bd9Sstevel@tonic-gate #ifdef TFTM_DEBUG
587c478bd9Sstevel@tonic-gate #define dprintf(x) printf x
597c478bd9Sstevel@tonic-gate #else
607c478bd9Sstevel@tonic-gate #define dprintf(x)
617c478bd9Sstevel@tonic-gate #endif
627c478bd9Sstevel@tonic-gate
637c478bd9Sstevel@tonic-gate typedef unsigned char u8;
647c478bd9Sstevel@tonic-gate typedef signed char s8;
657c478bd9Sstevel@tonic-gate typedef unsigned short u16;
667c478bd9Sstevel@tonic-gate typedef signed short s16;
677c478bd9Sstevel@tonic-gate typedef unsigned int u32;
687c478bd9Sstevel@tonic-gate typedef signed int s32;
697c478bd9Sstevel@tonic-gate
707c478bd9Sstevel@tonic-gate /* Condensed operations for readability. */
717c478bd9Sstevel@tonic-gate #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
727c478bd9Sstevel@tonic-gate #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
737c478bd9Sstevel@tonic-gate
747c478bd9Sstevel@tonic-gate unsigned long BASE;
757c478bd9Sstevel@tonic-gate /* NIC specific static variables go here */
767c478bd9Sstevel@tonic-gate
777c478bd9Sstevel@tonic-gate
787c478bd9Sstevel@tonic-gate /*
797c478bd9Sstevel@tonic-gate * Hardware access:
807c478bd9Sstevel@tonic-gate */
817c478bd9Sstevel@tonic-gate
827c478bd9Sstevel@tonic-gate #define DEV_NEED_LASTPACKET1 0x0001
837c478bd9Sstevel@tonic-gate #define DEV_IRQMASK_1 0x0002
847c478bd9Sstevel@tonic-gate #define DEV_IRQMASK_2 0x0004
857c478bd9Sstevel@tonic-gate #define DEV_NEED_TIMERIRQ 0x0008
867c478bd9Sstevel@tonic-gate
877c478bd9Sstevel@tonic-gate enum {
887c478bd9Sstevel@tonic-gate NvRegIrqStatus = 0x000,
897c478bd9Sstevel@tonic-gate #define NVREG_IRQSTAT_MIIEVENT 0040
907c478bd9Sstevel@tonic-gate #define NVREG_IRQSTAT_MASK 0x1ff
917c478bd9Sstevel@tonic-gate NvRegIrqMask = 0x004,
927c478bd9Sstevel@tonic-gate #define NVREG_IRQ_RX 0x0002
937c478bd9Sstevel@tonic-gate #define NVREG_IRQ_RX_NOBUF 0x0004
947c478bd9Sstevel@tonic-gate #define NVREG_IRQ_TX_ERR 0x0008
957c478bd9Sstevel@tonic-gate #define NVREG_IRQ_TX2 0x0010
967c478bd9Sstevel@tonic-gate #define NVREG_IRQ_TIMER 0x0020
977c478bd9Sstevel@tonic-gate #define NVREG_IRQ_LINK 0x0040
987c478bd9Sstevel@tonic-gate #define NVREG_IRQ_TX1 0x0100
997c478bd9Sstevel@tonic-gate #define NVREG_IRQMASK_WANTED_1 0x005f
1007c478bd9Sstevel@tonic-gate #define NVREG_IRQMASK_WANTED_2 0x0147
1017c478bd9Sstevel@tonic-gate #define NVREG_IRQ_UNKNOWN (~(NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR|NVREG_IRQ_TX2|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_TX1))
1027c478bd9Sstevel@tonic-gate
1037c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg6 = 0x008,
1047c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP6_VAL 3
1057c478bd9Sstevel@tonic-gate
1067c478bd9Sstevel@tonic-gate /*
1077c478bd9Sstevel@tonic-gate * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
1087c478bd9Sstevel@tonic-gate * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
1097c478bd9Sstevel@tonic-gate */
1107c478bd9Sstevel@tonic-gate NvRegPollingInterval = 0x00c,
1117c478bd9Sstevel@tonic-gate #define NVREG_POLL_DEFAULT 970
1127c478bd9Sstevel@tonic-gate NvRegMisc1 = 0x080,
1137c478bd9Sstevel@tonic-gate #define NVREG_MISC1_HD 0x02
1147c478bd9Sstevel@tonic-gate #define NVREG_MISC1_FORCE 0x3b0f3c
1157c478bd9Sstevel@tonic-gate
1167c478bd9Sstevel@tonic-gate NvRegTransmitterControl = 0x084,
1177c478bd9Sstevel@tonic-gate #define NVREG_XMITCTL_START 0x01
1187c478bd9Sstevel@tonic-gate NvRegTransmitterStatus = 0x088,
1197c478bd9Sstevel@tonic-gate #define NVREG_XMITSTAT_BUSY 0x01
1207c478bd9Sstevel@tonic-gate
1217c478bd9Sstevel@tonic-gate NvRegPacketFilterFlags = 0x8c,
1227c478bd9Sstevel@tonic-gate #define NVREG_PFF_ALWAYS 0x7F0008
1237c478bd9Sstevel@tonic-gate #define NVREG_PFF_PROMISC 0x80
1247c478bd9Sstevel@tonic-gate #define NVREG_PFF_MYADDR 0x20
1257c478bd9Sstevel@tonic-gate
1267c478bd9Sstevel@tonic-gate NvRegOffloadConfig = 0x90,
1277c478bd9Sstevel@tonic-gate #define NVREG_OFFLOAD_HOMEPHY 0x601
1287c478bd9Sstevel@tonic-gate #define NVREG_OFFLOAD_NORMAL 0x5ee
1297c478bd9Sstevel@tonic-gate NvRegReceiverControl = 0x094,
1307c478bd9Sstevel@tonic-gate #define NVREG_RCVCTL_START 0x01
1317c478bd9Sstevel@tonic-gate NvRegReceiverStatus = 0x98,
1327c478bd9Sstevel@tonic-gate #define NVREG_RCVSTAT_BUSY 0x01
1337c478bd9Sstevel@tonic-gate
1347c478bd9Sstevel@tonic-gate NvRegRandomSeed = 0x9c,
1357c478bd9Sstevel@tonic-gate #define NVREG_RNDSEED_MASK 0x00ff
1367c478bd9Sstevel@tonic-gate #define NVREG_RNDSEED_FORCE 0x7f00
1377c478bd9Sstevel@tonic-gate
1387c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg1 = 0xA0,
1397c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP1_VAL 0x16070f
1407c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg2 = 0xA4,
1417c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP2_VAL 0x16
1427c478bd9Sstevel@tonic-gate NvRegMacAddrA = 0xA8,
1437c478bd9Sstevel@tonic-gate NvRegMacAddrB = 0xAC,
1447c478bd9Sstevel@tonic-gate NvRegMulticastAddrA = 0xB0,
1457c478bd9Sstevel@tonic-gate #define NVREG_MCASTADDRA_FORCE 0x01
1467c478bd9Sstevel@tonic-gate NvRegMulticastAddrB = 0xB4,
1477c478bd9Sstevel@tonic-gate NvRegMulticastMaskA = 0xB8,
1487c478bd9Sstevel@tonic-gate NvRegMulticastMaskB = 0xBC,
1497c478bd9Sstevel@tonic-gate
1507c478bd9Sstevel@tonic-gate NvRegTxRingPhysAddr = 0x100,
1517c478bd9Sstevel@tonic-gate NvRegRxRingPhysAddr = 0x104,
1527c478bd9Sstevel@tonic-gate NvRegRingSizes = 0x108,
1537c478bd9Sstevel@tonic-gate #define NVREG_RINGSZ_TXSHIFT 0
1547c478bd9Sstevel@tonic-gate #define NVREG_RINGSZ_RXSHIFT 16
1557c478bd9Sstevel@tonic-gate NvRegUnknownTransmitterReg = 0x10c,
1567c478bd9Sstevel@tonic-gate NvRegLinkSpeed = 0x110,
1577c478bd9Sstevel@tonic-gate #define NVREG_LINKSPEED_FORCE 0x10000
1587c478bd9Sstevel@tonic-gate #define NVREG_LINKSPEED_10 10
1597c478bd9Sstevel@tonic-gate #define NVREG_LINKSPEED_100 100
1607c478bd9Sstevel@tonic-gate #define NVREG_LINKSPEED_1000 1000
1617c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg5 = 0x130,
1627c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP5_BIT31 (1<<31)
1637c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg3 = 0x134,
1647c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP3_VAL1 0x200010
1657c478bd9Sstevel@tonic-gate NvRegTxRxControl = 0x144,
1667c478bd9Sstevel@tonic-gate #define NVREG_TXRXCTL_KICK 0x0001
1677c478bd9Sstevel@tonic-gate #define NVREG_TXRXCTL_BIT1 0x0002
1687c478bd9Sstevel@tonic-gate #define NVREG_TXRXCTL_BIT2 0x0004
1697c478bd9Sstevel@tonic-gate #define NVREG_TXRXCTL_IDLE 0x0008
1707c478bd9Sstevel@tonic-gate #define NVREG_TXRXCTL_RESET 0x0010
1717c478bd9Sstevel@tonic-gate NvRegMIIStatus = 0x180,
1727c478bd9Sstevel@tonic-gate #define NVREG_MIISTAT_ERROR 0x0001
1737c478bd9Sstevel@tonic-gate #define NVREG_MIISTAT_LINKCHANGE 0x0008
1747c478bd9Sstevel@tonic-gate #define NVREG_MIISTAT_MASK 0x000f
1757c478bd9Sstevel@tonic-gate #define NVREG_MIISTAT_MASK2 0x000f
1767c478bd9Sstevel@tonic-gate NvRegUnknownSetupReg4 = 0x184,
1777c478bd9Sstevel@tonic-gate #define NVREG_UNKSETUP4_VAL 8
1787c478bd9Sstevel@tonic-gate
1797c478bd9Sstevel@tonic-gate NvRegAdapterControl = 0x188,
1807c478bd9Sstevel@tonic-gate #define NVREG_ADAPTCTL_START 0x02
1817c478bd9Sstevel@tonic-gate #define NVREG_ADAPTCTL_LINKUP 0x04
1827c478bd9Sstevel@tonic-gate #define NVREG_ADAPTCTL_PHYVALID 0x4000
1837c478bd9Sstevel@tonic-gate #define NVREG_ADAPTCTL_RUNNING 0x100000
1847c478bd9Sstevel@tonic-gate #define NVREG_ADAPTCTL_PHYSHIFT 24
1857c478bd9Sstevel@tonic-gate NvRegMIISpeed = 0x18c,
1867c478bd9Sstevel@tonic-gate #define NVREG_MIISPEED_BIT8 (1<<8)
1877c478bd9Sstevel@tonic-gate #define NVREG_MIIDELAY 5
1887c478bd9Sstevel@tonic-gate NvRegMIIControl = 0x190,
1897c478bd9Sstevel@tonic-gate #define NVREG_MIICTL_INUSE 0x10000
1907c478bd9Sstevel@tonic-gate #define NVREG_MIICTL_WRITE 0x08000
1917c478bd9Sstevel@tonic-gate #define NVREG_MIICTL_ADDRSHIFT 5
1927c478bd9Sstevel@tonic-gate NvRegMIIData = 0x194,
1937c478bd9Sstevel@tonic-gate NvRegWakeUpFlags = 0x200,
1947c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_VAL 0x7770
1957c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_BUSYSHIFT 24
1967c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_ENABLESHIFT 16
1977c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_D3SHIFT 12
1987c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_D2SHIFT 8
1997c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_D1SHIFT 4
2007c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_D0SHIFT 0
2017c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01
2027c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02
2037c478bd9Sstevel@tonic-gate #define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04
2047c478bd9Sstevel@tonic-gate
2057c478bd9Sstevel@tonic-gate NvRegPatternCRC = 0x204,
2067c478bd9Sstevel@tonic-gate NvRegPatternMask = 0x208,
2077c478bd9Sstevel@tonic-gate NvRegPowerCap = 0x268,
2087c478bd9Sstevel@tonic-gate #define NVREG_POWERCAP_D3SUPP (1<<30)
2097c478bd9Sstevel@tonic-gate #define NVREG_POWERCAP_D2SUPP (1<<26)
2107c478bd9Sstevel@tonic-gate #define NVREG_POWERCAP_D1SUPP (1<<25)
2117c478bd9Sstevel@tonic-gate NvRegPowerState = 0x26c,
2127c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_POWEREDUP 0x8000
2137c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_VALID 0x0100
2147c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_MASK 0x0003
2157c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_D0 0x0000
2167c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_D1 0x0001
2177c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_D2 0x0002
2187c478bd9Sstevel@tonic-gate #define NVREG_POWERSTATE_D3 0x0003
2197c478bd9Sstevel@tonic-gate };
2207c478bd9Sstevel@tonic-gate
2217c478bd9Sstevel@tonic-gate
2227c478bd9Sstevel@tonic-gate
2237c478bd9Sstevel@tonic-gate #define NV_TX_LASTPACKET (1<<0)
2247c478bd9Sstevel@tonic-gate #define NV_TX_RETRYERROR (1<<3)
2257c478bd9Sstevel@tonic-gate #define NV_TX_LASTPACKET1 (1<<8)
2267c478bd9Sstevel@tonic-gate #define NV_TX_DEFERRED (1<<10)
2277c478bd9Sstevel@tonic-gate #define NV_TX_CARRIERLOST (1<<11)
2287c478bd9Sstevel@tonic-gate #define NV_TX_LATECOLLISION (1<<12)
2297c478bd9Sstevel@tonic-gate #define NV_TX_UNDERFLOW (1<<13)
2307c478bd9Sstevel@tonic-gate #define NV_TX_ERROR (1<<14)
2317c478bd9Sstevel@tonic-gate #define NV_TX_VALID (1<<15)
2327c478bd9Sstevel@tonic-gate
2337c478bd9Sstevel@tonic-gate #define NV_RX_DESCRIPTORVALID (1<<0)
2347c478bd9Sstevel@tonic-gate #define NV_RX_MISSEDFRAME (1<<1)
2357c478bd9Sstevel@tonic-gate #define NV_RX_SUBSTRACT1 (1<<3)
2367c478bd9Sstevel@tonic-gate #define NV_RX_ERROR1 (1<<7)
2377c478bd9Sstevel@tonic-gate #define NV_RX_ERROR2 (1<<8)
2387c478bd9Sstevel@tonic-gate #define NV_RX_ERROR3 (1<<9)
2397c478bd9Sstevel@tonic-gate #define NV_RX_ERROR4 (1<<10)
2407c478bd9Sstevel@tonic-gate #define NV_RX_CRCERR (1<<11)
2417c478bd9Sstevel@tonic-gate #define NV_RX_OVERFLOW (1<<12)
2427c478bd9Sstevel@tonic-gate #define NV_RX_FRAMINGERR (1<<13)
2437c478bd9Sstevel@tonic-gate #define NV_RX_ERROR (1<<14)
2447c478bd9Sstevel@tonic-gate #define NV_RX_AVAIL (1<<15)
2457c478bd9Sstevel@tonic-gate
2467c478bd9Sstevel@tonic-gate /* Miscelaneous hardware related defines: */
2477c478bd9Sstevel@tonic-gate #define NV_PCI_REGSZ 0x270
2487c478bd9Sstevel@tonic-gate
2497c478bd9Sstevel@tonic-gate /* various timeout delays: all in usec */
2507c478bd9Sstevel@tonic-gate #define NV_TXRX_RESET_DELAY 4
2517c478bd9Sstevel@tonic-gate #define NV_TXSTOP_DELAY1 10
2527c478bd9Sstevel@tonic-gate #define NV_TXSTOP_DELAY1MAX 500000
2537c478bd9Sstevel@tonic-gate #define NV_TXSTOP_DELAY2 100
2547c478bd9Sstevel@tonic-gate #define NV_RXSTOP_DELAY1 10
2557c478bd9Sstevel@tonic-gate #define NV_RXSTOP_DELAY1MAX 500000
2567c478bd9Sstevel@tonic-gate #define NV_RXSTOP_DELAY2 100
2577c478bd9Sstevel@tonic-gate #define NV_SETUP5_DELAY 5
2587c478bd9Sstevel@tonic-gate #define NV_SETUP5_DELAYMAX 50000
2597c478bd9Sstevel@tonic-gate #define NV_POWERUP_DELAY 5
2607c478bd9Sstevel@tonic-gate #define NV_POWERUP_DELAYMAX 5000
2617c478bd9Sstevel@tonic-gate #define NV_MIIBUSY_DELAY 50
2627c478bd9Sstevel@tonic-gate #define NV_MIIPHY_DELAY 10
2637c478bd9Sstevel@tonic-gate #define NV_MIIPHY_DELAYMAX 10000
2647c478bd9Sstevel@tonic-gate
2657c478bd9Sstevel@tonic-gate #define NV_WAKEUPPATTERNS 5
2667c478bd9Sstevel@tonic-gate #define NV_WAKEUPMASKENTRIES 4
2677c478bd9Sstevel@tonic-gate
2687c478bd9Sstevel@tonic-gate /* General driver defaults */
2697c478bd9Sstevel@tonic-gate #define NV_WATCHDOG_TIMEO (2*HZ)
2707c478bd9Sstevel@tonic-gate #define DEFAULT_MTU 1500 /* also maximum supported, at least for now */
2717c478bd9Sstevel@tonic-gate
2727c478bd9Sstevel@tonic-gate #define RX_RING 4
2737c478bd9Sstevel@tonic-gate #define TX_RING 2
2747c478bd9Sstevel@tonic-gate /* limited to 1 packet until we understand NV_TX_LASTPACKET */
2757c478bd9Sstevel@tonic-gate #define TX_LIMIT_STOP 10
2767c478bd9Sstevel@tonic-gate #define TX_LIMIT_START 5
2777c478bd9Sstevel@tonic-gate
2787c478bd9Sstevel@tonic-gate /* rx/tx mac addr + type + vlan + align + slack*/
2797c478bd9Sstevel@tonic-gate #define RX_NIC_BUFSIZE (DEFAULT_MTU + 64)
2807c478bd9Sstevel@tonic-gate /* even more slack */
2817c478bd9Sstevel@tonic-gate #define RX_ALLOC_BUFSIZE (DEFAULT_MTU + 128)
2827c478bd9Sstevel@tonic-gate
2837c478bd9Sstevel@tonic-gate #define OOM_REFILL (1+HZ/20)
2847c478bd9Sstevel@tonic-gate #define POLL_WAIT (1+HZ/100)
2857c478bd9Sstevel@tonic-gate
2867c478bd9Sstevel@tonic-gate struct ring_desc {
2877c478bd9Sstevel@tonic-gate u32 PacketBuffer;
2887c478bd9Sstevel@tonic-gate u16 Length;
2897c478bd9Sstevel@tonic-gate u16 Flags;
2907c478bd9Sstevel@tonic-gate };
2917c478bd9Sstevel@tonic-gate
2927c478bd9Sstevel@tonic-gate
2937c478bd9Sstevel@tonic-gate /* Define the TX Descriptor */
2947c478bd9Sstevel@tonic-gate static struct ring_desc tx_ring[TX_RING];
2957c478bd9Sstevel@tonic-gate
2967c478bd9Sstevel@tonic-gate /* Create a static buffer of size RX_BUF_SZ for each
2977c478bd9Sstevel@tonic-gate TX Descriptor. All descriptors point to a
2987c478bd9Sstevel@tonic-gate part of this buffer */
2997c478bd9Sstevel@tonic-gate static unsigned char txb[TX_RING * RX_NIC_BUFSIZE];
3007c478bd9Sstevel@tonic-gate
3017c478bd9Sstevel@tonic-gate /* Define the TX Descriptor */
3027c478bd9Sstevel@tonic-gate static struct ring_desc rx_ring[RX_RING];
3037c478bd9Sstevel@tonic-gate
3047c478bd9Sstevel@tonic-gate /* Create a static buffer of size RX_BUF_SZ for each
3057c478bd9Sstevel@tonic-gate RX Descriptor All descriptors point to a
3067c478bd9Sstevel@tonic-gate part of this buffer */
3077c478bd9Sstevel@tonic-gate static unsigned char rxb[RX_RING * RX_NIC_BUFSIZE];
3087c478bd9Sstevel@tonic-gate
3097c478bd9Sstevel@tonic-gate /* Private Storage for the NIC */
3107c478bd9Sstevel@tonic-gate struct forcedeth_private {
3117c478bd9Sstevel@tonic-gate /* General data:
3127c478bd9Sstevel@tonic-gate * Locking: spin_lock(&np->lock); */
3137c478bd9Sstevel@tonic-gate int in_shutdown;
3147c478bd9Sstevel@tonic-gate u32 linkspeed;
3157c478bd9Sstevel@tonic-gate int duplex;
3167c478bd9Sstevel@tonic-gate int phyaddr;
3177c478bd9Sstevel@tonic-gate
3187c478bd9Sstevel@tonic-gate /* General data: RO fields */
3197c478bd9Sstevel@tonic-gate u8 *ring_addr;
3207c478bd9Sstevel@tonic-gate u32 orig_mac[2];
3217c478bd9Sstevel@tonic-gate u32 irqmask;
3227c478bd9Sstevel@tonic-gate /* rx specific fields.
3237c478bd9Sstevel@tonic-gate * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
3247c478bd9Sstevel@tonic-gate */
3257c478bd9Sstevel@tonic-gate struct ring_desc *rx_ring;
3267c478bd9Sstevel@tonic-gate unsigned int cur_rx, refill_rx;
3277c478bd9Sstevel@tonic-gate struct sk_buff *rx_skbuff[RX_RING];
3287c478bd9Sstevel@tonic-gate u32 rx_dma[RX_RING];
3297c478bd9Sstevel@tonic-gate unsigned int rx_buf_sz;
3307c478bd9Sstevel@tonic-gate
3317c478bd9Sstevel@tonic-gate /*
3327c478bd9Sstevel@tonic-gate * tx specific fields.
3337c478bd9Sstevel@tonic-gate */
3347c478bd9Sstevel@tonic-gate struct ring_desc *tx_ring;
3357c478bd9Sstevel@tonic-gate unsigned int next_tx, nic_tx;
3367c478bd9Sstevel@tonic-gate struct sk_buff *tx_skbuff[TX_RING];
3377c478bd9Sstevel@tonic-gate u32 tx_dma[TX_RING];
3387c478bd9Sstevel@tonic-gate u16 tx_flags;
3397c478bd9Sstevel@tonic-gate } npx;
3407c478bd9Sstevel@tonic-gate
3417c478bd9Sstevel@tonic-gate static struct forcedeth_private *np;
3427c478bd9Sstevel@tonic-gate
pci_push(u8 * base)3437c478bd9Sstevel@tonic-gate static inline void pci_push(u8 * base)
3447c478bd9Sstevel@tonic-gate {
3457c478bd9Sstevel@tonic-gate /* force out pending posted writes */
3467c478bd9Sstevel@tonic-gate readl(base);
3477c478bd9Sstevel@tonic-gate }
reg_delay(int offset,u32 mask,u32 target,int delay,int delaymax,const char * msg)3487c478bd9Sstevel@tonic-gate static int reg_delay(int offset, u32 mask,
3497c478bd9Sstevel@tonic-gate u32 target, int delay, int delaymax, const char *msg)
3507c478bd9Sstevel@tonic-gate {
3517c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
3527c478bd9Sstevel@tonic-gate
3537c478bd9Sstevel@tonic-gate pci_push(base);
3547c478bd9Sstevel@tonic-gate do {
3557c478bd9Sstevel@tonic-gate udelay(delay);
3567c478bd9Sstevel@tonic-gate delaymax -= delay;
3577c478bd9Sstevel@tonic-gate if (delaymax < 0) {
3587c478bd9Sstevel@tonic-gate if (msg)
3597c478bd9Sstevel@tonic-gate printf(msg);
3607c478bd9Sstevel@tonic-gate return 1;
3617c478bd9Sstevel@tonic-gate }
3627c478bd9Sstevel@tonic-gate } while ((readl(base + offset) & mask) != target);
3637c478bd9Sstevel@tonic-gate return 0;
3647c478bd9Sstevel@tonic-gate }
3657c478bd9Sstevel@tonic-gate
3667c478bd9Sstevel@tonic-gate #define MII_READ (-1)
3677c478bd9Sstevel@tonic-gate #define MII_PHYSID1 0x02 /* PHYS ID 1 */
3687c478bd9Sstevel@tonic-gate #define MII_PHYSID2 0x03 /* PHYS ID 2 */
3697c478bd9Sstevel@tonic-gate #define MII_BMCR 0x00 /* Basic mode control register */
3707c478bd9Sstevel@tonic-gate #define MII_BMSR 0x01 /* Basic mode status register */
3717c478bd9Sstevel@tonic-gate #define MII_ADVERTISE 0x04 /* Advertisement control reg */
3727c478bd9Sstevel@tonic-gate #define MII_LPA 0x05 /* Link partner ability reg */
3737c478bd9Sstevel@tonic-gate
3747c478bd9Sstevel@tonic-gate #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
3757c478bd9Sstevel@tonic-gate
3767c478bd9Sstevel@tonic-gate /* Link partner ability register. */
3777c478bd9Sstevel@tonic-gate #define LPA_SLCT 0x001f /* Same as advertise selector */
3787c478bd9Sstevel@tonic-gate #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
3797c478bd9Sstevel@tonic-gate #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
3807c478bd9Sstevel@tonic-gate #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
3817c478bd9Sstevel@tonic-gate #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
3827c478bd9Sstevel@tonic-gate #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
3837c478bd9Sstevel@tonic-gate #define LPA_RESV 0x1c00 /* Unused... */
3847c478bd9Sstevel@tonic-gate #define LPA_RFAULT 0x2000 /* Link partner faulted */
3857c478bd9Sstevel@tonic-gate #define LPA_LPACK 0x4000 /* Link partner acked us */
3867c478bd9Sstevel@tonic-gate #define LPA_NPAGE 0x8000 /* Next page bit */
3877c478bd9Sstevel@tonic-gate
3887c478bd9Sstevel@tonic-gate /* mii_rw: read/write a register on the PHY.
3897c478bd9Sstevel@tonic-gate *
3907c478bd9Sstevel@tonic-gate * Caller must guarantee serialization
3917c478bd9Sstevel@tonic-gate */
mii_rw(struct nic * nic __unused,int addr,int miireg,int value)3927c478bd9Sstevel@tonic-gate static int mii_rw(struct nic *nic __unused, int addr, int miireg,
3937c478bd9Sstevel@tonic-gate int value)
3947c478bd9Sstevel@tonic-gate {
3957c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
3967c478bd9Sstevel@tonic-gate int was_running;
3977c478bd9Sstevel@tonic-gate u32 reg;
3987c478bd9Sstevel@tonic-gate int retval;
3997c478bd9Sstevel@tonic-gate
4007c478bd9Sstevel@tonic-gate writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
4017c478bd9Sstevel@tonic-gate was_running = 0;
4027c478bd9Sstevel@tonic-gate reg = readl(base + NvRegAdapterControl);
4037c478bd9Sstevel@tonic-gate if (reg & NVREG_ADAPTCTL_RUNNING) {
4047c478bd9Sstevel@tonic-gate was_running = 1;
4057c478bd9Sstevel@tonic-gate writel(reg & ~NVREG_ADAPTCTL_RUNNING,
4067c478bd9Sstevel@tonic-gate base + NvRegAdapterControl);
4077c478bd9Sstevel@tonic-gate }
4087c478bd9Sstevel@tonic-gate reg = readl(base + NvRegMIIControl);
4097c478bd9Sstevel@tonic-gate if (reg & NVREG_MIICTL_INUSE) {
4107c478bd9Sstevel@tonic-gate writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
4117c478bd9Sstevel@tonic-gate udelay(NV_MIIBUSY_DELAY);
4127c478bd9Sstevel@tonic-gate }
4137c478bd9Sstevel@tonic-gate
4147c478bd9Sstevel@tonic-gate reg =
4157c478bd9Sstevel@tonic-gate NVREG_MIICTL_INUSE | (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
4167c478bd9Sstevel@tonic-gate if (value != MII_READ) {
4177c478bd9Sstevel@tonic-gate writel(value, base + NvRegMIIData);
4187c478bd9Sstevel@tonic-gate reg |= NVREG_MIICTL_WRITE;
4197c478bd9Sstevel@tonic-gate }
4207c478bd9Sstevel@tonic-gate writel(reg, base + NvRegMIIControl);
4217c478bd9Sstevel@tonic-gate
4227c478bd9Sstevel@tonic-gate if (reg_delay(NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
4237c478bd9Sstevel@tonic-gate NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
4247c478bd9Sstevel@tonic-gate dprintf(("mii_rw of reg %d at PHY %d timed out.\n",
4257c478bd9Sstevel@tonic-gate miireg, addr));
4267c478bd9Sstevel@tonic-gate retval = -1;
4277c478bd9Sstevel@tonic-gate } else if (value != MII_READ) {
4287c478bd9Sstevel@tonic-gate /* it was a write operation - fewer failures are detectable */
4297c478bd9Sstevel@tonic-gate dprintf(("mii_rw wrote 0x%x to reg %d at PHY %d\n",
4307c478bd9Sstevel@tonic-gate value, miireg, addr));
4317c478bd9Sstevel@tonic-gate retval = 0;
4327c478bd9Sstevel@tonic-gate } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
4337c478bd9Sstevel@tonic-gate dprintf(("mii_rw of reg %d at PHY %d failed.\n",
4347c478bd9Sstevel@tonic-gate miireg, addr));
4357c478bd9Sstevel@tonic-gate retval = -1;
4367c478bd9Sstevel@tonic-gate } else {
4377c478bd9Sstevel@tonic-gate /* FIXME: why is that required? */
4387c478bd9Sstevel@tonic-gate udelay(50);
4397c478bd9Sstevel@tonic-gate retval = readl(base + NvRegMIIData);
4407c478bd9Sstevel@tonic-gate dprintf(("mii_rw read from reg %d at PHY %d: 0x%x.\n",
4417c478bd9Sstevel@tonic-gate miireg, addr, retval));
4427c478bd9Sstevel@tonic-gate }
4437c478bd9Sstevel@tonic-gate if (was_running) {
4447c478bd9Sstevel@tonic-gate reg = readl(base + NvRegAdapterControl);
4457c478bd9Sstevel@tonic-gate writel(reg | NVREG_ADAPTCTL_RUNNING,
4467c478bd9Sstevel@tonic-gate base + NvRegAdapterControl);
4477c478bd9Sstevel@tonic-gate }
4487c478bd9Sstevel@tonic-gate return retval;
4497c478bd9Sstevel@tonic-gate }
4507c478bd9Sstevel@tonic-gate
start_rx(struct nic * nic __unused)4517c478bd9Sstevel@tonic-gate static void start_rx(struct nic *nic __unused)
4527c478bd9Sstevel@tonic-gate {
4537c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
4547c478bd9Sstevel@tonic-gate
4557c478bd9Sstevel@tonic-gate dprintf(("start_rx\n"));
4567c478bd9Sstevel@tonic-gate /* Already running? Stop it. */
4577c478bd9Sstevel@tonic-gate if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
4587c478bd9Sstevel@tonic-gate writel(0, base + NvRegReceiverControl);
4597c478bd9Sstevel@tonic-gate pci_push(base);
4607c478bd9Sstevel@tonic-gate }
4617c478bd9Sstevel@tonic-gate writel(np->linkspeed, base + NvRegLinkSpeed);
4627c478bd9Sstevel@tonic-gate pci_push(base);
4637c478bd9Sstevel@tonic-gate writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
4647c478bd9Sstevel@tonic-gate pci_push(base);
4657c478bd9Sstevel@tonic-gate }
4667c478bd9Sstevel@tonic-gate
stop_rx(void)4677c478bd9Sstevel@tonic-gate static void stop_rx(void)
4687c478bd9Sstevel@tonic-gate {
4697c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
4707c478bd9Sstevel@tonic-gate
4717c478bd9Sstevel@tonic-gate dprintf(("stop_rx\n"));
4727c478bd9Sstevel@tonic-gate writel(0, base + NvRegReceiverControl);
4737c478bd9Sstevel@tonic-gate reg_delay(NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
4747c478bd9Sstevel@tonic-gate NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
4757c478bd9Sstevel@tonic-gate "stop_rx: ReceiverStatus remained busy");
4767c478bd9Sstevel@tonic-gate
4777c478bd9Sstevel@tonic-gate udelay(NV_RXSTOP_DELAY2);
4787c478bd9Sstevel@tonic-gate writel(0, base + NvRegLinkSpeed);
4797c478bd9Sstevel@tonic-gate }
4807c478bd9Sstevel@tonic-gate
start_tx(struct nic * nic __unused)4817c478bd9Sstevel@tonic-gate static void start_tx(struct nic *nic __unused)
4827c478bd9Sstevel@tonic-gate {
4837c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
4847c478bd9Sstevel@tonic-gate
4857c478bd9Sstevel@tonic-gate dprintf(("start_tx\n"));
4867c478bd9Sstevel@tonic-gate writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
4877c478bd9Sstevel@tonic-gate pci_push(base);
4887c478bd9Sstevel@tonic-gate }
4897c478bd9Sstevel@tonic-gate
stop_tx(void)4907c478bd9Sstevel@tonic-gate static void stop_tx(void)
4917c478bd9Sstevel@tonic-gate {
4927c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
4937c478bd9Sstevel@tonic-gate
4947c478bd9Sstevel@tonic-gate dprintf(("stop_tx\n"));
4957c478bd9Sstevel@tonic-gate writel(0, base + NvRegTransmitterControl);
4967c478bd9Sstevel@tonic-gate reg_delay(NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
4977c478bd9Sstevel@tonic-gate NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
4987c478bd9Sstevel@tonic-gate "stop_tx: TransmitterStatus remained busy");
4997c478bd9Sstevel@tonic-gate
5007c478bd9Sstevel@tonic-gate udelay(NV_TXSTOP_DELAY2);
5017c478bd9Sstevel@tonic-gate writel(0, base + NvRegUnknownTransmitterReg);
5027c478bd9Sstevel@tonic-gate }
5037c478bd9Sstevel@tonic-gate
5047c478bd9Sstevel@tonic-gate
txrx_reset(struct nic * nic __unused)5057c478bd9Sstevel@tonic-gate static void txrx_reset(struct nic *nic __unused)
5067c478bd9Sstevel@tonic-gate {
5077c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
5087c478bd9Sstevel@tonic-gate
5097c478bd9Sstevel@tonic-gate dprintf(("txrx_reset\n"));
5107c478bd9Sstevel@tonic-gate writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET,
5117c478bd9Sstevel@tonic-gate base + NvRegTxRxControl);
5127c478bd9Sstevel@tonic-gate pci_push(base);
5137c478bd9Sstevel@tonic-gate udelay(NV_TXRX_RESET_DELAY);
5147c478bd9Sstevel@tonic-gate writel(NVREG_TXRXCTL_BIT2, base + NvRegTxRxControl);
5157c478bd9Sstevel@tonic-gate pci_push(base);
5167c478bd9Sstevel@tonic-gate }
5177c478bd9Sstevel@tonic-gate
5187c478bd9Sstevel@tonic-gate /*
5197c478bd9Sstevel@tonic-gate * alloc_rx: fill rx ring entries.
5207c478bd9Sstevel@tonic-gate * Return 1 if the allocations for the skbs failed and the
5217c478bd9Sstevel@tonic-gate * rx engine is without Available descriptors
5227c478bd9Sstevel@tonic-gate */
alloc_rx(struct nic * nic __unused)5237c478bd9Sstevel@tonic-gate static int alloc_rx(struct nic *nic __unused)
5247c478bd9Sstevel@tonic-gate {
5257c478bd9Sstevel@tonic-gate unsigned int refill_rx = np->refill_rx;
5267c478bd9Sstevel@tonic-gate int i;
5277c478bd9Sstevel@tonic-gate //while (np->cur_rx != refill_rx) {
5287c478bd9Sstevel@tonic-gate for (i = 0; i < RX_RING; i++) {
5297c478bd9Sstevel@tonic-gate //int nr = refill_rx % RX_RING;
5307c478bd9Sstevel@tonic-gate rx_ring[i].PacketBuffer =
5317c478bd9Sstevel@tonic-gate virt_to_le32desc(&rxb[i * RX_NIC_BUFSIZE]);
5327c478bd9Sstevel@tonic-gate rx_ring[i].Length = cpu_to_le16(RX_NIC_BUFSIZE);
5337c478bd9Sstevel@tonic-gate wmb();
5347c478bd9Sstevel@tonic-gate rx_ring[i].Flags = cpu_to_le16(NV_RX_AVAIL);
5357c478bd9Sstevel@tonic-gate /* printf("alloc_rx: Packet %d marked as Available\n",
5367c478bd9Sstevel@tonic-gate refill_rx); */
5377c478bd9Sstevel@tonic-gate refill_rx++;
5387c478bd9Sstevel@tonic-gate }
5397c478bd9Sstevel@tonic-gate np->refill_rx = refill_rx;
5407c478bd9Sstevel@tonic-gate if (np->cur_rx - refill_rx == RX_RING)
5417c478bd9Sstevel@tonic-gate return 1;
5427c478bd9Sstevel@tonic-gate return 0;
5437c478bd9Sstevel@tonic-gate }
5447c478bd9Sstevel@tonic-gate
update_linkspeed(struct nic * nic)5457c478bd9Sstevel@tonic-gate static int update_linkspeed(struct nic *nic)
5467c478bd9Sstevel@tonic-gate {
5477c478bd9Sstevel@tonic-gate int adv, lpa, newdup;
5487c478bd9Sstevel@tonic-gate u32 newls;
5497c478bd9Sstevel@tonic-gate adv = mii_rw(nic, np->phyaddr, MII_ADVERTISE, MII_READ);
5507c478bd9Sstevel@tonic-gate lpa = mii_rw(nic, np->phyaddr, MII_LPA, MII_READ);
5517c478bd9Sstevel@tonic-gate dprintf(("update_linkspeed: PHY advertises 0x%hX, lpa 0x%hX.\n",
5527c478bd9Sstevel@tonic-gate adv, lpa));
5537c478bd9Sstevel@tonic-gate
5547c478bd9Sstevel@tonic-gate /* FIXME: handle parallel detection properly, handle gigabit ethernet */
5557c478bd9Sstevel@tonic-gate lpa = lpa & adv;
5567c478bd9Sstevel@tonic-gate if (lpa & LPA_100FULL) {
5577c478bd9Sstevel@tonic-gate newls = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_100;
5587c478bd9Sstevel@tonic-gate newdup = 1;
5597c478bd9Sstevel@tonic-gate } else if (lpa & LPA_100HALF) {
5607c478bd9Sstevel@tonic-gate newls = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_100;
5617c478bd9Sstevel@tonic-gate newdup = 0;
5627c478bd9Sstevel@tonic-gate } else if (lpa & LPA_10FULL) {
5637c478bd9Sstevel@tonic-gate newls = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_10;
5647c478bd9Sstevel@tonic-gate newdup = 1;
5657c478bd9Sstevel@tonic-gate } else if (lpa & LPA_10HALF) {
5667c478bd9Sstevel@tonic-gate newls = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_10;
5677c478bd9Sstevel@tonic-gate newdup = 0;
5687c478bd9Sstevel@tonic-gate } else {
5697c478bd9Sstevel@tonic-gate printf("bad ability %hX - falling back to 10HD.\n", lpa);
5707c478bd9Sstevel@tonic-gate newls = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_10;
5717c478bd9Sstevel@tonic-gate newdup = 0;
5727c478bd9Sstevel@tonic-gate }
5737c478bd9Sstevel@tonic-gate if (np->duplex != newdup || np->linkspeed != newls) {
5747c478bd9Sstevel@tonic-gate np->duplex = newdup;
5757c478bd9Sstevel@tonic-gate np->linkspeed = newls;
5767c478bd9Sstevel@tonic-gate return 1;
5777c478bd9Sstevel@tonic-gate }
5787c478bd9Sstevel@tonic-gate return 0;
5797c478bd9Sstevel@tonic-gate }
5807c478bd9Sstevel@tonic-gate
5817c478bd9Sstevel@tonic-gate
5827c478bd9Sstevel@tonic-gate
init_ring(struct nic * nic)5837c478bd9Sstevel@tonic-gate static int init_ring(struct nic *nic)
5847c478bd9Sstevel@tonic-gate {
5857c478bd9Sstevel@tonic-gate int i;
5867c478bd9Sstevel@tonic-gate
5877c478bd9Sstevel@tonic-gate np->next_tx = np->nic_tx = 0;
5887c478bd9Sstevel@tonic-gate for (i = 0; i < TX_RING; i++) {
5897c478bd9Sstevel@tonic-gate tx_ring[i].Flags = 0;
5907c478bd9Sstevel@tonic-gate }
5917c478bd9Sstevel@tonic-gate
5927c478bd9Sstevel@tonic-gate np->cur_rx = 0;
5937c478bd9Sstevel@tonic-gate np->refill_rx = 0;
5947c478bd9Sstevel@tonic-gate for (i = 0; i < RX_RING; i++) {
5957c478bd9Sstevel@tonic-gate rx_ring[i].Flags = 0;
5967c478bd9Sstevel@tonic-gate }
5977c478bd9Sstevel@tonic-gate return alloc_rx(nic);
5987c478bd9Sstevel@tonic-gate }
5997c478bd9Sstevel@tonic-gate
set_multicast(struct nic * nic)6007c478bd9Sstevel@tonic-gate static void set_multicast(struct nic *nic)
6017c478bd9Sstevel@tonic-gate {
6027c478bd9Sstevel@tonic-gate
6037c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
6047c478bd9Sstevel@tonic-gate u32 addr[2];
6057c478bd9Sstevel@tonic-gate u32 mask[2];
6067c478bd9Sstevel@tonic-gate u32 pff;
6077c478bd9Sstevel@tonic-gate u32 alwaysOff[2];
6087c478bd9Sstevel@tonic-gate u32 alwaysOn[2];
6097c478bd9Sstevel@tonic-gate
6107c478bd9Sstevel@tonic-gate memset(addr, 0, sizeof(addr));
6117c478bd9Sstevel@tonic-gate memset(mask, 0, sizeof(mask));
6127c478bd9Sstevel@tonic-gate
6137c478bd9Sstevel@tonic-gate pff = NVREG_PFF_MYADDR;
6147c478bd9Sstevel@tonic-gate
6157c478bd9Sstevel@tonic-gate alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
6167c478bd9Sstevel@tonic-gate
6177c478bd9Sstevel@tonic-gate addr[0] = alwaysOn[0];
6187c478bd9Sstevel@tonic-gate addr[1] = alwaysOn[1];
6197c478bd9Sstevel@tonic-gate mask[0] = alwaysOn[0] | alwaysOff[0];
6207c478bd9Sstevel@tonic-gate mask[1] = alwaysOn[1] | alwaysOff[1];
6217c478bd9Sstevel@tonic-gate
6227c478bd9Sstevel@tonic-gate addr[0] |= NVREG_MCASTADDRA_FORCE;
6237c478bd9Sstevel@tonic-gate pff |= NVREG_PFF_ALWAYS;
6247c478bd9Sstevel@tonic-gate stop_rx();
6257c478bd9Sstevel@tonic-gate writel(addr[0], base + NvRegMulticastAddrA);
6267c478bd9Sstevel@tonic-gate writel(addr[1], base + NvRegMulticastAddrB);
6277c478bd9Sstevel@tonic-gate writel(mask[0], base + NvRegMulticastMaskA);
6287c478bd9Sstevel@tonic-gate writel(mask[1], base + NvRegMulticastMaskB);
6297c478bd9Sstevel@tonic-gate writel(pff, base + NvRegPacketFilterFlags);
6307c478bd9Sstevel@tonic-gate start_rx(nic);
6317c478bd9Sstevel@tonic-gate }
6327c478bd9Sstevel@tonic-gate
6337c478bd9Sstevel@tonic-gate /**************************************************************************
6347c478bd9Sstevel@tonic-gate RESET - Reset the NIC to prepare for use
6357c478bd9Sstevel@tonic-gate ***************************************************************************/
forcedeth_reset(struct nic * nic)6367c478bd9Sstevel@tonic-gate static int forcedeth_reset(struct nic *nic)
6377c478bd9Sstevel@tonic-gate {
6387c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
6397c478bd9Sstevel@tonic-gate int ret, oom, i;
6407c478bd9Sstevel@tonic-gate ret = 0;
6417c478bd9Sstevel@tonic-gate dprintf(("forcedeth: open\n"));
6427c478bd9Sstevel@tonic-gate
6437c478bd9Sstevel@tonic-gate /* 1) erase previous misconfiguration */
6447c478bd9Sstevel@tonic-gate /* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */
6457c478bd9Sstevel@tonic-gate writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
6467c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastAddrB);
6477c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastMaskA);
6487c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastMaskB);
6497c478bd9Sstevel@tonic-gate writel(0, base + NvRegPacketFilterFlags);
6507c478bd9Sstevel@tonic-gate writel(0, base + NvRegAdapterControl);
6517c478bd9Sstevel@tonic-gate writel(0, base + NvRegLinkSpeed);
6527c478bd9Sstevel@tonic-gate writel(0, base + NvRegUnknownTransmitterReg);
6537c478bd9Sstevel@tonic-gate txrx_reset(nic);
6547c478bd9Sstevel@tonic-gate writel(0, base + NvRegUnknownSetupReg6);
6557c478bd9Sstevel@tonic-gate
6567c478bd9Sstevel@tonic-gate /* 2) initialize descriptor rings */
6577c478bd9Sstevel@tonic-gate np->in_shutdown = 0;
6587c478bd9Sstevel@tonic-gate oom = init_ring(nic);
6597c478bd9Sstevel@tonic-gate
6607c478bd9Sstevel@tonic-gate /* 3) set mac address */
6617c478bd9Sstevel@tonic-gate {
6627c478bd9Sstevel@tonic-gate u32 mac[2];
6637c478bd9Sstevel@tonic-gate
6647c478bd9Sstevel@tonic-gate mac[0] =
6657c478bd9Sstevel@tonic-gate (nic->node_addr[0] << 0) + (nic->node_addr[1] << 8) +
6667c478bd9Sstevel@tonic-gate (nic->node_addr[2] << 16) + (nic->node_addr[3] << 24);
6677c478bd9Sstevel@tonic-gate mac[1] =
6687c478bd9Sstevel@tonic-gate (nic->node_addr[4] << 0) + (nic->node_addr[5] << 8);
6697c478bd9Sstevel@tonic-gate
6707c478bd9Sstevel@tonic-gate writel(mac[0], base + NvRegMacAddrA);
6717c478bd9Sstevel@tonic-gate writel(mac[1], base + NvRegMacAddrB);
6727c478bd9Sstevel@tonic-gate }
6737c478bd9Sstevel@tonic-gate
6747c478bd9Sstevel@tonic-gate /* 4) continue setup */
6757c478bd9Sstevel@tonic-gate np->linkspeed = NVREG_LINKSPEED_FORCE | NVREG_LINKSPEED_10;
6767c478bd9Sstevel@tonic-gate np->duplex = 0;
6777c478bd9Sstevel@tonic-gate writel(NVREG_UNKSETUP3_VAL1, base + NvRegUnknownSetupReg3);
6787c478bd9Sstevel@tonic-gate writel(0, base + NvRegTxRxControl);
6797c478bd9Sstevel@tonic-gate pci_push(base);
6807c478bd9Sstevel@tonic-gate writel(NVREG_TXRXCTL_BIT1, base + NvRegTxRxControl);
6817c478bd9Sstevel@tonic-gate
6827c478bd9Sstevel@tonic-gate reg_delay(NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31,
6837c478bd9Sstevel@tonic-gate NVREG_UNKSETUP5_BIT31, NV_SETUP5_DELAY,
6847c478bd9Sstevel@tonic-gate NV_SETUP5_DELAYMAX,
6857c478bd9Sstevel@tonic-gate "open: SetupReg5, Bit 31 remained off\n");
6867c478bd9Sstevel@tonic-gate writel(0, base + NvRegUnknownSetupReg4);
6877c478bd9Sstevel@tonic-gate
6887c478bd9Sstevel@tonic-gate /* 5) Find a suitable PHY */
6897c478bd9Sstevel@tonic-gate writel(NVREG_MIISPEED_BIT8 | NVREG_MIIDELAY, base + NvRegMIISpeed);
6907c478bd9Sstevel@tonic-gate for (i = 1; i < 32; i++) {
6917c478bd9Sstevel@tonic-gate int id1, id2;
6927c478bd9Sstevel@tonic-gate
6937c478bd9Sstevel@tonic-gate id1 = mii_rw(nic, i, MII_PHYSID1, MII_READ);
6947c478bd9Sstevel@tonic-gate if (id1 < 0)
6957c478bd9Sstevel@tonic-gate continue;
6967c478bd9Sstevel@tonic-gate id2 = mii_rw(nic, i, MII_PHYSID2, MII_READ);
6977c478bd9Sstevel@tonic-gate if (id2 < 0)
6987c478bd9Sstevel@tonic-gate continue;
6997c478bd9Sstevel@tonic-gate dprintf(("open: Found PHY %04x:%04x at address %d.\n",
7007c478bd9Sstevel@tonic-gate id1, id2, i));
7017c478bd9Sstevel@tonic-gate np->phyaddr = i;
7027c478bd9Sstevel@tonic-gate
7037c478bd9Sstevel@tonic-gate update_linkspeed(nic);
7047c478bd9Sstevel@tonic-gate
7057c478bd9Sstevel@tonic-gate break;
7067c478bd9Sstevel@tonic-gate }
7077c478bd9Sstevel@tonic-gate if (i == 32) {
7087c478bd9Sstevel@tonic-gate printf("open: failing due to lack of suitable PHY.\n");
7097c478bd9Sstevel@tonic-gate ret = -1;
7107c478bd9Sstevel@tonic-gate goto out_drain;
7117c478bd9Sstevel@tonic-gate }
7127c478bd9Sstevel@tonic-gate
7137c478bd9Sstevel@tonic-gate printf("%d-Mbs Link, %s-Duplex\n",
7147c478bd9Sstevel@tonic-gate np->linkspeed & NVREG_LINKSPEED_10 ? 10 : 100,
7157c478bd9Sstevel@tonic-gate np->duplex ? "Full" : "Half");
7167c478bd9Sstevel@tonic-gate /* 6) continue setup */
7177c478bd9Sstevel@tonic-gate writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD),
7187c478bd9Sstevel@tonic-gate base + NvRegMisc1);
7197c478bd9Sstevel@tonic-gate writel(readl(base + NvRegTransmitterStatus),
7207c478bd9Sstevel@tonic-gate base + NvRegTransmitterStatus);
7217c478bd9Sstevel@tonic-gate writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
7227c478bd9Sstevel@tonic-gate writel(NVREG_OFFLOAD_NORMAL, base + NvRegOffloadConfig);
7237c478bd9Sstevel@tonic-gate
7247c478bd9Sstevel@tonic-gate writel(readl(base + NvRegReceiverStatus),
7257c478bd9Sstevel@tonic-gate base + NvRegReceiverStatus);
7267c478bd9Sstevel@tonic-gate
7277c478bd9Sstevel@tonic-gate /* FIXME: I cheated and used the calculator to get a random number */
7287c478bd9Sstevel@tonic-gate i = 75963081;
7297c478bd9Sstevel@tonic-gate writel(NVREG_RNDSEED_FORCE | (i & NVREG_RNDSEED_MASK),
7307c478bd9Sstevel@tonic-gate base + NvRegRandomSeed);
7317c478bd9Sstevel@tonic-gate writel(NVREG_UNKSETUP1_VAL, base + NvRegUnknownSetupReg1);
7327c478bd9Sstevel@tonic-gate writel(NVREG_UNKSETUP2_VAL, base + NvRegUnknownSetupReg2);
7337c478bd9Sstevel@tonic-gate writel(NVREG_POLL_DEFAULT, base + NvRegPollingInterval);
7347c478bd9Sstevel@tonic-gate writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
7357c478bd9Sstevel@tonic-gate writel((np->
7367c478bd9Sstevel@tonic-gate phyaddr << NVREG_ADAPTCTL_PHYSHIFT) |
7377c478bd9Sstevel@tonic-gate NVREG_ADAPTCTL_PHYVALID, base + NvRegAdapterControl);
7387c478bd9Sstevel@tonic-gate writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
7397c478bd9Sstevel@tonic-gate writel(NVREG_WAKEUPFLAGS_VAL, base + NvRegWakeUpFlags);
7407c478bd9Sstevel@tonic-gate
7417c478bd9Sstevel@tonic-gate /* 7) start packet processing */
7427c478bd9Sstevel@tonic-gate writel((u32) virt_to_le32desc(&rx_ring[0]),
7437c478bd9Sstevel@tonic-gate base + NvRegRxRingPhysAddr);
7447c478bd9Sstevel@tonic-gate writel((u32) virt_to_le32desc(&tx_ring[0]),
7457c478bd9Sstevel@tonic-gate base + NvRegTxRingPhysAddr);
7467c478bd9Sstevel@tonic-gate
7477c478bd9Sstevel@tonic-gate
7487c478bd9Sstevel@tonic-gate writel(((RX_RING - 1) << NVREG_RINGSZ_RXSHIFT) +
7497c478bd9Sstevel@tonic-gate ((TX_RING - 1) << NVREG_RINGSZ_TXSHIFT),
7507c478bd9Sstevel@tonic-gate base + NvRegRingSizes);
7517c478bd9Sstevel@tonic-gate
7527c478bd9Sstevel@tonic-gate i = readl(base + NvRegPowerState);
7537c478bd9Sstevel@tonic-gate if ((i & NVREG_POWERSTATE_POWEREDUP) == 0) {
7547c478bd9Sstevel@tonic-gate writel(NVREG_POWERSTATE_POWEREDUP | i,
7557c478bd9Sstevel@tonic-gate base + NvRegPowerState);
7567c478bd9Sstevel@tonic-gate }
7577c478bd9Sstevel@tonic-gate pci_push(base);
7587c478bd9Sstevel@tonic-gate udelay(10);
7597c478bd9Sstevel@tonic-gate writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID,
7607c478bd9Sstevel@tonic-gate base + NvRegPowerState);
7617c478bd9Sstevel@tonic-gate writel(NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl);
7627c478bd9Sstevel@tonic-gate
7637c478bd9Sstevel@tonic-gate writel(0, base + NvRegIrqMask);
7647c478bd9Sstevel@tonic-gate pci_push(base);
7657c478bd9Sstevel@tonic-gate writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
7667c478bd9Sstevel@tonic-gate pci_push(base);
7677c478bd9Sstevel@tonic-gate writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
7687c478bd9Sstevel@tonic-gate writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
7697c478bd9Sstevel@tonic-gate pci_push(base);
7707c478bd9Sstevel@tonic-gate /*
7717c478bd9Sstevel@tonic-gate writel(np->irqmask, base + NvRegIrqMask);
7727c478bd9Sstevel@tonic-gate */
7737c478bd9Sstevel@tonic-gate writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
7747c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastAddrB);
7757c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastMaskA);
7767c478bd9Sstevel@tonic-gate writel(0, base + NvRegMulticastMaskB);
7777c478bd9Sstevel@tonic-gate writel(NVREG_PFF_ALWAYS | NVREG_PFF_MYADDR,
7787c478bd9Sstevel@tonic-gate base + NvRegPacketFilterFlags);
7797c478bd9Sstevel@tonic-gate
7807c478bd9Sstevel@tonic-gate set_multicast(nic);
7817c478bd9Sstevel@tonic-gate //start_rx(nic);
7827c478bd9Sstevel@tonic-gate start_tx(nic);
7837c478bd9Sstevel@tonic-gate
7847c478bd9Sstevel@tonic-gate if (!
7857c478bd9Sstevel@tonic-gate (mii_rw(nic, np->phyaddr, MII_BMSR, MII_READ) &
7867c478bd9Sstevel@tonic-gate BMSR_ANEGCOMPLETE)) {
7877c478bd9Sstevel@tonic-gate printf("no link during initialization.\n");
7887c478bd9Sstevel@tonic-gate }
7897c478bd9Sstevel@tonic-gate
7907c478bd9Sstevel@tonic-gate udelay(10000);
7917c478bd9Sstevel@tonic-gate out_drain:
7927c478bd9Sstevel@tonic-gate return ret;
7937c478bd9Sstevel@tonic-gate }
7947c478bd9Sstevel@tonic-gate
7957c478bd9Sstevel@tonic-gate //extern void hex_dump(const char *data, const unsigned int len);
7967c478bd9Sstevel@tonic-gate
7977c478bd9Sstevel@tonic-gate /**************************************************************************
7987c478bd9Sstevel@tonic-gate POLL - Wait for a frame
7997c478bd9Sstevel@tonic-gate ***************************************************************************/
forcedeth_poll(struct nic * nic,int retrieve)8007c478bd9Sstevel@tonic-gate static int forcedeth_poll(struct nic *nic, int retrieve)
8017c478bd9Sstevel@tonic-gate {
8027c478bd9Sstevel@tonic-gate /* return true if there's an ethernet packet ready to read */
8037c478bd9Sstevel@tonic-gate /* nic->packet should contain data on return */
8047c478bd9Sstevel@tonic-gate /* nic->packetlen should contain length of data */
8057c478bd9Sstevel@tonic-gate
8067c478bd9Sstevel@tonic-gate struct ring_desc *prd;
8077c478bd9Sstevel@tonic-gate int len;
8087c478bd9Sstevel@tonic-gate int i;
8097c478bd9Sstevel@tonic-gate
8107c478bd9Sstevel@tonic-gate i = np->cur_rx % RX_RING;
8117c478bd9Sstevel@tonic-gate prd = &rx_ring[i];
8127c478bd9Sstevel@tonic-gate
8137c478bd9Sstevel@tonic-gate if ( ! (prd->Flags & cpu_to_le16(NV_RX_DESCRIPTORVALID)) ) {
8147c478bd9Sstevel@tonic-gate return 0;
8157c478bd9Sstevel@tonic-gate }
8167c478bd9Sstevel@tonic-gate
8177c478bd9Sstevel@tonic-gate if ( ! retrieve ) return 1;
8187c478bd9Sstevel@tonic-gate
8197c478bd9Sstevel@tonic-gate /* got a valid packet - forward it to the network core */
8207c478bd9Sstevel@tonic-gate len = cpu_to_le16(prd->Length);
8217c478bd9Sstevel@tonic-gate nic->packetlen = len;
8227c478bd9Sstevel@tonic-gate //hex_dump(rxb + (i * RX_NIC_BUFSIZE), len);
8237c478bd9Sstevel@tonic-gate memcpy(nic->packet, rxb +
8247c478bd9Sstevel@tonic-gate (i * RX_NIC_BUFSIZE), nic->packetlen);
8257c478bd9Sstevel@tonic-gate
8267c478bd9Sstevel@tonic-gate wmb();
8277c478bd9Sstevel@tonic-gate np->cur_rx++;
8287c478bd9Sstevel@tonic-gate alloc_rx(nic);
8297c478bd9Sstevel@tonic-gate return 1;
8307c478bd9Sstevel@tonic-gate }
8317c478bd9Sstevel@tonic-gate
8327c478bd9Sstevel@tonic-gate
8337c478bd9Sstevel@tonic-gate /**************************************************************************
8347c478bd9Sstevel@tonic-gate TRANSMIT - Transmit a frame
8357c478bd9Sstevel@tonic-gate ***************************************************************************/
forcedeth_transmit(struct nic * nic,const char * d,unsigned int t,unsigned int s,const char * p)8367c478bd9Sstevel@tonic-gate static void forcedeth_transmit(struct nic *nic, const char *d, /* Destination */
8377c478bd9Sstevel@tonic-gate unsigned int t, /* Type */
8387c478bd9Sstevel@tonic-gate unsigned int s, /* size */
8397c478bd9Sstevel@tonic-gate const char *p)
8407c478bd9Sstevel@tonic-gate { /* Packet */
8417c478bd9Sstevel@tonic-gate /* send the packet to destination */
8427c478bd9Sstevel@tonic-gate u8 *ptxb;
8437c478bd9Sstevel@tonic-gate u16 nstype;
8447c478bd9Sstevel@tonic-gate //u16 status;
8457c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
8467c478bd9Sstevel@tonic-gate int nr = np->next_tx % TX_RING;
8477c478bd9Sstevel@tonic-gate
8487c478bd9Sstevel@tonic-gate /* point to the current txb incase multiple tx_rings are used */
8497c478bd9Sstevel@tonic-gate ptxb = txb + (nr * RX_NIC_BUFSIZE);
8507c478bd9Sstevel@tonic-gate //np->tx_skbuff[nr] = ptxb;
8517c478bd9Sstevel@tonic-gate
8527c478bd9Sstevel@tonic-gate /* copy the packet to ring buffer */
8537c478bd9Sstevel@tonic-gate memcpy(ptxb, d, ETH_ALEN); /* dst */
8547c478bd9Sstevel@tonic-gate memcpy(ptxb + ETH_ALEN, nic->node_addr, ETH_ALEN); /* src */
8557c478bd9Sstevel@tonic-gate nstype = htons((u16) t); /* type */
8567c478bd9Sstevel@tonic-gate memcpy(ptxb + 2 * ETH_ALEN, (u8 *) & nstype, 2); /* type */
8577c478bd9Sstevel@tonic-gate memcpy(ptxb + ETH_HLEN, p, s);
8587c478bd9Sstevel@tonic-gate
8597c478bd9Sstevel@tonic-gate s += ETH_HLEN;
8607c478bd9Sstevel@tonic-gate while (s < ETH_ZLEN) /* pad to min length */
8617c478bd9Sstevel@tonic-gate ptxb[s++] = '\0';
8627c478bd9Sstevel@tonic-gate
8637c478bd9Sstevel@tonic-gate tx_ring[nr].PacketBuffer = (u32) virt_to_le32desc(ptxb);
8647c478bd9Sstevel@tonic-gate tx_ring[nr].Length = cpu_to_le16(s - 1);
8657c478bd9Sstevel@tonic-gate
8667c478bd9Sstevel@tonic-gate wmb();
8677c478bd9Sstevel@tonic-gate tx_ring[nr].Flags = np->tx_flags;
8687c478bd9Sstevel@tonic-gate
8697c478bd9Sstevel@tonic-gate writel(NVREG_TXRXCTL_KICK, base + NvRegTxRxControl);
8707c478bd9Sstevel@tonic-gate pci_push(base);
8717c478bd9Sstevel@tonic-gate tx_ring[nr].Flags = np->tx_flags;
8727c478bd9Sstevel@tonic-gate np->next_tx++;
8737c478bd9Sstevel@tonic-gate }
8747c478bd9Sstevel@tonic-gate
8757c478bd9Sstevel@tonic-gate /**************************************************************************
8767c478bd9Sstevel@tonic-gate DISABLE - Turn off ethernet interface
8777c478bd9Sstevel@tonic-gate ***************************************************************************/
forcedeth_disable(struct dev * dev __unused)8787c478bd9Sstevel@tonic-gate static void forcedeth_disable(struct dev *dev __unused)
8797c478bd9Sstevel@tonic-gate {
8807c478bd9Sstevel@tonic-gate /* put the card in its initial state */
8817c478bd9Sstevel@tonic-gate /* This function serves 3 purposes.
8827c478bd9Sstevel@tonic-gate * This disables DMA and interrupts so we don't receive
8837c478bd9Sstevel@tonic-gate * unexpected packets or interrupts from the card after
8847c478bd9Sstevel@tonic-gate * etherboot has finished.
8857c478bd9Sstevel@tonic-gate * This frees resources so etherboot may use
8867c478bd9Sstevel@tonic-gate * this driver on another interface
8877c478bd9Sstevel@tonic-gate * This allows etherboot to reinitialize the interface
8887c478bd9Sstevel@tonic-gate * if something is something goes wrong.
8897c478bd9Sstevel@tonic-gate */
8907c478bd9Sstevel@tonic-gate u8 *base = (u8 *) BASE;
8917c478bd9Sstevel@tonic-gate np->in_shutdown = 1;
8927c478bd9Sstevel@tonic-gate stop_tx();
8937c478bd9Sstevel@tonic-gate stop_rx();
8947c478bd9Sstevel@tonic-gate
8957c478bd9Sstevel@tonic-gate /* disable interrupts on the nic or we will lock up */
8967c478bd9Sstevel@tonic-gate writel(0, base + NvRegIrqMask);
8977c478bd9Sstevel@tonic-gate pci_push(base);
8987c478bd9Sstevel@tonic-gate dprintf(("Irqmask is zero again\n"));
8997c478bd9Sstevel@tonic-gate
9007c478bd9Sstevel@tonic-gate /* specia op:o write back the misordered MAC address - otherwise
9017c478bd9Sstevel@tonic-gate * the next probe_nic would see a wrong address.
9027c478bd9Sstevel@tonic-gate */
9037c478bd9Sstevel@tonic-gate writel(np->orig_mac[0], base + NvRegMacAddrA);
9047c478bd9Sstevel@tonic-gate writel(np->orig_mac[1], base + NvRegMacAddrB);
9057c478bd9Sstevel@tonic-gate }
9067c478bd9Sstevel@tonic-gate
9077c478bd9Sstevel@tonic-gate /**************************************************************************
9087c478bd9Sstevel@tonic-gate IRQ - Enable, Disable, or Force interrupts
9097c478bd9Sstevel@tonic-gate ***************************************************************************/
forcedeth_irq(struct nic * nic __unused,irq_action_t action __unused)9107c478bd9Sstevel@tonic-gate static void forcedeth_irq(struct nic *nic __unused, irq_action_t action __unused)
9117c478bd9Sstevel@tonic-gate {
9127c478bd9Sstevel@tonic-gate switch ( action ) {
9137c478bd9Sstevel@tonic-gate case DISABLE :
9147c478bd9Sstevel@tonic-gate break;
9157c478bd9Sstevel@tonic-gate case ENABLE :
9167c478bd9Sstevel@tonic-gate break;
9177c478bd9Sstevel@tonic-gate case FORCE :
9187c478bd9Sstevel@tonic-gate break;
9197c478bd9Sstevel@tonic-gate }
9207c478bd9Sstevel@tonic-gate }
9217c478bd9Sstevel@tonic-gate
9227c478bd9Sstevel@tonic-gate /**************************************************************************
9237c478bd9Sstevel@tonic-gate PROBE - Look for an adapter, this routine's visible to the outside
9247c478bd9Sstevel@tonic-gate ***************************************************************************/
9257c478bd9Sstevel@tonic-gate #define IORESOURCE_MEM 0x00000200
9267c478bd9Sstevel@tonic-gate #define board_found 1
9277c478bd9Sstevel@tonic-gate #define valid_link 0
forcedeth_probe(struct dev * dev,struct pci_device * pci)9287c478bd9Sstevel@tonic-gate static int forcedeth_probe(struct dev *dev, struct pci_device *pci)
9297c478bd9Sstevel@tonic-gate {
9307c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *) dev;
9317c478bd9Sstevel@tonic-gate unsigned long addr;
9327c478bd9Sstevel@tonic-gate int sz;
9337c478bd9Sstevel@tonic-gate u8 *base;
9347c478bd9Sstevel@tonic-gate
9357c478bd9Sstevel@tonic-gate if (pci->ioaddr == 0)
9367c478bd9Sstevel@tonic-gate return 0;
9377c478bd9Sstevel@tonic-gate
9387c478bd9Sstevel@tonic-gate printf("forcedeth.c: Found %s, vendor=0x%hX, device=0x%hX\n",
9397c478bd9Sstevel@tonic-gate pci->name, pci->vendor, pci->dev_id);
9407c478bd9Sstevel@tonic-gate
9417c478bd9Sstevel@tonic-gate nic->irqno = 0;
9427c478bd9Sstevel@tonic-gate nic->ioaddr = pci->ioaddr & ~3;
9437c478bd9Sstevel@tonic-gate
9447c478bd9Sstevel@tonic-gate /* point to private storage */
9457c478bd9Sstevel@tonic-gate np = &npx;
9467c478bd9Sstevel@tonic-gate
9477c478bd9Sstevel@tonic-gate adjust_pci_device(pci);
9487c478bd9Sstevel@tonic-gate
9497c478bd9Sstevel@tonic-gate addr = pci_bar_start(pci, PCI_BASE_ADDRESS_0);
9507c478bd9Sstevel@tonic-gate sz = pci_bar_size(pci, PCI_BASE_ADDRESS_0);
9517c478bd9Sstevel@tonic-gate
9527c478bd9Sstevel@tonic-gate /* BASE is used throughout to address the card */
9537c478bd9Sstevel@tonic-gate BASE = (unsigned long) ioremap(addr, sz);
9547c478bd9Sstevel@tonic-gate if (!BASE)
9557c478bd9Sstevel@tonic-gate return 0;
9567c478bd9Sstevel@tonic-gate //rx_ring[0] = rx_ring;
9577c478bd9Sstevel@tonic-gate //tx_ring[0] = tx_ring;
9587c478bd9Sstevel@tonic-gate
9597c478bd9Sstevel@tonic-gate /* read the mac address */
9607c478bd9Sstevel@tonic-gate base = (u8 *) BASE;
9617c478bd9Sstevel@tonic-gate np->orig_mac[0] = readl(base + NvRegMacAddrA);
9627c478bd9Sstevel@tonic-gate np->orig_mac[1] = readl(base + NvRegMacAddrB);
9637c478bd9Sstevel@tonic-gate
9647c478bd9Sstevel@tonic-gate nic->node_addr[0] = (np->orig_mac[1] >> 8) & 0xff;
9657c478bd9Sstevel@tonic-gate nic->node_addr[1] = (np->orig_mac[1] >> 0) & 0xff;
9667c478bd9Sstevel@tonic-gate nic->node_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
9677c478bd9Sstevel@tonic-gate nic->node_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
9687c478bd9Sstevel@tonic-gate nic->node_addr[4] = (np->orig_mac[0] >> 8) & 0xff;
9697c478bd9Sstevel@tonic-gate nic->node_addr[5] = (np->orig_mac[0] >> 0) & 0xff;
9707c478bd9Sstevel@tonic-gate #ifdef LINUX
9717c478bd9Sstevel@tonic-gate if (!is_valid_ether_addr(dev->dev_addr)) {
9727c478bd9Sstevel@tonic-gate /*
9737c478bd9Sstevel@tonic-gate * Bad mac address. At least one bios sets the mac address
9747c478bd9Sstevel@tonic-gate * to 01:23:45:67:89:ab
9757c478bd9Sstevel@tonic-gate */
9767c478bd9Sstevel@tonic-gate printk(KERN_ERR
9777c478bd9Sstevel@tonic-gate "%s: Invalid Mac address detected: %02x:%02x:%02x:%02x:%02x:%02x\n",
9787c478bd9Sstevel@tonic-gate pci_name(pci_dev), dev->dev_addr[0],
9797c478bd9Sstevel@tonic-gate dev->dev_addr[1], dev->dev_addr[2],
9807c478bd9Sstevel@tonic-gate dev->dev_addr[3], dev->dev_addr[4],
9817c478bd9Sstevel@tonic-gate dev->dev_addr[5]);
9827c478bd9Sstevel@tonic-gate printk(KERN_ERR
9837c478bd9Sstevel@tonic-gate "Please complain to your hardware vendor. Switching to a random MAC.\n");
9847c478bd9Sstevel@tonic-gate dev->dev_addr[0] = 0x00;
9857c478bd9Sstevel@tonic-gate dev->dev_addr[1] = 0x00;
9867c478bd9Sstevel@tonic-gate dev->dev_addr[2] = 0x6c;
9877c478bd9Sstevel@tonic-gate get_random_bytes(&dev->dev_addr[3], 3);
9887c478bd9Sstevel@tonic-gate }
9897c478bd9Sstevel@tonic-gate #endif
9907c478bd9Sstevel@tonic-gate printf("%s: MAC Address %!, ", pci->name, nic->node_addr);
9917c478bd9Sstevel@tonic-gate
9927c478bd9Sstevel@tonic-gate np->tx_flags =
9937c478bd9Sstevel@tonic-gate cpu_to_le16(NV_TX_LASTPACKET | NV_TX_LASTPACKET1 |
9947c478bd9Sstevel@tonic-gate NV_TX_VALID);
9957c478bd9Sstevel@tonic-gate switch (pci->dev_id) {
9967c478bd9Sstevel@tonic-gate case 0x01C3: // nforce
9977c478bd9Sstevel@tonic-gate np->irqmask = NVREG_IRQMASK_WANTED_2;
9987c478bd9Sstevel@tonic-gate np->irqmask |= NVREG_IRQ_TIMER;
9997c478bd9Sstevel@tonic-gate break;
10007c478bd9Sstevel@tonic-gate case 0x0066: // nforce2
10017c478bd9Sstevel@tonic-gate np->tx_flags |= cpu_to_le16(NV_TX_LASTPACKET1);
10027c478bd9Sstevel@tonic-gate np->irqmask = NVREG_IRQMASK_WANTED_2;
10037c478bd9Sstevel@tonic-gate np->irqmask |= NVREG_IRQ_TIMER;
10047c478bd9Sstevel@tonic-gate break;
10057c478bd9Sstevel@tonic-gate case 0x00D6: // nforce3
10067c478bd9Sstevel@tonic-gate np->tx_flags |= cpu_to_le16(NV_TX_LASTPACKET1);
10077c478bd9Sstevel@tonic-gate np->irqmask = NVREG_IRQMASK_WANTED_2;
10087c478bd9Sstevel@tonic-gate np->irqmask |= NVREG_IRQ_TIMER;
10097c478bd9Sstevel@tonic-gate
10107c478bd9Sstevel@tonic-gate }
10117c478bd9Sstevel@tonic-gate dprintf(("%s: forcedeth.c: subsystem: %hX:%hX bound to %s\n",
10127c478bd9Sstevel@tonic-gate pci->name, pci->vendor, pci->dev_id, pci->name));
10137c478bd9Sstevel@tonic-gate
10147c478bd9Sstevel@tonic-gate forcedeth_reset(nic);
10157c478bd9Sstevel@tonic-gate // if (board_found && valid_link)
10167c478bd9Sstevel@tonic-gate /* point to NIC specific routines */
10177c478bd9Sstevel@tonic-gate dev->disable = forcedeth_disable;
10187c478bd9Sstevel@tonic-gate nic->poll = forcedeth_poll;
10197c478bd9Sstevel@tonic-gate nic->transmit = forcedeth_transmit;
10207c478bd9Sstevel@tonic-gate nic->irq = forcedeth_irq;
10217c478bd9Sstevel@tonic-gate return 1;
10227c478bd9Sstevel@tonic-gate // }
10237c478bd9Sstevel@tonic-gate /* else */
10247c478bd9Sstevel@tonic-gate }
10257c478bd9Sstevel@tonic-gate
10267c478bd9Sstevel@tonic-gate static struct pci_id forcedeth_nics[] = {
10277c478bd9Sstevel@tonic-gate PCI_ROM(0x10de, 0x01C3, "nforce", "nForce Ethernet Controller"),
10287c478bd9Sstevel@tonic-gate PCI_ROM(0x10de, 0x0066, "nforce2", "nForce2 Ethernet Controller"),
10297c478bd9Sstevel@tonic-gate PCI_ROM(0x10de, 0x00D6, "nforce3", "nForce3 Ethernet Controller"),
10307c478bd9Sstevel@tonic-gate };
10317c478bd9Sstevel@tonic-gate
10327c478bd9Sstevel@tonic-gate struct pci_driver forcedeth_driver = {
10337c478bd9Sstevel@tonic-gate .type = NIC_DRIVER,
10347c478bd9Sstevel@tonic-gate .name = "forcedeth",
10357c478bd9Sstevel@tonic-gate .probe = forcedeth_probe,
10367c478bd9Sstevel@tonic-gate .ids = forcedeth_nics,
10377c478bd9Sstevel@tonic-gate .id_count = sizeof(forcedeth_nics) / sizeof(forcedeth_nics[0]),
10387c478bd9Sstevel@tonic-gate .class = 0,
10397c478bd9Sstevel@tonic-gate };
1040