17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate * eepro100.c -- This file implements the eepro100 driver for etherboot.
37c478bd9Sstevel@tonic-gate *
47c478bd9Sstevel@tonic-gate *
57c478bd9Sstevel@tonic-gate * Copyright (C) AW Computer Systems.
67c478bd9Sstevel@tonic-gate * written by R.E.Wolff -- R.E.Wolff@BitWizard.nl
77c478bd9Sstevel@tonic-gate *
87c478bd9Sstevel@tonic-gate *
97c478bd9Sstevel@tonic-gate * AW Computer Systems is contributing to the free software community
107c478bd9Sstevel@tonic-gate * by paying for this driver and then putting the result under GPL.
117c478bd9Sstevel@tonic-gate *
127c478bd9Sstevel@tonic-gate * If you need a Linux device driver, please contact BitWizard for a
137c478bd9Sstevel@tonic-gate * quote.
147c478bd9Sstevel@tonic-gate *
157c478bd9Sstevel@tonic-gate *
167c478bd9Sstevel@tonic-gate * This program is free software; you can redistribute it and/or
177c478bd9Sstevel@tonic-gate * modify it under the terms of the GNU General Public License as
187c478bd9Sstevel@tonic-gate * published by the Free Software Foundation; either version 2, or (at
197c478bd9Sstevel@tonic-gate * your option) any later version.
207c478bd9Sstevel@tonic-gate *
217c478bd9Sstevel@tonic-gate * This program is distributed in the hope that it will be useful, but
227c478bd9Sstevel@tonic-gate * WITHOUT ANY WARRANTY; without even the implied warranty of
237c478bd9Sstevel@tonic-gate * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
247c478bd9Sstevel@tonic-gate * General Public License for more details.
257c478bd9Sstevel@tonic-gate *
267c478bd9Sstevel@tonic-gate * You should have received a copy of the GNU General Public License
277c478bd9Sstevel@tonic-gate * along with this program; if not, write to the Free Software
287c478bd9Sstevel@tonic-gate * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
297c478bd9Sstevel@tonic-gate *
307c478bd9Sstevel@tonic-gate *
317c478bd9Sstevel@tonic-gate * date version by what
327c478bd9Sstevel@tonic-gate * Written: May 29 1997 V0.10 REW Initial revision.
337c478bd9Sstevel@tonic-gate * changes: May 31 1997 V0.90 REW Works!
347c478bd9Sstevel@tonic-gate * Jun 1 1997 V0.91 REW Cleanup
357c478bd9Sstevel@tonic-gate * Jun 2 1997 V0.92 REW Add some code documentation
367c478bd9Sstevel@tonic-gate * Jul 25 1997 V1.00 REW Tested by AW to work in a PROM
377c478bd9Sstevel@tonic-gate * Cleanup for publication
387c478bd9Sstevel@tonic-gate *
397c478bd9Sstevel@tonic-gate * This is the etherboot intel etherexpress Pro/100B driver.
407c478bd9Sstevel@tonic-gate *
417c478bd9Sstevel@tonic-gate * It was written from scratch, with Donald Beckers eepro100.c kernel
427c478bd9Sstevel@tonic-gate * driver as a guideline. Mostly the 82557 related definitions and the
437c478bd9Sstevel@tonic-gate * lower level routines have been cut-and-pasted into this source.
447c478bd9Sstevel@tonic-gate *
457c478bd9Sstevel@tonic-gate * The driver was finished before Intel got the NDA out of the closet.
467c478bd9Sstevel@tonic-gate * I still don't have the docs.
477c478bd9Sstevel@tonic-gate * */
487c478bd9Sstevel@tonic-gate
497c478bd9Sstevel@tonic-gate /* Philosophy of this driver.
507c478bd9Sstevel@tonic-gate *
517c478bd9Sstevel@tonic-gate * Probing:
527c478bd9Sstevel@tonic-gate *
537c478bd9Sstevel@tonic-gate * Using the pci.c functions of the Etherboot code, the 82557 chip is detected.
547c478bd9Sstevel@tonic-gate * It is verified that the BIOS initialized everything properly and if
557c478bd9Sstevel@tonic-gate * something is missing it is done now.
567c478bd9Sstevel@tonic-gate *
577c478bd9Sstevel@tonic-gate *
587c478bd9Sstevel@tonic-gate * Initialization:
597c478bd9Sstevel@tonic-gate *
607c478bd9Sstevel@tonic-gate *
617c478bd9Sstevel@tonic-gate * The chip is then initialized to "know" its ethernet address, and to
627c478bd9Sstevel@tonic-gate * start recieving packets. The Linux driver has a whole transmit and
637c478bd9Sstevel@tonic-gate * recieve ring of buffers. This is neat if you need high performance:
647c478bd9Sstevel@tonic-gate * you can write the buffers asynchronously to the chip reading the
657c478bd9Sstevel@tonic-gate * buffers and transmitting them over the network. Performance is NOT
667c478bd9Sstevel@tonic-gate * an issue here. We can boot a 400k kernel in about two
677c478bd9Sstevel@tonic-gate * seconds. (Theory: 0.4 seconds). Booting a system is going to take
687c478bd9Sstevel@tonic-gate * about half a minute anyway, so getting 10 times closer to the
697c478bd9Sstevel@tonic-gate * theoretical limit is going to make a difference of a few percent.
707c478bd9Sstevel@tonic-gate *
717c478bd9Sstevel@tonic-gate *
727c478bd9Sstevel@tonic-gate * Transmitting and recieving.
737c478bd9Sstevel@tonic-gate *
747c478bd9Sstevel@tonic-gate * We have only one transmit descriptor. It has two buffer descriptors:
757c478bd9Sstevel@tonic-gate * one for the header, and the other for the data.
767c478bd9Sstevel@tonic-gate * We have only one receive buffer. The chip is told to recieve packets,
777c478bd9Sstevel@tonic-gate * and suspend itself once it got one. The recieve (poll) routine simply
787c478bd9Sstevel@tonic-gate * looks at the recieve buffer to see if there is already a packet there.
797c478bd9Sstevel@tonic-gate * if there is, the buffer is copied, and the reciever is restarted.
807c478bd9Sstevel@tonic-gate *
817c478bd9Sstevel@tonic-gate * Caveats:
827c478bd9Sstevel@tonic-gate *
837c478bd9Sstevel@tonic-gate * The Etherboot framework moves the code to the 48k segment from
847c478bd9Sstevel@tonic-gate * 0x94000 to 0xa0000. There is just a little room between the end of
857c478bd9Sstevel@tonic-gate * this driver and the 0xa0000 address. If you compile in too many
867c478bd9Sstevel@tonic-gate * features, this will overflow.
877c478bd9Sstevel@tonic-gate * The number under "hex" in the output of size that scrolls by while
887c478bd9Sstevel@tonic-gate * compiling should be less than 8000. Maybe even the stack is up there,
897c478bd9Sstevel@tonic-gate * so that you need even more headroom.
907c478bd9Sstevel@tonic-gate */
917c478bd9Sstevel@tonic-gate
927c478bd9Sstevel@tonic-gate /* The etherboot authors seem to dislike the argument ordering in
937c478bd9Sstevel@tonic-gate * outb macros that Linux uses. I disklike the confusion that this
947c478bd9Sstevel@tonic-gate * has caused even more.... This file uses the Linux argument ordering. */
957c478bd9Sstevel@tonic-gate /* Sorry not us. It's inherited code from FreeBSD. [The authors] */
967c478bd9Sstevel@tonic-gate
977c478bd9Sstevel@tonic-gate #include "etherboot.h"
987c478bd9Sstevel@tonic-gate #include "nic.h"
997c478bd9Sstevel@tonic-gate #include "pci.h"
1007c478bd9Sstevel@tonic-gate #include "timer.h"
1017c478bd9Sstevel@tonic-gate
1027c478bd9Sstevel@tonic-gate static int ioaddr;
1037c478bd9Sstevel@tonic-gate
1047c478bd9Sstevel@tonic-gate typedef unsigned char u8;
1057c478bd9Sstevel@tonic-gate typedef signed char s8;
1067c478bd9Sstevel@tonic-gate typedef unsigned short u16;
1077c478bd9Sstevel@tonic-gate typedef signed short s16;
1087c478bd9Sstevel@tonic-gate typedef unsigned int u32;
1097c478bd9Sstevel@tonic-gate typedef signed int s32;
1107c478bd9Sstevel@tonic-gate
1117c478bd9Sstevel@tonic-gate enum speedo_offsets {
1127c478bd9Sstevel@tonic-gate SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
1137c478bd9Sstevel@tonic-gate SCBPointer = 4, /* General purpose pointer. */
1147c478bd9Sstevel@tonic-gate SCBPort = 8, /* Misc. commands and operands. */
1157c478bd9Sstevel@tonic-gate SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
1167c478bd9Sstevel@tonic-gate SCBCtrlMDI = 16, /* MDI interface control. */
1177c478bd9Sstevel@tonic-gate SCBEarlyRx = 20, /* Early receive byte count. */
1187c478bd9Sstevel@tonic-gate };
1197c478bd9Sstevel@tonic-gate
1207c478bd9Sstevel@tonic-gate enum SCBCmdBits {
1217c478bd9Sstevel@tonic-gate SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000,
1227c478bd9Sstevel@tonic-gate SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400,
1237c478bd9Sstevel@tonic-gate SCBTriggerIntr=0x0200, SCBMaskAll=0x0100,
1247c478bd9Sstevel@tonic-gate /* The rest are Rx and Tx commands. */
1257c478bd9Sstevel@tonic-gate CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, CUShowStats=0x0050,
1267c478bd9Sstevel@tonic-gate CUCmdBase=0x0060, /* CU Base address (set to zero) . */
1277c478bd9Sstevel@tonic-gate CUDumpStats=0x0070, /* Dump then reset stats counters. */
1287c478bd9Sstevel@tonic-gate RxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006,
1297c478bd9Sstevel@tonic-gate RxResumeNoResources=0x0007,
1307c478bd9Sstevel@tonic-gate };
1317c478bd9Sstevel@tonic-gate
1327c478bd9Sstevel@tonic-gate static int do_eeprom_cmd(int cmd, int cmd_len);
1337c478bd9Sstevel@tonic-gate void hd(void *where, int n);
1347c478bd9Sstevel@tonic-gate
1357c478bd9Sstevel@tonic-gate /***********************************************************************/
1367c478bd9Sstevel@tonic-gate /* I82557 related defines */
1377c478bd9Sstevel@tonic-gate /***********************************************************************/
1387c478bd9Sstevel@tonic-gate
1397c478bd9Sstevel@tonic-gate /* Serial EEPROM section.
1407c478bd9Sstevel@tonic-gate A "bit" grungy, but we work our way through bit-by-bit :->. */
1417c478bd9Sstevel@tonic-gate /* EEPROM_Ctrl bits. */
1427c478bd9Sstevel@tonic-gate #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
1437c478bd9Sstevel@tonic-gate #define EE_CS 0x02 /* EEPROM chip select. */
1447c478bd9Sstevel@tonic-gate #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
1457c478bd9Sstevel@tonic-gate #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
1467c478bd9Sstevel@tonic-gate #define EE_WRITE_0 0x4802
1477c478bd9Sstevel@tonic-gate #define EE_WRITE_1 0x4806
1487c478bd9Sstevel@tonic-gate #define EE_ENB (0x4800 | EE_CS)
1497c478bd9Sstevel@tonic-gate
1507c478bd9Sstevel@tonic-gate /* The EEPROM commands include the alway-set leading bit. */
1517c478bd9Sstevel@tonic-gate #define EE_READ_CMD 6
1527c478bd9Sstevel@tonic-gate
1537c478bd9Sstevel@tonic-gate /* The SCB accepts the following controls for the Tx and Rx units: */
1547c478bd9Sstevel@tonic-gate #define CU_START 0x0010
1557c478bd9Sstevel@tonic-gate #define CU_RESUME 0x0020
1567c478bd9Sstevel@tonic-gate #define CU_STATSADDR 0x0040
1577c478bd9Sstevel@tonic-gate #define CU_SHOWSTATS 0x0050 /* Dump statistics counters. */
1587c478bd9Sstevel@tonic-gate #define CU_CMD_BASE 0x0060 /* Base address to add to add CU commands. */
1597c478bd9Sstevel@tonic-gate #define CU_DUMPSTATS 0x0070 /* Dump then reset stats counters. */
1607c478bd9Sstevel@tonic-gate
1617c478bd9Sstevel@tonic-gate #define RX_START 0x0001
1627c478bd9Sstevel@tonic-gate #define RX_RESUME 0x0002
1637c478bd9Sstevel@tonic-gate #define RX_ABORT 0x0004
1647c478bd9Sstevel@tonic-gate #define RX_ADDR_LOAD 0x0006
1657c478bd9Sstevel@tonic-gate #define RX_RESUMENR 0x0007
1667c478bd9Sstevel@tonic-gate #define INT_MASK 0x0100
1677c478bd9Sstevel@tonic-gate #define DRVR_INT 0x0200 /* Driver generated interrupt. */
1687c478bd9Sstevel@tonic-gate
1697c478bd9Sstevel@tonic-gate enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,
1707c478bd9Sstevel@tonic-gate S80C24, PhyUndefined, DP83840A=10, };
1717c478bd9Sstevel@tonic-gate
1727c478bd9Sstevel@tonic-gate /* Commands that can be put in a command list entry. */
1737c478bd9Sstevel@tonic-gate enum commands {
1747c478bd9Sstevel@tonic-gate CmdNOp = 0,
1757c478bd9Sstevel@tonic-gate CmdIASetup = 1,
1767c478bd9Sstevel@tonic-gate CmdConfigure = 2,
1777c478bd9Sstevel@tonic-gate CmdMulticastList = 3,
1787c478bd9Sstevel@tonic-gate CmdTx = 4,
1797c478bd9Sstevel@tonic-gate CmdTDR = 5,
1807c478bd9Sstevel@tonic-gate CmdDump = 6,
1817c478bd9Sstevel@tonic-gate CmdDiagnose = 7,
1827c478bd9Sstevel@tonic-gate
1837c478bd9Sstevel@tonic-gate /* And some extra flags: */
1847c478bd9Sstevel@tonic-gate CmdSuspend = 0x4000, /* Suspend after completion. */
1857c478bd9Sstevel@tonic-gate CmdIntr = 0x2000, /* Interrupt after completion. */
1867c478bd9Sstevel@tonic-gate CmdTxFlex = 0x0008, /* Use "Flexible mode" for CmdTx command. */
1877c478bd9Sstevel@tonic-gate };
1887c478bd9Sstevel@tonic-gate
1897c478bd9Sstevel@tonic-gate /* How to wait for the command unit to accept a command.
1907c478bd9Sstevel@tonic-gate Typically this takes 0 ticks. */
wait_for_cmd_done(int cmd_ioaddr)1917c478bd9Sstevel@tonic-gate static inline void wait_for_cmd_done(int cmd_ioaddr)
1927c478bd9Sstevel@tonic-gate {
1937c478bd9Sstevel@tonic-gate int wait = 0;
1947c478bd9Sstevel@tonic-gate int delayed_cmd;
1957c478bd9Sstevel@tonic-gate
1967c478bd9Sstevel@tonic-gate do
1977c478bd9Sstevel@tonic-gate if (inb(cmd_ioaddr) == 0) return;
1987c478bd9Sstevel@tonic-gate while(++wait <= 100);
1997c478bd9Sstevel@tonic-gate delayed_cmd = inb(cmd_ioaddr);
2007c478bd9Sstevel@tonic-gate do
2017c478bd9Sstevel@tonic-gate if (inb(cmd_ioaddr) == 0) break;
2027c478bd9Sstevel@tonic-gate while(++wait <= 10000);
2037c478bd9Sstevel@tonic-gate printf("Command %2.2x was not immediately accepted, %d ticks!\n",
2047c478bd9Sstevel@tonic-gate delayed_cmd, wait);
2057c478bd9Sstevel@tonic-gate }
2067c478bd9Sstevel@tonic-gate
2077c478bd9Sstevel@tonic-gate /* Elements of the dump_statistics block. This block must be lword aligned. */
2087c478bd9Sstevel@tonic-gate static struct speedo_stats {
2097c478bd9Sstevel@tonic-gate u32 tx_good_frames;
2107c478bd9Sstevel@tonic-gate u32 tx_coll16_errs;
2117c478bd9Sstevel@tonic-gate u32 tx_late_colls;
2127c478bd9Sstevel@tonic-gate u32 tx_underruns;
2137c478bd9Sstevel@tonic-gate u32 tx_lost_carrier;
2147c478bd9Sstevel@tonic-gate u32 tx_deferred;
2157c478bd9Sstevel@tonic-gate u32 tx_one_colls;
2167c478bd9Sstevel@tonic-gate u32 tx_multi_colls;
2177c478bd9Sstevel@tonic-gate u32 tx_total_colls;
2187c478bd9Sstevel@tonic-gate u32 rx_good_frames;
2197c478bd9Sstevel@tonic-gate u32 rx_crc_errs;
2207c478bd9Sstevel@tonic-gate u32 rx_align_errs;
2217c478bd9Sstevel@tonic-gate u32 rx_resource_errs;
2227c478bd9Sstevel@tonic-gate u32 rx_overrun_errs;
2237c478bd9Sstevel@tonic-gate u32 rx_colls_errs;
2247c478bd9Sstevel@tonic-gate u32 rx_runt_errs;
2257c478bd9Sstevel@tonic-gate u32 done_marker;
2267c478bd9Sstevel@tonic-gate } lstats;
2277c478bd9Sstevel@tonic-gate
2287c478bd9Sstevel@tonic-gate /* A speedo3 TX buffer descriptor with two buffers... */
2297c478bd9Sstevel@tonic-gate static struct TxFD {
2307c478bd9Sstevel@tonic-gate volatile s16 status;
2317c478bd9Sstevel@tonic-gate s16 command;
2327c478bd9Sstevel@tonic-gate u32 link; /* void * */
2337c478bd9Sstevel@tonic-gate u32 tx_desc_addr; /* (almost) Always points to the tx_buf_addr element. */
2347c478bd9Sstevel@tonic-gate s32 count; /* # of TBD (=2), Tx start thresh., etc. */
2357c478bd9Sstevel@tonic-gate /* This constitutes two "TBD" entries: hdr and data */
2367c478bd9Sstevel@tonic-gate u32 tx_buf_addr0; /* void *, header of frame to be transmitted. */
2377c478bd9Sstevel@tonic-gate s32 tx_buf_size0; /* Length of Tx hdr. */
2387c478bd9Sstevel@tonic-gate u32 tx_buf_addr1; /* void *, data to be transmitted. */
2397c478bd9Sstevel@tonic-gate s32 tx_buf_size1; /* Length of Tx data. */
2407c478bd9Sstevel@tonic-gate } txfd;
2417c478bd9Sstevel@tonic-gate
2427c478bd9Sstevel@tonic-gate struct RxFD { /* Receive frame descriptor. */
2437c478bd9Sstevel@tonic-gate volatile s16 status;
2447c478bd9Sstevel@tonic-gate s16 command;
2457c478bd9Sstevel@tonic-gate u32 link; /* struct RxFD * */
2467c478bd9Sstevel@tonic-gate u32 rx_buf_addr; /* void * */
2477c478bd9Sstevel@tonic-gate u16 count;
2487c478bd9Sstevel@tonic-gate u16 size;
2497c478bd9Sstevel@tonic-gate char packet[1518];
2507c478bd9Sstevel@tonic-gate };
2517c478bd9Sstevel@tonic-gate
2527c478bd9Sstevel@tonic-gate static struct RxFD rxfd;
2537c478bd9Sstevel@tonic-gate #define ACCESS(x) x.
2547c478bd9Sstevel@tonic-gate
2557c478bd9Sstevel@tonic-gate static int congenb = 0; /* Enable congestion control in the DP83840. */
2567c478bd9Sstevel@tonic-gate static int txfifo = 8; /* Tx FIFO threshold in 4 byte units, 0-15 */
2577c478bd9Sstevel@tonic-gate static int rxfifo = 8; /* Rx FIFO threshold, default 32 bytes. */
2587c478bd9Sstevel@tonic-gate static int txdmacount = 0; /* Tx DMA burst length, 0-127, default 0. */
2597c478bd9Sstevel@tonic-gate static int rxdmacount = 0; /* Rx DMA length, 0 means no preemption. */
2607c478bd9Sstevel@tonic-gate
2617c478bd9Sstevel@tonic-gate /* I don't understand a byte in this structure. It was copied from the
2627c478bd9Sstevel@tonic-gate * Linux kernel initialization for the eepro100. -- REW */
2637c478bd9Sstevel@tonic-gate static struct ConfCmd {
2647c478bd9Sstevel@tonic-gate s16 status;
2657c478bd9Sstevel@tonic-gate s16 command;
2667c478bd9Sstevel@tonic-gate u32 link;
2677c478bd9Sstevel@tonic-gate unsigned char data[22];
2687c478bd9Sstevel@tonic-gate } confcmd = {
2697c478bd9Sstevel@tonic-gate 0, 0, 0, /* filled in later */
2707c478bd9Sstevel@tonic-gate {22, 0x08, 0, 0, 0, 0x80, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */
2717c478bd9Sstevel@tonic-gate 0, 0x2E, 0, 0x60, 0,
2727c478bd9Sstevel@tonic-gate 0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */
2737c478bd9Sstevel@tonic-gate 0x3f, 0x05, }
2747c478bd9Sstevel@tonic-gate };
2757c478bd9Sstevel@tonic-gate
2767c478bd9Sstevel@tonic-gate /***********************************************************************/
2777c478bd9Sstevel@tonic-gate /* Locally used functions */
2787c478bd9Sstevel@tonic-gate /***********************************************************************/
2797c478bd9Sstevel@tonic-gate
2807c478bd9Sstevel@tonic-gate /* Support function: mdio_write
2817c478bd9Sstevel@tonic-gate *
2827c478bd9Sstevel@tonic-gate * This probably writes to the "physical media interface chip".
2837c478bd9Sstevel@tonic-gate * -- REW
2847c478bd9Sstevel@tonic-gate */
2857c478bd9Sstevel@tonic-gate
mdio_write(int phy_id,int location,int value)2867c478bd9Sstevel@tonic-gate static int mdio_write(int phy_id, int location, int value)
2877c478bd9Sstevel@tonic-gate {
2887c478bd9Sstevel@tonic-gate int val, boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
2897c478bd9Sstevel@tonic-gate
2907c478bd9Sstevel@tonic-gate outl(0x04000000 | (location<<16) | (phy_id<<21) | value,
2917c478bd9Sstevel@tonic-gate ioaddr + SCBCtrlMDI);
2927c478bd9Sstevel@tonic-gate do {
2937c478bd9Sstevel@tonic-gate udelay(16);
2947c478bd9Sstevel@tonic-gate
2957c478bd9Sstevel@tonic-gate val = inl(ioaddr + SCBCtrlMDI);
2967c478bd9Sstevel@tonic-gate if (--boguscnt < 0) {
2977c478bd9Sstevel@tonic-gate printf(" mdio_write() timed out with val = %X.\n", val);
2987c478bd9Sstevel@tonic-gate break;
2997c478bd9Sstevel@tonic-gate }
3007c478bd9Sstevel@tonic-gate } while (! (val & 0x10000000));
3017c478bd9Sstevel@tonic-gate return val & 0xffff;
3027c478bd9Sstevel@tonic-gate }
3037c478bd9Sstevel@tonic-gate
3047c478bd9Sstevel@tonic-gate /* Support function: mdio_read
3057c478bd9Sstevel@tonic-gate *
3067c478bd9Sstevel@tonic-gate * This probably reads a register in the "physical media interface chip".
3077c478bd9Sstevel@tonic-gate * -- REW
3087c478bd9Sstevel@tonic-gate */
mdio_read(int phy_id,int location)3097c478bd9Sstevel@tonic-gate static int mdio_read(int phy_id, int location)
3107c478bd9Sstevel@tonic-gate {
3117c478bd9Sstevel@tonic-gate int val, boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
3127c478bd9Sstevel@tonic-gate outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);
3137c478bd9Sstevel@tonic-gate do {
3147c478bd9Sstevel@tonic-gate udelay(16);
3157c478bd9Sstevel@tonic-gate
3167c478bd9Sstevel@tonic-gate val = inl(ioaddr + SCBCtrlMDI);
3177c478bd9Sstevel@tonic-gate
3187c478bd9Sstevel@tonic-gate if (--boguscnt < 0) {
3197c478bd9Sstevel@tonic-gate printf( " mdio_read() timed out with val = %X.\n", val);
3207c478bd9Sstevel@tonic-gate break;
3217c478bd9Sstevel@tonic-gate }
3227c478bd9Sstevel@tonic-gate } while (! (val & 0x10000000));
3237c478bd9Sstevel@tonic-gate return val & 0xffff;
3247c478bd9Sstevel@tonic-gate }
3257c478bd9Sstevel@tonic-gate
3267c478bd9Sstevel@tonic-gate /* The fixes for the code were kindly provided by Dragan Stancevic
3277c478bd9Sstevel@tonic-gate <visitor@valinux.com> to strictly follow Intel specifications of EEPROM
3287c478bd9Sstevel@tonic-gate access timing.
3297c478bd9Sstevel@tonic-gate The publicly available sheet 64486302 (sec. 3.1) specifies 1us access
3307c478bd9Sstevel@tonic-gate interval for serial EEPROM. However, it looks like that there is an
3317c478bd9Sstevel@tonic-gate additional requirement dictating larger udelay's in the code below.
3327c478bd9Sstevel@tonic-gate 2000/05/24 SAW */
do_eeprom_cmd(int cmd,int cmd_len)3337c478bd9Sstevel@tonic-gate static int do_eeprom_cmd(int cmd, int cmd_len)
3347c478bd9Sstevel@tonic-gate {
3357c478bd9Sstevel@tonic-gate unsigned retval = 0;
3367c478bd9Sstevel@tonic-gate long ee_addr = ioaddr + SCBeeprom;
3377c478bd9Sstevel@tonic-gate
3387c478bd9Sstevel@tonic-gate outw(EE_ENB, ee_addr); udelay(2);
3397c478bd9Sstevel@tonic-gate outw(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2);
3407c478bd9Sstevel@tonic-gate
3417c478bd9Sstevel@tonic-gate /* Shift the command bits out. */
3427c478bd9Sstevel@tonic-gate do {
3437c478bd9Sstevel@tonic-gate short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
3447c478bd9Sstevel@tonic-gate outw(dataval, ee_addr); udelay(2);
3457c478bd9Sstevel@tonic-gate outw(dataval | EE_SHIFT_CLK, ee_addr); udelay(2);
3467c478bd9Sstevel@tonic-gate retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
3477c478bd9Sstevel@tonic-gate } while (--cmd_len >= 0);
3487c478bd9Sstevel@tonic-gate outw(EE_ENB, ee_addr); udelay(2);
3497c478bd9Sstevel@tonic-gate
3507c478bd9Sstevel@tonic-gate /* Terminate the EEPROM access. */
3517c478bd9Sstevel@tonic-gate outw(EE_ENB & ~EE_CS, ee_addr);
3527c478bd9Sstevel@tonic-gate return retval;
3537c478bd9Sstevel@tonic-gate }
3547c478bd9Sstevel@tonic-gate
3557c478bd9Sstevel@tonic-gate #if 0
3567c478bd9Sstevel@tonic-gate static inline void whereami (const char *str)
3577c478bd9Sstevel@tonic-gate {
3587c478bd9Sstevel@tonic-gate printf ("%s\n", str);
3597c478bd9Sstevel@tonic-gate sleep (2);
3607c478bd9Sstevel@tonic-gate }
3617c478bd9Sstevel@tonic-gate #else
3627c478bd9Sstevel@tonic-gate #define whereami(s)
3637c478bd9Sstevel@tonic-gate #endif
3647c478bd9Sstevel@tonic-gate
eepro100_irq(struct nic * nic __unused,irq_action_t action __unused)3657c478bd9Sstevel@tonic-gate static void eepro100_irq(struct nic *nic __unused, irq_action_t action __unused)
3667c478bd9Sstevel@tonic-gate {
3677c478bd9Sstevel@tonic-gate switch ( action ) {
3687c478bd9Sstevel@tonic-gate case DISABLE :
3697c478bd9Sstevel@tonic-gate break;
3707c478bd9Sstevel@tonic-gate case ENABLE :
3717c478bd9Sstevel@tonic-gate break;
3727c478bd9Sstevel@tonic-gate case FORCE :
3737c478bd9Sstevel@tonic-gate break;
3747c478bd9Sstevel@tonic-gate }
3757c478bd9Sstevel@tonic-gate }
3767c478bd9Sstevel@tonic-gate
3777c478bd9Sstevel@tonic-gate /* function: eepro100_transmit
3787c478bd9Sstevel@tonic-gate * This transmits a packet.
3797c478bd9Sstevel@tonic-gate *
3807c478bd9Sstevel@tonic-gate * Arguments: char d[6]: destination ethernet address.
3817c478bd9Sstevel@tonic-gate * unsigned short t: ethernet protocol type.
3827c478bd9Sstevel@tonic-gate * unsigned short s: size of the data-part of the packet.
3837c478bd9Sstevel@tonic-gate * char *p: the data for the packet.
3847c478bd9Sstevel@tonic-gate * returns: void.
3857c478bd9Sstevel@tonic-gate */
3867c478bd9Sstevel@tonic-gate
eepro100_transmit(struct nic * nic,const char * d,unsigned int t,unsigned int s,const char * p)3877c478bd9Sstevel@tonic-gate static void eepro100_transmit(struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p)
3887c478bd9Sstevel@tonic-gate {
3897c478bd9Sstevel@tonic-gate struct eth_hdr {
3907c478bd9Sstevel@tonic-gate unsigned char dst_addr[ETH_ALEN];
3917c478bd9Sstevel@tonic-gate unsigned char src_addr[ETH_ALEN];
3927c478bd9Sstevel@tonic-gate unsigned short type;
3937c478bd9Sstevel@tonic-gate } hdr;
3947c478bd9Sstevel@tonic-gate unsigned short status;
3957c478bd9Sstevel@tonic-gate int s1, s2;
3967c478bd9Sstevel@tonic-gate
3977c478bd9Sstevel@tonic-gate status = inw(ioaddr + SCBStatus);
3987c478bd9Sstevel@tonic-gate /* Acknowledge all of the current interrupt sources ASAP. */
3997c478bd9Sstevel@tonic-gate outw(status & 0xfc00, ioaddr + SCBStatus);
4007c478bd9Sstevel@tonic-gate
4017c478bd9Sstevel@tonic-gate #ifdef DEBUG
4027c478bd9Sstevel@tonic-gate printf ("transmitting type %hX packet (%d bytes). status = %hX, cmd=%hX\n",
4037c478bd9Sstevel@tonic-gate t, s, status, inw (ioaddr + SCBCmd));
4047c478bd9Sstevel@tonic-gate #endif
4057c478bd9Sstevel@tonic-gate
4067c478bd9Sstevel@tonic-gate memcpy (&hdr.dst_addr, d, ETH_ALEN);
4077c478bd9Sstevel@tonic-gate memcpy (&hdr.src_addr, nic->node_addr, ETH_ALEN);
4087c478bd9Sstevel@tonic-gate
4097c478bd9Sstevel@tonic-gate hdr.type = htons (t);
4107c478bd9Sstevel@tonic-gate
4117c478bd9Sstevel@tonic-gate txfd.status = 0;
4127c478bd9Sstevel@tonic-gate txfd.command = CmdSuspend | CmdTx | CmdTxFlex;
4137c478bd9Sstevel@tonic-gate txfd.link = virt_to_bus (&txfd);
4147c478bd9Sstevel@tonic-gate txfd.count = 0x02208000;
4157c478bd9Sstevel@tonic-gate txfd.tx_desc_addr = virt_to_bus(&txfd.tx_buf_addr0);
4167c478bd9Sstevel@tonic-gate
4177c478bd9Sstevel@tonic-gate txfd.tx_buf_addr0 = virt_to_bus (&hdr);
4187c478bd9Sstevel@tonic-gate txfd.tx_buf_size0 = sizeof (hdr);
4197c478bd9Sstevel@tonic-gate
4207c478bd9Sstevel@tonic-gate txfd.tx_buf_addr1 = virt_to_bus (p);
4217c478bd9Sstevel@tonic-gate txfd.tx_buf_size1 = s;
4227c478bd9Sstevel@tonic-gate
4237c478bd9Sstevel@tonic-gate #ifdef DEBUG
4247c478bd9Sstevel@tonic-gate printf ("txfd: \n");
4257c478bd9Sstevel@tonic-gate hd (&txfd, sizeof (txfd));
4267c478bd9Sstevel@tonic-gate #endif
4277c478bd9Sstevel@tonic-gate
4287c478bd9Sstevel@tonic-gate outl(virt_to_bus(&txfd), ioaddr + SCBPointer);
4297c478bd9Sstevel@tonic-gate outw(INT_MASK | CU_START, ioaddr + SCBCmd);
4307c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
4317c478bd9Sstevel@tonic-gate
4327c478bd9Sstevel@tonic-gate s1 = inw (ioaddr + SCBStatus);
4337c478bd9Sstevel@tonic-gate load_timer2(10*TICKS_PER_MS); /* timeout 10 ms for transmit */
4347c478bd9Sstevel@tonic-gate while (!txfd.status && timer2_running())
4357c478bd9Sstevel@tonic-gate /* Wait */;
4367c478bd9Sstevel@tonic-gate s2 = inw (ioaddr + SCBStatus);
4377c478bd9Sstevel@tonic-gate
4387c478bd9Sstevel@tonic-gate #ifdef DEBUG
4397c478bd9Sstevel@tonic-gate printf ("s1 = %hX, s2 = %hX.\n", s1, s2);
4407c478bd9Sstevel@tonic-gate #endif
4417c478bd9Sstevel@tonic-gate }
4427c478bd9Sstevel@tonic-gate
4437c478bd9Sstevel@tonic-gate /*
4447c478bd9Sstevel@tonic-gate * Sometimes the receiver stops making progress. This routine knows how to
4457c478bd9Sstevel@tonic-gate * get it going again, without losing packets or being otherwise nasty like
4467c478bd9Sstevel@tonic-gate * a chip reset would be. Previously the driver had a whole sequence
4477c478bd9Sstevel@tonic-gate * of if RxSuspended, if it's no buffers do one thing, if it's no resources,
4487c478bd9Sstevel@tonic-gate * do another, etc. But those things don't really matter. Separate logic
4497c478bd9Sstevel@tonic-gate * in the ISR provides for allocating buffers--the other half of operation
4507c478bd9Sstevel@tonic-gate * is just making sure the receiver is active. speedo_rx_soft_reset does that.
4517c478bd9Sstevel@tonic-gate * This problem with the old, more involved algorithm is shown up under
4527c478bd9Sstevel@tonic-gate * ping floods on the order of 60K packets/second on a 100Mbps fdx network.
4537c478bd9Sstevel@tonic-gate */
4547c478bd9Sstevel@tonic-gate static void
speedo_rx_soft_reset(void)4557c478bd9Sstevel@tonic-gate speedo_rx_soft_reset(void)
4567c478bd9Sstevel@tonic-gate {
4577c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
4587c478bd9Sstevel@tonic-gate /*
4597c478bd9Sstevel@tonic-gate * Put the hardware into a known state.
4607c478bd9Sstevel@tonic-gate */
4617c478bd9Sstevel@tonic-gate outb(RX_ABORT, ioaddr + SCBCmd);
4627c478bd9Sstevel@tonic-gate
4637c478bd9Sstevel@tonic-gate ACCESS(rxfd)rx_buf_addr = 0xffffffff;
4647c478bd9Sstevel@tonic-gate
4657c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
4667c478bd9Sstevel@tonic-gate
4677c478bd9Sstevel@tonic-gate outb(RX_START, ioaddr + SCBCmd);
4687c478bd9Sstevel@tonic-gate }
4697c478bd9Sstevel@tonic-gate
4707c478bd9Sstevel@tonic-gate /* function: eepro100_poll / eth_poll
4717c478bd9Sstevel@tonic-gate * This recieves a packet from the network.
4727c478bd9Sstevel@tonic-gate *
4737c478bd9Sstevel@tonic-gate * Arguments: none
4747c478bd9Sstevel@tonic-gate *
4757c478bd9Sstevel@tonic-gate * returns: 1 if a packet was recieved.
4767c478bd9Sstevel@tonic-gate * 0 if no pacet was recieved.
4777c478bd9Sstevel@tonic-gate * side effects:
4787c478bd9Sstevel@tonic-gate * returns the packet in the array nic->packet.
4797c478bd9Sstevel@tonic-gate * returns the length of the packet in nic->packetlen.
4807c478bd9Sstevel@tonic-gate */
4817c478bd9Sstevel@tonic-gate
eepro100_poll(struct nic * nic,int retrieve)4827c478bd9Sstevel@tonic-gate static int eepro100_poll(struct nic *nic, int retrieve)
4837c478bd9Sstevel@tonic-gate {
4847c478bd9Sstevel@tonic-gate unsigned int status;
4857c478bd9Sstevel@tonic-gate status = inw(ioaddr + SCBStatus);
4867c478bd9Sstevel@tonic-gate
4877c478bd9Sstevel@tonic-gate if (!ACCESS(rxfd)status)
4887c478bd9Sstevel@tonic-gate return 0;
4897c478bd9Sstevel@tonic-gate
4907c478bd9Sstevel@tonic-gate /* There is a packet ready */
4917c478bd9Sstevel@tonic-gate if ( ! retrieve ) return 1;
4927c478bd9Sstevel@tonic-gate
4937c478bd9Sstevel@tonic-gate /*
4947c478bd9Sstevel@tonic-gate * The chip may have suspended reception for various reasons.
4957c478bd9Sstevel@tonic-gate * Check for that, and re-prime it should this be the case.
4967c478bd9Sstevel@tonic-gate */
4977c478bd9Sstevel@tonic-gate switch ((status >> 2) & 0xf) {
4987c478bd9Sstevel@tonic-gate case 0: /* Idle */
4997c478bd9Sstevel@tonic-gate break;
5007c478bd9Sstevel@tonic-gate case 1: /* Suspended */
5017c478bd9Sstevel@tonic-gate case 2: /* No resources (RxFDs) */
5027c478bd9Sstevel@tonic-gate case 9: /* Suspended with no more RBDs */
5037c478bd9Sstevel@tonic-gate case 10: /* No resources due to no RBDs */
5047c478bd9Sstevel@tonic-gate case 12: /* Ready with no RBDs */
5057c478bd9Sstevel@tonic-gate speedo_rx_soft_reset();
5067c478bd9Sstevel@tonic-gate break;
5077c478bd9Sstevel@tonic-gate case 3: case 5: case 6: case 7: case 8:
5087c478bd9Sstevel@tonic-gate case 11: case 13: case 14: case 15:
5097c478bd9Sstevel@tonic-gate /* these are all reserved values */
5107c478bd9Sstevel@tonic-gate break;
5117c478bd9Sstevel@tonic-gate }
5127c478bd9Sstevel@tonic-gate
5137c478bd9Sstevel@tonic-gate /* Ok. We got a packet. Now restart the reciever.... */
5147c478bd9Sstevel@tonic-gate ACCESS(rxfd)status = 0;
5157c478bd9Sstevel@tonic-gate ACCESS(rxfd)command = 0xc000;
5167c478bd9Sstevel@tonic-gate outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
5177c478bd9Sstevel@tonic-gate outw(INT_MASK | RX_START, ioaddr + SCBCmd);
5187c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
5197c478bd9Sstevel@tonic-gate
5207c478bd9Sstevel@tonic-gate #ifdef DEBUG
5217c478bd9Sstevel@tonic-gate printf ("Got a packet: Len = %d.\n", ACCESS(rxfd)count & 0x3fff);
5227c478bd9Sstevel@tonic-gate #endif
5237c478bd9Sstevel@tonic-gate nic->packetlen = ACCESS(rxfd)count & 0x3fff;
5247c478bd9Sstevel@tonic-gate memcpy (nic->packet, ACCESS(rxfd)packet, nic->packetlen);
5257c478bd9Sstevel@tonic-gate #ifdef DEBUG
5267c478bd9Sstevel@tonic-gate hd (nic->packet, 0x30);
5277c478bd9Sstevel@tonic-gate #endif
5287c478bd9Sstevel@tonic-gate return 1;
5297c478bd9Sstevel@tonic-gate }
5307c478bd9Sstevel@tonic-gate
5317c478bd9Sstevel@tonic-gate /* function: eepro100_disable
5327c478bd9Sstevel@tonic-gate * resets the card. This is used to allow Etherboot or Linux
5337c478bd9Sstevel@tonic-gate * to probe the card again from a "virginal" state....
5347c478bd9Sstevel@tonic-gate * Arguments: none
5357c478bd9Sstevel@tonic-gate *
5367c478bd9Sstevel@tonic-gate * returns: void.
5377c478bd9Sstevel@tonic-gate */
eepro100_disable(struct dev * dev __unused)5387c478bd9Sstevel@tonic-gate static void eepro100_disable(struct dev *dev __unused)
5397c478bd9Sstevel@tonic-gate {
5407c478bd9Sstevel@tonic-gate /* from eepro100_reset */
5417c478bd9Sstevel@tonic-gate outl(0, ioaddr + SCBPort);
5427c478bd9Sstevel@tonic-gate /* from eepro100_disable */
5437c478bd9Sstevel@tonic-gate /* See if this PartialReset solves the problem with interfering with
5447c478bd9Sstevel@tonic-gate kernel operation after Etherboot hands over. - Ken 20001102 */
5457c478bd9Sstevel@tonic-gate outl(2, ioaddr + SCBPort);
5467c478bd9Sstevel@tonic-gate
5477c478bd9Sstevel@tonic-gate /* The following is from the Intel e100 driver.
5487c478bd9Sstevel@tonic-gate * This hopefully solves the problem with hanging hard DOS images. */
5497c478bd9Sstevel@tonic-gate
5507c478bd9Sstevel@tonic-gate /* wait for the reset to take effect */
5517c478bd9Sstevel@tonic-gate udelay(20);
5527c478bd9Sstevel@tonic-gate
5537c478bd9Sstevel@tonic-gate /* Mask off our interrupt line -- it is unmasked after reset */
5547c478bd9Sstevel@tonic-gate {
5557c478bd9Sstevel@tonic-gate u16 intr_status;
5567c478bd9Sstevel@tonic-gate /* Disable interrupts on our PCI board by setting the mask bit */
5577c478bd9Sstevel@tonic-gate outw(INT_MASK, ioaddr + SCBCmd);
5587c478bd9Sstevel@tonic-gate intr_status = inw(ioaddr + SCBStatus);
5597c478bd9Sstevel@tonic-gate /* ack and clear intrs */
5607c478bd9Sstevel@tonic-gate outw(intr_status, ioaddr + SCBStatus);
5617c478bd9Sstevel@tonic-gate inw(ioaddr + SCBStatus);
5627c478bd9Sstevel@tonic-gate }
5637c478bd9Sstevel@tonic-gate }
5647c478bd9Sstevel@tonic-gate
5657c478bd9Sstevel@tonic-gate /* exported function: eepro100_probe / eth_probe
5667c478bd9Sstevel@tonic-gate * initializes a card
5677c478bd9Sstevel@tonic-gate *
5687c478bd9Sstevel@tonic-gate * side effects:
5697c478bd9Sstevel@tonic-gate * leaves the ioaddress of the 82557 chip in the variable ioaddr.
5707c478bd9Sstevel@tonic-gate * leaves the 82557 initialized, and ready to recieve packets.
5717c478bd9Sstevel@tonic-gate */
5727c478bd9Sstevel@tonic-gate
eepro100_probe(struct dev * dev,struct pci_device * p)5737c478bd9Sstevel@tonic-gate static int eepro100_probe(struct dev *dev, struct pci_device *p)
5747c478bd9Sstevel@tonic-gate {
5757c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *)dev;
5767c478bd9Sstevel@tonic-gate unsigned short sum = 0;
5777c478bd9Sstevel@tonic-gate int i;
5787c478bd9Sstevel@tonic-gate int read_cmd, ee_size;
5797c478bd9Sstevel@tonic-gate int options;
5807c478bd9Sstevel@tonic-gate int rx_mode;
5817c478bd9Sstevel@tonic-gate
5827c478bd9Sstevel@tonic-gate /* we cache only the first few words of the EEPROM data
5837c478bd9Sstevel@tonic-gate be careful not to access beyond this array */
5847c478bd9Sstevel@tonic-gate unsigned short eeprom[16];
5857c478bd9Sstevel@tonic-gate
5867c478bd9Sstevel@tonic-gate if (p->ioaddr == 0)
5877c478bd9Sstevel@tonic-gate return 0;
5887c478bd9Sstevel@tonic-gate ioaddr = p->ioaddr & ~3; /* Mask the bit that says "this is an io addr" */
5897c478bd9Sstevel@tonic-gate nic->ioaddr = ioaddr;
5907c478bd9Sstevel@tonic-gate
5917c478bd9Sstevel@tonic-gate adjust_pci_device(p);
5927c478bd9Sstevel@tonic-gate
5937c478bd9Sstevel@tonic-gate /* Copy IRQ from PCI information */
5947c478bd9Sstevel@tonic-gate /* nic->irqno = pci->irq; */
5957c478bd9Sstevel@tonic-gate nic->irqno = 0;
5967c478bd9Sstevel@tonic-gate
5977c478bd9Sstevel@tonic-gate if ((do_eeprom_cmd(EE_READ_CMD << 24, 27) & 0xffe0000)
5987c478bd9Sstevel@tonic-gate == 0xffe0000) {
5997c478bd9Sstevel@tonic-gate ee_size = 0x100;
6007c478bd9Sstevel@tonic-gate read_cmd = EE_READ_CMD << 24;
6017c478bd9Sstevel@tonic-gate } else {
6027c478bd9Sstevel@tonic-gate ee_size = 0x40;
6037c478bd9Sstevel@tonic-gate read_cmd = EE_READ_CMD << 22;
6047c478bd9Sstevel@tonic-gate }
6057c478bd9Sstevel@tonic-gate
6067c478bd9Sstevel@tonic-gate for (i = 0, sum = 0; i < ee_size; i++) {
6077c478bd9Sstevel@tonic-gate unsigned short value = do_eeprom_cmd(read_cmd | (i << 16), 27);
6087c478bd9Sstevel@tonic-gate if (i < (int)(sizeof(eeprom)/sizeof(eeprom[0])))
6097c478bd9Sstevel@tonic-gate eeprom[i] = value;
6107c478bd9Sstevel@tonic-gate sum += value;
6117c478bd9Sstevel@tonic-gate }
6127c478bd9Sstevel@tonic-gate
6137c478bd9Sstevel@tonic-gate for (i=0;i<ETH_ALEN;i++) {
6147c478bd9Sstevel@tonic-gate nic->node_addr[i] = (eeprom[i/2] >> (8*(i&1))) & 0xff;
6157c478bd9Sstevel@tonic-gate }
6167c478bd9Sstevel@tonic-gate printf ("Ethernet addr: %!\n", nic->node_addr);
6177c478bd9Sstevel@tonic-gate
6187c478bd9Sstevel@tonic-gate if (sum != 0xBABA)
6197c478bd9Sstevel@tonic-gate printf("eepro100: Invalid EEPROM checksum %#hX, "
6207c478bd9Sstevel@tonic-gate "check settings before activating this device!\n", sum);
6217c478bd9Sstevel@tonic-gate outl(0, ioaddr + SCBPort);
6227c478bd9Sstevel@tonic-gate udelay (10000);
6237c478bd9Sstevel@tonic-gate whereami ("Got eeprom.");
6247c478bd9Sstevel@tonic-gate
6257c478bd9Sstevel@tonic-gate /* Base = 0 */
6267c478bd9Sstevel@tonic-gate outl(0, ioaddr + SCBPointer);
6277c478bd9Sstevel@tonic-gate outw(INT_MASK | RX_ADDR_LOAD, ioaddr + SCBCmd);
6287c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
6297c478bd9Sstevel@tonic-gate whereami ("set rx base addr.");
6307c478bd9Sstevel@tonic-gate
6317c478bd9Sstevel@tonic-gate outl(virt_to_bus(&lstats), ioaddr + SCBPointer);
6327c478bd9Sstevel@tonic-gate outw(INT_MASK | CU_STATSADDR, ioaddr + SCBCmd);
6337c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
6347c478bd9Sstevel@tonic-gate whereami ("set stats addr.");
6357c478bd9Sstevel@tonic-gate
6367c478bd9Sstevel@tonic-gate /* INIT RX stuff. */
6377c478bd9Sstevel@tonic-gate ACCESS(rxfd)status = 0x0001;
6387c478bd9Sstevel@tonic-gate ACCESS(rxfd)command = 0x0000;
6397c478bd9Sstevel@tonic-gate ACCESS(rxfd)link = virt_to_bus(&(ACCESS(rxfd)status));
6407c478bd9Sstevel@tonic-gate ACCESS(rxfd)rx_buf_addr = virt_to_bus(&nic->packet);
6417c478bd9Sstevel@tonic-gate ACCESS(rxfd)count = 0;
6427c478bd9Sstevel@tonic-gate ACCESS(rxfd)size = 1528;
6437c478bd9Sstevel@tonic-gate
6447c478bd9Sstevel@tonic-gate outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
6457c478bd9Sstevel@tonic-gate outw(INT_MASK | RX_START, ioaddr + SCBCmd);
6467c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
6477c478bd9Sstevel@tonic-gate
6487c478bd9Sstevel@tonic-gate whereami ("started RX process.");
6497c478bd9Sstevel@tonic-gate
6507c478bd9Sstevel@tonic-gate /* Start the reciever.... */
6517c478bd9Sstevel@tonic-gate ACCESS(rxfd)status = 0;
6527c478bd9Sstevel@tonic-gate ACCESS(rxfd)command = 0xc000;
6537c478bd9Sstevel@tonic-gate outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
6547c478bd9Sstevel@tonic-gate outw(INT_MASK | RX_START, ioaddr + SCBCmd);
6557c478bd9Sstevel@tonic-gate
6567c478bd9Sstevel@tonic-gate /* INIT TX stuff. */
6577c478bd9Sstevel@tonic-gate
6587c478bd9Sstevel@tonic-gate /* Base = 0 */
6597c478bd9Sstevel@tonic-gate outl(0, ioaddr + SCBPointer);
6607c478bd9Sstevel@tonic-gate outw(INT_MASK | CU_CMD_BASE, ioaddr + SCBCmd);
6617c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
6627c478bd9Sstevel@tonic-gate
6637c478bd9Sstevel@tonic-gate whereami ("set TX base addr.");
6647c478bd9Sstevel@tonic-gate
6657c478bd9Sstevel@tonic-gate txfd.command = (CmdIASetup);
6667c478bd9Sstevel@tonic-gate txfd.status = 0x0000;
6677c478bd9Sstevel@tonic-gate txfd.link = virt_to_bus (&confcmd);
6687c478bd9Sstevel@tonic-gate
6697c478bd9Sstevel@tonic-gate {
6707c478bd9Sstevel@tonic-gate char *t = (char *)&txfd.tx_desc_addr;
6717c478bd9Sstevel@tonic-gate
6727c478bd9Sstevel@tonic-gate for (i=0;i<ETH_ALEN;i++)
6737c478bd9Sstevel@tonic-gate t[i] = nic->node_addr[i];
6747c478bd9Sstevel@tonic-gate }
6757c478bd9Sstevel@tonic-gate
6767c478bd9Sstevel@tonic-gate #ifdef DEBUG
6777c478bd9Sstevel@tonic-gate printf ("Setup_eaddr:\n");
6787c478bd9Sstevel@tonic-gate hd (&txfd, 0x20);
6797c478bd9Sstevel@tonic-gate #endif
6807c478bd9Sstevel@tonic-gate /* options = 0x40; */ /* 10mbps half duplex... */
6817c478bd9Sstevel@tonic-gate options = 0x00; /* Autosense */
6827c478bd9Sstevel@tonic-gate
6837c478bd9Sstevel@tonic-gate #ifdef PROMISC
6847c478bd9Sstevel@tonic-gate rx_mode = 3;
6857c478bd9Sstevel@tonic-gate #elif ALLMULTI
6867c478bd9Sstevel@tonic-gate rx_mode = 1;
6877c478bd9Sstevel@tonic-gate #else
6887c478bd9Sstevel@tonic-gate rx_mode = 0;
6897c478bd9Sstevel@tonic-gate #endif
6907c478bd9Sstevel@tonic-gate
6917c478bd9Sstevel@tonic-gate if ( ((eeprom[6]>>8) & 0x3f) == DP83840
6927c478bd9Sstevel@tonic-gate || ((eeprom[6]>>8) & 0x3f) == DP83840A) {
6937c478bd9Sstevel@tonic-gate int mdi_reg23 = mdio_read(eeprom[6] & 0x1f, 23) | 0x0422;
6947c478bd9Sstevel@tonic-gate if (congenb)
6957c478bd9Sstevel@tonic-gate mdi_reg23 |= 0x0100;
6967c478bd9Sstevel@tonic-gate printf(" DP83840 specific setup, setting register 23 to %hX.\n",
6977c478bd9Sstevel@tonic-gate mdi_reg23);
6987c478bd9Sstevel@tonic-gate mdio_write(eeprom[6] & 0x1f, 23, mdi_reg23);
6997c478bd9Sstevel@tonic-gate }
7007c478bd9Sstevel@tonic-gate whereami ("Done DP8340 special setup.");
7017c478bd9Sstevel@tonic-gate if (options != 0) {
7027c478bd9Sstevel@tonic-gate mdio_write(eeprom[6] & 0x1f, 0,
7037c478bd9Sstevel@tonic-gate ((options & 0x20) ? 0x2000 : 0) | /* 100mbps? */
7047c478bd9Sstevel@tonic-gate ((options & 0x10) ? 0x0100 : 0)); /* Full duplex? */
7057c478bd9Sstevel@tonic-gate whereami ("set mdio_register.");
7067c478bd9Sstevel@tonic-gate }
7077c478bd9Sstevel@tonic-gate
7087c478bd9Sstevel@tonic-gate confcmd.command = CmdSuspend | CmdConfigure;
7097c478bd9Sstevel@tonic-gate confcmd.status = 0x0000;
7107c478bd9Sstevel@tonic-gate confcmd.link = virt_to_bus (&txfd);
7117c478bd9Sstevel@tonic-gate confcmd.data[1] = (txfifo << 4) | rxfifo;
7127c478bd9Sstevel@tonic-gate confcmd.data[4] = rxdmacount;
7137c478bd9Sstevel@tonic-gate confcmd.data[5] = txdmacount + 0x80;
7147c478bd9Sstevel@tonic-gate confcmd.data[15] = (rx_mode & 2) ? 0x49: 0x48;
7157c478bd9Sstevel@tonic-gate confcmd.data[19] = (options & 0x10) ? 0xC0 : 0x80;
7167c478bd9Sstevel@tonic-gate confcmd.data[21] = (rx_mode & 1) ? 0x0D: 0x05;
7177c478bd9Sstevel@tonic-gate
7187c478bd9Sstevel@tonic-gate outl(virt_to_bus(&txfd), ioaddr + SCBPointer);
7197c478bd9Sstevel@tonic-gate outw(INT_MASK | CU_START, ioaddr + SCBCmd);
7207c478bd9Sstevel@tonic-gate wait_for_cmd_done(ioaddr + SCBCmd);
7217c478bd9Sstevel@tonic-gate
7227c478bd9Sstevel@tonic-gate whereami ("started TX thingy (config, iasetup).");
7237c478bd9Sstevel@tonic-gate
7247c478bd9Sstevel@tonic-gate load_timer2(10*TICKS_PER_MS);
7257c478bd9Sstevel@tonic-gate while (!txfd.status && timer2_running())
7267c478bd9Sstevel@tonic-gate /* Wait */;
7277c478bd9Sstevel@tonic-gate
7287c478bd9Sstevel@tonic-gate /* Read the status register once to disgard stale data */
7297c478bd9Sstevel@tonic-gate mdio_read(eeprom[6] & 0x1f, 1);
7307c478bd9Sstevel@tonic-gate /* Check to see if the network cable is plugged in.
7317c478bd9Sstevel@tonic-gate * This allows for faster failure if there is nothing
7327c478bd9Sstevel@tonic-gate * we can do.
7337c478bd9Sstevel@tonic-gate */
7347c478bd9Sstevel@tonic-gate if (!(mdio_read(eeprom[6] & 0x1f, 1) & (1 << 2))) {
7357c478bd9Sstevel@tonic-gate printf("Valid link not established\n");
7367c478bd9Sstevel@tonic-gate eepro100_disable(dev);
7377c478bd9Sstevel@tonic-gate return 0;
7387c478bd9Sstevel@tonic-gate }
7397c478bd9Sstevel@tonic-gate
7407c478bd9Sstevel@tonic-gate dev->disable = eepro100_disable;
7417c478bd9Sstevel@tonic-gate nic->poll = eepro100_poll;
7427c478bd9Sstevel@tonic-gate nic->transmit = eepro100_transmit;
7437c478bd9Sstevel@tonic-gate nic->irq = eepro100_irq;
7447c478bd9Sstevel@tonic-gate return 1;
7457c478bd9Sstevel@tonic-gate }
7467c478bd9Sstevel@tonic-gate
7477c478bd9Sstevel@tonic-gate /*********************************************************************/
7487c478bd9Sstevel@tonic-gate
7497c478bd9Sstevel@tonic-gate #ifdef DEBUG
7507c478bd9Sstevel@tonic-gate
7517c478bd9Sstevel@tonic-gate /* Hexdump a number of bytes from memory... */
hd(void * where,int n)7527c478bd9Sstevel@tonic-gate void hd (void *where, int n)
7537c478bd9Sstevel@tonic-gate {
7547c478bd9Sstevel@tonic-gate int i;
7557c478bd9Sstevel@tonic-gate
7567c478bd9Sstevel@tonic-gate while (n > 0) {
7577c478bd9Sstevel@tonic-gate printf ("%X ", where);
7587c478bd9Sstevel@tonic-gate for (i=0;i < ( (n>16)?16:n);i++)
7597c478bd9Sstevel@tonic-gate printf (" %hhX", ((char *)where)[i]);
7607c478bd9Sstevel@tonic-gate printf ("\n");
7617c478bd9Sstevel@tonic-gate n -= 16;
7627c478bd9Sstevel@tonic-gate where += 16;
7637c478bd9Sstevel@tonic-gate }
7647c478bd9Sstevel@tonic-gate }
7657c478bd9Sstevel@tonic-gate #endif
7667c478bd9Sstevel@tonic-gate
7677c478bd9Sstevel@tonic-gate static struct pci_id eepro100_nics[] = {
7687c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1029, "id1029", "Intel EtherExpressPro100 ID1029"),
7697c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1030, "id1030", "Intel EtherExpressPro100 ID1030"),
7707c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1031, "82801cam", "Intel 82801CAM (ICH3) Chipset Ethernet Controller"),
7717c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1032, "eepro100-1032", "Intel PRO/100 VE Network Connection"),
7727c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1033, "eepro100-1033", "Intel PRO/100 VM Network Connection"),
7737c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1034, "eepro100-1034", "Intel PRO/100 VM Network Connection"),
7747c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1035, "eepro100-1035", "Intel 82801CAM (ICH3) Chipset Ethernet Controller"),
7757c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1036, "eepro100-1036", "Intel 82801CAM (ICH3) Chipset Ethernet Controller"),
7767c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1037, "eepro100-1037", "Intel 82801CAM (ICH3) Chipset Ethernet Controller"),
7777c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1038, "id1038", "Intel PRO/100 VM Network Connection"),
7787c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1039, "82562et", "Intel PRO100 VE 82562ET"),
7797c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x103a, "id103a", "Intel Corporation 82559 InBusiness 10/100"),
7807c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x103b, "82562etb", "Intel PRO100 VE 82562ETB"),
7817c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x103c, "eepro100-103c", "Intel PRO/100 VM Network Connection"),
7827c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x103d, "eepro100-103d", "Intel PRO/100 VE Network Connection"),
7837c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x103e, "eepro100-103e", "Intel PRO/100 VM Network Connection"),
7847c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1059, "82551qm", "Intel PRO/100 M Mobile Connection"),
7857c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1209, "82559er", "Intel EtherExpressPro100 82559ER"),
7867c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1227, "82865", "Intel 82865 EtherExpress PRO/100A"),
7877c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1228, "82556", "Intel 82556 EtherExpress PRO/100 Smart"),
7887c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1229, "eepro100", "Intel EtherExpressPro100"),
7897c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x2449, "82562em", "Intel EtherExpressPro100 82562EM"),
7907c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x2459, "82562-1", "Intel 82562 based Fast Ethernet Connection"),
7917c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x245d, "82562-2", "Intel 82562 based Fast Ethernet Connection"),
7927c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x1050, "82562ez", "Intel 82562EZ Network Connection"),
7937c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x5200, "eepro100-5200", "Intel EtherExpress PRO/100 Intelligent Server"),
7947c478bd9Sstevel@tonic-gate PCI_ROM(0x8086, 0x5201, "eepro100-5201", "Intel EtherExpress PRO/100 Intelligent Server"),
7957c478bd9Sstevel@tonic-gate };
7967c478bd9Sstevel@tonic-gate
7977c478bd9Sstevel@tonic-gate /* Cards with device ids 0x1030 to 0x103F, 0x2449, 0x2459 or 0x245D might need
7987c478bd9Sstevel@tonic-gate * a workaround for hardware bug on 10 mbit half duplex (see linux driver eepro100.c)
7997c478bd9Sstevel@tonic-gate * 2003/03/17 gbaum */
8007c478bd9Sstevel@tonic-gate
8017c478bd9Sstevel@tonic-gate
8027c478bd9Sstevel@tonic-gate struct pci_driver eepro100_driver = {
8037c478bd9Sstevel@tonic-gate .type = NIC_DRIVER,
8047c478bd9Sstevel@tonic-gate .name = "EEPRO100",
8057c478bd9Sstevel@tonic-gate .probe = eepro100_probe,
8067c478bd9Sstevel@tonic-gate .ids = eepro100_nics,
8077c478bd9Sstevel@tonic-gate .id_count = sizeof(eepro100_nics)/sizeof(eepro100_nics[0]),
8087c478bd9Sstevel@tonic-gate .class = 0
8097c478bd9Sstevel@tonic-gate };
810