1bf21cd93STycho Nightingale /*- 2bf21cd93STycho Nightingale * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. 3bf21cd93STycho Nightingale * 4bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without 5bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions 6bf21cd93STycho Nightingale * are met: 7bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright 8bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer. 9bf21cd93STycho Nightingale * 2. Redistributions in binary form must reproduce the above copyright 10bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer in the 11bf21cd93STycho Nightingale * documentation and/or other materials provided with the distribution. 12bf21cd93STycho Nightingale * 13bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14bf21cd93STycho Nightingale * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15bf21cd93STycho Nightingale * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16bf21cd93STycho Nightingale * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17bf21cd93STycho Nightingale * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18bf21cd93STycho Nightingale * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19bf21cd93STycho Nightingale * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20bf21cd93STycho Nightingale * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21bf21cd93STycho Nightingale * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22bf21cd93STycho Nightingale * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23bf21cd93STycho Nightingale * SUCH DAMAGE. 24bf21cd93STycho Nightingale * 25bf21cd93STycho Nightingale * $FreeBSD: head/sys/amd64/include/timerreg.h 177642 2008-03-26 20:09:21Z phk $ 26bf21cd93STycho Nightingale */ 27bf21cd93STycho Nightingale 28bf21cd93STycho Nightingale /* 29bf21cd93STycho Nightingale * The outputs of the three timers are connected as follows: 30bf21cd93STycho Nightingale * 31bf21cd93STycho Nightingale * timer 0 -> irq 0 32bf21cd93STycho Nightingale * timer 1 -> dma chan 0 (for dram refresh) 33bf21cd93STycho Nightingale * timer 2 -> speaker (via keyboard controller) 34bf21cd93STycho Nightingale * 35bf21cd93STycho Nightingale * Timer 0 is used to call hardclock. 36bf21cd93STycho Nightingale * Timer 2 is used to generate console beeps. 37bf21cd93STycho Nightingale */ 38bf21cd93STycho Nightingale 39bf21cd93STycho Nightingale #ifndef _MACHINE_TIMERREG_H_ 40bf21cd93STycho Nightingale #define _MACHINE_TIMERREG_H_ 41bf21cd93STycho Nightingale 42bf21cd93STycho Nightingale #ifdef _KERNEL 43bf21cd93STycho Nightingale 44bf21cd93STycho Nightingale #include <dev/ic/i8253reg.h> 45bf21cd93STycho Nightingale 46bf21cd93STycho Nightingale #define IO_TIMER1 0x40 /* 8253 Timer #1 */ 47bf21cd93STycho Nightingale #define TIMER_CNTR0 (IO_TIMER1 + TIMER_REG_CNTR0) 48bf21cd93STycho Nightingale #define TIMER_CNTR1 (IO_TIMER1 + TIMER_REG_CNTR1) 49bf21cd93STycho Nightingale #define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2) 50bf21cd93STycho Nightingale #define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE) 51bf21cd93STycho Nightingale 52bf21cd93STycho Nightingale #endif /* _KERNEL */ 53bf21cd93STycho Nightingale 54bf21cd93STycho Nightingale #endif /* _MACHINE_TIMERREG_H_ */ 55