1bf21cd93STycho Nightingale /*- 2bf21cd93STycho Nightingale * Copyright (c) 1996, by Peter Wemm and Steve Passe 3bf21cd93STycho Nightingale * All rights reserved. 4bf21cd93STycho Nightingale * 5bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without 6bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions 7bf21cd93STycho Nightingale * are met: 8bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright 9bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer. 10bf21cd93STycho Nightingale * 2. The name of the developer may NOT be used to endorse or promote products 11bf21cd93STycho Nightingale * derived from this software without specific prior written permission. 12bf21cd93STycho Nightingale * 13bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14bf21cd93STycho Nightingale * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15bf21cd93STycho Nightingale * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16bf21cd93STycho Nightingale * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17bf21cd93STycho Nightingale * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18bf21cd93STycho Nightingale * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19bf21cd93STycho Nightingale * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20bf21cd93STycho Nightingale * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21bf21cd93STycho Nightingale * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22bf21cd93STycho Nightingale * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23bf21cd93STycho Nightingale * SUCH DAMAGE. 24bf21cd93STycho Nightingale * 25bf21cd93STycho Nightingale * $FreeBSD: head/sys/x86/include/apicreg.h 259140 2013-12-09 21:08:52Z jhb $ 26bf21cd93STycho Nightingale */ 27bf21cd93STycho Nightingale 28bf21cd93STycho Nightingale #ifndef _X86_APICREG_H_ 29bf21cd93STycho Nightingale #define _X86_APICREG_H_ 30bf21cd93STycho Nightingale 31bf21cd93STycho Nightingale /* 32bf21cd93STycho Nightingale * Local && I/O APIC definitions. 33bf21cd93STycho Nightingale */ 34bf21cd93STycho Nightingale 35bf21cd93STycho Nightingale /* 36bf21cd93STycho Nightingale * Pentium P54C+ Built-in APIC 37bf21cd93STycho Nightingale * (Advanced programmable Interrupt Controller) 38bf21cd93STycho Nightingale * 39bf21cd93STycho Nightingale * Base Address of Built-in APIC in memory location 40bf21cd93STycho Nightingale * is 0xfee00000. 41bf21cd93STycho Nightingale * 42bf21cd93STycho Nightingale * Map of APIC Registers: 43bf21cd93STycho Nightingale * 44bf21cd93STycho Nightingale * Offset (hex) Description Read/Write state 45bf21cd93STycho Nightingale * 000 Reserved 46bf21cd93STycho Nightingale * 010 Reserved 47bf21cd93STycho Nightingale * 020 ID Local APIC ID R/W 48bf21cd93STycho Nightingale * 030 VER Local APIC Version R 49bf21cd93STycho Nightingale * 040 Reserved 50bf21cd93STycho Nightingale * 050 Reserved 51bf21cd93STycho Nightingale * 060 Reserved 52bf21cd93STycho Nightingale * 070 Reserved 53bf21cd93STycho Nightingale * 080 Task Priority Register R/W 54bf21cd93STycho Nightingale * 090 Arbitration Priority Register R 55bf21cd93STycho Nightingale * 0A0 Processor Priority Register R 56bf21cd93STycho Nightingale * 0B0 EOI Register W 57bf21cd93STycho Nightingale * 0C0 RRR Remote read R 58bf21cd93STycho Nightingale * 0D0 Logical Destination R/W 59bf21cd93STycho Nightingale * 0E0 Destination Format Register 0..27 R; 28..31 R/W 60bf21cd93STycho Nightingale * 0F0 SVR Spurious Interrupt Vector Reg. 0..3 R; 4..9 R/W 61bf21cd93STycho Nightingale * 100 ISR 000-031 R 62bf21cd93STycho Nightingale * 110 ISR 032-063 R 63bf21cd93STycho Nightingale * 120 ISR 064-095 R 64bf21cd93STycho Nightingale * 130 ISR 095-128 R 65bf21cd93STycho Nightingale * 140 ISR 128-159 R 66bf21cd93STycho Nightingale * 150 ISR 160-191 R 67bf21cd93STycho Nightingale * 160 ISR 192-223 R 68bf21cd93STycho Nightingale * 170 ISR 224-255 R 69bf21cd93STycho Nightingale * 180 TMR 000-031 R 70bf21cd93STycho Nightingale * 190 TMR 032-063 R 71bf21cd93STycho Nightingale * 1A0 TMR 064-095 R 72bf21cd93STycho Nightingale * 1B0 TMR 095-128 R 73bf21cd93STycho Nightingale * 1C0 TMR 128-159 R 74bf21cd93STycho Nightingale * 1D0 TMR 160-191 R 75bf21cd93STycho Nightingale * 1E0 TMR 192-223 R 76bf21cd93STycho Nightingale * 1F0 TMR 224-255 R 77bf21cd93STycho Nightingale * 200 IRR 000-031 R 78bf21cd93STycho Nightingale * 210 IRR 032-063 R 79bf21cd93STycho Nightingale * 220 IRR 064-095 R 80bf21cd93STycho Nightingale * 230 IRR 095-128 R 81bf21cd93STycho Nightingale * 240 IRR 128-159 R 82bf21cd93STycho Nightingale * 250 IRR 160-191 R 83bf21cd93STycho Nightingale * 260 IRR 192-223 R 84bf21cd93STycho Nightingale * 270 IRR 224-255 R 85bf21cd93STycho Nightingale * 280 Error Status Register R 86bf21cd93STycho Nightingale * 290 Reserved 87bf21cd93STycho Nightingale * 2A0 Reserved 88bf21cd93STycho Nightingale * 2B0 Reserved 89bf21cd93STycho Nightingale * 2C0 Reserved 90bf21cd93STycho Nightingale * 2D0 Reserved 91bf21cd93STycho Nightingale * 2E0 Reserved 92bf21cd93STycho Nightingale * 2F0 Local Vector Table (CMCI) R/W 93bf21cd93STycho Nightingale * 300 ICR_LOW Interrupt Command Reg. (0-31) R/W 94bf21cd93STycho Nightingale * 310 ICR_HI Interrupt Command Reg. (32-63) R/W 95bf21cd93STycho Nightingale * 320 Local Vector Table (Timer) R/W 96bf21cd93STycho Nightingale * 330 Local Vector Table (Thermal) R/W (PIV+) 97bf21cd93STycho Nightingale * 340 Local Vector Table (Performance) R/W (P6+) 98bf21cd93STycho Nightingale * 350 LVT1 Local Vector Table (LINT0) R/W 99bf21cd93STycho Nightingale * 360 LVT2 Local Vector Table (LINT1) R/W 100bf21cd93STycho Nightingale * 370 LVT3 Local Vector Table (ERROR) R/W 101bf21cd93STycho Nightingale * 380 Initial Count Reg. for Timer R/W 102bf21cd93STycho Nightingale * 390 Current Count of Timer R 103bf21cd93STycho Nightingale * 3A0 Reserved 104bf21cd93STycho Nightingale * 3B0 Reserved 105bf21cd93STycho Nightingale * 3C0 Reserved 106bf21cd93STycho Nightingale * 3D0 Reserved 107bf21cd93STycho Nightingale * 3E0 Timer Divide Configuration Reg. R/W 108bf21cd93STycho Nightingale * 3F0 Reserved 109bf21cd93STycho Nightingale */ 110bf21cd93STycho Nightingale 111bf21cd93STycho Nightingale 112bf21cd93STycho Nightingale /****************************************************************************** 113bf21cd93STycho Nightingale * global defines, etc. 114bf21cd93STycho Nightingale */ 115bf21cd93STycho Nightingale 116bf21cd93STycho Nightingale 117bf21cd93STycho Nightingale /****************************************************************************** 118bf21cd93STycho Nightingale * LOCAL APIC structure 119bf21cd93STycho Nightingale */ 120bf21cd93STycho Nightingale 121bf21cd93STycho Nightingale #ifndef LOCORE 122bf21cd93STycho Nightingale #include <sys/types.h> 123bf21cd93STycho Nightingale 124bf21cd93STycho Nightingale #define PAD3 int : 32; int : 32; int : 32 125bf21cd93STycho Nightingale #define PAD4 int : 32; int : 32; int : 32; int : 32 126bf21cd93STycho Nightingale 127bf21cd93STycho Nightingale struct LAPIC { 128bf21cd93STycho Nightingale /* reserved */ PAD4; 129bf21cd93STycho Nightingale /* reserved */ PAD4; 130bf21cd93STycho Nightingale u_int32_t id; PAD3; 131bf21cd93STycho Nightingale u_int32_t version; PAD3; 132bf21cd93STycho Nightingale /* reserved */ PAD4; 133bf21cd93STycho Nightingale /* reserved */ PAD4; 134bf21cd93STycho Nightingale /* reserved */ PAD4; 135bf21cd93STycho Nightingale /* reserved */ PAD4; 136bf21cd93STycho Nightingale u_int32_t tpr; PAD3; 137bf21cd93STycho Nightingale u_int32_t apr; PAD3; 138bf21cd93STycho Nightingale u_int32_t ppr; PAD3; 139bf21cd93STycho Nightingale u_int32_t eoi; PAD3; 140bf21cd93STycho Nightingale /* reserved */ PAD4; 141bf21cd93STycho Nightingale u_int32_t ldr; PAD3; 142bf21cd93STycho Nightingale u_int32_t dfr; PAD3; 143bf21cd93STycho Nightingale u_int32_t svr; PAD3; 144bf21cd93STycho Nightingale u_int32_t isr0; PAD3; 145bf21cd93STycho Nightingale u_int32_t isr1; PAD3; 146bf21cd93STycho Nightingale u_int32_t isr2; PAD3; 147bf21cd93STycho Nightingale u_int32_t isr3; PAD3; 148bf21cd93STycho Nightingale u_int32_t isr4; PAD3; 149bf21cd93STycho Nightingale u_int32_t isr5; PAD3; 150bf21cd93STycho Nightingale u_int32_t isr6; PAD3; 151bf21cd93STycho Nightingale u_int32_t isr7; PAD3; 152bf21cd93STycho Nightingale u_int32_t tmr0; PAD3; 153bf21cd93STycho Nightingale u_int32_t tmr1; PAD3; 154bf21cd93STycho Nightingale u_int32_t tmr2; PAD3; 155bf21cd93STycho Nightingale u_int32_t tmr3; PAD3; 156bf21cd93STycho Nightingale u_int32_t tmr4; PAD3; 157bf21cd93STycho Nightingale u_int32_t tmr5; PAD3; 158bf21cd93STycho Nightingale u_int32_t tmr6; PAD3; 159bf21cd93STycho Nightingale u_int32_t tmr7; PAD3; 160bf21cd93STycho Nightingale u_int32_t irr0; PAD3; 161bf21cd93STycho Nightingale u_int32_t irr1; PAD3; 162bf21cd93STycho Nightingale u_int32_t irr2; PAD3; 163bf21cd93STycho Nightingale u_int32_t irr3; PAD3; 164bf21cd93STycho Nightingale u_int32_t irr4; PAD3; 165bf21cd93STycho Nightingale u_int32_t irr5; PAD3; 166bf21cd93STycho Nightingale u_int32_t irr6; PAD3; 167bf21cd93STycho Nightingale u_int32_t irr7; PAD3; 168bf21cd93STycho Nightingale u_int32_t esr; PAD3; 169bf21cd93STycho Nightingale /* reserved */ PAD4; 170bf21cd93STycho Nightingale /* reserved */ PAD4; 171bf21cd93STycho Nightingale /* reserved */ PAD4; 172bf21cd93STycho Nightingale /* reserved */ PAD4; 173bf21cd93STycho Nightingale /* reserved */ PAD4; 174bf21cd93STycho Nightingale /* reserved */ PAD4; 175bf21cd93STycho Nightingale u_int32_t lvt_cmci; PAD3; 176bf21cd93STycho Nightingale u_int32_t icr_lo; PAD3; 177bf21cd93STycho Nightingale u_int32_t icr_hi; PAD3; 178bf21cd93STycho Nightingale u_int32_t lvt_timer; PAD3; 179bf21cd93STycho Nightingale u_int32_t lvt_thermal; PAD3; 180bf21cd93STycho Nightingale u_int32_t lvt_pcint; PAD3; 181bf21cd93STycho Nightingale u_int32_t lvt_lint0; PAD3; 182bf21cd93STycho Nightingale u_int32_t lvt_lint1; PAD3; 183bf21cd93STycho Nightingale u_int32_t lvt_error; PAD3; 184bf21cd93STycho Nightingale u_int32_t icr_timer; PAD3; 185bf21cd93STycho Nightingale u_int32_t ccr_timer; PAD3; 186bf21cd93STycho Nightingale /* reserved */ PAD4; 187bf21cd93STycho Nightingale /* reserved */ PAD4; 188bf21cd93STycho Nightingale /* reserved */ PAD4; 189bf21cd93STycho Nightingale /* reserved */ PAD4; 190bf21cd93STycho Nightingale u_int32_t dcr_timer; PAD3; 191bf21cd93STycho Nightingale /* reserved */ PAD4; 192bf21cd93STycho Nightingale }; 193bf21cd93STycho Nightingale 194bf21cd93STycho Nightingale typedef struct LAPIC lapic_t; 195bf21cd93STycho Nightingale 196bf21cd93STycho Nightingale /****************************************************************************** 197bf21cd93STycho Nightingale * I/O APIC structure 198bf21cd93STycho Nightingale */ 199bf21cd93STycho Nightingale 200bf21cd93STycho Nightingale struct IOAPIC { 201bf21cd93STycho Nightingale u_int32_t ioregsel; PAD3; 202bf21cd93STycho Nightingale u_int32_t iowin; PAD3; 203bf21cd93STycho Nightingale }; 204bf21cd93STycho Nightingale 205bf21cd93STycho Nightingale typedef struct IOAPIC ioapic_t; 206bf21cd93STycho Nightingale 207bf21cd93STycho Nightingale #undef PAD4 208bf21cd93STycho Nightingale #undef PAD3 209bf21cd93STycho Nightingale 210bf21cd93STycho Nightingale #endif /* !LOCORE */ 211bf21cd93STycho Nightingale 212bf21cd93STycho Nightingale 213bf21cd93STycho Nightingale /****************************************************************************** 214bf21cd93STycho Nightingale * various code 'logical' values 215bf21cd93STycho Nightingale */ 216bf21cd93STycho Nightingale 217bf21cd93STycho Nightingale /****************************************************************************** 218bf21cd93STycho Nightingale * LOCAL APIC defines 219bf21cd93STycho Nightingale */ 220bf21cd93STycho Nightingale 221bf21cd93STycho Nightingale /* default physical locations of LOCAL (CPU) APICs */ 222bf21cd93STycho Nightingale #define DEFAULT_APIC_BASE 0xfee00000 223bf21cd93STycho Nightingale 224bf21cd93STycho Nightingale /* constants relating to APIC ID registers */ 225bf21cd93STycho Nightingale #define APIC_ID_MASK 0xff000000 226bf21cd93STycho Nightingale #define APIC_ID_SHIFT 24 227bf21cd93STycho Nightingale #define APIC_ID_CLUSTER 0xf0 228bf21cd93STycho Nightingale #define APIC_ID_CLUSTER_ID 0x0f 229bf21cd93STycho Nightingale #define APIC_MAX_CLUSTER 0xe 230bf21cd93STycho Nightingale #define APIC_MAX_INTRACLUSTER_ID 3 231bf21cd93STycho Nightingale #define APIC_ID_CLUSTER_SHIFT 4 232bf21cd93STycho Nightingale 233bf21cd93STycho Nightingale /* fields in VER */ 234bf21cd93STycho Nightingale #define APIC_VER_VERSION 0x000000ff 235bf21cd93STycho Nightingale #define APIC_VER_MAXLVT 0x00ff0000 236bf21cd93STycho Nightingale #define MAXLVTSHIFT 16 237bf21cd93STycho Nightingale #define APIC_VER_EOI_SUPPRESSION 0x01000000 238bf21cd93STycho Nightingale 239bf21cd93STycho Nightingale /* fields in LDR */ 240bf21cd93STycho Nightingale #define APIC_LDR_RESERVED 0x00ffffff 241bf21cd93STycho Nightingale 242bf21cd93STycho Nightingale /* fields in DFR */ 243bf21cd93STycho Nightingale #define APIC_DFR_RESERVED 0x0fffffff 244bf21cd93STycho Nightingale #define APIC_DFR_MODEL_MASK 0xf0000000 245bf21cd93STycho Nightingale #define APIC_DFR_MODEL_FLAT 0xf0000000 246bf21cd93STycho Nightingale #define APIC_DFR_MODEL_CLUSTER 0x00000000 247bf21cd93STycho Nightingale 248bf21cd93STycho Nightingale /* fields in SVR */ 249bf21cd93STycho Nightingale #define APIC_SVR_VECTOR 0x000000ff 250bf21cd93STycho Nightingale #define APIC_SVR_VEC_PROG 0x000000f0 251bf21cd93STycho Nightingale #define APIC_SVR_VEC_FIX 0x0000000f 252bf21cd93STycho Nightingale #define APIC_SVR_ENABLE 0x00000100 253bf21cd93STycho Nightingale # define APIC_SVR_SWDIS 0x00000000 254bf21cd93STycho Nightingale # define APIC_SVR_SWEN 0x00000100 255bf21cd93STycho Nightingale #define APIC_SVR_FOCUS 0x00000200 256bf21cd93STycho Nightingale # define APIC_SVR_FEN 0x00000000 257bf21cd93STycho Nightingale # define APIC_SVR_FDIS 0x00000200 258bf21cd93STycho Nightingale #define APIC_SVR_EOI_SUPPRESSION 0x00001000 259bf21cd93STycho Nightingale 260bf21cd93STycho Nightingale /* fields in TPR */ 261bf21cd93STycho Nightingale #define APIC_TPR_PRIO 0x000000ff 262bf21cd93STycho Nightingale # define APIC_TPR_INT 0x000000f0 263bf21cd93STycho Nightingale # define APIC_TPR_SUB 0x0000000f 264bf21cd93STycho Nightingale 265bf21cd93STycho Nightingale /* fields in ESR */ 266bf21cd93STycho Nightingale #define APIC_ESR_SEND_CS_ERROR 0x00000001 267bf21cd93STycho Nightingale #define APIC_ESR_RECEIVE_CS_ERROR 0x00000002 268bf21cd93STycho Nightingale #define APIC_ESR_SEND_ACCEPT 0x00000004 269bf21cd93STycho Nightingale #define APIC_ESR_RECEIVE_ACCEPT 0x00000008 270bf21cd93STycho Nightingale #define APIC_ESR_SEND_ILLEGAL_VECTOR 0x00000020 271bf21cd93STycho Nightingale #define APIC_ESR_RECEIVE_ILLEGAL_VECTOR 0x00000040 272bf21cd93STycho Nightingale #define APIC_ESR_ILLEGAL_REGISTER 0x00000080 273bf21cd93STycho Nightingale 274bf21cd93STycho Nightingale /* fields in ICR_LOW */ 275bf21cd93STycho Nightingale #define APIC_VECTOR_MASK 0x000000ff 276bf21cd93STycho Nightingale 277bf21cd93STycho Nightingale #define APIC_DELMODE_MASK 0x00000700 278bf21cd93STycho Nightingale # define APIC_DELMODE_FIXED 0x00000000 279bf21cd93STycho Nightingale # define APIC_DELMODE_LOWPRIO 0x00000100 280bf21cd93STycho Nightingale # define APIC_DELMODE_SMI 0x00000200 281bf21cd93STycho Nightingale # define APIC_DELMODE_RR 0x00000300 282bf21cd93STycho Nightingale # define APIC_DELMODE_NMI 0x00000400 283bf21cd93STycho Nightingale # define APIC_DELMODE_INIT 0x00000500 284bf21cd93STycho Nightingale # define APIC_DELMODE_STARTUP 0x00000600 285bf21cd93STycho Nightingale # define APIC_DELMODE_RESV 0x00000700 286bf21cd93STycho Nightingale 287bf21cd93STycho Nightingale #define APIC_DESTMODE_MASK 0x00000800 288bf21cd93STycho Nightingale # define APIC_DESTMODE_PHY 0x00000000 289bf21cd93STycho Nightingale # define APIC_DESTMODE_LOG 0x00000800 290bf21cd93STycho Nightingale 291bf21cd93STycho Nightingale #define APIC_DELSTAT_MASK 0x00001000 292bf21cd93STycho Nightingale # define APIC_DELSTAT_IDLE 0x00000000 293bf21cd93STycho Nightingale # define APIC_DELSTAT_PEND 0x00001000 294bf21cd93STycho Nightingale 295bf21cd93STycho Nightingale #define APIC_RESV1_MASK 0x00002000 296bf21cd93STycho Nightingale 297bf21cd93STycho Nightingale #define APIC_LEVEL_MASK 0x00004000 298bf21cd93STycho Nightingale # define APIC_LEVEL_DEASSERT 0x00000000 299bf21cd93STycho Nightingale # define APIC_LEVEL_ASSERT 0x00004000 300bf21cd93STycho Nightingale 301bf21cd93STycho Nightingale #define APIC_TRIGMOD_MASK 0x00008000 302bf21cd93STycho Nightingale # define APIC_TRIGMOD_EDGE 0x00000000 303bf21cd93STycho Nightingale # define APIC_TRIGMOD_LEVEL 0x00008000 304bf21cd93STycho Nightingale 305bf21cd93STycho Nightingale #define APIC_RRSTAT_MASK 0x00030000 306bf21cd93STycho Nightingale # define APIC_RRSTAT_INVALID 0x00000000 307bf21cd93STycho Nightingale # define APIC_RRSTAT_INPROG 0x00010000 308bf21cd93STycho Nightingale # define APIC_RRSTAT_VALID 0x00020000 309bf21cd93STycho Nightingale # define APIC_RRSTAT_RESV 0x00030000 310bf21cd93STycho Nightingale 311bf21cd93STycho Nightingale #define APIC_DEST_MASK 0x000c0000 312bf21cd93STycho Nightingale # define APIC_DEST_DESTFLD 0x00000000 313bf21cd93STycho Nightingale # define APIC_DEST_SELF 0x00040000 314bf21cd93STycho Nightingale # define APIC_DEST_ALLISELF 0x00080000 315bf21cd93STycho Nightingale # define APIC_DEST_ALLESELF 0x000c0000 316bf21cd93STycho Nightingale 317bf21cd93STycho Nightingale #define APIC_RESV2_MASK 0xfff00000 318bf21cd93STycho Nightingale 319bf21cd93STycho Nightingale #define APIC_ICRLO_RESV_MASK (APIC_RESV1_MASK | APIC_RESV2_MASK) 320bf21cd93STycho Nightingale 321bf21cd93STycho Nightingale /* fields in LVT1/2 */ 322bf21cd93STycho Nightingale #define APIC_LVT_VECTOR 0x000000ff 323bf21cd93STycho Nightingale #define APIC_LVT_DM 0x00000700 324bf21cd93STycho Nightingale # define APIC_LVT_DM_FIXED 0x00000000 325bf21cd93STycho Nightingale # define APIC_LVT_DM_SMI 0x00000200 326bf21cd93STycho Nightingale # define APIC_LVT_DM_NMI 0x00000400 327bf21cd93STycho Nightingale # define APIC_LVT_DM_INIT 0x00000500 328bf21cd93STycho Nightingale # define APIC_LVT_DM_EXTINT 0x00000700 329bf21cd93STycho Nightingale #define APIC_LVT_DS 0x00001000 330bf21cd93STycho Nightingale #define APIC_LVT_IIPP 0x00002000 331bf21cd93STycho Nightingale #define APIC_LVT_IIPP_INTALO 0x00002000 332bf21cd93STycho Nightingale #define APIC_LVT_IIPP_INTAHI 0x00000000 333bf21cd93STycho Nightingale #define APIC_LVT_RIRR 0x00004000 334bf21cd93STycho Nightingale #define APIC_LVT_TM 0x00008000 335bf21cd93STycho Nightingale #define APIC_LVT_M 0x00010000 336bf21cd93STycho Nightingale 337bf21cd93STycho Nightingale 338bf21cd93STycho Nightingale /* fields in LVT Timer */ 339bf21cd93STycho Nightingale #define APIC_LVTT_VECTOR 0x000000ff 340bf21cd93STycho Nightingale #define APIC_LVTT_DS 0x00001000 341bf21cd93STycho Nightingale #define APIC_LVTT_M 0x00010000 342bf21cd93STycho Nightingale #define APIC_LVTT_TM 0x00020000 343bf21cd93STycho Nightingale # define APIC_LVTT_TM_ONE_SHOT 0x00000000 344bf21cd93STycho Nightingale # define APIC_LVTT_TM_PERIODIC 0x00020000 345bf21cd93STycho Nightingale 346bf21cd93STycho Nightingale 347bf21cd93STycho Nightingale /* APIC timer current count */ 348bf21cd93STycho Nightingale #define APIC_TIMER_MAX_COUNT 0xffffffff 349bf21cd93STycho Nightingale 350bf21cd93STycho Nightingale /* fields in TDCR */ 351bf21cd93STycho Nightingale #define APIC_TDCR_2 0x00 352bf21cd93STycho Nightingale #define APIC_TDCR_4 0x01 353bf21cd93STycho Nightingale #define APIC_TDCR_8 0x02 354bf21cd93STycho Nightingale #define APIC_TDCR_16 0x03 355bf21cd93STycho Nightingale #define APIC_TDCR_32 0x08 356bf21cd93STycho Nightingale #define APIC_TDCR_64 0x09 357bf21cd93STycho Nightingale #define APIC_TDCR_128 0x0a 358bf21cd93STycho Nightingale #define APIC_TDCR_1 0x0b 359bf21cd93STycho Nightingale 360bf21cd93STycho Nightingale /* LVT table indices */ 361bf21cd93STycho Nightingale #define APIC_LVT_LINT0 0 362bf21cd93STycho Nightingale #define APIC_LVT_LINT1 1 363bf21cd93STycho Nightingale #define APIC_LVT_TIMER 2 364bf21cd93STycho Nightingale #define APIC_LVT_ERROR 3 365bf21cd93STycho Nightingale #define APIC_LVT_PMC 4 366bf21cd93STycho Nightingale #define APIC_LVT_THERMAL 5 367bf21cd93STycho Nightingale #define APIC_LVT_CMCI 6 368bf21cd93STycho Nightingale #define APIC_LVT_MAX APIC_LVT_CMCI 369bf21cd93STycho Nightingale 370bf21cd93STycho Nightingale /****************************************************************************** 371bf21cd93STycho Nightingale * I/O APIC defines 372bf21cd93STycho Nightingale */ 373bf21cd93STycho Nightingale 374bf21cd93STycho Nightingale /* default physical locations of an IO APIC */ 375bf21cd93STycho Nightingale #define DEFAULT_IO_APIC_BASE 0xfec00000 376bf21cd93STycho Nightingale 377bf21cd93STycho Nightingale /* window register offset */ 378bf21cd93STycho Nightingale #define IOAPIC_WINDOW 0x10 379bf21cd93STycho Nightingale #define IOAPIC_EOIR 0x40 380bf21cd93STycho Nightingale 381bf21cd93STycho Nightingale /* indexes into IO APIC */ 382bf21cd93STycho Nightingale #define IOAPIC_ID 0x00 383bf21cd93STycho Nightingale #define IOAPIC_VER 0x01 384bf21cd93STycho Nightingale #define IOAPIC_ARB 0x02 385bf21cd93STycho Nightingale #define IOAPIC_REDTBL 0x10 386bf21cd93STycho Nightingale #define IOAPIC_REDTBL0 IOAPIC_REDTBL 387bf21cd93STycho Nightingale #define IOAPIC_REDTBL1 (IOAPIC_REDTBL+0x02) 388bf21cd93STycho Nightingale #define IOAPIC_REDTBL2 (IOAPIC_REDTBL+0x04) 389bf21cd93STycho Nightingale #define IOAPIC_REDTBL3 (IOAPIC_REDTBL+0x06) 390bf21cd93STycho Nightingale #define IOAPIC_REDTBL4 (IOAPIC_REDTBL+0x08) 391bf21cd93STycho Nightingale #define IOAPIC_REDTBL5 (IOAPIC_REDTBL+0x0a) 392bf21cd93STycho Nightingale #define IOAPIC_REDTBL6 (IOAPIC_REDTBL+0x0c) 393bf21cd93STycho Nightingale #define IOAPIC_REDTBL7 (IOAPIC_REDTBL+0x0e) 394bf21cd93STycho Nightingale #define IOAPIC_REDTBL8 (IOAPIC_REDTBL+0x10) 395bf21cd93STycho Nightingale #define IOAPIC_REDTBL9 (IOAPIC_REDTBL+0x12) 396bf21cd93STycho Nightingale #define IOAPIC_REDTBL10 (IOAPIC_REDTBL+0x14) 397bf21cd93STycho Nightingale #define IOAPIC_REDTBL11 (IOAPIC_REDTBL+0x16) 398bf21cd93STycho Nightingale #define IOAPIC_REDTBL12 (IOAPIC_REDTBL+0x18) 399bf21cd93STycho Nightingale #define IOAPIC_REDTBL13 (IOAPIC_REDTBL+0x1a) 400bf21cd93STycho Nightingale #define IOAPIC_REDTBL14 (IOAPIC_REDTBL+0x1c) 401bf21cd93STycho Nightingale #define IOAPIC_REDTBL15 (IOAPIC_REDTBL+0x1e) 402bf21cd93STycho Nightingale #define IOAPIC_REDTBL16 (IOAPIC_REDTBL+0x20) 403bf21cd93STycho Nightingale #define IOAPIC_REDTBL17 (IOAPIC_REDTBL+0x22) 404bf21cd93STycho Nightingale #define IOAPIC_REDTBL18 (IOAPIC_REDTBL+0x24) 405bf21cd93STycho Nightingale #define IOAPIC_REDTBL19 (IOAPIC_REDTBL+0x26) 406bf21cd93STycho Nightingale #define IOAPIC_REDTBL20 (IOAPIC_REDTBL+0x28) 407bf21cd93STycho Nightingale #define IOAPIC_REDTBL21 (IOAPIC_REDTBL+0x2a) 408bf21cd93STycho Nightingale #define IOAPIC_REDTBL22 (IOAPIC_REDTBL+0x2c) 409bf21cd93STycho Nightingale #define IOAPIC_REDTBL23 (IOAPIC_REDTBL+0x2e) 410bf21cd93STycho Nightingale 411bf21cd93STycho Nightingale /* fields in VER */ 412bf21cd93STycho Nightingale #define IOART_VER_VERSION 0x000000ff 413bf21cd93STycho Nightingale #define IOART_VER_MAXREDIR 0x00ff0000 414bf21cd93STycho Nightingale #define MAXREDIRSHIFT 16 415bf21cd93STycho Nightingale 416bf21cd93STycho Nightingale /* 417bf21cd93STycho Nightingale * fields in the IO APIC's redirection table entries 418bf21cd93STycho Nightingale */ 419bf21cd93STycho Nightingale #define IOART_DEST APIC_ID_MASK /* broadcast addr: all APICs */ 420bf21cd93STycho Nightingale 421bf21cd93STycho Nightingale #define IOART_RESV 0x00fe0000 /* reserved */ 422bf21cd93STycho Nightingale 423bf21cd93STycho Nightingale #define IOART_INTMASK 0x00010000 /* R/W: INTerrupt mask */ 424bf21cd93STycho Nightingale # define IOART_INTMCLR 0x00000000 /* clear, allow INTs */ 425bf21cd93STycho Nightingale # define IOART_INTMSET 0x00010000 /* set, inhibit INTs */ 426bf21cd93STycho Nightingale 427bf21cd93STycho Nightingale #define IOART_TRGRMOD 0x00008000 /* R/W: trigger mode */ 428bf21cd93STycho Nightingale # define IOART_TRGREDG 0x00000000 /* edge */ 429bf21cd93STycho Nightingale # define IOART_TRGRLVL 0x00008000 /* level */ 430bf21cd93STycho Nightingale 431bf21cd93STycho Nightingale #define IOART_REM_IRR 0x00004000 /* RO: remote IRR */ 432bf21cd93STycho Nightingale 433bf21cd93STycho Nightingale #define IOART_INTPOL 0x00002000 /* R/W: INT input pin polarity */ 434bf21cd93STycho Nightingale # define IOART_INTAHI 0x00000000 /* active high */ 435bf21cd93STycho Nightingale # define IOART_INTALO 0x00002000 /* active low */ 436bf21cd93STycho Nightingale 437bf21cd93STycho Nightingale #define IOART_DELIVS 0x00001000 /* RO: delivery status */ 438bf21cd93STycho Nightingale 439bf21cd93STycho Nightingale #define IOART_DESTMOD 0x00000800 /* R/W: destination mode */ 440bf21cd93STycho Nightingale # define IOART_DESTPHY 0x00000000 /* physical */ 441bf21cd93STycho Nightingale # define IOART_DESTLOG 0x00000800 /* logical */ 442bf21cd93STycho Nightingale 443bf21cd93STycho Nightingale #define IOART_DELMOD 0x00000700 /* R/W: delivery mode */ 444bf21cd93STycho Nightingale # define IOART_DELFIXED 0x00000000 /* fixed */ 445bf21cd93STycho Nightingale # define IOART_DELLOPRI 0x00000100 /* lowest priority */ 446bf21cd93STycho Nightingale # define IOART_DELSMI 0x00000200 /* System Management INT */ 447bf21cd93STycho Nightingale # define IOART_DELRSV1 0x00000300 /* reserved */ 448bf21cd93STycho Nightingale # define IOART_DELNMI 0x00000400 /* NMI signal */ 449bf21cd93STycho Nightingale # define IOART_DELINIT 0x00000500 /* INIT signal */ 450bf21cd93STycho Nightingale # define IOART_DELRSV2 0x00000600 /* reserved */ 451bf21cd93STycho Nightingale # define IOART_DELEXINT 0x00000700 /* External INTerrupt */ 452bf21cd93STycho Nightingale 453bf21cd93STycho Nightingale #define IOART_INTVEC 0x000000ff /* R/W: INTerrupt vector field */ 454bf21cd93STycho Nightingale 455bf21cd93STycho Nightingale #endif /* _X86_APICREG_H_ */ 456