14c87aefeSPatrick Mooney /* $NetBSD: mii.h,v 1.18 2014/06/16 14:43:22 msaitoh Exp $ */ 24c87aefeSPatrick Mooney 34c87aefeSPatrick Mooney /*- 44c87aefeSPatrick Mooney * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 54c87aefeSPatrick Mooney * 64c87aefeSPatrick Mooney * Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe, 74c87aefeSPatrick Mooney * Numerical Aerospace Simulation Facility, NASA Ames Research Center. 84c87aefeSPatrick Mooney * 94c87aefeSPatrick Mooney * Redistribution and use in source and binary forms, with or without 104c87aefeSPatrick Mooney * modification, are permitted provided that the following conditions 114c87aefeSPatrick Mooney * are met: 124c87aefeSPatrick Mooney * 1. Redistributions of source code must retain the above copyright 134c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer. 144c87aefeSPatrick Mooney * 2. Redistributions in binary form must reproduce the above copyright 154c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer in the 164c87aefeSPatrick Mooney * documentation and/or other materials provided with the distribution. 174c87aefeSPatrick Mooney * 184c87aefeSPatrick Mooney * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 194c87aefeSPatrick Mooney * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 204c87aefeSPatrick Mooney * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 214c87aefeSPatrick Mooney * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 224c87aefeSPatrick Mooney * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 234c87aefeSPatrick Mooney * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 244c87aefeSPatrick Mooney * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 254c87aefeSPatrick Mooney * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 264c87aefeSPatrick Mooney * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 274c87aefeSPatrick Mooney * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 284c87aefeSPatrick Mooney */ 294c87aefeSPatrick Mooney 304c87aefeSPatrick Mooney #ifndef _DEV_MII_MII_H_ 314c87aefeSPatrick Mooney #define _DEV_MII_MII_H_ 324c87aefeSPatrick Mooney 334c87aefeSPatrick Mooney /* 344c87aefeSPatrick Mooney * Registers common to all PHYs. 354c87aefeSPatrick Mooney */ 364c87aefeSPatrick Mooney 374c87aefeSPatrick Mooney #define MII_NPHY 32 /* max # of PHYs per MII */ 384c87aefeSPatrick Mooney 394c87aefeSPatrick Mooney /* 404c87aefeSPatrick Mooney * MII commands, used if a device must drive the MII lines 414c87aefeSPatrick Mooney * manually. 424c87aefeSPatrick Mooney */ 434c87aefeSPatrick Mooney #define MII_COMMAND_START 0x01 444c87aefeSPatrick Mooney #define MII_COMMAND_READ 0x02 454c87aefeSPatrick Mooney #define MII_COMMAND_WRITE 0x01 464c87aefeSPatrick Mooney #define MII_COMMAND_ACK 0x02 474c87aefeSPatrick Mooney 484c87aefeSPatrick Mooney #define MII_BMCR 0x00 /* Basic mode control register (rw) */ 494c87aefeSPatrick Mooney #define BMCR_RESET 0x8000 /* reset */ 504c87aefeSPatrick Mooney #define BMCR_LOOP 0x4000 /* loopback */ 514c87aefeSPatrick Mooney #define BMCR_SPEED0 0x2000 /* speed selection (LSB) */ 524c87aefeSPatrick Mooney #define BMCR_AUTOEN 0x1000 /* autonegotiation enable */ 534c87aefeSPatrick Mooney #define BMCR_PDOWN 0x0800 /* power down */ 544c87aefeSPatrick Mooney #define BMCR_ISO 0x0400 /* isolate */ 554c87aefeSPatrick Mooney #define BMCR_STARTNEG 0x0200 /* restart autonegotiation */ 564c87aefeSPatrick Mooney #define BMCR_FDX 0x0100 /* Set duplex mode */ 574c87aefeSPatrick Mooney #define BMCR_CTEST 0x0080 /* collision test */ 584c87aefeSPatrick Mooney #define BMCR_SPEED1 0x0040 /* speed selection (MSB) */ 594c87aefeSPatrick Mooney 604c87aefeSPatrick Mooney #define BMCR_S10 0x0000 /* 10 Mb/s */ 614c87aefeSPatrick Mooney #define BMCR_S100 BMCR_SPEED0 /* 100 Mb/s */ 624c87aefeSPatrick Mooney #define BMCR_S1000 BMCR_SPEED1 /* 1000 Mb/s */ 634c87aefeSPatrick Mooney 644c87aefeSPatrick Mooney #define BMCR_SPEED(x) ((x) & (BMCR_SPEED0|BMCR_SPEED1)) 654c87aefeSPatrick Mooney 664c87aefeSPatrick Mooney #define MII_BMSR 0x01 /* Basic mode status register (ro) */ 674c87aefeSPatrick Mooney #define BMSR_100T4 0x8000 /* 100 base T4 capable */ 684c87aefeSPatrick Mooney #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */ 694c87aefeSPatrick Mooney #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */ 704c87aefeSPatrick Mooney #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */ 714c87aefeSPatrick Mooney #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */ 724c87aefeSPatrick Mooney #define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */ 734c87aefeSPatrick Mooney #define BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */ 744c87aefeSPatrick Mooney #define BMSR_EXTSTAT 0x0100 /* Extended status in register 15 */ 754c87aefeSPatrick Mooney #define BMSR_MFPS 0x0040 /* MII Frame Preamble Suppression */ 764c87aefeSPatrick Mooney #define BMSR_ACOMP 0x0020 /* Autonegotiation complete */ 774c87aefeSPatrick Mooney #define BMSR_RFAULT 0x0010 /* Link partner fault */ 784c87aefeSPatrick Mooney #define BMSR_ANEG 0x0008 /* Autonegotiation capable */ 794c87aefeSPatrick Mooney #define BMSR_LINK 0x0004 /* Link status */ 804c87aefeSPatrick Mooney #define BMSR_JABBER 0x0002 /* Jabber detected */ 814c87aefeSPatrick Mooney #define BMSR_EXTCAP 0x0001 /* Extended capability */ 824c87aefeSPatrick Mooney 834c87aefeSPatrick Mooney #define BMSR_DEFCAPMASK 0xffffffff 844c87aefeSPatrick Mooney 854c87aefeSPatrick Mooney /* 864c87aefeSPatrick Mooney * Note that the EXTSTAT bit indicates that there is extended status 874c87aefeSPatrick Mooney * info available in register 15, but 802.3 section 22.2.4.3 also 884c87aefeSPatrick Mooney * states that all 1000 Mb/s capable PHYs will set this bit to 1. 894c87aefeSPatrick Mooney */ 904c87aefeSPatrick Mooney 914c87aefeSPatrick Mooney #define BMSR_MEDIAMASK (BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \ 924c87aefeSPatrick Mooney BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX) 934c87aefeSPatrick Mooney 944c87aefeSPatrick Mooney /* 954c87aefeSPatrick Mooney * Convert BMSR media capabilities to ANAR bits for autonegotiation. 964c87aefeSPatrick Mooney * Note the shift chopps off the BMSR_ANEG bit. 974c87aefeSPatrick Mooney */ 984c87aefeSPatrick Mooney #define BMSR_MEDIA_TO_ANAR(x) (((x) & BMSR_MEDIAMASK) >> 6) 994c87aefeSPatrick Mooney 1004c87aefeSPatrick Mooney #define MII_PHYIDR1 0x02 /* ID register 1 (ro) */ 1014c87aefeSPatrick Mooney 1024c87aefeSPatrick Mooney #define MII_PHYIDR2 0x03 /* ID register 2 (ro) */ 1034c87aefeSPatrick Mooney #define IDR2_OUILSB 0xfc00 /* OUI LSB */ 1044c87aefeSPatrick Mooney #define IDR2_MODEL 0x03f0 /* vendor model */ 1054c87aefeSPatrick Mooney #define IDR2_REV 0x000f /* vendor revision */ 1064c87aefeSPatrick Mooney 1074c87aefeSPatrick Mooney #define MII_ANAR 0x04 /* Autonegotiation advertisement (rw) */ 1084c87aefeSPatrick Mooney /* section 28.2.4.1 and 37.2.6.1 */ 1094c87aefeSPatrick Mooney #define ANAR_NP 0x8000 /* Next page (ro) */ 1104c87aefeSPatrick Mooney #define ANAR_ACK 0x4000 /* link partner abilities acknowledged (ro) */ 1114c87aefeSPatrick Mooney #define ANAR_RF 0x2000 /* remote fault (ro) */ 1124c87aefeSPatrick Mooney /* Annex 28B.2 */ 1134c87aefeSPatrick Mooney #define ANAR_FC 0x0400 /* local device supports PAUSE */ 1144c87aefeSPatrick Mooney #define ANAR_T4 0x0200 /* local device supports 100bT4 */ 1154c87aefeSPatrick Mooney #define ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */ 1164c87aefeSPatrick Mooney #define ANAR_TX 0x0080 /* local device supports 100bTx */ 1174c87aefeSPatrick Mooney #define ANAR_10_FD 0x0040 /* local device supports 10bT FD */ 1184c87aefeSPatrick Mooney #define ANAR_10 0x0020 /* local device supports 10bT */ 1194c87aefeSPatrick Mooney #define ANAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 1204c87aefeSPatrick Mooney #define ANAR_PAUSE_NONE (0 << 10) 1214c87aefeSPatrick Mooney #define ANAR_PAUSE_SYM (1 << 10) 1224c87aefeSPatrick Mooney #define ANAR_PAUSE_ASYM (2 << 10) 1234c87aefeSPatrick Mooney #define ANAR_PAUSE_TOWARDS (3 << 10) 1244c87aefeSPatrick Mooney 1254c87aefeSPatrick Mooney /* Annex 28D */ 1264c87aefeSPatrick Mooney #define ANAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 1274c87aefeSPatrick Mooney #define ANAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 1284c87aefeSPatrick Mooney #define ANAR_X_PAUSE_NONE (0 << 7) 1294c87aefeSPatrick Mooney #define ANAR_X_PAUSE_SYM (1 << 7) 1304c87aefeSPatrick Mooney #define ANAR_X_PAUSE_ASYM (2 << 7) 1314c87aefeSPatrick Mooney #define ANAR_X_PAUSE_TOWARDS (3 << 7) 1324c87aefeSPatrick Mooney 1334c87aefeSPatrick Mooney #define MII_ANLPAR 0x05 /* Autonegotiation lnk partner abilities (rw) */ 1344c87aefeSPatrick Mooney /* section 28.2.4.1 and 37.2.6.1 */ 1354c87aefeSPatrick Mooney #define ANLPAR_NP 0x8000 /* Next page (ro) */ 1364c87aefeSPatrick Mooney #define ANLPAR_ACK 0x4000 /* link partner accepted ACK (ro) */ 1374c87aefeSPatrick Mooney #define ANLPAR_RF 0x2000 /* remote fault (ro) */ 1384c87aefeSPatrick Mooney #define ANLPAR_FC 0x0400 /* link partner supports PAUSE */ 1394c87aefeSPatrick Mooney #define ANLPAR_T4 0x0200 /* link partner supports 100bT4 */ 1404c87aefeSPatrick Mooney #define ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */ 1414c87aefeSPatrick Mooney #define ANLPAR_TX 0x0080 /* link partner supports 100bTx */ 1424c87aefeSPatrick Mooney #define ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */ 1434c87aefeSPatrick Mooney #define ANLPAR_10 0x0020 /* link partner supports 10bT */ 1444c87aefeSPatrick Mooney #define ANLPAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 1454c87aefeSPatrick Mooney #define ANLPAR_PAUSE_MASK (3 << 10) 1464c87aefeSPatrick Mooney #define ANLPAR_PAUSE_NONE (0 << 10) 1474c87aefeSPatrick Mooney #define ANLPAR_PAUSE_SYM (1 << 10) 1484c87aefeSPatrick Mooney #define ANLPAR_PAUSE_ASYM (2 << 10) 1494c87aefeSPatrick Mooney #define ANLPAR_PAUSE_TOWARDS (3 << 10) 1504c87aefeSPatrick Mooney 1514c87aefeSPatrick Mooney #define ANLPAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 1524c87aefeSPatrick Mooney #define ANLPAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 1534c87aefeSPatrick Mooney #define ANLPAR_X_PAUSE_MASK (3 << 7) 1544c87aefeSPatrick Mooney #define ANLPAR_X_PAUSE_NONE (0 << 7) 1554c87aefeSPatrick Mooney #define ANLPAR_X_PAUSE_SYM (1 << 7) 1564c87aefeSPatrick Mooney #define ANLPAR_X_PAUSE_ASYM (2 << 7) 1574c87aefeSPatrick Mooney #define ANLPAR_X_PAUSE_TOWARDS (3 << 7) 1584c87aefeSPatrick Mooney 1594c87aefeSPatrick Mooney #define MII_ANER 0x06 /* Autonegotiation expansion (ro) */ 1604c87aefeSPatrick Mooney /* section 28.2.4.1 and 37.2.6.1 */ 1614c87aefeSPatrick Mooney #define ANER_MLF 0x0010 /* multiple link detection fault */ 1624c87aefeSPatrick Mooney #define ANER_LPNP 0x0008 /* link parter next page-able */ 1634c87aefeSPatrick Mooney #define ANER_NP 0x0004 /* next page-able */ 1644c87aefeSPatrick Mooney #define ANER_PAGE_RX 0x0002 /* Page received */ 1654c87aefeSPatrick Mooney #define ANER_LPAN 0x0001 /* link parter autoneg-able */ 1664c87aefeSPatrick Mooney 1674c87aefeSPatrick Mooney #define MII_ANNP 0x07 /* Autonegotiation next page */ 1684c87aefeSPatrick Mooney /* section 28.2.4.1 and 37.2.6.1 */ 1694c87aefeSPatrick Mooney 1704c87aefeSPatrick Mooney #define MII_ANLPRNP 0x08 /* Autonegotiation link partner rx next page */ 1714c87aefeSPatrick Mooney /* section 32.5.1 and 37.2.6.1 */ 1724c87aefeSPatrick Mooney 1734c87aefeSPatrick Mooney /* This is also the 1000baseT control register */ 1744c87aefeSPatrick Mooney #define MII_100T2CR 0x09 /* 100base-T2 control register */ 1754c87aefeSPatrick Mooney #define GTCR_TEST_MASK 0xe000 /* see 802.3ab ss. 40.6.1.1.2 */ 1764c87aefeSPatrick Mooney #define GTCR_MAN_MS 0x1000 /* enable manual master/slave control */ 1774c87aefeSPatrick Mooney #define GTCR_ADV_MS 0x0800 /* 1 = adv. master, 0 = adv. slave */ 1784c87aefeSPatrick Mooney #define GTCR_PORT_TYPE 0x0400 /* 1 = DCE, 0 = DTE (NIC) */ 1794c87aefeSPatrick Mooney #define GTCR_ADV_1000TFDX 0x0200 /* adv. 1000baseT FDX */ 1804c87aefeSPatrick Mooney #define GTCR_ADV_1000THDX 0x0100 /* adv. 1000baseT HDX */ 1814c87aefeSPatrick Mooney 1824c87aefeSPatrick Mooney /* This is also the 1000baseT status register */ 1834c87aefeSPatrick Mooney #define MII_100T2SR 0x0a /* 100base-T2 status register */ 1844c87aefeSPatrick Mooney #define GTSR_MAN_MS_FLT 0x8000 /* master/slave config fault */ 1854c87aefeSPatrick Mooney #define GTSR_MS_RES 0x4000 /* result: 1 = master, 0 = slave */ 1864c87aefeSPatrick Mooney #define GTSR_LRS 0x2000 /* local rx status, 1 = ok */ 1874c87aefeSPatrick Mooney #define GTSR_RRS 0x1000 /* remote rx status, 1 = ok */ 1884c87aefeSPatrick Mooney #define GTSR_LP_1000TFDX 0x0800 /* link partner 1000baseT FDX capable */ 1894c87aefeSPatrick Mooney #define GTSR_LP_1000THDX 0x0400 /* link partner 1000baseT HDX capable */ 1904c87aefeSPatrick Mooney #define GTSR_LP_ASM_DIR 0x0200 /* link partner asym. pause dir. capable */ 1914c87aefeSPatrick Mooney #define GTSR_IDLE_ERR 0x00ff /* IDLE error count */ 1924c87aefeSPatrick Mooney 1934c87aefeSPatrick Mooney #define MII_PSECR 0x0b /* PSE control register */ 1944c87aefeSPatrick Mooney #define PSECR_PACTLMASK 0x000c /* pair control mask */ 1954c87aefeSPatrick Mooney #define PSECR_PSEENMASK 0x0003 /* PSE enable mask */ 1964c87aefeSPatrick Mooney #define PSECR_PINOUTB 0x0008 /* PSE pinout Alternative B */ 1974c87aefeSPatrick Mooney #define PSECR_PINOUTA 0x0004 /* PSE pinout Alternative A */ 1984c87aefeSPatrick Mooney #define PSECR_FOPOWTST 0x0002 /* Force Power Test Mode */ 1994c87aefeSPatrick Mooney #define PSECR_PSEEN 0x0001 /* PSE Enabled */ 2004c87aefeSPatrick Mooney #define PSECR_PSEDIS 0x0000 /* PSE Disabled */ 2014c87aefeSPatrick Mooney 2024c87aefeSPatrick Mooney #define MII_PSESR 0x0c /* PSE status register */ 2034c87aefeSPatrick Mooney #define PSESR_PWRDENIED 0x1000 /* Power Denied */ 2044c87aefeSPatrick Mooney #define PSESR_VALSIG 0x0800 /* Valid PD signature detected */ 2054c87aefeSPatrick Mooney #define PSESR_INVALSIG 0x0400 /* Invalid PD signature detected */ 2064c87aefeSPatrick Mooney #define PSESR_SHORTCIRC 0x0200 /* Short circuit condition detected */ 2074c87aefeSPatrick Mooney #define PSESR_OVERLOAD 0x0100 /* Overload condition detected */ 2084c87aefeSPatrick Mooney #define PSESR_MPSABSENT 0x0080 /* MPS absent condition detected */ 2094c87aefeSPatrick Mooney #define PSESR_PDCLMASK 0x0070 /* PD Class mask */ 2104c87aefeSPatrick Mooney #define PSESR_STATMASK 0x000e /* PSE Status mask */ 2114c87aefeSPatrick Mooney #define PSESR_PAIRCTABL 0x0001 /* PAIR Control Ability */ 2124c87aefeSPatrick Mooney #define PSESR_PDCL_4 (4 << 4) /* Class 4 */ 2134c87aefeSPatrick Mooney #define PSESR_PDCL_3 (3 << 4) /* Class 3 */ 2144c87aefeSPatrick Mooney #define PSESR_PDCL_2 (2 << 4) /* Class 2 */ 2154c87aefeSPatrick Mooney #define PSESR_PDCL_1 (1 << 4) /* Class 1 */ 2164c87aefeSPatrick Mooney #define PSESR_PDCL_0 (0 << 4) /* Class 0 */ 2174c87aefeSPatrick Mooney 2184c87aefeSPatrick Mooney #define MII_MMDACR 0x0d /* MMD access control register */ 2194c87aefeSPatrick Mooney #define MMDACR_FUNCMASK 0xc000 /* function */ 2204c87aefeSPatrick Mooney #define MMDACR_DADDRMASK 0x001f /* device address */ 2214c87aefeSPatrick Mooney #define MMDACR_FN_ADDRESS (0 << 14) /* address */ 2224c87aefeSPatrick Mooney #define MMDACR_FN_DATANPI (1 << 14) /* data, no post increment */ 2234c87aefeSPatrick Mooney #define MMDACR_FN_DATAPIRW (2 << 14) /* data, post increment on r/w */ 2244c87aefeSPatrick Mooney #define MMDACR_FN_DATAPIW (3 << 14) /* data, post increment on wr only */ 2254c87aefeSPatrick Mooney 2264c87aefeSPatrick Mooney #define MII_MMDAADR 0x0e /* MMD access address data register */ 2274c87aefeSPatrick Mooney 2284c87aefeSPatrick Mooney #define MII_EXTSR 0x0f /* Extended status register */ 2294c87aefeSPatrick Mooney #define EXTSR_1000XFDX 0x8000 /* 1000X full-duplex capable */ 2304c87aefeSPatrick Mooney #define EXTSR_1000XHDX 0x4000 /* 1000X half-duplex capable */ 2314c87aefeSPatrick Mooney #define EXTSR_1000TFDX 0x2000 /* 1000T full-duplex capable */ 2324c87aefeSPatrick Mooney #define EXTSR_1000THDX 0x1000 /* 1000T half-duplex capable */ 2334c87aefeSPatrick Mooney 2344c87aefeSPatrick Mooney #define EXTSR_MEDIAMASK (EXTSR_1000XFDX|EXTSR_1000XHDX| \ 2354c87aefeSPatrick Mooney EXTSR_1000TFDX|EXTSR_1000THDX) 2364c87aefeSPatrick Mooney 2374c87aefeSPatrick Mooney #endif /* _DEV_MII_MII_H_ */ 238