17c478bd9Sstevel@tonic-gate /*
2d0f8ff6eSkk  *
37c478bd9Sstevel@tonic-gate  * CDDL HEADER START
47c478bd9Sstevel@tonic-gate  *
57c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
6dc0093f4Seschrock  * Common Development and Distribution License (the "License").
7dc0093f4Seschrock  * You may not use this file except in compliance with the License.
87c478bd9Sstevel@tonic-gate  *
97c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
107c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
117c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
127c478bd9Sstevel@tonic-gate  * and limitations under the License.
137c478bd9Sstevel@tonic-gate  *
147c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
157c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
167c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
177c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
187c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
197c478bd9Sstevel@tonic-gate  *
207c478bd9Sstevel@tonic-gate  * CDDL HEADER END
217c478bd9Sstevel@tonic-gate  */
227c478bd9Sstevel@tonic-gate /*
23ab47273fSEdward Gillett  * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
24c1e9bf00SRobert Mustacchi  * Copyright 2019 Joyent, Inc.
25fb2cb638SRobert Mustacchi  * Copyright 2024 Oxide Computer Company
26ab47273fSEdward Gillett  */
27ab47273fSEdward Gillett 
28ab47273fSEdward Gillett /*
29ab47273fSEdward Gillett  * Copyright (c) 2010, Intel Corporation.
30ab47273fSEdward Gillett  * All rights reserved.
317c478bd9Sstevel@tonic-gate  */
327c478bd9Sstevel@tonic-gate 
337c478bd9Sstevel@tonic-gate /*	Copyright (c) 1988 AT&T	*/
34cff040f3SRobert Mustacchi /*	  All Rights Reserved	*/
357c478bd9Sstevel@tonic-gate 
367c478bd9Sstevel@tonic-gate #include	"dis_tables.h"
377c478bd9Sstevel@tonic-gate 
387c478bd9Sstevel@tonic-gate /* BEGIN CSTYLED */
397c478bd9Sstevel@tonic-gate 
407c478bd9Sstevel@tonic-gate /*
417c478bd9Sstevel@tonic-gate  * Disassembly begins in dis_distable, which is equivalent to the One-byte
427c478bd9Sstevel@tonic-gate  * Opcode Map in the Intel IA32 ISA Reference (page A-6 in my copy).  The
437c478bd9Sstevel@tonic-gate  * decoding loops then traverse out through the other tables as necessary to
447c478bd9Sstevel@tonic-gate  * decode a given instruction.
457c478bd9Sstevel@tonic-gate  *
467c478bd9Sstevel@tonic-gate  * The behavior of this file can be controlled by one of the following flags:
477c478bd9Sstevel@tonic-gate  *
48cff040f3SRobert Mustacchi  *	DIS_TEXT	Include text for disassembly
49cff040f3SRobert Mustacchi  *	DIS_MEM		Include memory-size calculations
507c478bd9Sstevel@tonic-gate  *
517c478bd9Sstevel@tonic-gate  * Either or both of these can be defined.
527c478bd9Sstevel@tonic-gate  *
537c478bd9Sstevel@tonic-gate  * This file is not, and will never be, cstyled.  If anything, the tables should
547c478bd9Sstevel@tonic-gate  * be taken out another tab stop or two so nothing overlaps.
557c478bd9Sstevel@tonic-gate  */
567c478bd9Sstevel@tonic-gate 
577c478bd9Sstevel@tonic-gate /*
587c478bd9Sstevel@tonic-gate  * These functions must be provided for the consumer to do disassembly.
597c478bd9Sstevel@tonic-gate  */
607c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
617c478bd9Sstevel@tonic-gate extern char *strncpy(char *, const char *, size_t);
627c478bd9Sstevel@tonic-gate extern size_t strlen(const char *);
637c478bd9Sstevel@tonic-gate extern int strcmp(const char *, const char *);
647c478bd9Sstevel@tonic-gate extern int strncmp(const char *, const char *, size_t);
657c478bd9Sstevel@tonic-gate extern size_t strlcat(char *, const char *, size_t);
667c478bd9Sstevel@tonic-gate #endif
677c478bd9Sstevel@tonic-gate 
687c478bd9Sstevel@tonic-gate 
69cff040f3SRobert Mustacchi #define		TERM	0	/* used to indicate that the 'indirect' */
707c478bd9Sstevel@tonic-gate 				/* field terminates - no pointer.	*/
717c478bd9Sstevel@tonic-gate 
727c478bd9Sstevel@tonic-gate /* Used to decode instructions. */
737c478bd9Sstevel@tonic-gate typedef struct	instable {
747c478bd9Sstevel@tonic-gate 	struct instable	*it_indirect;	/* for decode op codes */
757c478bd9Sstevel@tonic-gate 	uchar_t		it_adrmode;
767c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
777c478bd9Sstevel@tonic-gate 	char		it_name[NCPS];
78d267098bSdmick 	uint_t		it_suffix:1;		/* mnem + "w", "l", or "d" */
797c478bd9Sstevel@tonic-gate #endif
807c478bd9Sstevel@tonic-gate #ifdef DIS_MEM
817c478bd9Sstevel@tonic-gate 	uint_t		it_size:16;
827c478bd9Sstevel@tonic-gate #endif
837c478bd9Sstevel@tonic-gate 	uint_t		it_invalid64:1;		/* opcode invalid in amd64 */
847c478bd9Sstevel@tonic-gate 	uint_t		it_always64:1;		/* 64 bit when in 64 bit mode */
857c478bd9Sstevel@tonic-gate 	uint_t		it_invalid32:1;		/* invalid in IA32 */
867c478bd9Sstevel@tonic-gate 	uint_t		it_stackop:1;		/* push/pop stack operation */
87245ac945SRobert Mustacchi 	uint_t		it_vexwoxmm:1;		/* VEX instructions that don't use XMM/YMM */
883863692fSRobert Mustacchi 	uint_t		it_avxsuf:3;		/* AVX2/AVX512 suffix rqd. */
89a4e73d5dSJerry Jelinek 	uint_t		it_vexopmask:1;		/* VEX inst. that use opmask */
907c478bd9Sstevel@tonic-gate } instable_t;
917c478bd9Sstevel@tonic-gate 
927c478bd9Sstevel@tonic-gate /*
937c478bd9Sstevel@tonic-gate  * Instruction formats.
947c478bd9Sstevel@tonic-gate  */
957c478bd9Sstevel@tonic-gate enum {
967c478bd9Sstevel@tonic-gate 	UNKNOWN,
977c478bd9Sstevel@tonic-gate 	MRw,
987c478bd9Sstevel@tonic-gate 	IMlw,
997c478bd9Sstevel@tonic-gate 	IMw,
1007c478bd9Sstevel@tonic-gate 	IR,
1017c478bd9Sstevel@tonic-gate 	OA,
1027c478bd9Sstevel@tonic-gate 	AO,
1037c478bd9Sstevel@tonic-gate 	MS,
1047c478bd9Sstevel@tonic-gate 	SM,
1057c478bd9Sstevel@tonic-gate 	Mv,
1067c478bd9Sstevel@tonic-gate 	Mw,
1077c478bd9Sstevel@tonic-gate 	M,		/* register or memory */
1087aa76ffcSBryan Cantrill 	MG9,		/* register or memory in group 9 (prefix optional) */
1097c478bd9Sstevel@tonic-gate 	Mb,		/* register or memory, always byte sized */
1107c478bd9Sstevel@tonic-gate 	MO,		/* memory only (no registers) */
1117c478bd9Sstevel@tonic-gate 	PREF,
112eb23829fSBryan Cantrill 	SWAPGS_RDTSCP,
113f8801251Skk 	MONITOR_MWAIT,
1147c478bd9Sstevel@tonic-gate 	R,
1157c478bd9Sstevel@tonic-gate 	RA,
1167c478bd9Sstevel@tonic-gate 	SEG,
1177c478bd9Sstevel@tonic-gate 	MR,
1187c478bd9Sstevel@tonic-gate 	RM,
119cff040f3SRobert Mustacchi 	RM_66r,		/* RM, but with a required 0x66 prefix */
1207c478bd9Sstevel@tonic-gate 	IA,
1217c478bd9Sstevel@tonic-gate 	MA,
1227c478bd9Sstevel@tonic-gate 	SD,
1237c478bd9Sstevel@tonic-gate 	AD,
1247c478bd9Sstevel@tonic-gate 	SA,
1257c478bd9Sstevel@tonic-gate 	D,
1267c478bd9Sstevel@tonic-gate 	INM,
1277c478bd9Sstevel@tonic-gate 	SO,
1287c478bd9Sstevel@tonic-gate 	BD,
1297c478bd9Sstevel@tonic-gate 	I,
1307c478bd9Sstevel@tonic-gate 	P,
1317c478bd9Sstevel@tonic-gate 	V,
1327c478bd9Sstevel@tonic-gate 	DSHIFT,		/* for double shift that has an 8-bit immediate */
1337c478bd9Sstevel@tonic-gate 	U,
1347c478bd9Sstevel@tonic-gate 	OVERRIDE,
1357c478bd9Sstevel@tonic-gate 	NORM,		/* instructions w/o ModR/M byte, no memory access */
1367c478bd9Sstevel@tonic-gate 	IMPLMEM,	/* instructions w/o ModR/M byte, implicit mem access */
1377c478bd9Sstevel@tonic-gate 	O,		/* for call	*/
138cff040f3SRobert Mustacchi 	JTAB,		/* jump table	*/
1397c478bd9Sstevel@tonic-gate 	IMUL,		/* for 186 iimul instr  */
1407c478bd9Sstevel@tonic-gate 	CBW,		/* so data16 can be evaluated for cbw and variants */
1417c478bd9Sstevel@tonic-gate 	MvI,		/* for 186 logicals */
1427c478bd9Sstevel@tonic-gate 	ENTER,		/* for 186 enter instr  */
1437c478bd9Sstevel@tonic-gate 	RMw,		/* for 286 arpl instr */
1447c478bd9Sstevel@tonic-gate 	Ib,		/* for push immediate byte */
1457c478bd9Sstevel@tonic-gate 	F,		/* for 287 instructions */
1467c478bd9Sstevel@tonic-gate 	FF,		/* for 287 instructions */
1477c478bd9Sstevel@tonic-gate 	FFC,		/* for 287 instructions */
1487c478bd9Sstevel@tonic-gate 	DM,		/* 16-bit data */
1497c478bd9Sstevel@tonic-gate 	AM,		/* 16-bit addr */
1507c478bd9Sstevel@tonic-gate 	LSEG,		/* for 3-bit seg reg encoding */
1517c478bd9Sstevel@tonic-gate 	MIb,		/* for 386 logicals */
1527c478bd9Sstevel@tonic-gate 	SREG,		/* for 386 special registers */
1537c478bd9Sstevel@tonic-gate 	PREFIX,		/* a REP instruction prefix */
1547c478bd9Sstevel@tonic-gate 	LOCK,		/* a LOCK instruction prefix */
1557c478bd9Sstevel@tonic-gate 	INT3,		/* The int 3 instruction, which has a fake operand */
1567c478bd9Sstevel@tonic-gate 	INTx,		/* The normal int instruction, with explicit int num */
1577c478bd9Sstevel@tonic-gate 	DSHIFTcl,	/* for double shift that implicitly uses %cl */
1587c478bd9Sstevel@tonic-gate 	CWD,		/* so data16 can be evaluated for cwd and variants */
1597c478bd9Sstevel@tonic-gate 	RET,		/* single immediate 16-bit operand */
1607c478bd9Sstevel@tonic-gate 	MOVZ,		/* for movs and movz, with different size operands */
161d0f8ff6eSkk 	CRC32,		/* for crc32, with different size operands */
1627c478bd9Sstevel@tonic-gate 	XADDB,		/* for xaddb */
1637c478bd9Sstevel@tonic-gate 	MOVSXZ,		/* AMD64 mov sign extend 32 to 64 bit instruction */
16482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 	MOVBE,		/* movbe instruction */
165fb2cb638SRobert Mustacchi 	MOVDIR,		/* movdir64b register semantics m512 -> r16/32/64 */
166fb2cb638SRobert Mustacchi 	RMATCH,		/* register, but type matches CPU, not prefixes */
1677c478bd9Sstevel@tonic-gate 
1687c478bd9Sstevel@tonic-gate /*
1697c478bd9Sstevel@tonic-gate  * MMX/SIMD addressing modes.
1707c478bd9Sstevel@tonic-gate  */
1717c478bd9Sstevel@tonic-gate 
1727c478bd9Sstevel@tonic-gate 	MMO,		/* Prefixable MMX/SIMD-Int	mm/mem	-> mm */
1737c478bd9Sstevel@tonic-gate 	MMOIMPL,	/* Prefixable MMX/SIMD-Int	mm	-> mm (mem) */
1747c478bd9Sstevel@tonic-gate 	MMO3P,		/* Prefixable MMX/SIMD-Int	mm	-> r32,imm8 */
175cff040f3SRobert Mustacchi 	MMOM3,		/* Prefixable MMX/SIMD-Int	mm	-> r32	*/
1767c478bd9Sstevel@tonic-gate 	MMOS,		/* Prefixable MMX/SIMD-Int	mm	-> mm/mem */
1777c478bd9Sstevel@tonic-gate 	MMOMS,		/* Prefixable MMX/SIMD-Int	mm	-> mem */
1787c478bd9Sstevel@tonic-gate 	MMOPM,		/* MMX/SIMD-Int			mm/mem	-> mm,imm8 */
179d0f8ff6eSkk 	MMOPM_66o,	/* MMX/SIMD-Int 0x66 optional	mm/mem	-> mm,imm8 */
1807c478bd9Sstevel@tonic-gate 	MMOPRM,		/* Prefixable MMX/SIMD-Int	r32/mem	-> mm,imm8 */
1817c478bd9Sstevel@tonic-gate 	MMOSH,		/* Prefixable MMX		mm,imm8	*/
1827c478bd9Sstevel@tonic-gate 	MM,		/* MMX/SIMD-Int			mm/mem	-> mm	*/
1837c478bd9Sstevel@tonic-gate 	MMS,		/* MMX/SIMD-Int			mm	-> mm/mem */
1847c478bd9Sstevel@tonic-gate 	MMSH,		/* MMX				mm,imm8 */
1857c478bd9Sstevel@tonic-gate 	XMMO,		/* Prefixable SIMD		xmm/mem	-> xmm */
1867c478bd9Sstevel@tonic-gate 	XMMOS,		/* Prefixable SIMD		xmm	-> xmm/mem */
1877c478bd9Sstevel@tonic-gate 	XMMOPM,		/* Prefixable SIMD		xmm/mem	w/to xmm,imm8 */
1887c478bd9Sstevel@tonic-gate 	XMMOMX,		/* Prefixable SIMD		mm/mem	-> xmm */
1897c478bd9Sstevel@tonic-gate 	XMMOX3,		/* Prefixable SIMD		xmm	-> r32 */
1907c478bd9Sstevel@tonic-gate 	XMMOXMM,	/* Prefixable SIMD		xmm/mem	-> mm	*/
1917c478bd9Sstevel@tonic-gate 	XMMOM,		/* Prefixable SIMD		xmm	-> mem */
1927c478bd9Sstevel@tonic-gate 	XMMOMS,		/* Prefixable SIMD		mem	-> xmm */
193cff040f3SRobert Mustacchi 	XMM,		/* SIMD				xmm/mem	-> xmm */
194d0f8ff6eSkk 	XMM_66r,	/* SIMD 0x66 prefix required	xmm/mem	-> xmm */
195cff040f3SRobert Mustacchi 	XMM_66o,	/* SIMD 0x66 prefix optional	xmm/mem	-> xmm */
1967c478bd9Sstevel@tonic-gate 	XMMXIMPL,	/* SIMD				xmm	-> xmm (mem) */
1977c478bd9Sstevel@tonic-gate 	XMM3P,		/* SIMD				xmm	-> r32,imm8 */
198d0f8ff6eSkk 	XMM3PM_66r,	/* SIMD 0x66 prefix required	xmm	-> r32/mem,imm8 */
199cff040f3SRobert Mustacchi 	XMMP,		/* SIMD				xmm/mem w/to xmm,imm8 */
200d0f8ff6eSkk 	XMMP_66o,	/* SIMD 0x66 prefix optional	xmm/mem w/to xmm,imm8 */
201d0f8ff6eSkk 	XMMP_66r,	/* SIMD 0x66 prefix required	xmm/mem w/to xmm,imm8 */
202cff040f3SRobert Mustacchi 	XMMPRM,		/* SIMD				r32/mem -> xmm,imm8 */
203d0f8ff6eSkk 	XMMPRM_66r,	/* SIMD 0x66 prefix required	r32/mem -> xmm,imm8 */
2047c478bd9Sstevel@tonic-gate 	XMMS,		/* SIMD				xmm	-> xmm/mem */
205cff040f3SRobert Mustacchi 	XMMM,		/* SIMD				mem	-> xmm */
206d0f8ff6eSkk 	XMMM_66r,	/* SIMD	0x66 prefix required	mem	-> xmm */
2077c478bd9Sstevel@tonic-gate 	XMMMS,		/* SIMD				xmm	-> mem */
208cff040f3SRobert Mustacchi 	XMM3MX,		/* SIMD				r32/mem -> xmm */
209cff040f3SRobert Mustacchi 	XMM3MXS,	/* SIMD				xmm	-> r32/mem */
210cff040f3SRobert Mustacchi 	XMMSH,		/* SIMD				xmm,imm8 */
211cff040f3SRobert Mustacchi 	XMMXM3,		/* SIMD				xmm/mem -> r32 */
212cff040f3SRobert Mustacchi 	XMMX3,		/* SIMD				xmm	-> r32 */
213cff040f3SRobert Mustacchi 	XMMXMM,		/* SIMD				xmm/mem	-> mm */
214cff040f3SRobert Mustacchi 	XMMMX,		/* SIMD				mm	-> xmm */
215cff040f3SRobert Mustacchi 	XMMXM,		/* SIMD				xmm	-> mm */
216cff040f3SRobert Mustacchi 	XMMX2I,		/* SIMD				xmm -> xmm, imm, imm */
217cff040f3SRobert Mustacchi 	XMM2I,		/* SIMD				xmm, imm, imm */
2187c478bd9Sstevel@tonic-gate 	XMMFENCE,	/* SIMD lfence or mfence */
219ab47273fSEdward Gillett 	XMMSFNC,	/* SIMD sfence (none or mem) */
220cff040f3SRobert Mustacchi 	FSGS,		/* FSGSBASE if reg */
221ab47273fSEdward Gillett 	XGETBV_XSETBV,
222ab47273fSEdward Gillett 	VEX_NONE,	/* VEX  no operand */
223ab47273fSEdward Gillett 	VEX_MO,		/* VEX	mod_rm		               -> implicit reg */
224ab47273fSEdward Gillett 	VEX_RMrX,	/* VEX  VEX.vvvv, mod_rm               -> mod_reg */
225245ac945SRobert Mustacchi 	VEX_VRMrX,	/* VEX  mod_rm, VEX.vvvv               -> mod_rm */
226ab47273fSEdward Gillett 	VEX_RRX,	/* VEX  VEX.vvvv, mod_reg              -> mod_rm */
227ab47273fSEdward Gillett 	VEX_RMRX,	/* VEX  VEX.vvvv, mod_rm, imm8[7:4]    -> mod_reg */
228cff040f3SRobert Mustacchi 	VEX_MX,		/* VEX  mod_rm                         -> mod_reg */
229cff040f3SRobert Mustacchi 	VEX_MXI,	/* VEX  mod_rm, imm8                   -> mod_reg */
230cff040f3SRobert Mustacchi 	VEX_XXI,	/* VEX  mod_rm, imm8                   -> VEX.vvvv */
231cff040f3SRobert Mustacchi 	VEX_MR,		/* VEX  mod_rm                         -> mod_reg */
232cff040f3SRobert Mustacchi 	VEX_RRI,	/* VEX  mod_reg, mod_rm                -> implicit(eflags/r32) */
233cff040f3SRobert Mustacchi 	VEX_RX,		/* VEX  mod_reg                        -> mod_rm */
234cff040f3SRobert Mustacchi 	VEX_KRR,	/* VEX  mod_rm                         -> mod_reg */
235cff040f3SRobert Mustacchi 	VEX_KMR,	/* VEX  mod_reg                        -> mod_rm */
236cff040f3SRobert Mustacchi 	VEX_KRM,	/* VEX  mod_rm                         -> mod_reg */
237cff040f3SRobert Mustacchi 	VEX_RR,		/* VEX  mod_rm                         -> mod_reg */
238cff040f3SRobert Mustacchi 	VEX_RRi,	/* VEX  mod_rm, imm8                   -> mod_reg */
239cff040f3SRobert Mustacchi 	VEX_RM,		/* VEX  mod_reg                        -> mod_rm */
240245ac945SRobert Mustacchi 	VEX_RIM,	/* VEX  mod_reg, imm8                  -> mod_rm */
241cff040f3SRobert Mustacchi 	VEX_RRM,	/* VEX  VEX.vvvv, mod_reg              -> mod_rm */
242cff040f3SRobert Mustacchi 	VEX_RMX,	/* VEX  VEX.vvvv, mod_rm               -> mod_reg */
243245ac945SRobert Mustacchi 	VEX_SbVM,	/* VEX  SIB, VEX.vvvv                  -> mod_rm */
2447aa76ffcSBryan Cantrill 	VMx,		/* vmcall/vmlaunch/vmresume/vmxoff */
24570dc7639SRichard Lowe 	VMxo,		/* VMx instruction with optional prefix */
246245ac945SRobert Mustacchi 	SVM,		/* AMD SVM instructions */
247245ac945SRobert Mustacchi 	BLS,		/* BLSR, BLSMSK, BLSI */
2488889c875SRobert Mustacchi 	FMA,		/* FMA instructions, all VEX_RMrX */
24981b505b7SJerry Jelinek 	ADX,		/* ADX instructions, support REX.w, mod_rm->mod_reg */
250cff040f3SRobert Mustacchi 	EVEX_RX,	/* EVEX  mod_reg                      -> mod_rm */
251*8b0687e2SRobert Mustacchi 	EVEX_RXT1S8B,	/* EVEX  Tuple1 8/16-bit Scalar mod_reg -> mod_rm */
252cff040f3SRobert Mustacchi 	EVEX_MX,	/* EVEX  mod_rm                       -> mod_reg */
253*8b0687e2SRobert Mustacchi 	EVEX_MXT1S8B,	/* EVEX  mod_rm Tuple 1 8/156-bit Scalar -> mod_reg */
2543863692fSRobert Mustacchi 	EVEX_MBX,	/* EVEX  mod_rm/bcast                 -> mod_reg */
255a25e615dSRobert Mustacchi 	EVEX_RMrX,	/* EVEX  EVEX.vvvv, mod_rm            -> mod_reg */
2563863692fSRobert Mustacchi 	EVEX_RMBrX,	/* EVEX  EVEX.vvvv, mod_rm/bcast      -> mod_reg */
2573863692fSRobert Mustacchi 	EVEX_RMRX,	/* EVEX  EVEX.vvvv, mod_rm, imm8      -> mod_reg */
258*8b0687e2SRobert Mustacchi 	EVEX_RMBRX,	/* EVEX  EVEX.vvvv, mod_rm/bcast, imm8 -> mod_reg */
2593863692fSRobert Mustacchi 	EVEX_RMrK,	/* EVEX  EVEX.vvvv, mod_rm            -> opmask */
260*8b0687e2SRobert Mustacchi 	EVEX_KR		/* EVEX  opmask (mod_rm)              -> mod_reg */
2617c478bd9Sstevel@tonic-gate };
2627c478bd9Sstevel@tonic-gate 
263ab47273fSEdward Gillett /*
264ab47273fSEdward Gillett  * VEX prefixes
265ab47273fSEdward Gillett  */
266ab47273fSEdward Gillett #define VEX_2bytes	0xC5	/* the first byte of two-byte form */
267ab47273fSEdward Gillett #define VEX_3bytes	0xC4	/* the first byte of three-byte form */
268ab47273fSEdward Gillett 
2697c478bd9Sstevel@tonic-gate #define	FILL	0x90	/* Fill byte used for alignment (nop)	*/
2707c478bd9Sstevel@tonic-gate 
2717c478bd9Sstevel@tonic-gate /*
2727c478bd9Sstevel@tonic-gate ** Register numbers for the i386
2737c478bd9Sstevel@tonic-gate */
2747c478bd9Sstevel@tonic-gate #define	EAX_REGNO 0
2757c478bd9Sstevel@tonic-gate #define	ECX_REGNO 1
2767c478bd9Sstevel@tonic-gate #define	EDX_REGNO 2
2777c478bd9Sstevel@tonic-gate #define	EBX_REGNO 3
2787c478bd9Sstevel@tonic-gate #define	ESP_REGNO 4
2797c478bd9Sstevel@tonic-gate #define	EBP_REGNO 5
2807c478bd9Sstevel@tonic-gate #define	ESI_REGNO 6
2817c478bd9Sstevel@tonic-gate #define	EDI_REGNO 7
2827c478bd9Sstevel@tonic-gate 
2837c478bd9Sstevel@tonic-gate /*
2847c478bd9Sstevel@tonic-gate  * modes for immediate values
2857c478bd9Sstevel@tonic-gate  */
2867c478bd9Sstevel@tonic-gate #define	MODE_NONE	0
2877c478bd9Sstevel@tonic-gate #define	MODE_IPREL	1	/* signed IP relative value */
2887c478bd9Sstevel@tonic-gate #define	MODE_SIGNED	2	/* sign extended immediate */
2897c478bd9Sstevel@tonic-gate #define	MODE_IMPLIED	3	/* constant value implied from opcode */
2907c478bd9Sstevel@tonic-gate #define	MODE_OFFSET	4	/* offset part of an address */
291d267098bSdmick #define	MODE_RIPREL	5	/* like IPREL, but from %rip (amd64) */
2927c478bd9Sstevel@tonic-gate 
2937c478bd9Sstevel@tonic-gate /*
2947c478bd9Sstevel@tonic-gate  * The letters used in these macros are:
2957c478bd9Sstevel@tonic-gate  *   IND - indirect to another to another table
2967c478bd9Sstevel@tonic-gate  *   "T" - means to Terminate indirections (this is the final opcode)
2977c478bd9Sstevel@tonic-gate  *   "S" - means "operand length suffix required"
298d242cdf5SJerry Jelinek  *   "Sa" - means AVX2 suffix (q/d) required
299d242cdf5SJerry Jelinek  *   "Sq" - means AVX512 suffix (q/d) required
300d242cdf5SJerry Jelinek  *   "Sd" - means AVX512 suffix (d/s) required
3013863692fSRobert Mustacchi  *   "Sb" - means AVX512 suffix (b/w) required
3027c478bd9Sstevel@tonic-gate  *   "NS" - means "no suffix" which is the operand length suffix of the opcode
3037c478bd9Sstevel@tonic-gate  *   "Z" - means instruction size arg required
3047c478bd9Sstevel@tonic-gate  *   "u" - means the opcode is invalid in IA32 but valid in amd64
3057c478bd9Sstevel@tonic-gate  *   "x" - means the opcode is invalid in amd64, but not IA32
3067c478bd9Sstevel@tonic-gate  *   "y" - means the operand size is always 64 bits in 64 bit mode
3077c478bd9Sstevel@tonic-gate  *   "p" - means push/pop stack operation
308245ac945SRobert Mustacchi  *   "vr" - means VEX instruction that operates on normal registers, not fpu
309a4e73d5dSJerry Jelinek  *   "vo" - means VEX instruction that operates on opmask registers, not fpu
3107c478bd9Sstevel@tonic-gate  */
3117c478bd9Sstevel@tonic-gate 
312d242cdf5SJerry Jelinek #define	AVS2	(uint_t)1	/* it_avxsuf: AVX2 q/d suffix handling */
313d242cdf5SJerry Jelinek #define	AVS5Q	(uint_t)2	/* it_avxsuf: AVX512 q/d suffix handling */
314d242cdf5SJerry Jelinek #define	AVS5D	(uint_t)3	/* it_avxsuf: AVX512 d/s suffix handling */
3153863692fSRobert Mustacchi #define	AVS5B	(uint_t)4	/* it_avxsuf: AVX512 b/w suffix handling */
316d242cdf5SJerry Jelinek 
3177c478bd9Sstevel@tonic-gate #if defined(DIS_TEXT) && defined(DIS_MEM)
3187c478bd9Sstevel@tonic-gate #define	IND(table)		{(instable_t *)table, 0, "", 0, 0, 0, 0, 0, 0}
3197c478bd9Sstevel@tonic-gate #define	INDx(table)		{(instable_t *)table, 0, "", 0, 0, 1, 0, 0, 0}
3207c478bd9Sstevel@tonic-gate #define	TNS(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0}
3217c478bd9Sstevel@tonic-gate #define	TNSu(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 1, 0}
3227c478bd9Sstevel@tonic-gate #define	TNSx(name, amode)	{TERM, amode, name, 0, 0, 1, 0, 0, 0}
3237c478bd9Sstevel@tonic-gate #define	TNSy(name, amode)	{TERM, amode, name, 0, 0, 0, 1, 0, 0}
3247c478bd9Sstevel@tonic-gate #define	TNSyp(name, amode)	{TERM, amode, name, 0, 0, 0, 1, 0, 1}
3253863692fSRobert Mustacchi #define	TNSSb(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5B }
326*8b0687e2SRobert Mustacchi #define	TNSSd(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5D }
3273863692fSRobert Mustacchi #define	TNSSq(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5Q }
3287c478bd9Sstevel@tonic-gate #define	TNSZ(name, amode, sz)	{TERM, amode, name, 0, sz, 0, 0, 0, 0}
3297c478bd9Sstevel@tonic-gate #define	TNSZy(name, amode, sz)	{TERM, amode, name, 0, sz, 0, 1, 0, 0}
330245ac945SRobert Mustacchi #define	TNSZvr(name, amode, sz)	{TERM, amode, name, 0, sz, 0, 0, 0, 0, 1}
3313863692fSRobert Mustacchi #define	TSvo(name, amode)	{TERM, amode, name, 1, 0, 0, 0, 0, 0, 0, 0, 1}
3327c478bd9Sstevel@tonic-gate #define	TS(name, amode)		{TERM, amode, name, 1, 0, 0, 0, 0, 0}
3337c478bd9Sstevel@tonic-gate #define	TSx(name, amode)	{TERM, amode, name, 1, 0, 1, 0, 0, 0}
3347c478bd9Sstevel@tonic-gate #define	TSy(name, amode)	{TERM, amode, name, 1, 0, 0, 1, 0, 0}
3357c478bd9Sstevel@tonic-gate #define	TSp(name, amode)	{TERM, amode, name, 1, 0, 0, 0, 0, 1}
3367c478bd9Sstevel@tonic-gate #define	TSZ(name, amode, sz)	{TERM, amode, name, 1, sz, 0, 0, 0, 0}
337d242cdf5SJerry Jelinek #define	TSaZ(name, amode, sz)	{TERM, amode, name, 1, sz, 0, 0, 0, 0, 0, AVS2}
338d242cdf5SJerry Jelinek #define	TSq(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5Q}
339d242cdf5SJerry Jelinek #define	TSd(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5D}
3407c478bd9Sstevel@tonic-gate #define	TSZx(name, amode, sz)	{TERM, amode, name, 1, sz, 1, 0, 0, 0}
3417c478bd9Sstevel@tonic-gate #define	TSZy(name, amode, sz)	{TERM, amode, name, 1, sz, 0, 1, 0, 0}
3427c478bd9Sstevel@tonic-gate #define	INVALID			{TERM, UNKNOWN, "", 0, 0, 0, 0, 0}
3437c478bd9Sstevel@tonic-gate #elif defined(DIS_TEXT)
3447c478bd9Sstevel@tonic-gate #define	IND(table)		{(instable_t *)table, 0, "", 0, 0, 0, 0, 0}
3457c478bd9Sstevel@tonic-gate #define	INDx(table)		{(instable_t *)table, 0, "", 0, 1, 0, 0, 0}
3467c478bd9Sstevel@tonic-gate #define	TNS(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0}
3477c478bd9Sstevel@tonic-gate #define	TNSu(name, amode)	{TERM, amode, name, 0, 0, 0, 1, 0}
3487c478bd9Sstevel@tonic-gate #define	TNSx(name, amode)	{TERM, amode, name, 0, 1, 0, 0, 0}
3497c478bd9Sstevel@tonic-gate #define	TNSy(name, amode)	{TERM, amode, name, 0, 0, 1, 0, 0}
3507c478bd9Sstevel@tonic-gate #define	TNSyp(name, amode)	{TERM, amode, name, 0, 0, 1, 0, 1}
3513863692fSRobert Mustacchi #define	TNSSb(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, AVS5B }
352*8b0687e2SRobert Mustacchi #define	TNSSd(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, AVS5D }
3533863692fSRobert Mustacchi #define	TNSSq(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, AVS5Q }
3547c478bd9Sstevel@tonic-gate #define	TNSZ(name, amode, sz)	{TERM, amode, name, 0, 0, 0, 0, 0}
3557c478bd9Sstevel@tonic-gate #define	TNSZy(name, amode, sz)	{TERM, amode, name, 0, 0, 1, 0, 0}
356245ac945SRobert Mustacchi #define	TNSZvr(name, amode, sz)	{TERM, amode, name, 0, 0, 0, 0, 0, 1}
357a4e73d5dSJerry Jelinek #define	TSvo(name, amode)	{TERM, amode, name, 1, 0, 0, 0, 0, 0, 0, 1}
3587c478bd9Sstevel@tonic-gate #define	TS(name, amode)		{TERM, amode, name, 1, 0, 0, 0, 0}
3597c478bd9Sstevel@tonic-gate #define	TSx(name, amode)	{TERM, amode, name, 1, 1, 0, 0, 0}
3607c478bd9Sstevel@tonic-gate #define	TSy(name, amode)	{TERM, amode, name, 1, 0, 1, 0, 0}
3617c478bd9Sstevel@tonic-gate #define	TSp(name, amode)	{TERM, amode, name, 1, 0, 0, 0, 1}
3627c478bd9Sstevel@tonic-gate #define	TSZ(name, amode, sz)	{TERM, amode, name, 1, 0, 0, 0, 0}
363d242cdf5SJerry Jelinek #define	TSaZ(name, amode, sz)	{TERM, amode, name, 1, 0, 0, 0, 0, 0, AVS2}
364d242cdf5SJerry Jelinek #define	TSq(name, amode)	{TERM, amode, name, 0, 0, 0, 0, 0, 0, AVS5Q}
3657c478bd9Sstevel@tonic-gate #define	TSZx(name, amode, sz)	{TERM, amode, name, 1, 1, 0, 0, 0}
3667c478bd9Sstevel@tonic-gate #define	TSZy(name, amode, sz)	{TERM, amode, name, 1, 0, 1, 0, 0}
3677c478bd9Sstevel@tonic-gate #define	INVALID			{TERM, UNKNOWN, "", 0, 0, 0, 0, 0}
3687c478bd9Sstevel@tonic-gate #elif defined(DIS_MEM)
3697c478bd9Sstevel@tonic-gate #define	IND(table)		{(instable_t *)table, 0, 0, 0, 0, 0, 0}
3707c478bd9Sstevel@tonic-gate #define	INDx(table)		{(instable_t *)table, 0, 0, 1, 0, 0, 0}
3717c478bd9Sstevel@tonic-gate #define	TNS(name, amode)	{TERM, amode,  0, 0, 0, 0, 0}
3727c478bd9Sstevel@tonic-gate #define	TNSu(name, amode)	{TERM, amode,  0, 0, 0, 1, 0}
3737c478bd9Sstevel@tonic-gate #define	TNSy(name, amode)	{TERM, amode,  0, 0, 1, 0, 0}
3747c478bd9Sstevel@tonic-gate #define	TNSyp(name, amode)	{TERM, amode,  0, 0, 1, 0, 1}
3757c478bd9Sstevel@tonic-gate #define	TNSx(name, amode)	{TERM, amode,  0, 1, 0, 0, 0}
3763863692fSRobert Mustacchi #define	TNSSb(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, 0, AVS5B }
377*8b0687e2SRobert Mustacchi #define	TNSSd(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, 0, AVS5D }
3783863692fSRobert Mustacchi #define	TNSSq(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, 0, AVS5Q }
3797c478bd9Sstevel@tonic-gate #define	TNSZ(name, amode, sz)	{TERM, amode, sz, 0, 0, 0, 0}
3807c478bd9Sstevel@tonic-gate #define	TNSZy(name, amode, sz)	{TERM, amode, sz, 0, 1, 0, 0}
381245ac945SRobert Mustacchi #define	TNSZvr(name, amode, sz)	{TERM, amode, sz, 0, 0, 0, 0, 1}
382a4e73d5dSJerry Jelinek #define	TSvo(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, 0, 0, 1}
3837c478bd9Sstevel@tonic-gate #define	TS(name, amode)		{TERM, amode,  0, 0, 0, 0, 0}
3847c478bd9Sstevel@tonic-gate #define	TSx(name, amode)	{TERM, amode,  0, 1, 0, 0, 0}
3857c478bd9Sstevel@tonic-gate #define	TSy(name, amode)	{TERM, amode,  0, 0, 1, 0, 0}
3867c478bd9Sstevel@tonic-gate #define	TSp(name, amode)	{TERM, amode,  0, 0, 0, 0, 1}
3877c478bd9Sstevel@tonic-gate #define	TSZ(name, amode, sz)	{TERM, amode, sz, 0, 0, 0, 0}
388d242cdf5SJerry Jelinek #define	TSaZ(name, amode, sz)	{TERM, amode, sz, 0, 0, 0, 0, 0, AVS2}
389d242cdf5SJerry Jelinek #define	TSq(name, amode)	{TERM, amode, 0, 0, 0, 0, 0, 0, AVS5Q}
3907c478bd9Sstevel@tonic-gate #define	TSZx(name, amode, sz)	{TERM, amode, sz, 1, 0, 0, 0}
3917c478bd9Sstevel@tonic-gate #define	TSZy(name, amode, sz)	{TERM, amode, sz, 0, 1, 0, 0}
3927c478bd9Sstevel@tonic-gate #define	INVALID			{TERM, UNKNOWN, 0, 0, 0, 0, 0}
3937c478bd9Sstevel@tonic-gate #else
3947c478bd9Sstevel@tonic-gate #define	IND(table)		{(instable_t *)table, 0, 0, 0, 0, 0}
3957c478bd9Sstevel@tonic-gate #define	INDx(table)		{(instable_t *)table, 0, 1, 0, 0, 0}
3967c478bd9Sstevel@tonic-gate #define	TNS(name, amode)	{TERM, amode,  0, 0, 0, 0}
3977c478bd9Sstevel@tonic-gate #define	TNSu(name, amode)	{TERM, amode,  0, 0, 1, 0}
3987c478bd9Sstevel@tonic-gate #define	TNSy(name, amode)	{TERM, amode,  0, 1, 0, 0}
3997c478bd9Sstevel@tonic-gate #define	TNSyp(name, amode)	{TERM, amode,  0, 1, 0, 1}
4007c478bd9Sstevel@tonic-gate #define	TNSx(name, amode)	{TERM, amode,  1, 0, 0, 0}
4013863692fSRobert Mustacchi #define	TNSSb(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, AVS5B }
402*8b0687e2SRobert Mustacchi #define	TNSSd(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, AVS5D }
4033863692fSRobert Mustacchi #define	TNSSq(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, AVS5Q }
4047c478bd9Sstevel@tonic-gate #define	TNSZ(name, amode, sz)	{TERM, amode,  0, 0, 0, 0}
4057c478bd9Sstevel@tonic-gate #define	TNSZy(name, amode, sz)	{TERM, amode,  0, 1, 0, 0}
406245ac945SRobert Mustacchi #define	TNSZvr(name, amode, sz)	{TERM, amode,  0, 0, 0, 0, 1}
407a4e73d5dSJerry Jelinek #define	TSvo(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, 0, 1}
4087c478bd9Sstevel@tonic-gate #define	TS(name, amode)		{TERM, amode,  0, 0, 0, 0}
4097c478bd9Sstevel@tonic-gate #define	TSx(name, amode)	{TERM, amode,  1, 0, 0, 0}
4107c478bd9Sstevel@tonic-gate #define	TSy(name, amode)	{TERM, amode,  0, 1, 0, 0}
4117c478bd9Sstevel@tonic-gate #define	TSp(name, amode)	{TERM, amode,  0, 0, 0, 1}
4127c478bd9Sstevel@tonic-gate #define	TSZ(name, amode, sz)	{TERM, amode,  0, 0, 0, 0}
413d242cdf5SJerry Jelinek #define	TSaZ(name, amode, sz)	{TERM, amode,  0, 0, 0, 0, 0, AVS2}
414d242cdf5SJerry Jelinek #define	TSq(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, AVS5Q}
415d242cdf5SJerry Jelinek #define	TSd(name, amode)	{TERM, amode,  0, 0, 0, 0, 0, AVS5D}
4167c478bd9Sstevel@tonic-gate #define	TSZx(name, amode, sz)	{TERM, amode,  1, 0, 0, 0}
4177c478bd9Sstevel@tonic-gate #define	TSZy(name, amode, sz)	{TERM, amode,  0, 1, 0, 0}
4187c478bd9Sstevel@tonic-gate #define	INVALID			{TERM, UNKNOWN, 0, 0, 0, 0}
4197c478bd9Sstevel@tonic-gate #endif
4207c478bd9Sstevel@tonic-gate 
4217c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
4227c478bd9Sstevel@tonic-gate /*
4237c478bd9Sstevel@tonic-gate  * this decodes the r_m field for mode's 0, 1, 2 in 16 bit mode
4247c478bd9Sstevel@tonic-gate  */
4257c478bd9Sstevel@tonic-gate const char *const dis_addr16[3][8] = {
4267c478bd9Sstevel@tonic-gate "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di)", "",
4277c478bd9Sstevel@tonic-gate 									"(%bx)",
4287c478bd9Sstevel@tonic-gate "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di", "(%bp)",
4297c478bd9Sstevel@tonic-gate 									"(%bx)",
4307c478bd9Sstevel@tonic-gate "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di)", "(%bp)",
4317c478bd9Sstevel@tonic-gate 									"(%bx)",
4327c478bd9Sstevel@tonic-gate };
4337c478bd9Sstevel@tonic-gate 
4347c478bd9Sstevel@tonic-gate 
4357c478bd9Sstevel@tonic-gate /*
4367c478bd9Sstevel@tonic-gate  * This decodes 32 bit addressing mode r_m field for modes 0, 1, 2
4377c478bd9Sstevel@tonic-gate  */
4387c478bd9Sstevel@tonic-gate const char *const dis_addr32_mode0[16] = {
4397c478bd9Sstevel@tonic-gate   "(%eax)", "(%ecx)", "(%edx)",  "(%ebx)",  "", "",        "(%esi)",  "(%edi)",
4407c478bd9Sstevel@tonic-gate   "(%r8d)", "(%r9d)", "(%r10d)", "(%r11d)", "", "",        "(%r14d)", "(%r15d)"
4417c478bd9Sstevel@tonic-gate };
4427c478bd9Sstevel@tonic-gate 
4437c478bd9Sstevel@tonic-gate const char *const dis_addr32_mode12[16] = {
4447c478bd9Sstevel@tonic-gate   "(%eax)", "(%ecx)", "(%edx)",  "(%ebx)",  "", "(%ebp)",  "(%esi)",  "(%edi)",
4457c478bd9Sstevel@tonic-gate   "(%r8d)", "(%r9d)", "(%r10d)", "(%r11d)", "", "(%r13d)", "(%r14d)", "(%r15d)"
4467c478bd9Sstevel@tonic-gate };
4477c478bd9Sstevel@tonic-gate 
4487c478bd9Sstevel@tonic-gate /*
4497c478bd9Sstevel@tonic-gate  * This decodes 64 bit addressing mode r_m field for modes 0, 1, 2
4507c478bd9Sstevel@tonic-gate  */
4517c478bd9Sstevel@tonic-gate const char *const dis_addr64_mode0[16] = {
4527c478bd9Sstevel@tonic-gate  "(%rax)", "(%rcx)", "(%rdx)", "(%rbx)", "",       "(%rip)", "(%rsi)", "(%rdi)",
4537c478bd9Sstevel@tonic-gate  "(%r8)",  "(%r9)",  "(%r10)", "(%r11)", "(%r12)", "(%rip)", "(%r14)", "(%r15)"
4547c478bd9Sstevel@tonic-gate };
4557c478bd9Sstevel@tonic-gate const char *const dis_addr64_mode12[16] = {
4567c478bd9Sstevel@tonic-gate  "(%rax)", "(%rcx)", "(%rdx)", "(%rbx)", "",       "(%rbp)", "(%rsi)", "(%rdi)",
4577c478bd9Sstevel@tonic-gate  "(%r8)",  "(%r9)",  "(%r10)", "(%r11)", "(%r12)", "(%r13)", "(%r14)", "(%r15)"
4587c478bd9Sstevel@tonic-gate };
4597c478bd9Sstevel@tonic-gate 
4607c478bd9Sstevel@tonic-gate /*
4617c478bd9Sstevel@tonic-gate  * decode for scale from SIB byte
4627c478bd9Sstevel@tonic-gate  */
4637c478bd9Sstevel@tonic-gate const char *const dis_scale_factor[4] = { ")", ",2)", ",4)", ",8)" };
4647c478bd9Sstevel@tonic-gate 
465245ac945SRobert Mustacchi /*
466245ac945SRobert Mustacchi  * decode for scale from VSIB byte, note that we always include the scale factor
467245ac945SRobert Mustacchi  * to match gas.
468245ac945SRobert Mustacchi  */
469245ac945SRobert Mustacchi const char *const dis_vscale_factor[4] = { ",1)", ",2)", ",4)", ",8)" };
470245ac945SRobert Mustacchi 
4717c478bd9Sstevel@tonic-gate /*
4727c478bd9Sstevel@tonic-gate  * register decoding for normal references to registers (ie. not addressing)
4737c478bd9Sstevel@tonic-gate  */
4747c478bd9Sstevel@tonic-gate const char *const dis_REG8[16] = {
4757c478bd9Sstevel@tonic-gate 	"%al",  "%cl",  "%dl",   "%bl",   "%ah",   "%ch",   "%dh",   "%bh",
4767c478bd9Sstevel@tonic-gate 	"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
4777c478bd9Sstevel@tonic-gate };
4787c478bd9Sstevel@tonic-gate 
4797c478bd9Sstevel@tonic-gate const char *const dis_REG8_REX[16] = {
4807c478bd9Sstevel@tonic-gate 	"%al",  "%cl",  "%dl",   "%bl",   "%spl",  "%bpl",  "%sil",  "%dil",
4817c478bd9Sstevel@tonic-gate 	"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
4827c478bd9Sstevel@tonic-gate };
4837c478bd9Sstevel@tonic-gate 
4847c478bd9Sstevel@tonic-gate const char *const dis_REG16[16] = {
4857c478bd9Sstevel@tonic-gate 	"%ax",  "%cx",  "%dx",   "%bx",   "%sp",   "%bp",   "%si",   "%di",
4867c478bd9Sstevel@tonic-gate 	"%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
4877c478bd9Sstevel@tonic-gate };
4887c478bd9Sstevel@tonic-gate 
4897c478bd9Sstevel@tonic-gate const char *const dis_REG32[16] = {
4907c478bd9Sstevel@tonic-gate 	"%eax", "%ecx", "%edx",  "%ebx",  "%esp",  "%ebp",  "%esi",  "%edi",
4917c478bd9Sstevel@tonic-gate 	"%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
4927c478bd9Sstevel@tonic-gate };
4937c478bd9Sstevel@tonic-gate 
4947c478bd9Sstevel@tonic-gate const char *const dis_REG64[16] = {
4957c478bd9Sstevel@tonic-gate 	"%rax", "%rcx", "%rdx",  "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
4967c478bd9Sstevel@tonic-gate 	"%r8",  "%r9",  "%r10",  "%r11", "%r12", "%r13", "%r14", "%r15"
4977c478bd9Sstevel@tonic-gate };
4987c478bd9Sstevel@tonic-gate 
4997c478bd9Sstevel@tonic-gate const char *const dis_DEBUGREG[16] = {
5007c478bd9Sstevel@tonic-gate 	"%db0", "%db1", "%db2",  "%db3",  "%db4",  "%db5",  "%db6",  "%db7",
5017c478bd9Sstevel@tonic-gate 	"%db8", "%db9", "%db10", "%db11", "%db12", "%db13", "%db14", "%db15"
5027c478bd9Sstevel@tonic-gate };
5037c478bd9Sstevel@tonic-gate 
5047c478bd9Sstevel@tonic-gate const char *const dis_CONTROLREG[16] = {
5057c478bd9Sstevel@tonic-gate     "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5?", "%cr6?", "%cr7?",
5067c478bd9Sstevel@tonic-gate     "%cr8", "%cr9?", "%cr10?", "%cr11?", "%cr12?", "%cr13?", "%cr14?", "%cr15?"
5077c478bd9Sstevel@tonic-gate };
5087c478bd9Sstevel@tonic-gate 
5097c478bd9Sstevel@tonic-gate const char *const dis_TESTREG[16] = {
5107c478bd9Sstevel@tonic-gate 	"%tr0?", "%tr1?", "%tr2?", "%tr3", "%tr4", "%tr5", "%tr6", "%tr7",
5117c478bd9Sstevel@tonic-gate 	"%tr0?", "%tr1?", "%tr2?", "%tr3", "%tr4", "%tr5", "%tr6", "%tr7"
5127c478bd9Sstevel@tonic-gate };
5137c478bd9Sstevel@tonic-gate 
5147c478bd9Sstevel@tonic-gate const char *const dis_MMREG[16] = {
5157c478bd9Sstevel@tonic-gate 	"%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7",
5167c478bd9Sstevel@tonic-gate 	"%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7"
5177c478bd9Sstevel@tonic-gate };
5187c478bd9Sstevel@tonic-gate 
51981b505b7SJerry Jelinek const char *const dis_XMMREG[32] = {
52081b505b7SJerry Jelinek     "%xmm0", "%xmm1", "%xmm2", "%xmm3",
52181b505b7SJerry Jelinek     "%xmm4", "%xmm5", "%xmm6", "%xmm7",
52281b505b7SJerry Jelinek     "%xmm8", "%xmm9", "%xmm10", "%xmm11",
52381b505b7SJerry Jelinek     "%xmm12", "%xmm13", "%xmm14", "%xmm15",
52481b505b7SJerry Jelinek     "%xmm16", "%xmm17", "%xmm18", "%xmm19",
52581b505b7SJerry Jelinek     "%xmm20", "%xmm21", "%xmm22", "%xmm23",
52681b505b7SJerry Jelinek     "%xmm24", "%xmm25", "%xmm26", "%xmm27",
52781b505b7SJerry Jelinek     "%xmm28", "%xmm29", "%xmm30", "%xmm31",
5287c478bd9Sstevel@tonic-gate };
5297c478bd9Sstevel@tonic-gate 
53081b505b7SJerry Jelinek const char *const dis_YMMREG[32] = {
53181b505b7SJerry Jelinek     "%ymm0", "%ymm1", "%ymm2", "%ymm3",
53281b505b7SJerry Jelinek     "%ymm4", "%ymm5", "%ymm6", "%ymm7",
53381b505b7SJerry Jelinek     "%ymm8", "%ymm9", "%ymm10", "%ymm11",
53481b505b7SJerry Jelinek     "%ymm12", "%ymm13", "%ymm14", "%ymm15",
53581b505b7SJerry Jelinek     "%ymm16", "%ymm17", "%ymm18", "%ymm19",
53681b505b7SJerry Jelinek     "%ymm20", "%ymm21", "%ymm22", "%ymm23",
53781b505b7SJerry Jelinek     "%ymm24", "%ymm25", "%ymm26", "%ymm27",
53881b505b7SJerry Jelinek     "%ymm28", "%ymm29", "%ymm30", "%ymm31",
53981b505b7SJerry Jelinek };
54081b505b7SJerry Jelinek 
54181b505b7SJerry Jelinek const char *const dis_ZMMREG[32] = {
54281b505b7SJerry Jelinek     "%zmm0", "%zmm1", "%zmm2", "%zmm3",
54381b505b7SJerry Jelinek     "%zmm4", "%zmm5", "%zmm6", "%zmm7",
54481b505b7SJerry Jelinek     "%zmm8", "%zmm9", "%zmm10", "%zmm11",
54581b505b7SJerry Jelinek     "%zmm12", "%zmm13", "%zmm14", "%zmm15",
54681b505b7SJerry Jelinek     "%zmm16", "%zmm17", "%zmm18", "%zmm19",
54781b505b7SJerry Jelinek     "%zmm20", "%zmm21", "%zmm22", "%zmm23",
54881b505b7SJerry Jelinek     "%zmm24", "%zmm25", "%zmm26", "%zmm27",
54981b505b7SJerry Jelinek     "%zmm28", "%zmm29", "%zmm30", "%zmm31",
550ab47273fSEdward Gillett };
551ab47273fSEdward Gillett 
552a4e73d5dSJerry Jelinek const char *const dis_KOPMASKREG[8] = {
553a4e73d5dSJerry Jelinek     "%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7"
554a4e73d5dSJerry Jelinek };
555a4e73d5dSJerry Jelinek 
5567c478bd9Sstevel@tonic-gate const char *const dis_SEGREG[16] = {
5577c478bd9Sstevel@tonic-gate 	"%es", "%cs", "%ss", "%ds", "%fs", "%gs", "<reserved>", "<reserved>",
5587c478bd9Sstevel@tonic-gate 	"%es", "%cs", "%ss", "%ds", "%fs", "%gs", "<reserved>", "<reserved>"
5597c478bd9Sstevel@tonic-gate };
5607c478bd9Sstevel@tonic-gate 
5617c478bd9Sstevel@tonic-gate /*
5627c478bd9Sstevel@tonic-gate  * SIMD predicate suffixes
5637c478bd9Sstevel@tonic-gate  */
5647c478bd9Sstevel@tonic-gate const char *const dis_PREDSUFFIX[8] = {
5657c478bd9Sstevel@tonic-gate 	"eq", "lt", "le", "unord", "neq", "nlt", "nle", "ord"
5667c478bd9Sstevel@tonic-gate };
5677c478bd9Sstevel@tonic-gate 
568ab47273fSEdward Gillett const char *const dis_AVXvgrp7[3][8] = {
569ab47273fSEdward Gillett 	/*0	1	2		3		4		5	6		7*/
570ab47273fSEdward Gillett /*71*/	{"",	"",	"vpsrlw",	"",		"vpsraw",	"",	"vpsllw",	""},
571ab47273fSEdward Gillett /*72*/	{"",	"",	"vpsrld",	"",		"vpsrad",	"",	"vpslld",	""},
572ab47273fSEdward Gillett /*73*/	{"",	"",	"vpsrlq",	"vpsrldq",	"",		"",	"vpsllq",	"vpslldq"}
573ab47273fSEdward Gillett };
5747c478bd9Sstevel@tonic-gate 
5757c478bd9Sstevel@tonic-gate #endif	/* DIS_TEXT */
5767c478bd9Sstevel@tonic-gate 
5777c478bd9Sstevel@tonic-gate /*
5787c478bd9Sstevel@tonic-gate  *	"decode table" for 64 bit mode MOVSXD instruction (opcode 0x63)
5797c478bd9Sstevel@tonic-gate  */
5807c478bd9Sstevel@tonic-gate const instable_t dis_opMOVSLD = TNS("movslq",MOVSXZ);
5817c478bd9Sstevel@tonic-gate 
5827c478bd9Sstevel@tonic-gate /*
5837c478bd9Sstevel@tonic-gate  *	"decode table" for pause and clflush instructions
5847c478bd9Sstevel@tonic-gate  */
5857c478bd9Sstevel@tonic-gate const instable_t dis_opPause = TNS("pause", NORM);
5867c478bd9Sstevel@tonic-gate 
587c1e9bf00SRobert Mustacchi /*
588c1e9bf00SRobert Mustacchi  *	"decode table" for wbnoinvd instruction
589c1e9bf00SRobert Mustacchi  */
590c1e9bf00SRobert Mustacchi const instable_t dis_opWbnoinvd = TNS("wbnoinvd", NORM);
591c1e9bf00SRobert Mustacchi 
5927c478bd9Sstevel@tonic-gate /*
5937c478bd9Sstevel@tonic-gate  *	Decode table for 0x0F00 opcodes
5947c478bd9Sstevel@tonic-gate  */
5957c478bd9Sstevel@tonic-gate const instable_t dis_op0F00[8] = {
5967c478bd9Sstevel@tonic-gate 
597cff040f3SRobert Mustacchi /*  [0]  */	TNS("sldt",M),		TNS("str",M),		TNSy("lldt",M),		TNSy("ltr",M),
5987c478bd9Sstevel@tonic-gate /*  [4]  */	TNSZ("verr",M,2),	TNSZ("verw",M,2),	INVALID,		INVALID,
5997c478bd9Sstevel@tonic-gate };
6007c478bd9Sstevel@tonic-gate 
6017c478bd9Sstevel@tonic-gate 
6027c478bd9Sstevel@tonic-gate /*
6037c478bd9Sstevel@tonic-gate  *	Decode table for 0x0F01 opcodes
6047c478bd9Sstevel@tonic-gate  */
6057c478bd9Sstevel@tonic-gate const instable_t dis_op0F01[8] = {
6067c478bd9Sstevel@tonic-gate 
60770dc7639SRichard Lowe /*  [0]  */	TNSZ("sgdt",VMx,6),	TNSZ("sidt",MONITOR_MWAIT,6),	TNSZ("lgdt",XGETBV_XSETBV,6),	TNSZ("lidt",SVM,6),
608cff040f3SRobert Mustacchi /*  [4]  */	TNSZ("smsw",M,2),	INVALID,		TNSZ("lmsw",M,2),	TNS("invlpg",SWAPGS_RDTSCP),
6097c478bd9Sstevel@tonic-gate };
6107c478bd9Sstevel@tonic-gate 
6117c478bd9Sstevel@tonic-gate /*
6127c478bd9Sstevel@tonic-gate  *	Decode table for 0x0F18 opcodes -- SIMD prefetch
6137c478bd9Sstevel@tonic-gate  */
6147c478bd9Sstevel@tonic-gate const instable_t dis_op0F18[8] = {
6157c478bd9Sstevel@tonic-gate 
6167c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("prefetchnta",PREF),TNS("prefetcht0",PREF),	TNS("prefetcht1",PREF),	TNS("prefetcht2",PREF),
617fb2cb638SRobert Mustacchi /*  [4]  */	INVALID,		INVALID,		TNSu("prefetchit1",PREF),TNSu("prefetchit0",PREF),
6187c478bd9Sstevel@tonic-gate };
6197c478bd9Sstevel@tonic-gate 
6207c478bd9Sstevel@tonic-gate /*
621cff040f3SRobert Mustacchi  *	Decode table for 0x0FAE opcodes -- SIMD state save/restore
6227c478bd9Sstevel@tonic-gate  */
6237c478bd9Sstevel@tonic-gate const instable_t dis_op0FAE[8] = {
624cff040f3SRobert Mustacchi /*  [0]  */	TNSZ("fxsave",FSGS,512),TNSZ("fxrstor",FSGS,512),TNS("ldmxcsr",FSGS),	TNS("stmxcsr",FSGS),
625ab47273fSEdward Gillett /*  [4]  */	TNSZ("xsave",M,512),	TNS("lfence",XMMFENCE), TNS("mfence",XMMFENCE),	TNS("sfence",XMMSFNC),
6267c478bd9Sstevel@tonic-gate };
6277c478bd9Sstevel@tonic-gate 
628cff040f3SRobert Mustacchi /*
629cff040f3SRobert Mustacchi  *	Decode table for 0xF30FAE opcodes -- FSGSBASE
630cff040f3SRobert Mustacchi  */
631cff040f3SRobert Mustacchi const instable_t dis_opF30FAE[8] = {
632cff040f3SRobert Mustacchi /*  [0]  */	TNSx("rdfsbase",FSGS),	TNSx("rdgsbase",FSGS),	TNSx("wrfsbase",FSGS),	TNSx("wrgsbase",FSGS),
633cff040f3SRobert Mustacchi /*  [4]  */	INVALID,		INVALID,		INVALID,		INVALID,
634cff040f3SRobert Mustacchi };
635cff040f3SRobert Mustacchi 
6367c478bd9Sstevel@tonic-gate /*
6377c478bd9Sstevel@tonic-gate  *	Decode table for 0x0FBA opcodes
6387c478bd9Sstevel@tonic-gate  */
6397c478bd9Sstevel@tonic-gate 
6407c478bd9Sstevel@tonic-gate const instable_t dis_op0FBA[8] = {
6417c478bd9Sstevel@tonic-gate 
6427c478bd9Sstevel@tonic-gate /*  [0]  */	INVALID,		INVALID,		INVALID,		INVALID,
6437c478bd9Sstevel@tonic-gate /*  [4]  */	TS("bt",MIb),		TS("bts",MIb),		TS("btr",MIb),		TS("btc",MIb),
6447c478bd9Sstevel@tonic-gate };
6457c478bd9Sstevel@tonic-gate 
6467c478bd9Sstevel@tonic-gate /*
647cff040f3SRobert Mustacchi  *	Decode table for 0x0FC7 opcode (group 9)
6487c478bd9Sstevel@tonic-gate  */
6497c478bd9Sstevel@tonic-gate 
6507c478bd9Sstevel@tonic-gate const instable_t dis_op0FC7[8] = {
6517c478bd9Sstevel@tonic-gate 
65292381362SJerry Jelinek /*  [0]  */	INVALID,		TNS("cmpxchg8b",M),	INVALID,		TNS("xrstors",MG9),
65392381362SJerry Jelinek /*  [4]  */	TNS("xsavec",MG9),	TNS("xsaves",MG9),		TNS("vmptrld",MG9),	TNS("vmptrst",MG9),
6547c478bd9Sstevel@tonic-gate };
6557c478bd9Sstevel@tonic-gate 
656ebb8ac07SRobert Mustacchi /*
657cff040f3SRobert Mustacchi  *	Decode table for 0x0FC7 opcode (group 9) mode 3
658ebb8ac07SRobert Mustacchi  */
659ebb8ac07SRobert Mustacchi 
660ebb8ac07SRobert Mustacchi const instable_t dis_op0FC7m3[8] = {
661ebb8ac07SRobert Mustacchi 
662ebb8ac07SRobert Mustacchi /*  [0]  */	INVALID,		INVALID,	INVALID,		INVALID,
6638889c875SRobert Mustacchi /*  [4]  */	INVALID,		INVALID,	TNS("rdrand",MG9),	TNS("rdseed", MG9),
664ebb8ac07SRobert Mustacchi };
665ebb8ac07SRobert Mustacchi 
6667aa76ffcSBryan Cantrill /*
667cff040f3SRobert Mustacchi  *	Decode table for 0x0FC7 opcode with 0x66 prefix
6687aa76ffcSBryan Cantrill  */
6697aa76ffcSBryan Cantrill 
6707aa76ffcSBryan Cantrill const instable_t dis_op660FC7[8] = {
6717aa76ffcSBryan Cantrill 
6727aa76ffcSBryan Cantrill /*  [0]  */	INVALID,		INVALID,		INVALID,		INVALID,
6737aa76ffcSBryan Cantrill /*  [4]  */	INVALID,		INVALID,		TNS("vmclear",M),	INVALID,
6747aa76ffcSBryan Cantrill };
6757aa76ffcSBryan Cantrill 
6767aa76ffcSBryan Cantrill /*
677fb2cb638SRobert Mustacchi  *	Decode table for 0x0FC7 opcode with 0xF3 prefix -- memory instructions
6787aa76ffcSBryan Cantrill  */
6797aa76ffcSBryan Cantrill 
6807aa76ffcSBryan Cantrill const instable_t dis_opF30FC7[8] = {
6817aa76ffcSBryan Cantrill 
6827aa76ffcSBryan Cantrill /*  [0]  */	INVALID,		INVALID,		INVALID,		INVALID,
6837aa76ffcSBryan Cantrill /*  [4]  */	INVALID,		INVALID,		TNS("vmxon",M),		INVALID,
6847aa76ffcSBryan Cantrill };
6857c478bd9Sstevel@tonic-gate 
686fb2cb638SRobert Mustacchi /*
687fb2cb638SRobert Mustacchi  *	Decode table for 0x0FC7 opcode with 0xF3 prefix -- register instructions
688fb2cb638SRobert Mustacchi  */
689fb2cb638SRobert Mustacchi 
690fb2cb638SRobert Mustacchi const instable_t dis_opF30FC7m3[8] = {
691fb2cb638SRobert Mustacchi 
692fb2cb638SRobert Mustacchi /*  [0]  */	INVALID,		INVALID,		INVALID,		INVALID,
693fb2cb638SRobert Mustacchi /*  [4]  */	INVALID,		INVALID,		INVALID,		TNS("rdpid",RMATCH)
694fb2cb638SRobert Mustacchi };
695fb2cb638SRobert Mustacchi 
6967c478bd9Sstevel@tonic-gate /*
6977c478bd9Sstevel@tonic-gate  *	Decode table for 0x0FC8 opcode -- 486 bswap instruction
6987c478bd9Sstevel@tonic-gate  *
6997c478bd9Sstevel@tonic-gate  *bit pattern: 0000 1111 1100 1reg
7007c478bd9Sstevel@tonic-gate  */
7017c478bd9Sstevel@tonic-gate const instable_t dis_op0FC8[4] = {
7027c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("bswap",R),		INVALID,		INVALID,		INVALID,
7037c478bd9Sstevel@tonic-gate };
7047c478bd9Sstevel@tonic-gate 
7057c478bd9Sstevel@tonic-gate /*
7067c478bd9Sstevel@tonic-gate  *	Decode table for 0x0F71, 0x0F72, and 0x0F73 opcodes -- MMX instructions
7077c478bd9Sstevel@tonic-gate  */
7087c478bd9Sstevel@tonic-gate const instable_t dis_op0F7123[4][8] = {
7097c478bd9Sstevel@tonic-gate {
7107c478bd9Sstevel@tonic-gate /*  [70].0 */	INVALID,		INVALID,		INVALID,		INVALID,
7117c478bd9Sstevel@tonic-gate /*      .4 */	INVALID,		INVALID,		INVALID,		INVALID,
7127c478bd9Sstevel@tonic-gate }, {
7137c478bd9Sstevel@tonic-gate /*  [71].0 */	INVALID,		INVALID,		TNS("psrlw",MMOSH),	INVALID,
7147c478bd9Sstevel@tonic-gate /*      .4 */	TNS("psraw",MMOSH),	INVALID,		TNS("psllw",MMOSH),	INVALID,
7157c478bd9Sstevel@tonic-gate }, {
7167c478bd9Sstevel@tonic-gate /*  [72].0 */	INVALID,		INVALID,		TNS("psrld",MMOSH),	INVALID,
7177c478bd9Sstevel@tonic-gate /*      .4 */	TNS("psrad",MMOSH),	INVALID,		TNS("pslld",MMOSH),	INVALID,
7187c478bd9Sstevel@tonic-gate }, {
7197c478bd9Sstevel@tonic-gate /*  [73].0 */	INVALID,		INVALID,		TNS("psrlq",MMOSH),	TNS("INVALID",MMOSH),
720cff040f3SRobert Mustacchi /*      .4 */	INVALID,		INVALID,		TNS("psllq",MMOSH),	TNS("INVALID",MMOSH),
7217c478bd9Sstevel@tonic-gate } };
7227c478bd9Sstevel@tonic-gate 
7237c478bd9Sstevel@tonic-gate /*
7247c478bd9Sstevel@tonic-gate  *	Decode table for SIMD extensions to above 0x0F71-0x0F73 opcodes.
7257c478bd9Sstevel@tonic-gate  */
7267c478bd9Sstevel@tonic-gate const instable_t dis_opSIMD7123[32] = {
7277c478bd9Sstevel@tonic-gate /* [70].0 */	INVALID,		INVALID,		INVALID,		INVALID,
7287c478bd9Sstevel@tonic-gate /*     .4 */	INVALID,		INVALID,		INVALID,		INVALID,
7297c478bd9Sstevel@tonic-gate 
7307c478bd9Sstevel@tonic-gate /* [71].0 */	INVALID,		INVALID,		TNS("psrlw",XMMSH),	INVALID,
7317c478bd9Sstevel@tonic-gate /*     .4 */	TNS("psraw",XMMSH),	INVALID,		TNS("psllw",XMMSH),	INVALID,
7327c478bd9Sstevel@tonic-gate 
7337c478bd9Sstevel@tonic-gate /* [72].0 */	INVALID,		INVALID,		TNS("psrld",XMMSH),	INVALID,
7347c478bd9Sstevel@tonic-gate /*     .4 */	TNS("psrad",XMMSH),	INVALID,		TNS("pslld",XMMSH),	INVALID,
7357c478bd9Sstevel@tonic-gate 
7367c478bd9Sstevel@tonic-gate /* [73].0 */	INVALID,		INVALID,		TNS("psrlq",XMMSH),	TNS("psrldq",XMMSH),
7377c478bd9Sstevel@tonic-gate /*     .4 */	INVALID,		INVALID,		TNS("psllq",XMMSH),	TNS("pslldq",XMMSH),
7387c478bd9Sstevel@tonic-gate };
7397c478bd9Sstevel@tonic-gate 
7407c478bd9Sstevel@tonic-gate /*
7417c478bd9Sstevel@tonic-gate  *	SIMD instructions have been wedged into the existing IA32 instruction
7427c478bd9Sstevel@tonic-gate  *	set through the use of prefixes.  That is, while 0xf0 0x58 may be
7437c478bd9Sstevel@tonic-gate  *	addps, 0xf3 0xf0 0x58 (literally, repz addps) is a completely different
7447c478bd9Sstevel@tonic-gate  *	instruction - addss.  At present, three prefixes have been coopted in
7457c478bd9Sstevel@tonic-gate  *	this manner - address size (0x66), repnz (0xf2) and repz (0xf3).  The
7467c478bd9Sstevel@tonic-gate  *	following tables are used to provide the prefixed instruction names.
7477c478bd9Sstevel@tonic-gate  *	The arrays are sparse, but they're fast.
7487c478bd9Sstevel@tonic-gate  */
7497c478bd9Sstevel@tonic-gate 
7507c478bd9Sstevel@tonic-gate /*
7517c478bd9Sstevel@tonic-gate  *	Decode table for SIMD instructions with the address size (0x66) prefix.
7527c478bd9Sstevel@tonic-gate  */
7537c478bd9Sstevel@tonic-gate const instable_t dis_opSIMDdata16[256] = {
7547c478bd9Sstevel@tonic-gate /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
7557c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
7567c478bd9Sstevel@tonic-gate /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
7577c478bd9Sstevel@tonic-gate /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
7587c478bd9Sstevel@tonic-gate 
7597c478bd9Sstevel@tonic-gate /*  [10]  */	TNSZ("movupd",XMM,16),	TNSZ("movupd",XMMS,16),	TNSZ("movlpd",XMMM,8),	TNSZ("movlpd",XMMMS,8),
7607c478bd9Sstevel@tonic-gate /*  [14]  */	TNSZ("unpcklpd",XMM,16),TNSZ("unpckhpd",XMM,16),TNSZ("movhpd",XMMM,8),	TNSZ("movhpd",XMMMS,8),
7617c478bd9Sstevel@tonic-gate /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
7627c478bd9Sstevel@tonic-gate /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
7637c478bd9Sstevel@tonic-gate 
7647c478bd9Sstevel@tonic-gate /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
7657c478bd9Sstevel@tonic-gate /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
7667c478bd9Sstevel@tonic-gate /*  [28]  */	TNSZ("movapd",XMM,16),	TNSZ("movapd",XMMS,16),	TNSZ("cvtpi2pd",XMMOMX,8),TNSZ("movntpd",XMMOMS,16),
7677c478bd9Sstevel@tonic-gate /*  [2C]  */	TNSZ("cvttpd2pi",XMMXMM,16),TNSZ("cvtpd2pi",XMMXMM,16),TNSZ("ucomisd",XMM,8),TNSZ("comisd",XMM,8),
7687c478bd9Sstevel@tonic-gate 
7697c478bd9Sstevel@tonic-gate /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
7707c478bd9Sstevel@tonic-gate /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
7717c478bd9Sstevel@tonic-gate /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
7727c478bd9Sstevel@tonic-gate /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
7737c478bd9Sstevel@tonic-gate 
7747c478bd9Sstevel@tonic-gate /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
7757c478bd9Sstevel@tonic-gate /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
7767c478bd9Sstevel@tonic-gate /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
7777c478bd9Sstevel@tonic-gate /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
7787c478bd9Sstevel@tonic-gate 
7797c478bd9Sstevel@tonic-gate /*  [50]  */	TNS("movmskpd",XMMOX3),	TNSZ("sqrtpd",XMM,16),	INVALID,		INVALID,
7807c478bd9Sstevel@tonic-gate /*  [54]  */	TNSZ("andpd",XMM,16),	TNSZ("andnpd",XMM,16),	TNSZ("orpd",XMM,16),	TNSZ("xorpd",XMM,16),
7817c478bd9Sstevel@tonic-gate /*  [58]  */	TNSZ("addpd",XMM,16),	TNSZ("mulpd",XMM,16),	TNSZ("cvtpd2ps",XMM,16),TNSZ("cvtps2dq",XMM,16),
7827c478bd9Sstevel@tonic-gate /*  [5C]  */	TNSZ("subpd",XMM,16),	TNSZ("minpd",XMM,16),	TNSZ("divpd",XMM,16),	TNSZ("maxpd",XMM,16),
7837c478bd9Sstevel@tonic-gate 
7847c478bd9Sstevel@tonic-gate /*  [60]  */	TNSZ("punpcklbw",XMM,16),TNSZ("punpcklwd",XMM,16),TNSZ("punpckldq",XMM,16),TNSZ("packsswb",XMM,16),
7857c478bd9Sstevel@tonic-gate /*  [64]  */	TNSZ("pcmpgtb",XMM,16),	TNSZ("pcmpgtw",XMM,16),	TNSZ("pcmpgtd",XMM,16),	TNSZ("packuswb",XMM,16),
7867c478bd9Sstevel@tonic-gate /*  [68]  */	TNSZ("punpckhbw",XMM,16),TNSZ("punpckhwd",XMM,16),TNSZ("punpckhdq",XMM,16),TNSZ("packssdw",XMM,16),
7877c478bd9Sstevel@tonic-gate /*  [6C]  */	TNSZ("punpcklqdq",XMM,16),TNSZ("punpckhqdq",XMM,16),TNSZ("movd",XMM3MX,4),TNSZ("movdqa",XMM,16),
7887c478bd9Sstevel@tonic-gate 
7897c478bd9Sstevel@tonic-gate /*  [70]  */	TNSZ("pshufd",XMMP,16),	INVALID,		INVALID,		INVALID,
7907c478bd9Sstevel@tonic-gate /*  [74]  */	TNSZ("pcmpeqb",XMM,16),	TNSZ("pcmpeqw",XMM,16),	TNSZ("pcmpeqd",XMM,16),	INVALID,
791f8801251Skk /*  [78]  */	TNSZ("extrq",XMM2I,16),	TNSZ("extrq",XMM,16), INVALID,		INVALID,
792d4c899eeSRobert Mustacchi /*  [7C]  */	TNSZ("haddpd",XMM,16),	TNSZ("hsubpd",XMM,16),	TNSZ("movd",XMM3MXS,4),	TNSZ("movdqa",XMMS,16),
7937c478bd9Sstevel@tonic-gate 
7947c478bd9Sstevel@tonic-gate /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
7957c478bd9Sstevel@tonic-gate /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
7967c478bd9Sstevel@tonic-gate /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
7977c478bd9Sstevel@tonic-gate /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
7987c478bd9Sstevel@tonic-gate 
7997c478bd9Sstevel@tonic-gate /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
8007c478bd9Sstevel@tonic-gate /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
8017c478bd9Sstevel@tonic-gate /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
8027c478bd9Sstevel@tonic-gate /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
8037c478bd9Sstevel@tonic-gate 
8047c478bd9Sstevel@tonic-gate /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
8057c478bd9Sstevel@tonic-gate /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
8067c478bd9Sstevel@tonic-gate /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
8077c478bd9Sstevel@tonic-gate /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
8087c478bd9Sstevel@tonic-gate 
8097c478bd9Sstevel@tonic-gate /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
8107c478bd9Sstevel@tonic-gate /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
8117c478bd9Sstevel@tonic-gate /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
8127c478bd9Sstevel@tonic-gate /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
8137c478bd9Sstevel@tonic-gate 
8147c478bd9Sstevel@tonic-gate /*  [C0]  */	INVALID,		INVALID,		TNSZ("cmppd",XMMP,16),	INVALID,
8157c478bd9Sstevel@tonic-gate /*  [C4]  */	TNSZ("pinsrw",XMMPRM,2),TNS("pextrw",XMM3P),	TNSZ("shufpd",XMMP,16),	INVALID,
8167c478bd9Sstevel@tonic-gate /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
8177c478bd9Sstevel@tonic-gate /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
8187c478bd9Sstevel@tonic-gate 
819d4c899eeSRobert Mustacchi /*  [D0]  */	TNSZ("addsubpd",XMM,16),TNSZ("psrlw",XMM,16),	TNSZ("psrld",XMM,16),	TNSZ("psrlq",XMM,16),
8207c478bd9Sstevel@tonic-gate /*  [D4]  */	TNSZ("paddq",XMM,16),	TNSZ("pmullw",XMM,16),	TNSZ("movq",XMMS,8),	TNS("pmovmskb",XMMX3),
8217c478bd9Sstevel@tonic-gate /*  [D8]  */	TNSZ("psubusb",XMM,16),	TNSZ("psubusw",XMM,16),	TNSZ("pminub",XMM,16),	TNSZ("pand",XMM,16),
8227c478bd9Sstevel@tonic-gate /*  [DC]  */	TNSZ("paddusb",XMM,16),	TNSZ("paddusw",XMM,16),	TNSZ("pmaxub",XMM,16),	TNSZ("pandn",XMM,16),
8237c478bd9Sstevel@tonic-gate 
8247c478bd9Sstevel@tonic-gate /*  [E0]  */	TNSZ("pavgb",XMM,16),	TNSZ("psraw",XMM,16),	TNSZ("psrad",XMM,16),	TNSZ("pavgw",XMM,16),
8257c478bd9Sstevel@tonic-gate /*  [E4]  */	TNSZ("pmulhuw",XMM,16),	TNSZ("pmulhw",XMM,16),	TNSZ("cvttpd2dq",XMM,16),TNSZ("movntdq",XMMS,16),
8267c478bd9Sstevel@tonic-gate /*  [E8]  */	TNSZ("psubsb",XMM,16),	TNSZ("psubsw",XMM,16),	TNSZ("pminsw",XMM,16),	TNSZ("por",XMM,16),
8277c478bd9Sstevel@tonic-gate /*  [EC]  */	TNSZ("paddsb",XMM,16),	TNSZ("paddsw",XMM,16),	TNSZ("pmaxsw",XMM,16),	TNSZ("pxor",XMM,16),
8287c478bd9Sstevel@tonic-gate 
8297c478bd9Sstevel@tonic-gate /*  [F0]  */	INVALID,		TNSZ("psllw",XMM,16),	TNSZ("pslld",XMM,16),	TNSZ("psllq",XMM,16),
8307c478bd9Sstevel@tonic-gate /*  [F4]  */	TNSZ("pmuludq",XMM,16),	TNSZ("pmaddwd",XMM,16),	TNSZ("psadbw",XMM,16),	TNSZ("maskmovdqu", XMMXIMPL,16),
8317c478bd9Sstevel@tonic-gate /*  [F8]  */	TNSZ("psubb",XMM,16),	TNSZ("psubw",XMM,16),	TNSZ("psubd",XMM,16),	TNSZ("psubq",XMM,16),
8327c478bd9Sstevel@tonic-gate /*  [FC]  */	TNSZ("paddb",XMM,16),	TNSZ("paddw",XMM,16),	TNSZ("paddd",XMM,16),	INVALID,
8337c478bd9Sstevel@tonic-gate };
8347c478bd9Sstevel@tonic-gate 
835ab47273fSEdward Gillett const instable_t dis_opAVX660F[256] = {
836ab47273fSEdward Gillett /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
837ab47273fSEdward Gillett /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
838ab47273fSEdward Gillett /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
839ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
840ab47273fSEdward Gillett 
841ab47273fSEdward Gillett /*  [10]  */	TNSZ("vmovupd",VEX_MX,16),	TNSZ("vmovupd",VEX_RX,16),	TNSZ("vmovlpd",VEX_RMrX,8),	TNSZ("vmovlpd",VEX_RM,8),
842ab47273fSEdward Gillett /*  [14]  */	TNSZ("vunpcklpd",VEX_RMrX,16),TNSZ("vunpckhpd",VEX_RMrX,16),TNSZ("vmovhpd",VEX_RMrX,8),	TNSZ("vmovhpd",VEX_RM,8),
843ab47273fSEdward Gillett /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
844ab47273fSEdward Gillett /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
845ab47273fSEdward Gillett 
846ab47273fSEdward Gillett /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
847ab47273fSEdward Gillett /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
848ab47273fSEdward Gillett /*  [28]  */	TNSZ("vmovapd",VEX_MX,16),	TNSZ("vmovapd",VEX_RX,16),	INVALID,		TNSZ("vmovntpd",VEX_RM,16),
849ab47273fSEdward Gillett /*  [2C]  */	INVALID,		INVALID,		TNSZ("vucomisd",VEX_MX,8),TNSZ("vcomisd",VEX_MX,8),
850ab47273fSEdward Gillett 
851ab47273fSEdward Gillett /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
852ab47273fSEdward Gillett /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
853ab47273fSEdward Gillett /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
854ab47273fSEdward Gillett /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
855ab47273fSEdward Gillett 
856a4e73d5dSJerry Jelinek /*  [40]  */	INVALID,		TSvo("kand",VEX_RMX),	TSvo("kandn",VEX_RMX),		INVALID,
857a4e73d5dSJerry Jelinek /*  [44]  */	TSvo("knot",VEX_MX),	TSvo("kor",VEX_RMX),	TSvo("kxnor",VEX_RMX),		TSvo("kxor",VEX_RMX),
858a4e73d5dSJerry Jelinek /*  [48]  */	INVALID,		INVALID,		TSvo("kadd",VEX_RMX),		TSvo("kunpck",VEX_RMX),
859ab47273fSEdward Gillett /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
860ab47273fSEdward Gillett 
861ab47273fSEdward Gillett /*  [50]  */	TNS("vmovmskpd",VEX_MR),	TNSZ("vsqrtpd",VEX_MX,16),	INVALID,		INVALID,
862ab47273fSEdward Gillett /*  [54]  */	TNSZ("vandpd",VEX_RMrX,16),	TNSZ("vandnpd",VEX_RMrX,16),	TNSZ("vorpd",VEX_RMrX,16),	TNSZ("vxorpd",VEX_RMrX,16),
863ab47273fSEdward Gillett /*  [58]  */	TNSZ("vaddpd",VEX_RMrX,16),	TNSZ("vmulpd",VEX_RMrX,16),	TNSZ("vcvtpd2ps",VEX_MX,16),TNSZ("vcvtps2dq",VEX_MX,16),
864ab47273fSEdward Gillett /*  [5C]  */	TNSZ("vsubpd",VEX_RMrX,16),	TNSZ("vminpd",VEX_RMrX,16),	TNSZ("vdivpd",VEX_RMrX,16),	TNSZ("vmaxpd",VEX_RMrX,16),
865ab47273fSEdward Gillett 
866ab47273fSEdward Gillett /*  [60]  */	TNSZ("vpunpcklbw",VEX_RMrX,16),TNSZ("vpunpcklwd",VEX_RMrX,16),TNSZ("vpunpckldq",VEX_RMrX,16),TNSZ("vpacksswb",VEX_RMrX,16),
867ab47273fSEdward Gillett /*  [64]  */	TNSZ("vpcmpgtb",VEX_RMrX,16),	TNSZ("vpcmpgtw",VEX_RMrX,16),	TNSZ("vpcmpgtd",VEX_RMrX,16),	TNSZ("vpackuswb",VEX_RMrX,16),
868ab47273fSEdward Gillett /*  [68]  */	TNSZ("vpunpckhbw",VEX_RMrX,16),TNSZ("vpunpckhwd",VEX_RMrX,16),TNSZ("vpunpckhdq",VEX_RMrX,16),TNSZ("vpackssdw",VEX_RMrX,16),
869ab47273fSEdward Gillett /*  [6C]  */	TNSZ("vpunpcklqdq",VEX_RMrX,16),TNSZ("vpunpckhqdq",VEX_RMrX,16),TNSZ("vmovd",VEX_MX,4),TNSZ("vmovdqa",VEX_MX,16),
870ab47273fSEdward Gillett 
871ab47273fSEdward Gillett /*  [70]  */	TNSZ("vpshufd",VEX_MXI,16),	TNSZ("vgrp71",VEX_XXI,16),	TNSZ("vgrp72",VEX_XXI,16),		TNSZ("vgrp73",VEX_XXI,16),
872ab47273fSEdward Gillett /*  [74]  */	TNSZ("vpcmpeqb",VEX_RMrX,16),	TNSZ("vpcmpeqw",VEX_RMrX,16),	TNSZ("vpcmpeqd",VEX_RMrX,16),	INVALID,
873ab47273fSEdward Gillett /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
874ab47273fSEdward Gillett /*  [7C]  */	TNSZ("vhaddpd",VEX_RMrX,16),	TNSZ("vhsubpd",VEX_RMrX,16),	TNSZ("vmovd",VEX_RR,4),	TNSZ("vmovdqa",VEX_RX,16),
875ab47273fSEdward Gillett 
876ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
877ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
878ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
879ab47273fSEdward Gillett /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
880ab47273fSEdward Gillett 
881a4e73d5dSJerry Jelinek /*  [90]  */	TSvo("kmov",VEX_KRM),	TSvo("kmov",VEX_KMR),	TSvo("kmov",VEX_KRR),		TSvo("kmov",VEX_MR),
882ab47273fSEdward Gillett /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
883a4e73d5dSJerry Jelinek /*  [98]  */	TSvo("kortest",VEX_MX),	TSvo("ktest",VEX_MX),	INVALID,		INVALID,
884ab47273fSEdward Gillett /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
885ab47273fSEdward Gillett 
886ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
887ab47273fSEdward Gillett /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
888ab47273fSEdward Gillett /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
889ab47273fSEdward Gillett /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
890ab47273fSEdward Gillett 
891ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
892ab47273fSEdward Gillett /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
893ab47273fSEdward Gillett /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
894ab47273fSEdward Gillett /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
895ab47273fSEdward Gillett 
896ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		TNSZ("vcmppd",VEX_RMRX,16),	INVALID,
897ab47273fSEdward Gillett /*  [C4]  */	TNSZ("vpinsrw",VEX_RMRX,2),TNS("vpextrw",VEX_MR),	TNSZ("vshufpd",VEX_RMRX,16),	INVALID,
898ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
899ab47273fSEdward Gillett /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
900ab47273fSEdward Gillett 
901ab47273fSEdward Gillett /*  [D0]  */	TNSZ("vaddsubpd",VEX_RMrX,16),TNSZ("vpsrlw",VEX_RMrX,16),	TNSZ("vpsrld",VEX_RMrX,16),	TNSZ("vpsrlq",VEX_RMrX,16),
902ab47273fSEdward Gillett /*  [D4]  */	TNSZ("vpaddq",VEX_RMrX,16),	TNSZ("vpmullw",VEX_RMrX,16),	TNSZ("vmovq",VEX_RX,8),	TNS("vpmovmskb",VEX_MR),
903ab47273fSEdward Gillett /*  [D8]  */	TNSZ("vpsubusb",VEX_RMrX,16),	TNSZ("vpsubusw",VEX_RMrX,16),	TNSZ("vpminub",VEX_RMrX,16),	TNSZ("vpand",VEX_RMrX,16),
904ab47273fSEdward Gillett /*  [DC]  */	TNSZ("vpaddusb",VEX_RMrX,16),	TNSZ("vpaddusw",VEX_RMrX,16),	TNSZ("vpmaxub",VEX_RMrX,16),	TNSZ("vpandn",VEX_RMrX,16),
905ab47273fSEdward Gillett 
906ab47273fSEdward Gillett /*  [E0]  */	TNSZ("vpavgb",VEX_RMrX,16),	TNSZ("vpsraw",VEX_RMrX,16),	TNSZ("vpsrad",VEX_RMrX,16),	TNSZ("vpavgw",VEX_RMrX,16),
907ab47273fSEdward Gillett /*  [E4]  */	TNSZ("vpmulhuw",VEX_RMrX,16),	TNSZ("vpmulhw",VEX_RMrX,16),	TNSZ("vcvttpd2dq",VEX_MX,16),TNSZ("vmovntdq",VEX_RM,16),
908ab47273fSEdward Gillett /*  [E8]  */	TNSZ("vpsubsb",VEX_RMrX,16),	TNSZ("vpsubsw",VEX_RMrX,16),	TNSZ("vpminsw",VEX_RMrX,16),	TNSZ("vpor",VEX_RMrX,16),
909ab47273fSEdward Gillett /*  [EC]  */	TNSZ("vpaddsb",VEX_RMrX,16),	TNSZ("vpaddsw",VEX_RMrX,16),	TNSZ("vpmaxsw",VEX_RMrX,16),	TNSZ("vpxor",VEX_RMrX,16),
910ab47273fSEdward Gillett 
911ab47273fSEdward Gillett /*  [F0]  */	INVALID,		TNSZ("vpsllw",VEX_RMrX,16),	TNSZ("vpslld",VEX_RMrX,16),	TNSZ("vpsllq",VEX_RMrX,16),
912ab47273fSEdward Gillett /*  [F4]  */	TNSZ("vpmuludq",VEX_RMrX,16),	TNSZ("vpmaddwd",VEX_RMrX,16),	TNSZ("vpsadbw",VEX_RMrX,16),	TNS("vmaskmovdqu",VEX_MX),
913ab47273fSEdward Gillett /*  [F8]  */	TNSZ("vpsubb",VEX_RMrX,16),	TNSZ("vpsubw",VEX_RMrX,16),	TNSZ("vpsubd",VEX_RMrX,16),	TNSZ("vpsubq",VEX_RMrX,16),
914ab47273fSEdward Gillett /*  [FC]  */	TNSZ("vpaddb",VEX_RMrX,16),	TNSZ("vpaddw",VEX_RMrX,16),	TNSZ("vpaddd",VEX_RMrX,16),	INVALID,
915ab47273fSEdward Gillett };
916ab47273fSEdward Gillett 
9177c478bd9Sstevel@tonic-gate /*
9187c478bd9Sstevel@tonic-gate  *	Decode table for SIMD instructions with the repnz (0xf2) prefix.
9197c478bd9Sstevel@tonic-gate  */
9207c478bd9Sstevel@tonic-gate const instable_t dis_opSIMDrepnz[256] = {
9217c478bd9Sstevel@tonic-gate /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
9227c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
9237c478bd9Sstevel@tonic-gate /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
9247c478bd9Sstevel@tonic-gate /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9257c478bd9Sstevel@tonic-gate 
926d4c899eeSRobert Mustacchi /*  [10]  */	TNSZ("movsd",XMM,8),	TNSZ("movsd",XMMS,8),	TNSZ("movddup",XMM,8),	INVALID,
9277c478bd9Sstevel@tonic-gate /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
9287c478bd9Sstevel@tonic-gate /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
9297c478bd9Sstevel@tonic-gate /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9307c478bd9Sstevel@tonic-gate 
9317c478bd9Sstevel@tonic-gate /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
9327c478bd9Sstevel@tonic-gate /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
933f8801251Skk /*  [28]  */	INVALID,		INVALID,		TNSZ("cvtsi2sd",XMM3MX,4),TNSZ("movntsd",XMMMS,8),
9347c478bd9Sstevel@tonic-gate /*  [2C]  */	TNSZ("cvttsd2si",XMMXM3,8),TNSZ("cvtsd2si",XMMXM3,8),INVALID,		INVALID,
9357c478bd9Sstevel@tonic-gate 
9367c478bd9Sstevel@tonic-gate /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
9377c478bd9Sstevel@tonic-gate /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
9387c478bd9Sstevel@tonic-gate /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
9397c478bd9Sstevel@tonic-gate /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9407c478bd9Sstevel@tonic-gate 
9417c478bd9Sstevel@tonic-gate /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
9427c478bd9Sstevel@tonic-gate /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
9437c478bd9Sstevel@tonic-gate /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
9447c478bd9Sstevel@tonic-gate /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9457c478bd9Sstevel@tonic-gate 
9467c478bd9Sstevel@tonic-gate /*  [50]  */	INVALID,		TNSZ("sqrtsd",XMM,8),	INVALID,		INVALID,
9477c478bd9Sstevel@tonic-gate /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
9487c478bd9Sstevel@tonic-gate /*  [58]  */	TNSZ("addsd",XMM,8),	TNSZ("mulsd",XMM,8),	TNSZ("cvtsd2ss",XMM,8),	INVALID,
9497c478bd9Sstevel@tonic-gate /*  [5C]  */	TNSZ("subsd",XMM,8),	TNSZ("minsd",XMM,8),	TNSZ("divsd",XMM,8),	TNSZ("maxsd",XMM,8),
9507c478bd9Sstevel@tonic-gate 
9517c478bd9Sstevel@tonic-gate /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
9527c478bd9Sstevel@tonic-gate /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
9537c478bd9Sstevel@tonic-gate /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
9547c478bd9Sstevel@tonic-gate /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9557c478bd9Sstevel@tonic-gate 
9567c478bd9Sstevel@tonic-gate /*  [70]  */	TNSZ("pshuflw",XMMP,16),INVALID,		INVALID,		INVALID,
9577c478bd9Sstevel@tonic-gate /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
958f8801251Skk /*  [78]  */	TNSZ("insertq",XMMX2I,16),TNSZ("insertq",XMM,8),INVALID,		INVALID,
959d4c899eeSRobert Mustacchi /*  [7C]  */	TNSZ("haddps",XMM,16),	TNSZ("hsubps",XMM,16),	INVALID,		INVALID,
9607c478bd9Sstevel@tonic-gate 
9617c478bd9Sstevel@tonic-gate /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
9627c478bd9Sstevel@tonic-gate /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
9637c478bd9Sstevel@tonic-gate /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
9647c478bd9Sstevel@tonic-gate /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9657c478bd9Sstevel@tonic-gate 
9667c478bd9Sstevel@tonic-gate /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
9677c478bd9Sstevel@tonic-gate /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
9687c478bd9Sstevel@tonic-gate /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
9697c478bd9Sstevel@tonic-gate /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
9707c478bd9Sstevel@tonic-gate 
9717c478bd9Sstevel@tonic-gate /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
9727c478bd9Sstevel@tonic-gate /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
9737c478bd9Sstevel@tonic-gate /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9747c478bd9Sstevel@tonic-gate /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
9757c478bd9Sstevel@tonic-gate 
9767c478bd9Sstevel@tonic-gate /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
9777c478bd9Sstevel@tonic-gate /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
9787c478bd9Sstevel@tonic-gate /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9797c478bd9Sstevel@tonic-gate /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
9807c478bd9Sstevel@tonic-gate 
9817c478bd9Sstevel@tonic-gate /*  [C0]  */	INVALID,		INVALID,		TNSZ("cmpsd",XMMP,8),	INVALID,
9827c478bd9Sstevel@tonic-gate /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
9837c478bd9Sstevel@tonic-gate /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9847c478bd9Sstevel@tonic-gate /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
9857c478bd9Sstevel@tonic-gate 
986d4c899eeSRobert Mustacchi /*  [D0]  */	TNSZ("addsubps",XMM,16),INVALID,		INVALID,		INVALID,
9877c478bd9Sstevel@tonic-gate /*  [D4]  */	INVALID,		INVALID,		TNS("movdq2q",XMMXM),	INVALID,
9887c478bd9Sstevel@tonic-gate /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9897c478bd9Sstevel@tonic-gate /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
9907c478bd9Sstevel@tonic-gate 
9917c478bd9Sstevel@tonic-gate /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
9927c478bd9Sstevel@tonic-gate /*  [E4]  */	INVALID,		INVALID,		TNSZ("cvtpd2dq",XMM,16),INVALID,
9937c478bd9Sstevel@tonic-gate /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9947c478bd9Sstevel@tonic-gate /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
9957c478bd9Sstevel@tonic-gate 
996d4c899eeSRobert Mustacchi /*  [F0]  */	TNS("lddqu",XMMM),	INVALID,		INVALID,		INVALID,
9977c478bd9Sstevel@tonic-gate /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
9987c478bd9Sstevel@tonic-gate /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
9997c478bd9Sstevel@tonic-gate /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
10007c478bd9Sstevel@tonic-gate };
10017c478bd9Sstevel@tonic-gate 
1002ab47273fSEdward Gillett const instable_t dis_opAVXF20F[256] = {
1003ab47273fSEdward Gillett /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1004ab47273fSEdward Gillett /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1005ab47273fSEdward Gillett /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1006ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1007ab47273fSEdward Gillett 
1008ab47273fSEdward Gillett /*  [10]  */	TNSZ("vmovsd",VEX_RMrX,8),	TNSZ("vmovsd",VEX_RRX,8),	TNSZ("vmovddup",VEX_MX,8),	INVALID,
1009ab47273fSEdward Gillett /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1010ab47273fSEdward Gillett /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1011ab47273fSEdward Gillett /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1012ab47273fSEdward Gillett 
1013ab47273fSEdward Gillett /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1014ab47273fSEdward Gillett /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1015ab47273fSEdward Gillett /*  [28]  */	INVALID,		INVALID,		TNSZ("vcvtsi2sd",VEX_RMrX,4),INVALID,
1016ab47273fSEdward Gillett /*  [2C]  */	TNSZ("vcvttsd2si",VEX_MR,8),TNSZ("vcvtsd2si",VEX_MR,8),INVALID,		INVALID,
1017ab47273fSEdward Gillett 
1018ab47273fSEdward Gillett /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1019ab47273fSEdward Gillett /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1020ab47273fSEdward Gillett /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1021ab47273fSEdward Gillett /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1022ab47273fSEdward Gillett 
1023ab47273fSEdward Gillett /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1024ab47273fSEdward Gillett /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1025ab47273fSEdward Gillett /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1026ab47273fSEdward Gillett /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1027ab47273fSEdward Gillett 
1028ab47273fSEdward Gillett /*  [50]  */	INVALID,		TNSZ("vsqrtsd",VEX_RMrX,8),	INVALID,		INVALID,
1029ab47273fSEdward Gillett /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1030ab47273fSEdward Gillett /*  [58]  */	TNSZ("vaddsd",VEX_RMrX,8),	TNSZ("vmulsd",VEX_RMrX,8),	TNSZ("vcvtsd2ss",VEX_RMrX,8),	INVALID,
1031ab47273fSEdward Gillett /*  [5C]  */	TNSZ("vsubsd",VEX_RMrX,8),	TNSZ("vminsd",VEX_RMrX,8),	TNSZ("vdivsd",VEX_RMrX,8),	TNSZ("vmaxsd",VEX_RMrX,8),
1032ab47273fSEdward Gillett 
1033ab47273fSEdward Gillett /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1034ab47273fSEdward Gillett /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1035ab47273fSEdward Gillett /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1036ab47273fSEdward Gillett /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1037ab47273fSEdward Gillett 
1038ab47273fSEdward Gillett /*  [70]  */	TNSZ("vpshuflw",VEX_MXI,16),INVALID,		INVALID,		INVALID,
1039ab47273fSEdward Gillett /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1040ab47273fSEdward Gillett /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1041ab47273fSEdward Gillett /*  [7C]  */	TNSZ("vhaddps",VEX_RMrX,8),	TNSZ("vhsubps",VEX_RMrX,8),	INVALID,		INVALID,
1042ab47273fSEdward Gillett 
1043ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1044ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1045ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1046ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1047ab47273fSEdward Gillett 
1048a4e73d5dSJerry Jelinek /*  [90]  */	INVALID,		INVALID,		TSvo("kmov",VEX_KRR),		TSvo("kmov",VEX_MR),
1049ab47273fSEdward Gillett /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1050ab47273fSEdward Gillett /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1051ab47273fSEdward Gillett /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1052ab47273fSEdward Gillett 
1053ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1054ab47273fSEdward Gillett /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1055ab47273fSEdward Gillett /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1056ab47273fSEdward Gillett /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1057ab47273fSEdward Gillett 
1058ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1059ab47273fSEdward Gillett /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1060ab47273fSEdward Gillett /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1061ab47273fSEdward Gillett /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1062ab47273fSEdward Gillett 
1063ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		TNSZ("vcmpsd",VEX_RMRX,8),	INVALID,
1064ab47273fSEdward Gillett /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1065ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1066ab47273fSEdward Gillett /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1067ab47273fSEdward Gillett 
1068ab47273fSEdward Gillett /*  [D0]  */	TNSZ("vaddsubps",VEX_RMrX,8),	INVALID,		INVALID,		INVALID,
1069ab47273fSEdward Gillett /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1070ab47273fSEdward Gillett /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1071ab47273fSEdward Gillett /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1072ab47273fSEdward Gillett 
1073ab47273fSEdward Gillett /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1074ab47273fSEdward Gillett /*  [E4]  */	INVALID,		INVALID,		TNSZ("vcvtpd2dq",VEX_MX,16),INVALID,
1075ab47273fSEdward Gillett /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1076ab47273fSEdward Gillett /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1077ab47273fSEdward Gillett 
1078ab47273fSEdward Gillett /*  [F0]  */	TNSZ("vlddqu",VEX_MX,16),	INVALID,		INVALID,		INVALID,
1079ab47273fSEdward Gillett /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1080ab47273fSEdward Gillett /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1081ab47273fSEdward Gillett /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1082ab47273fSEdward Gillett };
1083ab47273fSEdward Gillett 
1084245ac945SRobert Mustacchi const instable_t dis_opAVXF20F3A[256] = {
1085245ac945SRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1086245ac945SRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1087245ac945SRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1088245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1089245ac945SRobert Mustacchi 
1090245ac945SRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1091245ac945SRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1092245ac945SRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1093245ac945SRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1094245ac945SRobert Mustacchi 
1095245ac945SRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1096245ac945SRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1097245ac945SRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1098245ac945SRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1099245ac945SRobert Mustacchi 
1100245ac945SRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1101245ac945SRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1102245ac945SRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1103245ac945SRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1104245ac945SRobert Mustacchi 
1105245ac945SRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1106245ac945SRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1107245ac945SRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1108245ac945SRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1109245ac945SRobert Mustacchi 
1110245ac945SRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1111245ac945SRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1112245ac945SRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1113245ac945SRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1114245ac945SRobert Mustacchi 
1115245ac945SRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1116245ac945SRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1117245ac945SRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1118245ac945SRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1119245ac945SRobert Mustacchi 
1120245ac945SRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
1121245ac945SRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1122245ac945SRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1123245ac945SRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1124245ac945SRobert Mustacchi 
1125245ac945SRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1126245ac945SRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1127245ac945SRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1128245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1129245ac945SRobert Mustacchi 
1130245ac945SRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1131245ac945SRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1132245ac945SRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1133245ac945SRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1134245ac945SRobert Mustacchi 
1135245ac945SRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1136245ac945SRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1137245ac945SRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1138245ac945SRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1139245ac945SRobert Mustacchi 
1140245ac945SRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1141245ac945SRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1142245ac945SRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1143245ac945SRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1144245ac945SRobert Mustacchi 
1145245ac945SRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1146245ac945SRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1147245ac945SRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1148245ac945SRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1149245ac945SRobert Mustacchi 
1150245ac945SRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1151245ac945SRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1152245ac945SRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1153245ac945SRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1154245ac945SRobert Mustacchi 
1155245ac945SRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1156245ac945SRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1157245ac945SRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1158245ac945SRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1159245ac945SRobert Mustacchi 
1160245ac945SRobert Mustacchi /*  [F0]  */	TNSZvr("rorx",VEX_MXI,6),INVALID,		INVALID,		INVALID,
1161245ac945SRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1162245ac945SRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1163245ac945SRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1164245ac945SRobert Mustacchi };
1165245ac945SRobert Mustacchi 
1166245ac945SRobert Mustacchi const instable_t dis_opAVXF20F38[256] = {
1167245ac945SRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1168245ac945SRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1169245ac945SRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1170245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1171245ac945SRobert Mustacchi 
1172245ac945SRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1173245ac945SRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1174245ac945SRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1175245ac945SRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1176245ac945SRobert Mustacchi 
1177245ac945SRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1178245ac945SRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1179245ac945SRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1180245ac945SRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1181245ac945SRobert Mustacchi 
1182245ac945SRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1183245ac945SRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1184245ac945SRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1185245ac945SRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1186245ac945SRobert Mustacchi 
1187245ac945SRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1188245ac945SRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1189245ac945SRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1190245ac945SRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1191245ac945SRobert Mustacchi 
1192245ac945SRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1193245ac945SRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1194245ac945SRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1195245ac945SRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1196245ac945SRobert Mustacchi 
1197245ac945SRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1198245ac945SRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1199245ac945SRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1200245ac945SRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1201245ac945SRobert Mustacchi 
1202245ac945SRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
1203245ac945SRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1204245ac945SRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1205245ac945SRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1206245ac945SRobert Mustacchi 
1207245ac945SRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1208245ac945SRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1209245ac945SRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1210245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1211245ac945SRobert Mustacchi 
1212245ac945SRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1213245ac945SRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1214245ac945SRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1215245ac945SRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1216245ac945SRobert Mustacchi 
1217245ac945SRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1218245ac945SRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1219245ac945SRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1220245ac945SRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1221245ac945SRobert Mustacchi 
1222245ac945SRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1223245ac945SRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1224245ac945SRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1225245ac945SRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1226245ac945SRobert Mustacchi 
1227245ac945SRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1228245ac945SRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1229245ac945SRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1230245ac945SRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1231245ac945SRobert Mustacchi 
1232245ac945SRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1233245ac945SRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1234245ac945SRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1235245ac945SRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1236245ac945SRobert Mustacchi 
1237245ac945SRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1238245ac945SRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1239245ac945SRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1240245ac945SRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1241245ac945SRobert Mustacchi 
1242245ac945SRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1243245ac945SRobert Mustacchi /*  [F4]  */	INVALID,		TNSZvr("pdep",VEX_RMrX,5),TNSZvr("mulx",VEX_RMrX,5),TNSZvr("shrx",VEX_VRMrX,5),
1244245ac945SRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1245245ac945SRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1246245ac945SRobert Mustacchi };
1247245ac945SRobert Mustacchi 
1248245ac945SRobert Mustacchi const instable_t dis_opAVXF30F38[256] = {
1249245ac945SRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1250245ac945SRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1251245ac945SRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1252245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1253245ac945SRobert Mustacchi 
1254245ac945SRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1255245ac945SRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1256245ac945SRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1257245ac945SRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1258245ac945SRobert Mustacchi 
1259245ac945SRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1260245ac945SRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1261245ac945SRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1262245ac945SRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1263245ac945SRobert Mustacchi 
1264245ac945SRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1265245ac945SRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1266245ac945SRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1267245ac945SRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1268245ac945SRobert Mustacchi 
1269245ac945SRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1270245ac945SRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1271245ac945SRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1272245ac945SRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1273245ac945SRobert Mustacchi 
1274245ac945SRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1275245ac945SRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1276245ac945SRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1277245ac945SRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1278245ac945SRobert Mustacchi 
1279245ac945SRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1280245ac945SRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1281245ac945SRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1282245ac945SRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1283245ac945SRobert Mustacchi 
1284245ac945SRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
1285245ac945SRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1286245ac945SRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1287245ac945SRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1288245ac945SRobert Mustacchi 
1289245ac945SRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1290245ac945SRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1291245ac945SRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1292245ac945SRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1293245ac945SRobert Mustacchi 
1294245ac945SRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1295245ac945SRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1296245ac945SRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1297245ac945SRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1298245ac945SRobert Mustacchi 
1299245ac945SRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1300245ac945SRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1301245ac945SRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1302245ac945SRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1303245ac945SRobert Mustacchi 
1304245ac945SRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1305245ac945SRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1306245ac945SRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1307245ac945SRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1308245ac945SRobert Mustacchi 
1309245ac945SRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1310245ac945SRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1311245ac945SRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1312245ac945SRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1313245ac945SRobert Mustacchi 
1314245ac945SRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1315245ac945SRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1316245ac945SRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1317245ac945SRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1318245ac945SRobert Mustacchi 
1319245ac945SRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1320245ac945SRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1321245ac945SRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1322245ac945SRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1323245ac945SRobert Mustacchi 
1324245ac945SRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1325245ac945SRobert Mustacchi /*  [F4]  */	INVALID,		TNSZvr("pext",VEX_RMrX,5),INVALID,		TNSZvr("sarx",VEX_VRMrX,5),
1326245ac945SRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1327245ac945SRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1328245ac945SRobert Mustacchi };
13297c478bd9Sstevel@tonic-gate /*
13307c478bd9Sstevel@tonic-gate  *	Decode table for SIMD instructions with the repz (0xf3) prefix.
13317c478bd9Sstevel@tonic-gate  */
13327c478bd9Sstevel@tonic-gate const instable_t dis_opSIMDrepz[256] = {
13337c478bd9Sstevel@tonic-gate /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
13347c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
13357c478bd9Sstevel@tonic-gate /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
13367c478bd9Sstevel@tonic-gate /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13377c478bd9Sstevel@tonic-gate 
1338d4c899eeSRobert Mustacchi /*  [10]  */	TNSZ("movss",XMM,4),	TNSZ("movss",XMMS,4),	TNSZ("movsldup",XMM,16),INVALID,
1339d4c899eeSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		TNSZ("movshdup",XMM,16),INVALID,
13407c478bd9Sstevel@tonic-gate /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
13417c478bd9Sstevel@tonic-gate /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13427c478bd9Sstevel@tonic-gate 
13437c478bd9Sstevel@tonic-gate /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
13447c478bd9Sstevel@tonic-gate /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1345f8801251Skk /*  [28]  */	INVALID,		INVALID,		TNSZ("cvtsi2ss",XMM3MX,4),TNSZ("movntss",XMMMS,4),
13467c478bd9Sstevel@tonic-gate /*  [2C]  */	TNSZ("cvttss2si",XMMXM3,4),TNSZ("cvtss2si",XMMXM3,4),INVALID,		INVALID,
13477c478bd9Sstevel@tonic-gate 
13487c478bd9Sstevel@tonic-gate /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
13497c478bd9Sstevel@tonic-gate /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
13507c478bd9Sstevel@tonic-gate /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
13517c478bd9Sstevel@tonic-gate /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13527c478bd9Sstevel@tonic-gate 
13537c478bd9Sstevel@tonic-gate /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
13547c478bd9Sstevel@tonic-gate /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
13557c478bd9Sstevel@tonic-gate /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
13567c478bd9Sstevel@tonic-gate /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13577c478bd9Sstevel@tonic-gate 
13587c478bd9Sstevel@tonic-gate /*  [50]  */	INVALID,		TNSZ("sqrtss",XMM,4),	TNSZ("rsqrtss",XMM,4),	TNSZ("rcpss",XMM,4),
13597c478bd9Sstevel@tonic-gate /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
13607c478bd9Sstevel@tonic-gate /*  [58]  */	TNSZ("addss",XMM,4),	TNSZ("mulss",XMM,4),	TNSZ("cvtss2sd",XMM,4),	TNSZ("cvttps2dq",XMM,16),
13617c478bd9Sstevel@tonic-gate /*  [5C]  */	TNSZ("subss",XMM,4),	TNSZ("minss",XMM,4),	TNSZ("divss",XMM,4),	TNSZ("maxss",XMM,4),
13627c478bd9Sstevel@tonic-gate 
13637c478bd9Sstevel@tonic-gate /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
13647c478bd9Sstevel@tonic-gate /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
13657c478bd9Sstevel@tonic-gate /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
13667c478bd9Sstevel@tonic-gate /*  [6C]  */	INVALID,		INVALID,		INVALID,		TNSZ("movdqu",XMM,16),
13677c478bd9Sstevel@tonic-gate 
13687c478bd9Sstevel@tonic-gate /*  [70]  */	TNSZ("pshufhw",XMMP,16),INVALID,		INVALID,		INVALID,
13697c478bd9Sstevel@tonic-gate /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
13707c478bd9Sstevel@tonic-gate /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
13717c478bd9Sstevel@tonic-gate /*  [7C]  */	INVALID,		INVALID,		TNSZ("movq",XMM,8),	TNSZ("movdqu",XMMS,16),
13727c478bd9Sstevel@tonic-gate 
13737c478bd9Sstevel@tonic-gate /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
13747c478bd9Sstevel@tonic-gate /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
13757c478bd9Sstevel@tonic-gate /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
13767c478bd9Sstevel@tonic-gate /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13777c478bd9Sstevel@tonic-gate 
13787c478bd9Sstevel@tonic-gate /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
13797c478bd9Sstevel@tonic-gate /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
13807c478bd9Sstevel@tonic-gate /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
13817c478bd9Sstevel@tonic-gate /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
13827c478bd9Sstevel@tonic-gate 
13837c478bd9Sstevel@tonic-gate /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
13847c478bd9Sstevel@tonic-gate /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
13857c478bd9Sstevel@tonic-gate /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
13867c478bd9Sstevel@tonic-gate /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
13877c478bd9Sstevel@tonic-gate 
13887c478bd9Sstevel@tonic-gate /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
13897c478bd9Sstevel@tonic-gate /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1390f8801251Skk /*  [B8]  */	TS("popcnt",MRw),	INVALID,		INVALID,		INVALID,
1391245ac945SRobert Mustacchi /*  [BC]  */	TNSZ("tzcnt",MRw,5),	TS("lzcnt",MRw),	INVALID,		INVALID,
13927c478bd9Sstevel@tonic-gate 
13937c478bd9Sstevel@tonic-gate /*  [C0]  */	INVALID,		INVALID,		TNSZ("cmpss",XMMP,4),	INVALID,
13947c478bd9Sstevel@tonic-gate /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
13957c478bd9Sstevel@tonic-gate /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
13967c478bd9Sstevel@tonic-gate /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
13977c478bd9Sstevel@tonic-gate 
13987c478bd9Sstevel@tonic-gate /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
13997c478bd9Sstevel@tonic-gate /*  [D4]  */	INVALID,		INVALID,		TNS("movq2dq",XMMMX),	INVALID,
14007c478bd9Sstevel@tonic-gate /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
14017c478bd9Sstevel@tonic-gate /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
14027c478bd9Sstevel@tonic-gate 
14037c478bd9Sstevel@tonic-gate /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
14047c478bd9Sstevel@tonic-gate /*  [E4]  */	INVALID,		INVALID,		TNSZ("cvtdq2pd",XMM,8),	INVALID,
14057c478bd9Sstevel@tonic-gate /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
14067c478bd9Sstevel@tonic-gate /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
14077c478bd9Sstevel@tonic-gate 
14087c478bd9Sstevel@tonic-gate /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
14097c478bd9Sstevel@tonic-gate /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
14107c478bd9Sstevel@tonic-gate /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
14117c478bd9Sstevel@tonic-gate /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
14127c478bd9Sstevel@tonic-gate };
14137c478bd9Sstevel@tonic-gate 
1414ab47273fSEdward Gillett const instable_t dis_opAVXF30F[256] = {
1415ab47273fSEdward Gillett /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1416ab47273fSEdward Gillett /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1417ab47273fSEdward Gillett /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1418ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1419ab47273fSEdward Gillett 
1420ab47273fSEdward Gillett /*  [10]  */	TNSZ("vmovss",VEX_RMrX,4),	TNSZ("vmovss",VEX_RRX,4),	TNSZ("vmovsldup",VEX_MX,4),	INVALID,
1421ab47273fSEdward Gillett /*  [14]  */	INVALID,		INVALID,		TNSZ("vmovshdup",VEX_MX,4),	INVALID,
1422ab47273fSEdward Gillett /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1423ab47273fSEdward Gillett /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1424ab47273fSEdward Gillett 
1425ab47273fSEdward Gillett /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1426ab47273fSEdward Gillett /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1427ab47273fSEdward Gillett /*  [28]  */	INVALID,		INVALID,		TNSZ("vcvtsi2ss",VEX_RMrX,4),INVALID,
1428ab47273fSEdward Gillett /*  [2C]  */	TNSZ("vcvttss2si",VEX_MR,4),TNSZ("vcvtss2si",VEX_MR,4),INVALID,		INVALID,
1429ab47273fSEdward Gillett 
1430ab47273fSEdward Gillett /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1431ab47273fSEdward Gillett /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1432ab47273fSEdward Gillett /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1433ab47273fSEdward Gillett /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1434ab47273fSEdward Gillett 
1435ab47273fSEdward Gillett /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1436ab47273fSEdward Gillett /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1437ab47273fSEdward Gillett /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1438ab47273fSEdward Gillett /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1439ab47273fSEdward Gillett 
1440ab47273fSEdward Gillett /*  [50]  */	INVALID,		TNSZ("vsqrtss",VEX_RMrX,4),	TNSZ("vrsqrtss",VEX_RMrX,4),	TNSZ("vrcpss",VEX_RMrX,4),
1441ab47273fSEdward Gillett /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1442ab47273fSEdward Gillett /*  [58]  */	TNSZ("vaddss",VEX_RMrX,4),	TNSZ("vmulss",VEX_RMrX,4),	TNSZ("vcvtss2sd",VEX_RMrX,4),	TNSZ("vcvttps2dq",VEX_MX,16),
1443ab47273fSEdward Gillett /*  [5C]  */	TNSZ("vsubss",VEX_RMrX,4),	TNSZ("vminss",VEX_RMrX,4),	TNSZ("vdivss",VEX_RMrX,4),	TNSZ("vmaxss",VEX_RMrX,4),
1444ab47273fSEdward Gillett 
1445ab47273fSEdward Gillett /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1446ab47273fSEdward Gillett /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1447ab47273fSEdward Gillett /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1448ab47273fSEdward Gillett /*  [6C]  */	INVALID,		INVALID,		INVALID,		TNSZ("vmovdqu",VEX_MX,16),
1449ab47273fSEdward Gillett 
1450ab47273fSEdward Gillett /*  [70]  */	TNSZ("vpshufhw",VEX_MXI,16),INVALID,		INVALID,		INVALID,
1451ab47273fSEdward Gillett /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1452ab47273fSEdward Gillett /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1453ab47273fSEdward Gillett /*  [7C]  */	INVALID,		INVALID,		TNSZ("vmovq",VEX_MX,8),	TNSZ("vmovdqu",VEX_RX,16),
1454ab47273fSEdward Gillett 
1455ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1456ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1457ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1458ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1459ab47273fSEdward Gillett 
1460ab47273fSEdward Gillett /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1461ab47273fSEdward Gillett /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1462ab47273fSEdward Gillett /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1463ab47273fSEdward Gillett /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1464ab47273fSEdward Gillett 
1465ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1466ab47273fSEdward Gillett /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1467ab47273fSEdward Gillett /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1468ab47273fSEdward Gillett /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1469ab47273fSEdward Gillett 
1470ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1471ab47273fSEdward Gillett /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1472ab47273fSEdward Gillett /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1473ab47273fSEdward Gillett /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1474ab47273fSEdward Gillett 
1475ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		TNSZ("vcmpss",VEX_RMRX,4),	INVALID,
1476ab47273fSEdward Gillett /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1477ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1478ab47273fSEdward Gillett /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1479ab47273fSEdward Gillett 
1480ab47273fSEdward Gillett /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1481ab47273fSEdward Gillett /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1482ab47273fSEdward Gillett /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1483ab47273fSEdward Gillett /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1484ab47273fSEdward Gillett 
1485ab47273fSEdward Gillett /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1486ab47273fSEdward Gillett /*  [E4]  */	INVALID,		INVALID,		TNSZ("vcvtdq2pd",VEX_MX,8),	INVALID,
1487ab47273fSEdward Gillett /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1488ab47273fSEdward Gillett /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1489ab47273fSEdward Gillett 
1490ab47273fSEdward Gillett /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1491ab47273fSEdward Gillett /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1492ab47273fSEdward Gillett /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1493ab47273fSEdward Gillett /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1494ab47273fSEdward Gillett };
149581b505b7SJerry Jelinek 
149681b505b7SJerry Jelinek /*
1497a25e615dSRobert Mustacchi  * Table for instructions with an EVEX prefix followed by 0F.
149881b505b7SJerry Jelinek  */
1499a25e615dSRobert Mustacchi const instable_t dis_opEVEX0F[256] = {
150081b505b7SJerry Jelinek /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
150181b505b7SJerry Jelinek /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
150281b505b7SJerry Jelinek /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
150381b505b7SJerry Jelinek /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
150481b505b7SJerry Jelinek 
1505a25e615dSRobert Mustacchi /*  [10]  */	TNS("vmovups",EVEX_MX),	TNS("vmovups",EVEX_RX),	INVALID,		INVALID,
150681b505b7SJerry Jelinek /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
150781b505b7SJerry Jelinek /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
150881b505b7SJerry Jelinek /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
150981b505b7SJerry Jelinek 
151081b505b7SJerry Jelinek /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
151181b505b7SJerry Jelinek /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1512a25e615dSRobert Mustacchi /*  [28]  */	TNS("vmovaps",EVEX_MX),	TNS("vmovaps",EVEX_RX),	INVALID,		INVALID,
151381b505b7SJerry Jelinek /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
151481b505b7SJerry Jelinek 
151581b505b7SJerry Jelinek /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
151681b505b7SJerry Jelinek /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
151781b505b7SJerry Jelinek /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
151881b505b7SJerry Jelinek /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
151981b505b7SJerry Jelinek 
152081b505b7SJerry Jelinek /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
152181b505b7SJerry Jelinek /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
152281b505b7SJerry Jelinek /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
152381b505b7SJerry Jelinek /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
152481b505b7SJerry Jelinek 
1525a25e615dSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1526a25e615dSRobert Mustacchi /*  [54]  */	TNS("vandps",EVEX_RMrX),TNS("vandnps",EVEX_RMrX),TNS("vorps",EVEX_RMrX),TNS("vxorps",EVEX_RMrX),
1527a25e615dSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1528a25e615dSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1529a25e615dSRobert Mustacchi 
1530a25e615dSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1531a25e615dSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1532a25e615dSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1533a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1534a25e615dSRobert Mustacchi 
1535a25e615dSRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
1536a25e615dSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1537a25e615dSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1538a25e615dSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1539a25e615dSRobert Mustacchi 
1540a25e615dSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1541a25e615dSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1542a25e615dSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1543a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1544a25e615dSRobert Mustacchi 
1545a25e615dSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1546a25e615dSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1547a25e615dSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1548a25e615dSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1549a25e615dSRobert Mustacchi 
1550a25e615dSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1551a25e615dSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1552a25e615dSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1553a25e615dSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1554a25e615dSRobert Mustacchi 
1555a25e615dSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1556a25e615dSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1557a25e615dSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1558a25e615dSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1559a25e615dSRobert Mustacchi 
1560a25e615dSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1561a25e615dSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1562a25e615dSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1563a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1564a25e615dSRobert Mustacchi 
1565a25e615dSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1566a25e615dSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1567a25e615dSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1568a25e615dSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1569a25e615dSRobert Mustacchi 
1570a25e615dSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1571a25e615dSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1572a25e615dSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1573a25e615dSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1574a25e615dSRobert Mustacchi 
1575a25e615dSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1576a25e615dSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1577a25e615dSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1578a25e615dSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1579a25e615dSRobert Mustacchi };
1580a25e615dSRobert Mustacchi 
1581a25e615dSRobert Mustacchi /*
1582a25e615dSRobert Mustacchi  * Decode tables for EVEX 66 0F
1583a25e615dSRobert Mustacchi  */
1584a25e615dSRobert Mustacchi const instable_t dis_opEVEX660F[256] = {
1585a25e615dSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1586a25e615dSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1587a25e615dSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1588a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1589a25e615dSRobert Mustacchi 
1590a25e615dSRobert Mustacchi /*  [10]  */	TNS("vmovupd",EVEX_MX),	TNS("vmovupd",EVEX_RX),	INVALID,		INVALID,
1591a25e615dSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1592a25e615dSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1593a25e615dSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1594a25e615dSRobert Mustacchi 
1595a25e615dSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1596a25e615dSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1597a25e615dSRobert Mustacchi /*  [28]  */	TNS("vmovapd",EVEX_MX),	TNS("vmovapd",EVEX_RX),	INVALID,		INVALID,
1598a25e615dSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1599a25e615dSRobert Mustacchi 
1600a25e615dSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1601a25e615dSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1602a25e615dSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1603a25e615dSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1604a25e615dSRobert Mustacchi 
1605a25e615dSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1606a25e615dSRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1607a25e615dSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1608a25e615dSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1609a25e615dSRobert Mustacchi 
1610a25e615dSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1611a25e615dSRobert Mustacchi /*  [54]  */	TNS("vandpd",EVEX_RMrX),TNS("vandnpd",EVEX_RMrX),TNS("vorpd",EVEX_RMrX),TNS("vxorpd",EVEX_RMrX),
161281b505b7SJerry Jelinek /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
161381b505b7SJerry Jelinek /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
161481b505b7SJerry Jelinek 
161581b505b7SJerry Jelinek /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
161681b505b7SJerry Jelinek /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
161781b505b7SJerry Jelinek /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1618a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqa",EVEX_MX),
161981b505b7SJerry Jelinek 
162081b505b7SJerry Jelinek /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
162181b505b7SJerry Jelinek /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
162281b505b7SJerry Jelinek /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1623a25e615dSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqa",EVEX_RX),
162481b505b7SJerry Jelinek 
162581b505b7SJerry Jelinek /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
162681b505b7SJerry Jelinek /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
162781b505b7SJerry Jelinek /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
162881b505b7SJerry Jelinek /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
162981b505b7SJerry Jelinek 
163081b505b7SJerry Jelinek /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
163181b505b7SJerry Jelinek /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
163281b505b7SJerry Jelinek /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
163381b505b7SJerry Jelinek /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
163481b505b7SJerry Jelinek 
163581b505b7SJerry Jelinek /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
163681b505b7SJerry Jelinek /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
163781b505b7SJerry Jelinek /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
163881b505b7SJerry Jelinek /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
163981b505b7SJerry Jelinek 
164081b505b7SJerry Jelinek /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
164181b505b7SJerry Jelinek /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
164281b505b7SJerry Jelinek /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
164381b505b7SJerry Jelinek /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
164481b505b7SJerry Jelinek 
164581b505b7SJerry Jelinek /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
164681b505b7SJerry Jelinek /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
164781b505b7SJerry Jelinek /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
164881b505b7SJerry Jelinek /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
164981b505b7SJerry Jelinek 
165081b505b7SJerry Jelinek /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
165181b505b7SJerry Jelinek /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1652d242cdf5SJerry Jelinek /*  [D8]  */	INVALID,		INVALID,		INVALID,		TSq("vpand",EVEX_RMrX),
1653d242cdf5SJerry Jelinek /*  [DC]  */	INVALID,		INVALID,		INVALID,		TSq("vpandn",EVEX_RMrX),
165481b505b7SJerry Jelinek 
165581b505b7SJerry Jelinek /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
165681b505b7SJerry Jelinek /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1657d242cdf5SJerry Jelinek /*  [E8]  */	INVALID,		INVALID,		INVALID,		TSq("vpor",EVEX_RMrX),
1658d242cdf5SJerry Jelinek /*  [EC]  */	INVALID,		INVALID,		INVALID,		TSq("vpxor",EVEX_RMrX),
165981b505b7SJerry Jelinek 
166081b505b7SJerry Jelinek /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
166181b505b7SJerry Jelinek /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
166281b505b7SJerry Jelinek /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
166381b505b7SJerry Jelinek /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
166481b505b7SJerry Jelinek };
166581b505b7SJerry Jelinek 
1666a25e615dSRobert Mustacchi const instable_t dis_opEVEX660F38[256] = {
1667a25e615dSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1668a25e615dSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1669a25e615dSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1670a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1671a25e615dSRobert Mustacchi 
1672a25e615dSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1673a25e615dSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1674a25e615dSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1675a25e615dSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1676a25e615dSRobert Mustacchi 
1677a25e615dSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1678a25e615dSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1679a25e615dSRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1680a25e615dSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1681a25e615dSRobert Mustacchi 
1682a25e615dSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1683a25e615dSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1684a25e615dSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1685a25e615dSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1686a25e615dSRobert Mustacchi 
1687a25e615dSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1688*8b0687e2SRobert Mustacchi /*  [44]  */	TNSSq("vplzcnt",EVEX_MBX),INVALID,		INVALID,		INVALID,
1689a25e615dSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1690a25e615dSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1691a25e615dSRobert Mustacchi 
16923863692fSRobert Mustacchi /*  [50]  */	TNSZ("vpdpbusd",EVEX_RMBrX,16),TNSZ("vpdpbusds",EVEX_RMBrX,16),TNSZ("vpdpwssd",EVEX_RMBrX,16),TNSZ("vpdpwssds",EVEX_RMBrX,16),
16933863692fSRobert Mustacchi /*  [54]  */	TNSSb("vpopcnt",EVEX_MX),TNSSq("vpopcnt",EVEX_MBX),INVALID,		INVALID,
1694a25e615dSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1695a25e615dSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1696a25e615dSRobert Mustacchi 
1697*8b0687e2SRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		TNSSb("vpexpand",EVEX_MXT1S8B),TNSSb("vpcompress",EVEX_RXT1S8B),
1698a25e615dSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1699a25e615dSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1700a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1701a25e615dSRobert Mustacchi 
1702*8b0687e2SRobert Mustacchi /*  [70]  */	TNSSb("vpshldv",EVEX_RMrX),TNSSq("vpshldv",EVEX_RMBrX),TNSSb("vpshrdv",EVEX_RMrX),TNSSq("vpshrdv",EVEX_RMBrX),
1703*8b0687e2SRobert Mustacchi /*  [74]  */	INVALID,		TNSSb("vpermi2",EVEX_RMrX),TNSSq("vpermi2",EVEX_RMBrX),TNSSd("vpermi2p",EVEX_RMBrX),
1704a25e615dSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1705*8b0687e2SRobert Mustacchi /*  [7C]  */	INVALID,		TNSSb("vpermt2",EVEX_RMrX),TNSSq("vpermt2",EVEX_RMBrX),TNSSd("vpermt2p",EVEX_RMBrX),
1706a25e615dSRobert Mustacchi 
1707*8b0687e2SRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		TNS("vpmultishiftqb",EVEX_RMBrX),
1708a25e615dSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1709a25e615dSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1710*8b0687e2SRobert Mustacchi /*  [8C]  */	INVALID,		TNSSb("vperm",EVEX_RMrX),INVALID,		TNS("vpshufbitqmb",EVEX_RMrK),
1711a25e615dSRobert Mustacchi 
1712a25e615dSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1713a25e615dSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1714a25e615dSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1715a25e615dSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1716a25e615dSRobert Mustacchi 
1717a25e615dSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1718a25e615dSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1719a25e615dSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1720a25e615dSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1721a25e615dSRobert Mustacchi 
1722a25e615dSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
17233863692fSRobert Mustacchi /*  [B4]  */	TNS("vpmadd52luq",EVEX_RMBrX),TNS("vpmadd52huq",EVEX_RMBrX),INVALID,		INVALID,
1724a25e615dSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1725a25e615dSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1726a25e615dSRobert Mustacchi 
1727a25e615dSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1728*8b0687e2SRobert Mustacchi /*  [C4]  */	TNSSq("vpconflict",EVEX_MBX),INVALID,		INVALID,		INVALID,
1729a25e615dSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1730a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		TNS("vgf2p8mulb",EVEX_RMrX),
1731a25e615dSRobert Mustacchi 
1732a25e615dSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1733a25e615dSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1734a25e615dSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1735a25e615dSRobert Mustacchi /*  [DC]  */	TNSZ("vaesenc",EVEX_RMrX,16),TNSZ("vaesenclast",EVEX_RMrX,16),TNSZ("vaesdec",EVEX_RMrX,16),TNSZ("vaesdeclast",EVEX_RMrX,16),
1736a25e615dSRobert Mustacchi 
1737a25e615dSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1738a25e615dSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1739a25e615dSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1740a25e615dSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1741a25e615dSRobert Mustacchi 
1742a25e615dSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1743a25e615dSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1744a25e615dSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1745a25e615dSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1746a25e615dSRobert Mustacchi };
1747a25e615dSRobert Mustacchi 
1748a25e615dSRobert Mustacchi const instable_t dis_opEVEX660F3A[256] = {
1749a25e615dSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1750a25e615dSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1751a25e615dSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1752a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1753a25e615dSRobert Mustacchi 
1754a25e615dSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1755a25e615dSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1756a25e615dSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1757a25e615dSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1758a25e615dSRobert Mustacchi 
1759a25e615dSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1760a25e615dSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1761a25e615dSRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1762a25e615dSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1763a25e615dSRobert Mustacchi 
1764a25e615dSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1765a25e615dSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1766a25e615dSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1767a25e615dSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1768a25e615dSRobert Mustacchi 
1769a25e615dSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1770a25e615dSRobert Mustacchi /*  [44]  */	TNSZ("vpclmulqdq",EVEX_RMRX,16),INVALID,		INVALID,		INVALID,
1771a25e615dSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1772a25e615dSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1773a25e615dSRobert Mustacchi 
1774a25e615dSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1775a25e615dSRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1776a25e615dSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1777a25e615dSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1778a25e615dSRobert Mustacchi 
1779a25e615dSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1780a25e615dSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1781a25e615dSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1782a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1783a25e615dSRobert Mustacchi 
1784*8b0687e2SRobert Mustacchi /*  [70]  */	TNSSb("vpshld",EVEX_RMRX),TNSSq("vpshld",EVEX_RMBRX),TNSSb("vpshrd",EVEX_RMRX),TNSSq("vpshrd",EVEX_RMBRX),
1785a25e615dSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1786a25e615dSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1787a25e615dSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1788a25e615dSRobert Mustacchi 
1789a25e615dSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1790a25e615dSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1791a25e615dSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1792a25e615dSRobert Mustacchi /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1793a25e615dSRobert Mustacchi 
1794a25e615dSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1795a25e615dSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1796a25e615dSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1797a25e615dSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1798a25e615dSRobert Mustacchi 
1799a25e615dSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1800a25e615dSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1801a25e615dSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1802a25e615dSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1803a25e615dSRobert Mustacchi 
1804a25e615dSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1805a25e615dSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1806a25e615dSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1807a25e615dSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1808a25e615dSRobert Mustacchi 
1809a25e615dSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1810a25e615dSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1811a25e615dSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1812a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		TNS("vgf2p8affineqb",EVEX_RMRX),TNS("vgf2p8affineinvqb",EVEX_RMRX),
1813a25e615dSRobert Mustacchi 
1814a25e615dSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1815a25e615dSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1816a25e615dSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1817a25e615dSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1818a25e615dSRobert Mustacchi 
1819a25e615dSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1820a25e615dSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1821a25e615dSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1822a25e615dSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1823a25e615dSRobert Mustacchi 
1824a25e615dSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1825a25e615dSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1826a25e615dSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1827a25e615dSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1828a25e615dSRobert Mustacchi };
1829a25e615dSRobert Mustacchi 
1830a25e615dSRobert Mustacchi 
1831a25e615dSRobert Mustacchi const instable_t dis_opEVEXF20F[256] = {
1832a25e615dSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1833a25e615dSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1834a25e615dSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1835a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1836a25e615dSRobert Mustacchi 
1837a25e615dSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
1838a25e615dSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
1839a25e615dSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
1840a25e615dSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1841a25e615dSRobert Mustacchi 
1842a25e615dSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
1843a25e615dSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
1844a25e615dSRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
1845a25e615dSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1846a25e615dSRobert Mustacchi 
1847a25e615dSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
1848a25e615dSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
1849a25e615dSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
1850a25e615dSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1851a25e615dSRobert Mustacchi 
1852a25e615dSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
1853a25e615dSRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
1854a25e615dSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
1855a25e615dSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1856a25e615dSRobert Mustacchi 
1857a25e615dSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
1858a25e615dSRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
1859a25e615dSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
1860a25e615dSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1861a25e615dSRobert Mustacchi 
1862a25e615dSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
1863a25e615dSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
1864a25e615dSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
1865a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqu",EVEX_MX),
1866a25e615dSRobert Mustacchi 
1867a25e615dSRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
1868a25e615dSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
1869a25e615dSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
1870a25e615dSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqu",EVEX_RX),
1871a25e615dSRobert Mustacchi 
1872a25e615dSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
1873a25e615dSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
1874a25e615dSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
1875a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1876a25e615dSRobert Mustacchi 
1877a25e615dSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
1878a25e615dSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
1879a25e615dSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
1880a25e615dSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
1881a25e615dSRobert Mustacchi 
1882a25e615dSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1883a25e615dSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1884a25e615dSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1885a25e615dSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1886a25e615dSRobert Mustacchi 
1887a25e615dSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1888a25e615dSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1889a25e615dSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1890a25e615dSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1891a25e615dSRobert Mustacchi 
1892a25e615dSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1893a25e615dSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1894a25e615dSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1895a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1896a25e615dSRobert Mustacchi 
1897a25e615dSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1898a25e615dSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1899a25e615dSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1900a25e615dSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1901a25e615dSRobert Mustacchi 
1902a25e615dSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1903a25e615dSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1904a25e615dSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1905a25e615dSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1906a25e615dSRobert Mustacchi 
1907a25e615dSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
1908a25e615dSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
1909a25e615dSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
1910a25e615dSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
1911a25e615dSRobert Mustacchi };
1912a25e615dSRobert Mustacchi 
19133863692fSRobert Mustacchi const instable_t dis_opEVEXF20F38[256] = {
19143863692fSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
19153863692fSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
19163863692fSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
19173863692fSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19183863692fSRobert Mustacchi 
19193863692fSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
19203863692fSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
19213863692fSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
19223863692fSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19233863692fSRobert Mustacchi 
19243863692fSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
19253863692fSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
19263863692fSRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
19273863692fSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19283863692fSRobert Mustacchi 
19293863692fSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
19303863692fSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
19313863692fSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
19323863692fSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19333863692fSRobert Mustacchi 
19343863692fSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
19353863692fSRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
19363863692fSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
19373863692fSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19383863692fSRobert Mustacchi 
19393863692fSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
19403863692fSRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
19413863692fSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
19423863692fSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19433863692fSRobert Mustacchi 
19443863692fSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
19453863692fSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
19463863692fSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
19473863692fSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19483863692fSRobert Mustacchi 
19493863692fSRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		TNS("vcvtneps2bf16",EVEX_RMBrX),INVALID,
19503863692fSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
19513863692fSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
19523863692fSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19533863692fSRobert Mustacchi 
19543863692fSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
19553863692fSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
19563863692fSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
19573863692fSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19583863692fSRobert Mustacchi 
19593863692fSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
19603863692fSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
19613863692fSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
19623863692fSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
19633863692fSRobert Mustacchi 
19643863692fSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19653863692fSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19663863692fSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19673863692fSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19683863692fSRobert Mustacchi 
19693863692fSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19703863692fSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19713863692fSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19723863692fSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19733863692fSRobert Mustacchi 
19743863692fSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19753863692fSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19763863692fSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19773863692fSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19783863692fSRobert Mustacchi 
19793863692fSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19803863692fSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19813863692fSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19823863692fSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19833863692fSRobert Mustacchi 
19843863692fSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19853863692fSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19863863692fSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19873863692fSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19883863692fSRobert Mustacchi 
19893863692fSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
19903863692fSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
19913863692fSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
19923863692fSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
19933863692fSRobert Mustacchi };
19943863692fSRobert Mustacchi 
1995a25e615dSRobert Mustacchi const instable_t dis_opEVEXF30F[256] = {
1996a25e615dSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
1997a25e615dSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
1998a25e615dSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
1999a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2000a25e615dSRobert Mustacchi 
2001a25e615dSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
2002a25e615dSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
2003a25e615dSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
2004a25e615dSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2005a25e615dSRobert Mustacchi 
2006a25e615dSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
2007a25e615dSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
2008a25e615dSRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
2009a25e615dSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2010a25e615dSRobert Mustacchi 
2011a25e615dSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
2012a25e615dSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
2013a25e615dSRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
2014a25e615dSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2015a25e615dSRobert Mustacchi 
2016a25e615dSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
2017a25e615dSRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
2018a25e615dSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
2019a25e615dSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2020a25e615dSRobert Mustacchi 
2021a25e615dSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
2022a25e615dSRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
2023a25e615dSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
2024a25e615dSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2025a25e615dSRobert Mustacchi 
2026a25e615dSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
2027a25e615dSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2028a25e615dSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2029a25e615dSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqu",EVEX_MX),
2030a25e615dSRobert Mustacchi 
2031a25e615dSRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2032a25e615dSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
2033a25e615dSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
2034a25e615dSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		TNS("vmovdqu",EVEX_RX),
2035a25e615dSRobert Mustacchi 
2036a25e615dSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
2037a25e615dSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2038a25e615dSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2039a25e615dSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2040a25e615dSRobert Mustacchi 
2041a25e615dSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
2042a25e615dSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
2043a25e615dSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
2044a25e615dSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2045a25e615dSRobert Mustacchi 
2046a25e615dSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2047a25e615dSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2048a25e615dSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2049a25e615dSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2050a25e615dSRobert Mustacchi 
2051a25e615dSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2052a25e615dSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2053a25e615dSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2054a25e615dSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2055a25e615dSRobert Mustacchi 
2056a25e615dSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2057a25e615dSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2058a25e615dSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2059a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2060a25e615dSRobert Mustacchi 
2061a25e615dSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2062a25e615dSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2063a25e615dSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2064a25e615dSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2065a25e615dSRobert Mustacchi 
2066a25e615dSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2067a25e615dSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2068a25e615dSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2069a25e615dSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2070a25e615dSRobert Mustacchi 
2071a25e615dSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2072a25e615dSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2073a25e615dSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2074a25e615dSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2075a25e615dSRobert Mustacchi };
20763863692fSRobert Mustacchi 
20773863692fSRobert Mustacchi const instable_t dis_opEVEXF30F38[256] = {
20783863692fSRobert Mustacchi /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
20793863692fSRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
20803863692fSRobert Mustacchi /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
20813863692fSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
20823863692fSRobert Mustacchi 
20833863692fSRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
20843863692fSRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		INVALID,		INVALID,
20853863692fSRobert Mustacchi /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
20863863692fSRobert Mustacchi /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
20873863692fSRobert Mustacchi 
20883863692fSRobert Mustacchi /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
20893863692fSRobert Mustacchi /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
2090*8b0687e2SRobert Mustacchi /*  [28]  */	INVALID,		INVALID,		TNSSq("vpbroadcastmb2",EVEX_KR),INVALID,
20913863692fSRobert Mustacchi /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
20923863692fSRobert Mustacchi 
20933863692fSRobert Mustacchi /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
20943863692fSRobert Mustacchi /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
2095*8b0687e2SRobert Mustacchi /*  [38]  */	INVALID,		INVALID,		TNSSq("vpbroadcastmw2",EVEX_KR),INVALID,
20963863692fSRobert Mustacchi /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
20973863692fSRobert Mustacchi 
20983863692fSRobert Mustacchi /*  [40]  */	INVALID,		INVALID,		INVALID,		INVALID,
20993863692fSRobert Mustacchi /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
21003863692fSRobert Mustacchi /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
21013863692fSRobert Mustacchi /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21023863692fSRobert Mustacchi 
21033863692fSRobert Mustacchi /*  [50]  */	INVALID,		INVALID,		TNS("vdpbf16ps",EVEX_RMBrX),INVALID,
21043863692fSRobert Mustacchi /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
21053863692fSRobert Mustacchi /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
21063863692fSRobert Mustacchi /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21073863692fSRobert Mustacchi 
21083863692fSRobert Mustacchi /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
21093863692fSRobert Mustacchi /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
21103863692fSRobert Mustacchi /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
21113863692fSRobert Mustacchi /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21123863692fSRobert Mustacchi 
21133863692fSRobert Mustacchi /*  [70]  */	INVALID,		INVALID,		TNS("vcvtneps2bf16",EVEX_MBX),INVALID,
21143863692fSRobert Mustacchi /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
21153863692fSRobert Mustacchi /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
21163863692fSRobert Mustacchi /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21173863692fSRobert Mustacchi 
21183863692fSRobert Mustacchi /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
21193863692fSRobert Mustacchi /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
21203863692fSRobert Mustacchi /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
21213863692fSRobert Mustacchi /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21223863692fSRobert Mustacchi 
21233863692fSRobert Mustacchi /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
21243863692fSRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
21253863692fSRobert Mustacchi /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
21263863692fSRobert Mustacchi /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
21273863692fSRobert Mustacchi 
21283863692fSRobert Mustacchi /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21293863692fSRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21303863692fSRobert Mustacchi /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21313863692fSRobert Mustacchi /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21323863692fSRobert Mustacchi 
21333863692fSRobert Mustacchi /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21343863692fSRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21353863692fSRobert Mustacchi /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21363863692fSRobert Mustacchi /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21373863692fSRobert Mustacchi 
21383863692fSRobert Mustacchi /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21393863692fSRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21403863692fSRobert Mustacchi /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21413863692fSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21423863692fSRobert Mustacchi 
21433863692fSRobert Mustacchi /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21443863692fSRobert Mustacchi /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21453863692fSRobert Mustacchi /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21463863692fSRobert Mustacchi /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21473863692fSRobert Mustacchi 
21483863692fSRobert Mustacchi /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21493863692fSRobert Mustacchi /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21503863692fSRobert Mustacchi /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21513863692fSRobert Mustacchi /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21523863692fSRobert Mustacchi 
21533863692fSRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
21543863692fSRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
21553863692fSRobert Mustacchi /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
21563863692fSRobert Mustacchi /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
21573863692fSRobert Mustacchi };
21583863692fSRobert Mustacchi 
21593863692fSRobert Mustacchi 
216082d5eb48SKrishnendu Sadhukhan - Sun Microsystems /*
216182d5eb48SKrishnendu Sadhukhan - Sun Microsystems  * The following two tables are used to encode crc32 and movbe
216282d5eb48SKrishnendu Sadhukhan - Sun Microsystems  * since they share the same opcodes.
216382d5eb48SKrishnendu Sadhukhan - Sun Microsystems  */
216482d5eb48SKrishnendu Sadhukhan - Sun Microsystems const instable_t dis_op0F38F0[2] = {
216582d5eb48SKrishnendu Sadhukhan - Sun Microsystems /*  [00]  */	TNS("crc32b",CRC32),
216682d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		TS("movbe",MOVBE),
216782d5eb48SKrishnendu Sadhukhan - Sun Microsystems };
216882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 
216982d5eb48SKrishnendu Sadhukhan - Sun Microsystems const instable_t dis_op0F38F1[2] = {
217082d5eb48SKrishnendu Sadhukhan - Sun Microsystems /*  [00]  */	TS("crc32",CRC32),
217182d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		TS("movbe",MOVBE),
217282d5eb48SKrishnendu Sadhukhan - Sun Microsystems };
217382d5eb48SKrishnendu Sadhukhan - Sun Microsystems 
21748889c875SRobert Mustacchi /*
21758889c875SRobert Mustacchi  * The following table is used to distinguish between adox and adcx which share
21768889c875SRobert Mustacchi  * the same opcodes.
21778889c875SRobert Mustacchi  */
21788889c875SRobert Mustacchi const instable_t dis_op0F38F6[2] = {
21798889c875SRobert Mustacchi /*  [00]  */	TNS("adcx",ADX),
21808889c875SRobert Mustacchi 		TNS("adox",ADX),
21818889c875SRobert Mustacchi };
21828889c875SRobert Mustacchi 
2183d0f8ff6eSkk const instable_t dis_op0F38[256] = {
2184d0f8ff6eSkk /*  [00]  */	TNSZ("pshufb",XMM_66o,16),TNSZ("phaddw",XMM_66o,16),TNSZ("phaddd",XMM_66o,16),TNSZ("phaddsw",XMM_66o,16),
2185d0f8ff6eSkk /*  [04]  */	TNSZ("pmaddubsw",XMM_66o,16),TNSZ("phsubw",XMM_66o,16),	TNSZ("phsubd",XMM_66o,16),TNSZ("phsubsw",XMM_66o,16),
2186d0f8ff6eSkk /*  [08]  */	TNSZ("psignb",XMM_66o,16),TNSZ("psignw",XMM_66o,16),TNSZ("psignd",XMM_66o,16),TNSZ("pmulhrsw",XMM_66o,16),
2187d0f8ff6eSkk /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2188d0f8ff6eSkk 
2189d0f8ff6eSkk /*  [10]  */	TNSZ("pblendvb",XMM_66r,16),INVALID,		INVALID,		INVALID,
2190d0f8ff6eSkk /*  [14]  */	TNSZ("blendvps",XMM_66r,16),TNSZ("blendvpd",XMM_66r,16),INVALID,	TNSZ("ptest",XMM_66r,16),
2191d0f8ff6eSkk /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
2192d0f8ff6eSkk /*  [1C]  */	TNSZ("pabsb",XMM_66o,16),TNSZ("pabsw",XMM_66o,16),TNSZ("pabsd",XMM_66o,16),INVALID,
2193d0f8ff6eSkk 
2194d0f8ff6eSkk /*  [20]  */	TNSZ("pmovsxbw",XMM_66r,16),TNSZ("pmovsxbd",XMM_66r,16),TNSZ("pmovsxbq",XMM_66r,16),TNSZ("pmovsxwd",XMM_66r,16),
2195d0f8ff6eSkk /*  [24]  */	TNSZ("pmovsxwq",XMM_66r,16),TNSZ("pmovsxdq",XMM_66r,16),INVALID,	INVALID,
2196d0f8ff6eSkk /*  [28]  */	TNSZ("pmuldq",XMM_66r,16),TNSZ("pcmpeqq",XMM_66r,16),TNSZ("movntdqa",XMMM_66r,16),TNSZ("packusdw",XMM_66r,16),
2197d0f8ff6eSkk /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2198d0f8ff6eSkk 
2199d0f8ff6eSkk /*  [30]  */	TNSZ("pmovzxbw",XMM_66r,16),TNSZ("pmovzxbd",XMM_66r,16),TNSZ("pmovzxbq",XMM_66r,16),TNSZ("pmovzxwd",XMM_66r,16),
2200d0f8ff6eSkk /*  [34]  */	TNSZ("pmovzxwq",XMM_66r,16),TNSZ("pmovzxdq",XMM_66r,16),INVALID,	TNSZ("pcmpgtq",XMM_66r,16),
2201d0f8ff6eSkk /*  [38]  */	TNSZ("pminsb",XMM_66r,16),TNSZ("pminsd",XMM_66r,16),TNSZ("pminuw",XMM_66r,16),TNSZ("pminud",XMM_66r,16),
2202d0f8ff6eSkk /*  [3C]  */	TNSZ("pmaxsb",XMM_66r,16),TNSZ("pmaxsd",XMM_66r,16),TNSZ("pmaxuw",XMM_66r,16),TNSZ("pmaxud",XMM_66r,16),
2203d0f8ff6eSkk 
2204d0f8ff6eSkk /*  [40]  */	TNSZ("pmulld",XMM_66r,16),TNSZ("phminposuw",XMM_66r,16),INVALID,	INVALID,
2205d0f8ff6eSkk /*  [44]  */	INVALID,		INVALID,		INVALID,		INVALID,
2206d0f8ff6eSkk /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
2207d0f8ff6eSkk /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2208d0f8ff6eSkk 
2209d0f8ff6eSkk /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
2210d0f8ff6eSkk /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
2211d0f8ff6eSkk /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
2212d0f8ff6eSkk /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2213d0f8ff6eSkk 
2214d0f8ff6eSkk /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
2215d0f8ff6eSkk /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2216d0f8ff6eSkk /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2217d0f8ff6eSkk /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2218d0f8ff6eSkk 
2219d0f8ff6eSkk /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2220d0f8ff6eSkk /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
2221d0f8ff6eSkk /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
2222d0f8ff6eSkk /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2223d0f8ff6eSkk 
22241872b0b5SAndriy Gapon /*  [80]  */	TNSy("invept", RM_66r),	TNSy("invvpid", RM_66r),TNSy("invpcid", RM_66r),INVALID,
2225d0f8ff6eSkk /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2226d0f8ff6eSkk /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2227d0f8ff6eSkk /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2228d0f8ff6eSkk 
2229d0f8ff6eSkk /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
2230d0f8ff6eSkk /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
2231d0f8ff6eSkk /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
2232d0f8ff6eSkk /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2233d0f8ff6eSkk 
2234d0f8ff6eSkk /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2235d0f8ff6eSkk /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2236d0f8ff6eSkk /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2237d0f8ff6eSkk /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2238d0f8ff6eSkk 
2239d0f8ff6eSkk /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2240d0f8ff6eSkk /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2241d0f8ff6eSkk /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2242d0f8ff6eSkk /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2243d0f8ff6eSkk 
2244d0f8ff6eSkk /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2245d0f8ff6eSkk /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
224681293f93SRobert Mustacchi /*  [C8]  */	TNSZ("sha1nexte",XMM,16),TNSZ("sha1msg1",XMM,16),TNSZ("sha1msg2",XMM,16),TNSZ("sha256rnds2",XMM,16),
2247a25e615dSRobert Mustacchi /*  [CC]  */	TNSZ("sha256msg1",XMM,16),TNSZ("sha256msg2",XMM,16),INVALID,		TNS("gf2p8mulb",XMM_66r),
2248d0f8ff6eSkk 
2249d0f8ff6eSkk /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2250d0f8ff6eSkk /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2251a2426e09SKuriakose Kuruvilla /*  [D8]  */	INVALID,		INVALID,		INVALID,		TNSZ("aesimc",XMM_66r,16),
2252a2426e09SKuriakose Kuruvilla /*  [DC]  */	TNSZ("aesenc",XMM_66r,16),TNSZ("aesenclast",XMM_66r,16),TNSZ("aesdec",XMM_66r,16),TNSZ("aesdeclast",XMM_66r,16),
2253d0f8ff6eSkk 
2254d0f8ff6eSkk /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2255d0f8ff6eSkk /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2256d0f8ff6eSkk /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2257d0f8ff6eSkk /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
225882d5eb48SKrishnendu Sadhukhan - Sun Microsystems /*  [F0]  */	IND(dis_op0F38F0),	IND(dis_op0F38F1),	INVALID,		INVALID,
22598889c875SRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		IND(dis_op0F38F6),	INVALID,
2260fb2cb638SRobert Mustacchi /*  [F8]  */	TNS("movdir64b",MOVDIR),TNS("movdiri",RM),	INVALID,		INVALID,
2261d0f8ff6eSkk /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2262d0f8ff6eSkk };
2263d0f8ff6eSkk 
2264ab47273fSEdward Gillett const instable_t dis_opAVX660F38[256] = {
2265ab47273fSEdward Gillett /*  [00]  */	TNSZ("vpshufb",VEX_RMrX,16),TNSZ("vphaddw",VEX_RMrX,16),TNSZ("vphaddd",VEX_RMrX,16),TNSZ("vphaddsw",VEX_RMrX,16),
2266ab47273fSEdward Gillett /*  [04]  */	TNSZ("vpmaddubsw",VEX_RMrX,16),TNSZ("vphsubw",VEX_RMrX,16),	TNSZ("vphsubd",VEX_RMrX,16),TNSZ("vphsubsw",VEX_RMrX,16),
2267ab47273fSEdward Gillett /*  [08]  */	TNSZ("vpsignb",VEX_RMrX,16),TNSZ("vpsignw",VEX_RMrX,16),TNSZ("vpsignd",VEX_RMrX,16),TNSZ("vpmulhrsw",VEX_RMrX,16),
2268ab47273fSEdward Gillett /*  [0C]  */	TNSZ("vpermilps",VEX_RMrX,8),TNSZ("vpermilpd",VEX_RMrX,16),TNSZ("vtestps",VEX_RRI,8),	TNSZ("vtestpd",VEX_RRI,16),
2269ab47273fSEdward Gillett 
2270ebb8ac07SRobert Mustacchi /*  [10]  */	INVALID,		INVALID,		INVALID,		TNSZ("vcvtph2ps",VEX_MX,16),
2271245ac945SRobert Mustacchi /*  [14]  */	INVALID,		INVALID,		TNSZ("vpermps",VEX_RMrX,16),TNSZ("vptest",VEX_RRI,16),
2272ab47273fSEdward Gillett /*  [18]  */	TNSZ("vbroadcastss",VEX_MX,4),TNSZ("vbroadcastsd",VEX_MX,8),TNSZ("vbroadcastf128",VEX_MX,16),INVALID,
2273ab47273fSEdward Gillett /*  [1C]  */	TNSZ("vpabsb",VEX_MX,16),TNSZ("vpabsw",VEX_MX,16),TNSZ("vpabsd",VEX_MX,16),INVALID,
2274ab47273fSEdward Gillett 
2275ab47273fSEdward Gillett /*  [20]  */	TNSZ("vpmovsxbw",VEX_MX,16),TNSZ("vpmovsxbd",VEX_MX,16),TNSZ("vpmovsxbq",VEX_MX,16),TNSZ("vpmovsxwd",VEX_MX,16),
2276ab47273fSEdward Gillett /*  [24]  */	TNSZ("vpmovsxwq",VEX_MX,16),TNSZ("vpmovsxdq",VEX_MX,16),INVALID,	INVALID,
2277ab47273fSEdward Gillett /*  [28]  */	TNSZ("vpmuldq",VEX_RMrX,16),TNSZ("vpcmpeqq",VEX_RMrX,16),TNSZ("vmovntdqa",VEX_MX,16),TNSZ("vpackusdw",VEX_RMrX,16),
2278ab47273fSEdward Gillett /*  [2C]  */	TNSZ("vmaskmovps",VEX_RMrX,8),TNSZ("vmaskmovpd",VEX_RMrX,16),TNSZ("vmaskmovps",VEX_RRM,8),TNSZ("vmaskmovpd",VEX_RRM,16),
2279ab47273fSEdward Gillett 
2280ab47273fSEdward Gillett /*  [30]  */	TNSZ("vpmovzxbw",VEX_MX,16),TNSZ("vpmovzxbd",VEX_MX,16),TNSZ("vpmovzxbq",VEX_MX,16),TNSZ("vpmovzxwd",VEX_MX,16),
2281245ac945SRobert Mustacchi /*  [34]  */	TNSZ("vpmovzxwq",VEX_MX,16),TNSZ("vpmovzxdq",VEX_MX,16),TNSZ("vpermd",VEX_RMrX,16),TNSZ("vpcmpgtq",VEX_RMrX,16),
2282ab47273fSEdward Gillett /*  [38]  */	TNSZ("vpminsb",VEX_RMrX,16),TNSZ("vpminsd",VEX_RMrX,16),TNSZ("vpminuw",VEX_RMrX,16),TNSZ("vpminud",VEX_RMrX,16),
2283ab47273fSEdward Gillett /*  [3C]  */	TNSZ("vpmaxsb",VEX_RMrX,16),TNSZ("vpmaxsd",VEX_RMrX,16),TNSZ("vpmaxuw",VEX_RMrX,16),TNSZ("vpmaxud",VEX_RMrX,16),
2284ab47273fSEdward Gillett 
2285ab47273fSEdward Gillett /*  [40]  */	TNSZ("vpmulld",VEX_RMrX,16),TNSZ("vphminposuw",VEX_MX,16),INVALID,	INVALID,
2286245ac945SRobert Mustacchi /*  [44]  */	INVALID,		TSaZ("vpsrlv",VEX_RMrX,16),TNSZ("vpsravd",VEX_RMrX,16),TSaZ("vpsllv",VEX_RMrX,16),
2287ab47273fSEdward Gillett /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
2288ab47273fSEdward Gillett /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2289ab47273fSEdward Gillett 
2290ab47273fSEdward Gillett /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
2291ab47273fSEdward Gillett /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
2292245ac945SRobert Mustacchi /*  [58]  */	TNSZ("vpbroadcastd",VEX_MX,16),TNSZ("vpbroadcastq",VEX_MX,16),TNSZ("vbroadcasti128",VEX_MX,16),INVALID,
2293ab47273fSEdward Gillett /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2294ab47273fSEdward Gillett 
2295ab47273fSEdward Gillett /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
2296ab47273fSEdward Gillett /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2297ab47273fSEdward Gillett /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2298ab47273fSEdward Gillett /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2299ab47273fSEdward Gillett 
2300ab47273fSEdward Gillett /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2301ab47273fSEdward Gillett /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
2302245ac945SRobert Mustacchi /*  [78]  */	TNSZ("vpbroadcastb",VEX_MX,16),TNSZ("vpbroadcastw",VEX_MX,16),INVALID,	INVALID,
2303ab47273fSEdward Gillett /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2304ab47273fSEdward Gillett 
2305ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
2306ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2307ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2308245ac945SRobert Mustacchi /*  [8C]  */	TSaZ("vpmaskmov",VEX_RMrX,16),INVALID,		TSaZ("vpmaskmov",VEX_RRM,16),INVALID,
2309ab47273fSEdward Gillett 
2310245ac945SRobert Mustacchi /*  [90]  */	TNSZ("vpgatherd",VEX_SbVM,16),TNSZ("vpgatherq",VEX_SbVM,16),TNSZ("vgatherdp",VEX_SbVM,16),TNSZ("vgatherqp",VEX_SbVM,16),
2311245ac945SRobert Mustacchi /*  [94]  */	INVALID,		INVALID,		TNSZ("vfmaddsub132p",FMA,16),TNSZ("vfmsubadd132p",FMA,16),
2312245ac945SRobert Mustacchi /*  [98]  */	TNSZ("vfmadd132p",FMA,16),TNSZ("vfmadd132s",FMA,16),TNSZ("vfmsub132p",FMA,16),TNSZ("vfmsub132s",FMA,16),
2313245ac945SRobert Mustacchi /*  [9C]  */	TNSZ("vfnmadd132p",FMA,16),TNSZ("vfnmadd132s",FMA,16),TNSZ("vfnmsub132p",FMA,16),TNSZ("vfnmsub132s",FMA,16),
2314ab47273fSEdward Gillett 
2315ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2316245ac945SRobert Mustacchi /*  [A4]  */	INVALID,		INVALID,		TNSZ("vfmaddsub213p",FMA,16),TNSZ("vfmsubadd213p",FMA,16),
2317245ac945SRobert Mustacchi /*  [A8]  */	TNSZ("vfmadd213p",FMA,16),TNSZ("vfmadd213s",FMA,16),TNSZ("vfmsub213p",FMA,16),TNSZ("vfmsub213s",FMA,16),
2318245ac945SRobert Mustacchi /*  [AC]  */	TNSZ("vfnmadd213p",FMA,16),TNSZ("vfnmadd213s",FMA,16),TNSZ("vfnmsub213p",FMA,16),TNSZ("vfnmsub213s",FMA,16),
2319ab47273fSEdward Gillett 
2320ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2321245ac945SRobert Mustacchi /*  [B4]  */	INVALID,		INVALID,		TNSZ("vfmaddsub231p",FMA,16),TNSZ("vfmsubadd231p",FMA,16),
2322245ac945SRobert Mustacchi /*  [B8]  */	TNSZ("vfmadd231p",FMA,16),TNSZ("vfmadd231s",FMA,16),TNSZ("vfmsub231p",FMA,16),TNSZ("vfmsub231s",FMA,16),
2323245ac945SRobert Mustacchi /*  [BC]  */	TNSZ("vfnmadd231p",FMA,16),TNSZ("vfnmadd231s",FMA,16),TNSZ("vfnmsub231p",FMA,16),TNSZ("vfnmsub231s",FMA,16),
2324ab47273fSEdward Gillett 
2325ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2326ab47273fSEdward Gillett /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2327ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2328a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		INVALID,		TNS("vgf2p8mulb",VEX_RMrX),
2329ab47273fSEdward Gillett 
2330ab47273fSEdward Gillett /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2331ab47273fSEdward Gillett /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2332ab47273fSEdward Gillett /*  [D8]  */	INVALID,		INVALID,		INVALID,		TNSZ("vaesimc",VEX_MX,16),
2333ab47273fSEdward Gillett /*  [DC]  */	TNSZ("vaesenc",VEX_RMrX,16),TNSZ("vaesenclast",VEX_RMrX,16),TNSZ("vaesdec",VEX_RMrX,16),TNSZ("vaesdeclast",VEX_RMrX,16),
2334ab47273fSEdward Gillett 
2335ab47273fSEdward Gillett /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2336ab47273fSEdward Gillett /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2337ab47273fSEdward Gillett /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2338ab47273fSEdward Gillett /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2339ab47273fSEdward Gillett /*  [F0]  */	IND(dis_op0F38F0),	IND(dis_op0F38F1),	INVALID,		INVALID,
2340245ac945SRobert Mustacchi /*  [F4]  */	INVALID,		INVALID,		INVALID,		TNSZvr("shlx",VEX_VRMrX,5),
2341ab47273fSEdward Gillett /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2342ab47273fSEdward Gillett /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2343ab47273fSEdward Gillett };
2344ab47273fSEdward Gillett 
2345d0f8ff6eSkk const instable_t dis_op0F3A[256] = {
2346d0f8ff6eSkk /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
2347d0f8ff6eSkk /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
2348d0f8ff6eSkk /*  [08]  */	TNSZ("roundps",XMMP_66r,16),TNSZ("roundpd",XMMP_66r,16),TNSZ("roundss",XMMP_66r,16),TNSZ("roundsd",XMMP_66r,16),
2349d0f8ff6eSkk /*  [0C]  */	TNSZ("blendps",XMMP_66r,16),TNSZ("blendpd",XMMP_66r,16),TNSZ("pblendw",XMMP_66r,16),TNSZ("palignr",XMMP_66o,16),
2350d0f8ff6eSkk 
2351d0f8ff6eSkk /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
2352d0f8ff6eSkk /*  [14]  */	TNSZ("pextrb",XMM3PM_66r,8),TNSZ("pextrw",XMM3PM_66r,16),TSZ("pextr",XMM3PM_66r,16),TNSZ("extractps",XMM3PM_66r,16),
2353d0f8ff6eSkk /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
2354d0f8ff6eSkk /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2355d0f8ff6eSkk 
2356d0f8ff6eSkk /*  [20]  */	TNSZ("pinsrb",XMMPRM_66r,8),TNSZ("insertps",XMMP_66r,16),TSZ("pinsr",XMMPRM_66r,16),INVALID,
2357d0f8ff6eSkk /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
2358d0f8ff6eSkk /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
2359d0f8ff6eSkk /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2360d0f8ff6eSkk 
2361d0f8ff6eSkk /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
2362d0f8ff6eSkk /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
2363d0f8ff6eSkk /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
2364d0f8ff6eSkk /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2365d0f8ff6eSkk 
2366d0f8ff6eSkk /*  [40]  */	TNSZ("dpps",XMMP_66r,16),TNSZ("dppd",XMMP_66r,16),TNSZ("mpsadbw",XMMP_66r,16),INVALID,
2367a2426e09SKuriakose Kuruvilla /*  [44]  */	TNSZ("pclmulqdq",XMMP_66r,16),INVALID,		INVALID,		INVALID,
2368d0f8ff6eSkk /*  [48]  */	INVALID,		INVALID,		INVALID,		INVALID,
2369d0f8ff6eSkk /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2370d0f8ff6eSkk 
2371d0f8ff6eSkk /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
2372d0f8ff6eSkk /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
2373d0f8ff6eSkk /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
2374d0f8ff6eSkk /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2375d0f8ff6eSkk 
2376d0f8ff6eSkk /*  [60]  */	TNSZ("pcmpestrm",XMMP_66r,16),TNSZ("pcmpestri",XMMP_66r,16),TNSZ("pcmpistrm",XMMP_66r,16),TNSZ("pcmpistri",XMMP_66r,16),
2377d0f8ff6eSkk /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2378d0f8ff6eSkk /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2379d0f8ff6eSkk /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2380d0f8ff6eSkk 
2381d0f8ff6eSkk /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2382d0f8ff6eSkk /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
2383d0f8ff6eSkk /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
2384d0f8ff6eSkk /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2385d0f8ff6eSkk 
2386d0f8ff6eSkk /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
2387d0f8ff6eSkk /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2388d0f8ff6eSkk /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2389d0f8ff6eSkk /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2390d0f8ff6eSkk 
2391d0f8ff6eSkk /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
2392d0f8ff6eSkk /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
2393d0f8ff6eSkk /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
2394d0f8ff6eSkk /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2395d0f8ff6eSkk 
2396d0f8ff6eSkk /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2397d0f8ff6eSkk /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2398d0f8ff6eSkk /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2399d0f8ff6eSkk /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2400d0f8ff6eSkk 
2401d0f8ff6eSkk /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2402d0f8ff6eSkk /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2403d0f8ff6eSkk /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2404d0f8ff6eSkk /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2405d0f8ff6eSkk 
2406d0f8ff6eSkk /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2407d0f8ff6eSkk /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2408d0f8ff6eSkk /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2409a25e615dSRobert Mustacchi /*  [CC]  */	TNSZ("sha1rnds4",XMMP,16),INVALID,		TNS("gf2p8affineqb",XMMP_66r),TNS("gf2p8affineinvqb",XMMP_66r),
2410d0f8ff6eSkk 
2411d0f8ff6eSkk /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2412d0f8ff6eSkk /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2413d0f8ff6eSkk /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2414a2426e09SKuriakose Kuruvilla /*  [DC]  */	INVALID,		INVALID,		INVALID,		TNSZ("aeskeygenassist",XMMP_66r,16),
2415d0f8ff6eSkk 
2416d0f8ff6eSkk /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2417d0f8ff6eSkk /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2418d0f8ff6eSkk /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2419d0f8ff6eSkk /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2420d0f8ff6eSkk 
2421d0f8ff6eSkk /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2422d0f8ff6eSkk /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2423d0f8ff6eSkk /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2424d0f8ff6eSkk /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2425d0f8ff6eSkk };
2426d0f8ff6eSkk 
2427ab47273fSEdward Gillett const instable_t dis_opAVX660F3A[256] = {
2428245ac945SRobert Mustacchi /*  [00]  */	TNSZ("vpermq",VEX_MXI,16),TNSZ("vpermpd",VEX_MXI,16),TNSZ("vpblendd",VEX_RMRX,16),INVALID,
2429ab47273fSEdward Gillett /*  [04]  */	TNSZ("vpermilps",VEX_MXI,8),TNSZ("vpermilpd",VEX_MXI,16),TNSZ("vperm2f128",VEX_RMRX,16),INVALID,
2430ab47273fSEdward Gillett /*  [08]  */	TNSZ("vroundps",VEX_MXI,16),TNSZ("vroundpd",VEX_MXI,16),TNSZ("vroundss",VEX_RMRX,16),TNSZ("vroundsd",VEX_RMRX,16),
2431ab47273fSEdward Gillett /*  [0C]  */	TNSZ("vblendps",VEX_RMRX,16),TNSZ("vblendpd",VEX_RMRX,16),TNSZ("vpblendw",VEX_RMRX,16),TNSZ("vpalignr",VEX_RMRX,16),
2432ab47273fSEdward Gillett 
2433ab47273fSEdward Gillett /*  [10]  */	INVALID,		INVALID,		INVALID,		INVALID,
2434ab47273fSEdward Gillett /*  [14]  */	TNSZ("vpextrb",VEX_RRi,8),TNSZ("vpextrw",VEX_RRi,16),TNSZ("vpextrd",VEX_RRi,16),TNSZ("vextractps",VEX_RM,16),
2435ab47273fSEdward Gillett /*  [18]  */	TNSZ("vinsertf128",VEX_RMRX,16),TNSZ("vextractf128",VEX_RX,16),INVALID,		INVALID,
2436ebb8ac07SRobert Mustacchi /*  [1C]  */	INVALID,		TNSZ("vcvtps2ph",VEX_RX,16),		INVALID,		INVALID,
2437ab47273fSEdward Gillett 
2438ab47273fSEdward Gillett /*  [20]  */	TNSZ("vpinsrb",VEX_RMRX,8),TNSZ("vinsertps",VEX_RMRX,16),TNSZ("vpinsrd",VEX_RMRX,16),INVALID,
2439ab47273fSEdward Gillett /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
2440ab47273fSEdward Gillett /*  [28]  */	INVALID,		INVALID,		INVALID,		INVALID,
2441ab47273fSEdward Gillett /*  [2C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2442ab47273fSEdward Gillett 
2443a4e73d5dSJerry Jelinek /*  [30]  */	TSvo("kshiftr",VEX_MXI),	TSvo("kshiftr",VEX_MXI),	TSvo("kshiftl",VEX_MXI),	TSvo("kshiftl",VEX_MXI),
2444ab47273fSEdward Gillett /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
2445245ac945SRobert Mustacchi /*  [38]  */	TNSZ("vinserti128",VEX_RMRX,16),TNSZ("vextracti128",VEX_RIM,16),INVALID,		INVALID,
2446ab47273fSEdward Gillett /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2447ab47273fSEdward Gillett 
2448ab47273fSEdward Gillett /*  [40]  */	TNSZ("vdpps",VEX_RMRX,16),TNSZ("vdppd",VEX_RMRX,16),TNSZ("vmpsadbw",VEX_RMRX,16),INVALID,
2449245ac945SRobert Mustacchi /*  [44]  */	TNSZ("vpclmulqdq",VEX_RMRX,16),INVALID,		TNSZ("vperm2i128",VEX_RMRX,16),INVALID,
2450ab47273fSEdward Gillett /*  [48]  */	INVALID,		INVALID,		TNSZ("vblendvps",VEX_RMRX,8),	TNSZ("vblendvpd",VEX_RMRX,16),
2451ab47273fSEdward Gillett /*  [4C]  */	TNSZ("vpblendvb",VEX_RMRX,16),INVALID,		INVALID,		INVALID,
2452ab47273fSEdward Gillett 
2453ab47273fSEdward Gillett /*  [50]  */	INVALID,		INVALID,		INVALID,		INVALID,
2454ab47273fSEdward Gillett /*  [54]  */	INVALID,		INVALID,		INVALID,		INVALID,
2455ab47273fSEdward Gillett /*  [58]  */	INVALID,		INVALID,		INVALID,		INVALID,
2456ab47273fSEdward Gillett /*  [5C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2457ab47273fSEdward Gillett 
2458ab47273fSEdward Gillett /*  [60]  */	TNSZ("vpcmpestrm",VEX_MXI,16),TNSZ("vpcmpestri",VEX_MXI,16),TNSZ("vpcmpistrm",VEX_MXI,16),TNSZ("vpcmpistri",VEX_MXI,16),
2459ab47273fSEdward Gillett /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2460ab47273fSEdward Gillett /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2461ab47273fSEdward Gillett /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2462ab47273fSEdward Gillett 
2463ab47273fSEdward Gillett /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2464ab47273fSEdward Gillett /*  [74]  */	INVALID,		INVALID,		INVALID,		INVALID,
2465ab47273fSEdward Gillett /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
2466ab47273fSEdward Gillett /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2467ab47273fSEdward Gillett 
2468ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
2469ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2470ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2471ab47273fSEdward Gillett /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2472ab47273fSEdward Gillett 
2473ab47273fSEdward Gillett /*  [90]  */	INVALID,		INVALID,		INVALID,		INVALID,
2474ab47273fSEdward Gillett /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
2475ab47273fSEdward Gillett /*  [98]  */	INVALID,		INVALID,		INVALID,		INVALID,
2476ab47273fSEdward Gillett /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2477ab47273fSEdward Gillett 
2478ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2479ab47273fSEdward Gillett /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2480ab47273fSEdward Gillett /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2481ab47273fSEdward Gillett /*  [AC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2482ab47273fSEdward Gillett 
2483ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2484ab47273fSEdward Gillett /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2485ab47273fSEdward Gillett /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2486ab47273fSEdward Gillett /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2487ab47273fSEdward Gillett 
2488ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2489ab47273fSEdward Gillett /*  [C4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2490ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2491a25e615dSRobert Mustacchi /*  [CC]  */	INVALID,		INVALID,		TNS("vgf2p8affineqb",VEX_RMRX),TNS("vgf2p8affineinvqb",VEX_RMRX),
2492ab47273fSEdward Gillett 
2493ab47273fSEdward Gillett /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2494ab47273fSEdward Gillett /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2495ab47273fSEdward Gillett /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2496ab47273fSEdward Gillett /*  [DC]  */	INVALID,		INVALID,		INVALID,		TNSZ("vaeskeygenassist",VEX_MXI,16),
2497ab47273fSEdward Gillett 
2498ab47273fSEdward Gillett /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2499ab47273fSEdward Gillett /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2500ab47273fSEdward Gillett /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2501ab47273fSEdward Gillett /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2502ab47273fSEdward Gillett 
2503ab47273fSEdward Gillett /*  [F0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2504ab47273fSEdward Gillett /*  [F4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2505ab47273fSEdward Gillett /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2506ab47273fSEdward Gillett /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2507ab47273fSEdward Gillett };
2508ab47273fSEdward Gillett 
25098889c875SRobert Mustacchi /*
2510cff040f3SRobert Mustacchi  *	Decode table for 0x0F0D which uses the first byte of the mod_rm to
2511cff040f3SRobert Mustacchi  *	indicate a sub-code.
25128889c875SRobert Mustacchi  */
25138889c875SRobert Mustacchi const instable_t dis_op0F0D[8] = {
2514fb2cb638SRobert Mustacchi /*  [00]  */	TNS("prefetch",PREF),	TNS("prefetchw",PREF),	TNS("prefetchwt1",PREF),INVALID,
25158889c875SRobert Mustacchi /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
25168889c875SRobert Mustacchi };
25178889c875SRobert Mustacchi 
25187c478bd9Sstevel@tonic-gate /*
25197c478bd9Sstevel@tonic-gate  *	Decode table for 0x0F opcodes
25207c478bd9Sstevel@tonic-gate  */
25217c478bd9Sstevel@tonic-gate 
25227c478bd9Sstevel@tonic-gate const instable_t dis_op0F[16][16] = {
25237c478bd9Sstevel@tonic-gate {
25247c478bd9Sstevel@tonic-gate /*  [00]  */	IND(dis_op0F00),	IND(dis_op0F01),	TNS("lar",MR),		TNS("lsl",MR),
25257c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		TNS("syscall",NORM),	TNS("clts",NORM),	TNS("sysret",NORM),
25267c478bd9Sstevel@tonic-gate /*  [08]  */	TNS("invd",NORM),	TNS("wbinvd",NORM),	INVALID,		TNS("ud2",NORM),
25278889c875SRobert Mustacchi /*  [0C]  */	INVALID,		IND(dis_op0F0D),	INVALID,		INVALID,
25287c478bd9Sstevel@tonic-gate }, {
25297c478bd9Sstevel@tonic-gate /*  [10]  */	TNSZ("movups",XMMO,16),	TNSZ("movups",XMMOS,16),TNSZ("movlps",XMMO,8),	TNSZ("movlps",XMMOS,8),
25307c478bd9Sstevel@tonic-gate /*  [14]  */	TNSZ("unpcklps",XMMO,16),TNSZ("unpckhps",XMMO,16),TNSZ("movhps",XMMOM,8),TNSZ("movhps",XMMOMS,8),
25317c478bd9Sstevel@tonic-gate /*  [18]  */	IND(dis_op0F18),	INVALID,		INVALID,		INVALID,
2532ab1416efSBryan Cantrill /*  [1C]  */	INVALID,		INVALID,		INVALID,		TS("nop",Mw),
25337c478bd9Sstevel@tonic-gate }, {
25347c478bd9Sstevel@tonic-gate /*  [20]  */	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),
25357c478bd9Sstevel@tonic-gate /*  [24]  */	TSx("mov",SREG),	INVALID,		TSx("mov",SREG),	INVALID,
25367c478bd9Sstevel@tonic-gate /*  [28]  */	TNSZ("movaps",XMMO,16),	TNSZ("movaps",XMMOS,16),TNSZ("cvtpi2ps",XMMOMX,8),TNSZ("movntps",XMMOS,16),
25377c478bd9Sstevel@tonic-gate /*  [2C]  */	TNSZ("cvttps2pi",XMMOXMM,8),TNSZ("cvtps2pi",XMMOXMM,8),TNSZ("ucomiss",XMMO,4),TNSZ("comiss",XMMO,4),
25387c478bd9Sstevel@tonic-gate }, {
25397c478bd9Sstevel@tonic-gate /*  [30]  */	TNS("wrmsr",NORM),	TNS("rdtsc",NORM),	TNS("rdmsr",NORM),	TNS("rdpmc",NORM),
2540959b2dfdSRobert Mustacchi /*  [34]  */	TNS("sysenter",NORM),	TNS("sysexit",NORM),	INVALID,		INVALID,
25417c478bd9Sstevel@tonic-gate /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
25427c478bd9Sstevel@tonic-gate /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
25437c478bd9Sstevel@tonic-gate }, {
25447c478bd9Sstevel@tonic-gate /*  [40]  */	TS("cmovx.o",MR),	TS("cmovx.no",MR),	TS("cmovx.b",MR),	TS("cmovx.ae",MR),
25457c478bd9Sstevel@tonic-gate /*  [44]  */	TS("cmovx.e",MR),	TS("cmovx.ne",MR),	TS("cmovx.be",MR),	TS("cmovx.a",MR),
25467c478bd9Sstevel@tonic-gate /*  [48]  */	TS("cmovx.s",MR),	TS("cmovx.ns",MR),	TS("cmovx.pe",MR),	TS("cmovx.po",MR),
25477c478bd9Sstevel@tonic-gate /*  [4C]  */	TS("cmovx.l",MR),	TS("cmovx.ge",MR),	TS("cmovx.le",MR),	TS("cmovx.g",MR),
25487c478bd9Sstevel@tonic-gate }, {
25497c478bd9Sstevel@tonic-gate /*  [50]  */	TNS("movmskps",XMMOX3),	TNSZ("sqrtps",XMMO,16),	TNSZ("rsqrtps",XMMO,16),TNSZ("rcpps",XMMO,16),
25507c478bd9Sstevel@tonic-gate /*  [54]  */	TNSZ("andps",XMMO,16),	TNSZ("andnps",XMMO,16),	TNSZ("orps",XMMO,16),	TNSZ("xorps",XMMO,16),
25517c478bd9Sstevel@tonic-gate /*  [58]  */	TNSZ("addps",XMMO,16),	TNSZ("mulps",XMMO,16),	TNSZ("cvtps2pd",XMMO,8),TNSZ("cvtdq2ps",XMMO,16),
25527c478bd9Sstevel@tonic-gate /*  [5C]  */	TNSZ("subps",XMMO,16),	TNSZ("minps",XMMO,16),	TNSZ("divps",XMMO,16),	TNSZ("maxps",XMMO,16),
25537c478bd9Sstevel@tonic-gate }, {
25547c478bd9Sstevel@tonic-gate /*  [60]  */	TNSZ("punpcklbw",MMO,4),TNSZ("punpcklwd",MMO,4),TNSZ("punpckldq",MMO,4),TNSZ("packsswb",MMO,8),
25557c478bd9Sstevel@tonic-gate /*  [64]  */	TNSZ("pcmpgtb",MMO,8),	TNSZ("pcmpgtw",MMO,8),	TNSZ("pcmpgtd",MMO,8),	TNSZ("packuswb",MMO,8),
25567c478bd9Sstevel@tonic-gate /*  [68]  */	TNSZ("punpckhbw",MMO,8),TNSZ("punpckhwd",MMO,8),TNSZ("punpckhdq",MMO,8),TNSZ("packssdw",MMO,8),
25577c478bd9Sstevel@tonic-gate /*  [6C]  */	TNSZ("INVALID",MMO,0),	TNSZ("INVALID",MMO,0),	TNSZ("movd",MMO,4),	TNSZ("movq",MMO,8),
25587c478bd9Sstevel@tonic-gate }, {
25597c478bd9Sstevel@tonic-gate /*  [70]  */	TNSZ("pshufw",MMOPM,8),	TNS("psrXXX",MR),	TNS("psrXXX",MR),	TNS("psrXXX",MR),
25607c478bd9Sstevel@tonic-gate /*  [74]  */	TNSZ("pcmpeqb",MMO,8),	TNSZ("pcmpeqw",MMO,8),	TNSZ("pcmpeqd",MMO,8),	TNS("emms",NORM),
25617aa76ffcSBryan Cantrill /*  [78]  */	TNSy("vmread",RM),	TNSy("vmwrite",MR),	INVALID,		INVALID,
25627c478bd9Sstevel@tonic-gate /*  [7C]  */	INVALID,		INVALID,		TNSZ("movd",MMOS,4),	TNSZ("movq",MMOS,8),
25637c478bd9Sstevel@tonic-gate }, {
25647c478bd9Sstevel@tonic-gate /*  [80]  */	TNS("jo",D),		TNS("jno",D),		TNS("jb",D),		TNS("jae",D),
25657c478bd9Sstevel@tonic-gate /*  [84]  */	TNS("je",D),		TNS("jne",D),		TNS("jbe",D),		TNS("ja",D),
25667c478bd9Sstevel@tonic-gate /*  [88]  */	TNS("js",D),		TNS("jns",D),		TNS("jp",D),		TNS("jnp",D),
25677c478bd9Sstevel@tonic-gate /*  [8C]  */	TNS("jl",D),		TNS("jge",D),		TNS("jle",D),		TNS("jg",D),
25687c478bd9Sstevel@tonic-gate }, {
25697c478bd9Sstevel@tonic-gate /*  [90]  */	TNS("seto",Mb),		TNS("setno",Mb),	TNS("setb",Mb),		TNS("setae",Mb),
25707c478bd9Sstevel@tonic-gate /*  [94]  */	TNS("sete",Mb),		TNS("setne",Mb),	TNS("setbe",Mb),	TNS("seta",Mb),
25717c478bd9Sstevel@tonic-gate /*  [98]  */	TNS("sets",Mb),		TNS("setns",Mb),	TNS("setp",Mb),		TNS("setnp",Mb),
25727c478bd9Sstevel@tonic-gate /*  [9C]  */	TNS("setl",Mb),		TNS("setge",Mb),	TNS("setle",Mb),	TNS("setg",Mb),
25737c478bd9Sstevel@tonic-gate }, {
25747c478bd9Sstevel@tonic-gate /*  [A0]  */	TSp("push",LSEG),	TSp("pop",LSEG),	TNS("cpuid",NORM),	TS("bt",RMw),
25757c478bd9Sstevel@tonic-gate /*  [A4]  */	TS("shld",DSHIFT),	TS("shld",DSHIFTcl),	INVALID,		INVALID,
25767c478bd9Sstevel@tonic-gate /*  [A8]  */	TSp("push",LSEG),	TSp("pop",LSEG),	TNS("rsm",NORM),	TS("bts",RMw),
25777c478bd9Sstevel@tonic-gate /*  [AC]  */	TS("shrd",DSHIFT),	TS("shrd",DSHIFTcl),	IND(dis_op0FAE),	TS("imul",MRw),
25787c478bd9Sstevel@tonic-gate }, {
25797c478bd9Sstevel@tonic-gate /*  [B0]  */	TNS("cmpxchgb",RMw),	TS("cmpxchg",RMw),	TS("lss",MR),		TS("btr",RMw),
25807c478bd9Sstevel@tonic-gate /*  [B4]  */	TS("lfs",MR),		TS("lgs",MR),		TS("movzb",MOVZ),	TNS("movzwl",MOVZ),
2581f8801251Skk /*  [B8]  */	TNS("INVALID",MRw),	INVALID,		IND(dis_op0FBA),	TS("btc",RMw),
25827c478bd9Sstevel@tonic-gate /*  [BC]  */	TS("bsf",MRw),		TS("bsr",MRw),		TS("movsb",MOVZ),	TNS("movswl",MOVZ),
25837c478bd9Sstevel@tonic-gate }, {
25847c478bd9Sstevel@tonic-gate /*  [C0]  */	TNS("xaddb",XADDB),	TS("xadd",RMw),		TNSZ("cmpps",XMMOPM,16),TNS("movnti",RM),
2585cff040f3SRobert Mustacchi /*  [C4]  */	TNSZ("pinsrw",MMOPRM,2),TNS("pextrw",MMO3P),	TNSZ("shufps",XMMOPM,16),IND(dis_op0FC7),
25867c478bd9Sstevel@tonic-gate /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
25877c478bd9Sstevel@tonic-gate /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
25887c478bd9Sstevel@tonic-gate }, {
25897c478bd9Sstevel@tonic-gate /*  [D0]  */	INVALID,		TNSZ("psrlw",MMO,8),	TNSZ("psrld",MMO,8),	TNSZ("psrlq",MMO,8),
25907c478bd9Sstevel@tonic-gate /*  [D4]  */	TNSZ("paddq",MMO,8),	TNSZ("pmullw",MMO,8),	TNSZ("INVALID",MMO,0),	TNS("pmovmskb",MMOM3),
25917c478bd9Sstevel@tonic-gate /*  [D8]  */	TNSZ("psubusb",MMO,8),	TNSZ("psubusw",MMO,8),	TNSZ("pminub",MMO,8),	TNSZ("pand",MMO,8),
25927c478bd9Sstevel@tonic-gate /*  [DC]  */	TNSZ("paddusb",MMO,8),	TNSZ("paddusw",MMO,8),	TNSZ("pmaxub",MMO,8),	TNSZ("pandn",MMO,8),
25937c478bd9Sstevel@tonic-gate }, {
25947c478bd9Sstevel@tonic-gate /*  [E0]  */	TNSZ("pavgb",MMO,8),	TNSZ("psraw",MMO,8),	TNSZ("psrad",MMO,8),	TNSZ("pavgw",MMO,8),
25957c478bd9Sstevel@tonic-gate /*  [E4]  */	TNSZ("pmulhuw",MMO,8),	TNSZ("pmulhw",MMO,8),	TNS("INVALID",XMMO),	TNSZ("movntq",MMOMS,8),
25967c478bd9Sstevel@tonic-gate /*  [E8]  */	TNSZ("psubsb",MMO,8),	TNSZ("psubsw",MMO,8),	TNSZ("pminsw",MMO,8),	TNSZ("por",MMO,8),
25977c478bd9Sstevel@tonic-gate /*  [EC]  */	TNSZ("paddsb",MMO,8),	TNSZ("paddsw",MMO,8),	TNSZ("pmaxsw",MMO,8),	TNSZ("pxor",MMO,8),
25987c478bd9Sstevel@tonic-gate }, {
25997c478bd9Sstevel@tonic-gate /*  [F0]  */	INVALID,		TNSZ("psllw",MMO,8),	TNSZ("pslld",MMO,8),	TNSZ("psllq",MMO,8),
26007c478bd9Sstevel@tonic-gate /*  [F4]  */	TNSZ("pmuludq",MMO,8),	TNSZ("pmaddwd",MMO,8),	TNSZ("psadbw",MMO,8),	TNSZ("maskmovq",MMOIMPL,8),
26017c478bd9Sstevel@tonic-gate /*  [F8]  */	TNSZ("psubb",MMO,8),	TNSZ("psubw",MMO,8),	TNSZ("psubd",MMO,8),	TNSZ("psubq",MMO,8),
26027c478bd9Sstevel@tonic-gate /*  [FC]  */	TNSZ("paddb",MMO,8),	TNSZ("paddw",MMO,8),	TNSZ("paddd",MMO,8),	INVALID,
26037c478bd9Sstevel@tonic-gate } };
26047c478bd9Sstevel@tonic-gate 
2605ab47273fSEdward Gillett const instable_t dis_opAVX0F[16][16] = {
2606ab47273fSEdward Gillett {
2607ab47273fSEdward Gillett /*  [00]  */	INVALID,		INVALID,		INVALID,		INVALID,
2608ab47273fSEdward Gillett /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
2609ab47273fSEdward Gillett /*  [08]  */	INVALID,		INVALID,		INVALID,		INVALID,
2610ab47273fSEdward Gillett /*  [0C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2611ab47273fSEdward Gillett }, {
2612ab47273fSEdward Gillett /*  [10]  */	TNSZ("vmovups",VEX_MX,16),	TNSZ("vmovups",VEX_RM,16),TNSZ("vmovlps",VEX_RMrX,8),	TNSZ("vmovlps",VEX_RM,8),
2613ab47273fSEdward Gillett /*  [14]  */	TNSZ("vunpcklps",VEX_RMrX,16),TNSZ("vunpckhps",VEX_RMrX,16),TNSZ("vmovhps",VEX_RMrX,8),TNSZ("vmovhps",VEX_RM,8),
2614ab47273fSEdward Gillett /*  [18]  */	INVALID,		INVALID,		INVALID,		INVALID,
2615ab47273fSEdward Gillett /*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2616ab47273fSEdward Gillett }, {
2617ab47273fSEdward Gillett /*  [20]  */	INVALID,		INVALID,		INVALID,		INVALID,
2618ab47273fSEdward Gillett /*  [24]  */	INVALID,		INVALID,		INVALID,		INVALID,
2619ab47273fSEdward Gillett /*  [28]  */	TNSZ("vmovaps",VEX_MX,16),	TNSZ("vmovaps",VEX_RX,16),INVALID,		TNSZ("vmovntps",VEX_RM,16),
2620ab47273fSEdward Gillett /*  [2C]  */	INVALID,		INVALID,		TNSZ("vucomiss",VEX_MX,4),TNSZ("vcomiss",VEX_MX,4),
2621ab47273fSEdward Gillett }, {
2622ab47273fSEdward Gillett /*  [30]  */	INVALID,		INVALID,		INVALID,		INVALID,
2623ab47273fSEdward Gillett /*  [34]  */	INVALID,		INVALID,		INVALID,		INVALID,
2624ab47273fSEdward Gillett /*  [38]  */	INVALID,		INVALID,		INVALID,		INVALID,
2625ab47273fSEdward Gillett /*  [3C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2626ab47273fSEdward Gillett }, {
2627a4e73d5dSJerry Jelinek /*  [40]  */	INVALID,		TSvo("kand",VEX_RMX),	TSvo("kandn",VEX_RMX),		INVALID,
2628a4e73d5dSJerry Jelinek /*  [44]  */	TSvo("knot",VEX_MX),	TSvo("kor",VEX_RMX),	TSvo("kxnor",VEX_RMX),		TSvo("kxor",VEX_RMX),
2629a4e73d5dSJerry Jelinek /*  [48]  */	INVALID,		INVALID,		TSvo("kadd",VEX_RMX),		TSvo("kunpck",VEX_RMX),
2630ab47273fSEdward Gillett /*  [4C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2631ab47273fSEdward Gillett }, {
2632ab47273fSEdward Gillett /*  [50]  */	TNS("vmovmskps",VEX_MR),	TNSZ("vsqrtps",VEX_MX,16),	TNSZ("vrsqrtps",VEX_MX,16),TNSZ("vrcpps",VEX_MX,16),
2633ab47273fSEdward Gillett /*  [54]  */	TNSZ("vandps",VEX_RMrX,16),	TNSZ("vandnps",VEX_RMrX,16),	TNSZ("vorps",VEX_RMrX,16),	TNSZ("vxorps",VEX_RMrX,16),
2634ab47273fSEdward Gillett /*  [58]  */	TNSZ("vaddps",VEX_RMrX,16),	TNSZ("vmulps",VEX_RMrX,16),	TNSZ("vcvtps2pd",VEX_MX,8),TNSZ("vcvtdq2ps",VEX_MX,16),
2635ab47273fSEdward Gillett /*  [5C]  */	TNSZ("vsubps",VEX_RMrX,16),	TNSZ("vminps",VEX_RMrX,16),	TNSZ("vdivps",VEX_RMrX,16),	TNSZ("vmaxps",VEX_RMrX,16),
2636ab47273fSEdward Gillett }, {
2637ab47273fSEdward Gillett /*  [60]  */	INVALID,		INVALID,		INVALID,		INVALID,
2638ab47273fSEdward Gillett /*  [64]  */	INVALID,		INVALID,		INVALID,		INVALID,
2639ab47273fSEdward Gillett /*  [68]  */	INVALID,		INVALID,		INVALID,		INVALID,
2640ab47273fSEdward Gillett /*  [6C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2641ab47273fSEdward Gillett }, {
2642ab47273fSEdward Gillett /*  [70]  */	INVALID,		INVALID,		INVALID,		INVALID,
2643ab47273fSEdward Gillett /*  [74]  */	INVALID,		INVALID,		INVALID,		TNS("vzeroupper", VEX_NONE),
2644ab47273fSEdward Gillett /*  [78]  */	INVALID,		INVALID,		INVALID,		INVALID,
2645ab47273fSEdward Gillett /*  [7C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2646ab47273fSEdward Gillett }, {
2647ab47273fSEdward Gillett /*  [80]  */	INVALID,		INVALID,		INVALID,		INVALID,
2648ab47273fSEdward Gillett /*  [84]  */	INVALID,		INVALID,		INVALID,		INVALID,
2649ab47273fSEdward Gillett /*  [88]  */	INVALID,		INVALID,		INVALID,		INVALID,
2650ab47273fSEdward Gillett /*  [8C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2651ab47273fSEdward Gillett }, {
2652a4e73d5dSJerry Jelinek /*  [90]  */	TSvo("kmov",VEX_KRM),	TSvo("kmov",VEX_KMR),	TSvo("kmov",VEX_KRR),		TSvo("kmov",VEX_MR),
2653ab47273fSEdward Gillett /*  [94]  */	INVALID,		INVALID,		INVALID,		INVALID,
2654a4e73d5dSJerry Jelinek /*  [98]  */	TSvo("kortest",VEX_MX),	TSvo("ktest",VEX_MX),	INVALID,		INVALID,
2655ab47273fSEdward Gillett /*  [9C]  */	INVALID,		INVALID,		INVALID,		INVALID,
2656ab47273fSEdward Gillett }, {
2657ab47273fSEdward Gillett /*  [A0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2658ab47273fSEdward Gillett /*  [A4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2659ab47273fSEdward Gillett /*  [A8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2660ab47273fSEdward Gillett /*  [AC]  */	INVALID,		INVALID,		TNSZ("vldmxcsr",VEX_MO,2),		INVALID,
2661ab47273fSEdward Gillett }, {
2662ab47273fSEdward Gillett /*  [B0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2663ab47273fSEdward Gillett /*  [B4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2664ab47273fSEdward Gillett /*  [B8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2665ab47273fSEdward Gillett /*  [BC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2666ab47273fSEdward Gillett }, {
2667ab47273fSEdward Gillett /*  [C0]  */	INVALID,		INVALID,		TNSZ("vcmpps",VEX_RMRX,16),INVALID,
2668cff040f3SRobert Mustacchi /*  [C4]  */	INVALID,		INVALID,		TNSZ("vshufps",VEX_RMRX,16),INVALID,
2669ab47273fSEdward Gillett /*  [C8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2670ab47273fSEdward Gillett /*  [CC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2671ab47273fSEdward Gillett }, {
2672ab47273fSEdward Gillett /*  [D0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2673ab47273fSEdward Gillett /*  [D4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2674ab47273fSEdward Gillett /*  [D8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2675ab47273fSEdward Gillett /*  [DC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2676ab47273fSEdward Gillett }, {
2677ab47273fSEdward Gillett /*  [E0]  */	INVALID,		INVALID,		INVALID,		INVALID,
2678ab47273fSEdward Gillett /*  [E4]  */	INVALID,		INVALID,		INVALID,		INVALID,
2679ab47273fSEdward Gillett /*  [E8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2680ab47273fSEdward Gillett /*  [EC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2681ab47273fSEdward Gillett }, {
2682245ac945SRobert Mustacchi /*  [F0]  */	INVALID,		INVALID,		TNSZvr("andn",VEX_RMrX,5),TNSZvr("bls",BLS,5),
2683245ac945SRobert Mustacchi /*  [F4]  */	INVALID,		TNSZvr("bzhi",VEX_VRMrX,5),INVALID,		TNSZvr("bextr",VEX_VRMrX,5),
2684ab47273fSEdward Gillett /*  [F8]  */	INVALID,		INVALID,		INVALID,		INVALID,
2685ab47273fSEdward Gillett /*  [FC]  */	INVALID,		INVALID,		INVALID,		INVALID,
2686ab47273fSEdward Gillett } };
26877c478bd9Sstevel@tonic-gate 
26887c478bd9Sstevel@tonic-gate /*
26897c478bd9Sstevel@tonic-gate  *	Decode table for 0x80 opcodes
26907c478bd9Sstevel@tonic-gate  */
26917c478bd9Sstevel@tonic-gate 
26927c478bd9Sstevel@tonic-gate const instable_t dis_op80[8] = {
26937c478bd9Sstevel@tonic-gate 
26947c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("addb",IMlw),	TNS("orb",IMw),		TNS("adcb",IMlw),	TNS("sbbb",IMlw),
26957c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("andb",IMw),	TNS("subb",IMlw),	TNS("xorb",IMw),	TNS("cmpb",IMlw),
26967c478bd9Sstevel@tonic-gate };
26977c478bd9Sstevel@tonic-gate 
26987c478bd9Sstevel@tonic-gate 
26997c478bd9Sstevel@tonic-gate /*
27007c478bd9Sstevel@tonic-gate  *	Decode table for 0x81 opcodes.
27017c478bd9Sstevel@tonic-gate  */
27027c478bd9Sstevel@tonic-gate 
27037c478bd9Sstevel@tonic-gate const instable_t dis_op81[8] = {
27047c478bd9Sstevel@tonic-gate 
27057c478bd9Sstevel@tonic-gate /*  [0]  */	TS("add",IMlw),		TS("or",IMw),		TS("adc",IMlw),		TS("sbb",IMlw),
27067c478bd9Sstevel@tonic-gate /*  [4]  */	TS("and",IMw),		TS("sub",IMlw),		TS("xor",IMw),		TS("cmp",IMlw),
27077c478bd9Sstevel@tonic-gate };
27087c478bd9Sstevel@tonic-gate 
27097c478bd9Sstevel@tonic-gate 
27107c478bd9Sstevel@tonic-gate /*
27117c478bd9Sstevel@tonic-gate  *	Decode table for 0x82 opcodes.
27127c478bd9Sstevel@tonic-gate  */
27137c478bd9Sstevel@tonic-gate 
27147c478bd9Sstevel@tonic-gate const instable_t dis_op82[8] = {
27157c478bd9Sstevel@tonic-gate 
27167c478bd9Sstevel@tonic-gate /*  [0]  */	TNSx("addb",IMlw),	TNSx("orb",IMlw),	TNSx("adcb",IMlw),	TNSx("sbbb",IMlw),
27177c478bd9Sstevel@tonic-gate /*  [4]  */	TNSx("andb",IMlw),	TNSx("subb",IMlw),	TNSx("xorb",IMlw),	TNSx("cmpb",IMlw),
27187c478bd9Sstevel@tonic-gate };
27197c478bd9Sstevel@tonic-gate /*
27207c478bd9Sstevel@tonic-gate  *	Decode table for 0x83 opcodes.
27217c478bd9Sstevel@tonic-gate  */
27227c478bd9Sstevel@tonic-gate 
27237c478bd9Sstevel@tonic-gate const instable_t dis_op83[8] = {
27247c478bd9Sstevel@tonic-gate 
27257c478bd9Sstevel@tonic-gate /*  [0]  */	TS("add",IMlw),		TS("or",IMlw),		TS("adc",IMlw),		TS("sbb",IMlw),
27267c478bd9Sstevel@tonic-gate /*  [4]  */	TS("and",IMlw),		TS("sub",IMlw),		TS("xor",IMlw),		TS("cmp",IMlw),
27277c478bd9Sstevel@tonic-gate };
27287c478bd9Sstevel@tonic-gate 
27297c478bd9Sstevel@tonic-gate /*
27307c478bd9Sstevel@tonic-gate  *	Decode table for 0xC0 opcodes.
27317c478bd9Sstevel@tonic-gate  */
27327c478bd9Sstevel@tonic-gate 
27337c478bd9Sstevel@tonic-gate const instable_t dis_opC0[8] = {
27347c478bd9Sstevel@tonic-gate 
27357c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("rolb",MvI),	TNS("rorb",MvI),	TNS("rclb",MvI),	TNS("rcrb",MvI),
27367c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("shlb",MvI),	TNS("shrb",MvI),	INVALID,		TNS("sarb",MvI),
27377c478bd9Sstevel@tonic-gate };
27387c478bd9Sstevel@tonic-gate 
27397c478bd9Sstevel@tonic-gate /*
27407c478bd9Sstevel@tonic-gate  *	Decode table for 0xD0 opcodes.
27417c478bd9Sstevel@tonic-gate  */
27427c478bd9Sstevel@tonic-gate 
27437c478bd9Sstevel@tonic-gate const instable_t dis_opD0[8] = {
27447c478bd9Sstevel@tonic-gate 
27457c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("rolb",Mv),		TNS("rorb",Mv),		TNS("rclb",Mv),		TNS("rcrb",Mv),
27467c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("shlb",Mv),		TNS("shrb",Mv),		TNS("salb",Mv),		TNS("sarb",Mv),
27477c478bd9Sstevel@tonic-gate };
27487c478bd9Sstevel@tonic-gate 
27497c478bd9Sstevel@tonic-gate /*
27507c478bd9Sstevel@tonic-gate  *	Decode table for 0xC1 opcodes.
27517c478bd9Sstevel@tonic-gate  *	186 instruction set
27527c478bd9Sstevel@tonic-gate  */
27537c478bd9Sstevel@tonic-gate 
27547c478bd9Sstevel@tonic-gate const instable_t dis_opC1[8] = {
27557c478bd9Sstevel@tonic-gate 
27567c478bd9Sstevel@tonic-gate /*  [0]  */	TS("rol",MvI),		TS("ror",MvI),		TS("rcl",MvI),		TS("rcr",MvI),
27577c478bd9Sstevel@tonic-gate /*  [4]  */	TS("shl",MvI),		TS("shr",MvI),		TS("sal",MvI),		TS("sar",MvI),
27587c478bd9Sstevel@tonic-gate };
27597c478bd9Sstevel@tonic-gate 
27607c478bd9Sstevel@tonic-gate /*
27617c478bd9Sstevel@tonic-gate  *	Decode table for 0xD1 opcodes.
27627c478bd9Sstevel@tonic-gate  */
27637c478bd9Sstevel@tonic-gate 
27647c478bd9Sstevel@tonic-gate const instable_t dis_opD1[8] = {
27657c478bd9Sstevel@tonic-gate 
27667c478bd9Sstevel@tonic-gate /*  [0]  */	TS("rol",Mv),		TS("ror",Mv),		TS("rcl",Mv),		TS("rcr",Mv),
27677c478bd9Sstevel@tonic-gate /*  [4]  */	TS("shl",Mv),		TS("shr",Mv),		TS("sal",Mv),		TS("sar",Mv),
27687c478bd9Sstevel@tonic-gate };
27697c478bd9Sstevel@tonic-gate 
27707c478bd9Sstevel@tonic-gate 
27717c478bd9Sstevel@tonic-gate /*
27727c478bd9Sstevel@tonic-gate  *	Decode table for 0xD2 opcodes.
27737c478bd9Sstevel@tonic-gate  */
27747c478bd9Sstevel@tonic-gate 
27757c478bd9Sstevel@tonic-gate const instable_t dis_opD2[8] = {
27767c478bd9Sstevel@tonic-gate 
27777c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("rolb",Mv),		TNS("rorb",Mv),		TNS("rclb",Mv),		TNS("rcrb",Mv),
27787c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("shlb",Mv),		TNS("shrb",Mv),		TNS("salb",Mv),		TNS("sarb",Mv),
27797c478bd9Sstevel@tonic-gate };
27807c478bd9Sstevel@tonic-gate /*
27817c478bd9Sstevel@tonic-gate  *	Decode table for 0xD3 opcodes.
27827c478bd9Sstevel@tonic-gate  */
27837c478bd9Sstevel@tonic-gate 
27847c478bd9Sstevel@tonic-gate const instable_t dis_opD3[8] = {
27857c478bd9Sstevel@tonic-gate 
27867c478bd9Sstevel@tonic-gate /*  [0]  */	TS("rol",Mv),		TS("ror",Mv),		TS("rcl",Mv),		TS("rcr",Mv),
27877c478bd9Sstevel@tonic-gate /*  [4]  */	TS("shl",Mv),		TS("shr",Mv),		TS("salb",Mv),		TS("sar",Mv),
27887c478bd9Sstevel@tonic-gate };
27897c478bd9Sstevel@tonic-gate 
27907c478bd9Sstevel@tonic-gate 
27917c478bd9Sstevel@tonic-gate /*
27927c478bd9Sstevel@tonic-gate  *	Decode table for 0xF6 opcodes.
27937c478bd9Sstevel@tonic-gate  */
27947c478bd9Sstevel@tonic-gate 
27957c478bd9Sstevel@tonic-gate const instable_t dis_opF6[8] = {
27967c478bd9Sstevel@tonic-gate 
27977c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("testb",IMw),	TNS("testb",IMw),	TNS("notb",Mw),		TNS("negb",Mw),
27987c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("mulb",MA),		TNS("imulb",MA),	TNS("divb",MA),		TNS("idivb",MA),
27997c478bd9Sstevel@tonic-gate };
28007c478bd9Sstevel@tonic-gate 
28017c478bd9Sstevel@tonic-gate 
28027c478bd9Sstevel@tonic-gate /*
28037c478bd9Sstevel@tonic-gate  *	Decode table for 0xF7 opcodes.
28047c478bd9Sstevel@tonic-gate  */
28057c478bd9Sstevel@tonic-gate 
28067c478bd9Sstevel@tonic-gate const instable_t dis_opF7[8] = {
28077c478bd9Sstevel@tonic-gate 
28087c478bd9Sstevel@tonic-gate /*  [0]  */	TS("test",IMw),		TS("test",IMw),		TS("not",Mw),		TS("neg",Mw),
28097c478bd9Sstevel@tonic-gate /*  [4]  */	TS("mul",MA),		TS("imul",MA),		TS("div",MA),		TS("idiv",MA),
28107c478bd9Sstevel@tonic-gate };
28117c478bd9Sstevel@tonic-gate 
28127c478bd9Sstevel@tonic-gate 
28137c478bd9Sstevel@tonic-gate /*
28147c478bd9Sstevel@tonic-gate  *	Decode table for 0xFE opcodes.
28157c478bd9Sstevel@tonic-gate  */
28167c478bd9Sstevel@tonic-gate 
28177c478bd9Sstevel@tonic-gate const instable_t dis_opFE[8] = {
28187c478bd9Sstevel@tonic-gate 
28197c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("incb",Mw),		TNS("decb",Mw),		INVALID,		INVALID,
28207c478bd9Sstevel@tonic-gate /*  [4]  */	INVALID,		INVALID,		INVALID,		INVALID,
28217c478bd9Sstevel@tonic-gate };
28227c478bd9Sstevel@tonic-gate /*
28237c478bd9Sstevel@tonic-gate  *	Decode table for 0xFF opcodes.
28247c478bd9Sstevel@tonic-gate  */
28257c478bd9Sstevel@tonic-gate 
28267c478bd9Sstevel@tonic-gate const instable_t dis_opFF[8] = {
28277c478bd9Sstevel@tonic-gate 
28287c478bd9Sstevel@tonic-gate /*  [0]  */	TS("inc",Mw),		TS("dec",Mw),		TNSyp("call",INM),	TNS("lcall",INM),
28297c478bd9Sstevel@tonic-gate /*  [4]  */	TNSy("jmp",INM),	TNS("ljmp",INM),	TSp("push",M),		INVALID,
28307c478bd9Sstevel@tonic-gate };
28317c478bd9Sstevel@tonic-gate 
28327c478bd9Sstevel@tonic-gate /* for 287 instructions, which are a mess to decode */
28337c478bd9Sstevel@tonic-gate 
28347c478bd9Sstevel@tonic-gate const instable_t dis_opFP1n2[8][8] = {
28357c478bd9Sstevel@tonic-gate {
28367c478bd9Sstevel@tonic-gate /* bit pattern:	1101 1xxx MODxx xR/M */
28377c478bd9Sstevel@tonic-gate /*  [0,0] */	TNS("fadds",M),		TNS("fmuls",M),		TNS("fcoms",M),		TNS("fcomps",M),
28387c478bd9Sstevel@tonic-gate /*  [0,4] */	TNS("fsubs",M),		TNS("fsubrs",M),	TNS("fdivs",M),		TNS("fdivrs",M),
28397c478bd9Sstevel@tonic-gate }, {
28407c478bd9Sstevel@tonic-gate /*  [1,0]  */	TNS("flds",M),		INVALID,		TNS("fsts",M),		TNS("fstps",M),
28417c478bd9Sstevel@tonic-gate /*  [1,4]  */	TNSZ("fldenv",M,28),	TNSZ("fldcw",M,2),	TNSZ("fnstenv",M,28),	TNSZ("fnstcw",M,2),
28427c478bd9Sstevel@tonic-gate }, {
28437c478bd9Sstevel@tonic-gate /*  [2,0]  */	TNS("fiaddl",M),	TNS("fimull",M),	TNS("ficoml",M),	TNS("ficompl",M),
28447c478bd9Sstevel@tonic-gate /*  [2,4]  */	TNS("fisubl",M),	TNS("fisubrl",M),	TNS("fidivl",M),	TNS("fidivrl",M),
28457c478bd9Sstevel@tonic-gate }, {
2846d4c899eeSRobert Mustacchi /*  [3,0]  */	TNS("fildl",M),		TNSZ("tisttpl",M,4),	TNS("fistl",M),		TNS("fistpl",M),
28477c478bd9Sstevel@tonic-gate /*  [3,4]  */	INVALID,		TNSZ("fldt",M,10),	INVALID,		TNSZ("fstpt",M,10),
28487c478bd9Sstevel@tonic-gate }, {
28497c478bd9Sstevel@tonic-gate /*  [4,0]  */	TNSZ("faddl",M,8),	TNSZ("fmull",M,8),	TNSZ("fcoml",M,8),	TNSZ("fcompl",M,8),
28507c478bd9Sstevel@tonic-gate /*  [4,1]  */	TNSZ("fsubl",M,8),	TNSZ("fsubrl",M,8),	TNSZ("fdivl",M,8),	TNSZ("fdivrl",M,8),
28517c478bd9Sstevel@tonic-gate }, {
2852d4c899eeSRobert Mustacchi /*  [5,0]  */	TNSZ("fldl",M,8),	TNSZ("fisttpll",M,8),	TNSZ("fstl",M,8),	TNSZ("fstpl",M,8),
28537c478bd9Sstevel@tonic-gate /*  [5,4]  */	TNSZ("frstor",M,108),	INVALID,		TNSZ("fnsave",M,108),	TNSZ("fnstsw",M,2),
28547c478bd9Sstevel@tonic-gate }, {
28557c478bd9Sstevel@tonic-gate /*  [6,0]  */	TNSZ("fiadd",M,2),	TNSZ("fimul",M,2),	TNSZ("ficom",M,2),	TNSZ("ficomp",M,2),
28567c478bd9Sstevel@tonic-gate /*  [6,4]  */	TNSZ("fisub",M,2),	TNSZ("fisubr",M,2),	TNSZ("fidiv",M,2),	TNSZ("fidivr",M,2),
28577c478bd9Sstevel@tonic-gate }, {
2858d4c899eeSRobert Mustacchi /*  [7,0]  */	TNSZ("fild",M,2),	TNSZ("fisttp",M,2),	TNSZ("fist",M,2),	TNSZ("fistp",M,2),
28597c478bd9Sstevel@tonic-gate /*  [7,4]  */	TNSZ("fbld",M,10),	TNSZ("fildll",M,8),	TNSZ("fbstp",M,10),	TNSZ("fistpll",M,8),
28607c478bd9Sstevel@tonic-gate } };
28617c478bd9Sstevel@tonic-gate 
28627c478bd9Sstevel@tonic-gate const instable_t dis_opFP3[8][8] = {
28637c478bd9Sstevel@tonic-gate {
28647c478bd9Sstevel@tonic-gate /* bit  pattern:	1101 1xxx 11xx xREG */
28657c478bd9Sstevel@tonic-gate /*  [0,0]  */	TNS("fadd",FF),		TNS("fmul",FF),		TNS("fcom",F),		TNS("fcomp",F),
28667c478bd9Sstevel@tonic-gate /*  [0,4]  */	TNS("fsub",FF),		TNS("fsubr",FF),	TNS("fdiv",FF),		TNS("fdivr",FF),
28677c478bd9Sstevel@tonic-gate }, {
28687c478bd9Sstevel@tonic-gate /*  [1,0]  */	TNS("fld",F),		TNS("fxch",F),		TNS("fnop",NORM),	TNS("fstp",F),
28697c478bd9Sstevel@tonic-gate /*  [1,4]  */	INVALID,		INVALID,		INVALID,		INVALID,
28707c478bd9Sstevel@tonic-gate }, {
28717c478bd9Sstevel@tonic-gate /*  [2,0]  */	INVALID,		INVALID,		INVALID,		INVALID,
28727c478bd9Sstevel@tonic-gate /*  [2,4]  */	INVALID,		TNS("fucompp",NORM),	INVALID,		INVALID,
28737c478bd9Sstevel@tonic-gate }, {
28747c478bd9Sstevel@tonic-gate /*  [3,0]  */	INVALID,		INVALID,		INVALID,		INVALID,
28757c478bd9Sstevel@tonic-gate /*  [3,4]  */	INVALID,		INVALID,		INVALID,		INVALID,
28767c478bd9Sstevel@tonic-gate }, {
28777c478bd9Sstevel@tonic-gate /*  [4,0]  */	TNS("fadd",FF),		TNS("fmul",FF),		TNS("fcom",F),		TNS("fcomp",F),
28787c478bd9Sstevel@tonic-gate /*  [4,4]  */	TNS("fsub",FF),		TNS("fsubr",FF),	TNS("fdiv",FF),		TNS("fdivr",FF),
28797c478bd9Sstevel@tonic-gate }, {
28807c478bd9Sstevel@tonic-gate /*  [5,0]  */	TNS("ffree",F),		TNS("fxch",F),		TNS("fst",F),		TNS("fstp",F),
28817c478bd9Sstevel@tonic-gate /*  [5,4]  */	TNS("fucom",F),		TNS("fucomp",F),	INVALID,		INVALID,
28827c478bd9Sstevel@tonic-gate }, {
28837c478bd9Sstevel@tonic-gate /*  [6,0]  */	TNS("faddp",FF),	TNS("fmulp",FF),	TNS("fcomp",F),		TNS("fcompp",NORM),
28847c478bd9Sstevel@tonic-gate /*  [6,4]  */	TNS("fsubp",FF),	TNS("fsubrp",FF),	TNS("fdivp",FF),	TNS("fdivrp",FF),
28857c478bd9Sstevel@tonic-gate }, {
28869902c40fSdmick /*  [7,0]  */	TNS("ffreep",F),		TNS("fxch",F),		TNS("fstp",F),		TNS("fstp",F),
28877c478bd9Sstevel@tonic-gate /*  [7,4]  */	TNS("fnstsw",M),	TNS("fucomip",FFC),	TNS("fcomip",FFC),	INVALID,
28887c478bd9Sstevel@tonic-gate } };
28897c478bd9Sstevel@tonic-gate 
28907c478bd9Sstevel@tonic-gate const instable_t dis_opFP4[4][8] = {
28917c478bd9Sstevel@tonic-gate {
28927c478bd9Sstevel@tonic-gate /* bit pattern:	1101 1001 111x xxxx */
28937c478bd9Sstevel@tonic-gate /*  [0,0]  */	TNS("fchs",NORM),	TNS("fabs",NORM),	INVALID,		INVALID,
28947c478bd9Sstevel@tonic-gate /*  [0,4]  */	TNS("ftst",NORM),	TNS("fxam",NORM),	TNS("ftstp",NORM),	INVALID,
28957c478bd9Sstevel@tonic-gate }, {
28967c478bd9Sstevel@tonic-gate /*  [1,0]  */	TNS("fld1",NORM),	TNS("fldl2t",NORM),	TNS("fldl2e",NORM),	TNS("fldpi",NORM),
28977c478bd9Sstevel@tonic-gate /*  [1,4]  */	TNS("fldlg2",NORM),	TNS("fldln2",NORM),	TNS("fldz",NORM),	INVALID,
28987c478bd9Sstevel@tonic-gate }, {
28997c478bd9Sstevel@tonic-gate /*  [2,0]  */	TNS("f2xm1",NORM),	TNS("fyl2x",NORM),	TNS("fptan",NORM),	TNS("fpatan",NORM),
29007c478bd9Sstevel@tonic-gate /*  [2,4]  */	TNS("fxtract",NORM),	TNS("fprem1",NORM),	TNS("fdecstp",NORM),	TNS("fincstp",NORM),
29017c478bd9Sstevel@tonic-gate }, {
29027c478bd9Sstevel@tonic-gate /*  [3,0]  */	TNS("fprem",NORM),	TNS("fyl2xp1",NORM),	TNS("fsqrt",NORM),	TNS("fsincos",NORM),
29037c478bd9Sstevel@tonic-gate /*  [3,4]  */	TNS("frndint",NORM),	TNS("fscale",NORM),	TNS("fsin",NORM),	TNS("fcos",NORM),
29047c478bd9Sstevel@tonic-gate } };
29057c478bd9Sstevel@tonic-gate 
29067c478bd9Sstevel@tonic-gate const instable_t dis_opFP5[8] = {
29077c478bd9Sstevel@tonic-gate /* bit pattern:	1101 1011 111x xxxx */
29087c478bd9Sstevel@tonic-gate /*  [0]  */	TNS("feni",NORM),	TNS("fdisi",NORM),	TNS("fnclex",NORM),	TNS("fninit",NORM),
29097c478bd9Sstevel@tonic-gate /*  [4]  */	TNS("fsetpm",NORM),	TNS("frstpm",NORM),	INVALID,		INVALID,
29107c478bd9Sstevel@tonic-gate };
29117c478bd9Sstevel@tonic-gate 
29127c478bd9Sstevel@tonic-gate const instable_t dis_opFP6[8] = {
29137c478bd9Sstevel@tonic-gate /* bit pattern:	1101 1011 11yy yxxx */
29147c478bd9Sstevel@tonic-gate /*  [00]  */	TNS("fcmov.nb",FF),	TNS("fcmov.ne",FF),	TNS("fcmov.nbe",FF),	TNS("fcmov.nu",FF),
29157c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		TNS("fucomi",F),	TNS("fcomi",F),		INVALID,
29167c478bd9Sstevel@tonic-gate };
29177c478bd9Sstevel@tonic-gate 
29187c478bd9Sstevel@tonic-gate const instable_t dis_opFP7[8] = {
29197c478bd9Sstevel@tonic-gate /* bit pattern:	1101 1010 11yy yxxx */
29207c478bd9Sstevel@tonic-gate /*  [00]  */	TNS("fcmov.b",FF),	TNS("fcmov.e",FF),	TNS("fcmov.be",FF),	TNS("fcmov.u",FF),
29217c478bd9Sstevel@tonic-gate /*  [04]  */	INVALID,		INVALID,		INVALID,		INVALID,
29227c478bd9Sstevel@tonic-gate };
29237c478bd9Sstevel@tonic-gate 
29247c478bd9Sstevel@tonic-gate /*
29257c478bd9Sstevel@tonic-gate  *	Main decode table for the op codes.  The first two nibbles
29267c478bd9Sstevel@tonic-gate  *	will be used as an index into the table.  If there is a
29277c478bd9Sstevel@tonic-gate  *	a need to further decode an instruction, the array to be
29287c478bd9Sstevel@tonic-gate  *	referenced is indicated with the other two entries being
29297c478bd9Sstevel@tonic-gate  *	empty.
29307c478bd9Sstevel@tonic-gate  */
29317c478bd9Sstevel@tonic-gate 
29327c478bd9Sstevel@tonic-gate const instable_t dis_distable[16][16] = {
29337c478bd9Sstevel@tonic-gate {
29347c478bd9Sstevel@tonic-gate /* [0,0] */	TNS("addb",RMw),	TS("add",RMw),		TNS("addb",MRw),	TS("add",MRw),
29357c478bd9Sstevel@tonic-gate /* [0,4] */	TNS("addb",IA),		TS("add",IA),		TSx("push",SEG),	TSx("pop",SEG),
29367c478bd9Sstevel@tonic-gate /* [0,8] */	TNS("orb",RMw),		TS("or",RMw),		TNS("orb",MRw),		TS("or",MRw),
29377c478bd9Sstevel@tonic-gate /* [0,C] */	TNS("orb",IA),		TS("or",IA),		TSx("push",SEG),	IND(dis_op0F),
29387c478bd9Sstevel@tonic-gate }, {
29397c478bd9Sstevel@tonic-gate /* [1,0] */	TNS("adcb",RMw),	TS("adc",RMw),		TNS("adcb",MRw),	TS("adc",MRw),
29407c478bd9Sstevel@tonic-gate /* [1,4] */	TNS("adcb",IA),		TS("adc",IA),		TSx("push",SEG),	TSx("pop",SEG),
29417c478bd9Sstevel@tonic-gate /* [1,8] */	TNS("sbbb",RMw),	TS("sbb",RMw),		TNS("sbbb",MRw),	TS("sbb",MRw),
29427c478bd9Sstevel@tonic-gate /* [1,C] */	TNS("sbbb",IA),		TS("sbb",IA),		TSx("push",SEG),	TSx("pop",SEG),
29437c478bd9Sstevel@tonic-gate }, {
29447c478bd9Sstevel@tonic-gate /* [2,0] */	TNS("andb",RMw),	TS("and",RMw),		TNS("andb",MRw),	TS("and",MRw),
29457c478bd9Sstevel@tonic-gate /* [2,4] */	TNS("andb",IA),		TS("and",IA),		TNSx("%es:",OVERRIDE),	TNSx("daa",NORM),
29467c478bd9Sstevel@tonic-gate /* [2,8] */	TNS("subb",RMw),	TS("sub",RMw),		TNS("subb",MRw),	TS("sub",MRw),
2947ab1416efSBryan Cantrill /* [2,C] */	TNS("subb",IA),		TS("sub",IA),		TNS("%cs:",OVERRIDE),	TNSx("das",NORM),
29487c478bd9Sstevel@tonic-gate }, {
29497c478bd9Sstevel@tonic-gate /* [3,0] */	TNS("xorb",RMw),	TS("xor",RMw),		TNS("xorb",MRw),	TS("xor",MRw),
29507c478bd9Sstevel@tonic-gate /* [3,4] */	TNS("xorb",IA),		TS("xor",IA),		TNSx("%ss:",OVERRIDE),	TNSx("aaa",NORM),
29517c478bd9Sstevel@tonic-gate /* [3,8] */	TNS("cmpb",RMw),	TS("cmp",RMw),		TNS("cmpb",MRw),	TS("cmp",MRw),
29527c478bd9Sstevel@tonic-gate /* [3,C] */	TNS("cmpb",IA),		TS("cmp",IA),		TNSx("%ds:",OVERRIDE),	TNSx("aas",NORM),
29537c478bd9Sstevel@tonic-gate }, {
29547c478bd9Sstevel@tonic-gate /* [4,0] */	TSx("inc",R),		TSx("inc",R),		TSx("inc",R),		TSx("inc",R),
29557c478bd9Sstevel@tonic-gate /* [4,4] */	TSx("inc",R),		TSx("inc",R),		TSx("inc",R),		TSx("inc",R),
29567c478bd9Sstevel@tonic-gate /* [4,8] */	TSx("dec",R),		TSx("dec",R),		TSx("dec",R),		TSx("dec",R),
29577c478bd9Sstevel@tonic-gate /* [4,C] */	TSx("dec",R),		TSx("dec",R),		TSx("dec",R),		TSx("dec",R),
29587c478bd9Sstevel@tonic-gate }, {
29597c478bd9Sstevel@tonic-gate /* [5,0] */	TSp("push",R),		TSp("push",R),		TSp("push",R),		TSp("push",R),
29607c478bd9Sstevel@tonic-gate /* [5,4] */	TSp("push",R),		TSp("push",R),		TSp("push",R),		TSp("push",R),
29617c478bd9Sstevel@tonic-gate /* [5,8] */	TSp("pop",R),		TSp("pop",R),		TSp("pop",R),		TSp("pop",R),
29627c478bd9Sstevel@tonic-gate /* [5,C] */	TSp("pop",R),		TSp("pop",R),		TSp("pop",R),		TSp("pop",R),
29637c478bd9Sstevel@tonic-gate }, {
296481b505b7SJerry Jelinek /* [6,0] */	TSZx("pusha",IMPLMEM,28),TSZx("popa",IMPLMEM,28), TSx("bound",RM),	TNS("arpl",RMw),
29657c478bd9Sstevel@tonic-gate /* [6,4] */	TNS("%fs:",OVERRIDE),	TNS("%gs:",OVERRIDE),	TNS("data16",DM),	TNS("addr16",AM),
29667c478bd9Sstevel@tonic-gate /* [6,8] */	TSp("push",I),		TS("imul",IMUL),	TSp("push",Ib),	TS("imul",IMUL),
29677c478bd9Sstevel@tonic-gate /* [6,C] */	TNSZ("insb",IMPLMEM,1),	TSZ("ins",IMPLMEM,4),	TNSZ("outsb",IMPLMEM,1),TSZ("outs",IMPLMEM,4),
29687c478bd9Sstevel@tonic-gate }, {
29697c478bd9Sstevel@tonic-gate /* [7,0] */	TNSy("jo",BD),		TNSy("jno",BD),		TNSy("jb",BD),		TNSy("jae",BD),
29707c478bd9Sstevel@tonic-gate /* [7,4] */	TNSy("je",BD),		TNSy("jne",BD),		TNSy("jbe",BD),		TNSy("ja",BD),
29717c478bd9Sstevel@tonic-gate /* [7,8] */	TNSy("js",BD),		TNSy("jns",BD),		TNSy("jp",BD),		TNSy("jnp",BD),
29727c478bd9Sstevel@tonic-gate /* [7,C] */	TNSy("jl",BD),		TNSy("jge",BD),		TNSy("jle",BD),		TNSy("jg",BD),
29737c478bd9Sstevel@tonic-gate }, {
29747c478bd9Sstevel@tonic-gate /* [8,0] */	IND(dis_op80),		IND(dis_op81),		INDx(dis_op82),		IND(dis_op83),
29757c478bd9Sstevel@tonic-gate /* [8,4] */	TNS("testb",RMw),	TS("test",RMw),		TNS("xchgb",RMw),	TS("xchg",RMw),
29767c478bd9Sstevel@tonic-gate /* [8,8] */	TNS("movb",RMw),	TS("mov",RMw),		TNS("movb",MRw),	TS("mov",MRw),
29777c478bd9Sstevel@tonic-gate /* [8,C] */	TNS("movw",SM),		TS("lea",MR),		TNS("movw",MS),		TSp("pop",M),
29787c478bd9Sstevel@tonic-gate }, {
29797c478bd9Sstevel@tonic-gate /* [9,0] */	TNS("nop",NORM),	TS("xchg",RA),		TS("xchg",RA),		TS("xchg",RA),
29807c478bd9Sstevel@tonic-gate /* [9,4] */	TS("xchg",RA),		TS("xchg",RA),		TS("xchg",RA),		TS("xchg",RA),
29817c478bd9Sstevel@tonic-gate /* [9,8] */	TNS("cXtX",CBW),	TNS("cXtX",CWD),	TNSx("lcall",SO),	TNS("fwait",NORM),
29821872b0b5SAndriy Gapon /* [9,C] */	TSZy("pushf",IMPLMEM,4),TSZy("popf",IMPLMEM,4),	TNS("sahf",NORM),	TNS("lahf",NORM),
29837c478bd9Sstevel@tonic-gate }, {
29847c478bd9Sstevel@tonic-gate /* [A,0] */	TNS("movb",OA),		TS("mov",OA),		TNS("movb",AO),		TS("mov",AO),
29857c478bd9Sstevel@tonic-gate /* [A,4] */	TNSZ("movsb",SD,1),	TS("movs",SD),		TNSZ("cmpsb",SD,1),	TS("cmps",SD),
29867c478bd9Sstevel@tonic-gate /* [A,8] */	TNS("testb",IA),	TS("test",IA),		TNS("stosb",AD),	TS("stos",AD),
29877c478bd9Sstevel@tonic-gate /* [A,C] */	TNS("lodsb",SA),	TS("lods",SA),		TNS("scasb",AD),	TS("scas",AD),
29887c478bd9Sstevel@tonic-gate }, {
29897c478bd9Sstevel@tonic-gate /* [B,0] */	TNS("movb",IR),		TNS("movb",IR),		TNS("movb",IR),		TNS("movb",IR),
29907c478bd9Sstevel@tonic-gate /* [B,4] */	TNS("movb",IR),		TNS("movb",IR),		TNS("movb",IR),		TNS("movb",IR),
29917c478bd9Sstevel@tonic-gate /* [B,8] */	TS("mov",IR),		TS("mov",IR),		TS("mov",IR),		TS("mov",IR),
29927c478bd9Sstevel@tonic-gate /* [B,C] */	TS("mov",IR),		TS("mov",IR),		TS("mov",IR),		TS("mov",IR),
29937c478bd9Sstevel@tonic-gate }, {
2994cff040f3SRobert Mustacchi /* [C,0] */	IND(dis_opC0),		IND(dis_opC1),		TNSyp("ret",RET),	TNSyp("ret",NORM),
29957c478bd9Sstevel@tonic-gate /* [C,4] */	TNSx("les",MR),		TNSx("lds",MR),		TNS("movb",IMw),	TS("mov",IMw),
29967c478bd9Sstevel@tonic-gate /* [C,8] */	TNSyp("enter",ENTER),	TNSyp("leave",NORM),	TNS("lret",RET),	TNS("lret",NORM),
29977c478bd9Sstevel@tonic-gate /* [C,C] */	TNS("int",INT3),	TNS("int",INTx),	TNSx("into",NORM),	TNS("iret",NORM),
29987c478bd9Sstevel@tonic-gate }, {
29997c478bd9Sstevel@tonic-gate /* [D,0] */	IND(dis_opD0),		IND(dis_opD1),		IND(dis_opD2),		IND(dis_opD3),
30007c478bd9Sstevel@tonic-gate /* [D,4] */	TNSx("aam",U),		TNSx("aad",U),		TNSx("falc",NORM),	TNSZ("xlat",IMPLMEM,1),
30017c478bd9Sstevel@tonic-gate 
30027c478bd9Sstevel@tonic-gate /* 287 instructions.  Note that although the indirect field		*/
30037c478bd9Sstevel@tonic-gate /* indicates opFP1n2 for further decoding, this is not necessarily	*/
30047c478bd9Sstevel@tonic-gate /* the case since the opFP arrays are not partitioned according to key1	*/
30057c478bd9Sstevel@tonic-gate /* and key2.  opFP1n2 is given only to indicate that we haven't		*/
30067c478bd9Sstevel@tonic-gate /* finished decoding the instruction.					*/
30077c478bd9Sstevel@tonic-gate /* [D,8] */	IND(dis_opFP1n2),	IND(dis_opFP1n2),	IND(dis_opFP1n2),	IND(dis_opFP1n2),
30087c478bd9Sstevel@tonic-gate /* [D,C] */	IND(dis_opFP1n2),	IND(dis_opFP1n2),	IND(dis_opFP1n2),	IND(dis_opFP1n2),
30097c478bd9Sstevel@tonic-gate }, {
30107c478bd9Sstevel@tonic-gate /* [E,0] */	TNSy("loopnz",BD),	TNSy("loopz",BD),	TNSy("loop",BD),	TNSy("jcxz",BD),
30117c478bd9Sstevel@tonic-gate /* [E,4] */	TNS("inb",P),		TS("in",P),		TNS("outb",P),		TS("out",P),
30127c478bd9Sstevel@tonic-gate /* [E,8] */	TNSyp("call",D),	TNSy("jmp",D),		TNSx("ljmp",SO),		TNSy("jmp",BD),
30137c478bd9Sstevel@tonic-gate /* [E,C] */	TNS("inb",V),		TS("in",V),		TNS("outb",V),		TS("out",V),
30147c478bd9Sstevel@tonic-gate }, {
30157c478bd9Sstevel@tonic-gate /* [F,0] */	TNS("lock",LOCK),	TNS("icebp", NORM),	TNS("repnz",PREFIX),	TNS("repz",PREFIX),
30167c478bd9Sstevel@tonic-gate /* [F,4] */	TNS("hlt",NORM),	TNS("cmc",NORM),	IND(dis_opF6),		IND(dis_opF7),
30177c478bd9Sstevel@tonic-gate /* [F,8] */	TNS("clc",NORM),	TNS("stc",NORM),	TNS("cli",NORM),	TNS("sti",NORM),
30187c478bd9Sstevel@tonic-gate /* [F,C] */	TNS("cld",NORM),	TNS("std",NORM),	IND(dis_opFE),		IND(dis_opFF),
30197c478bd9Sstevel@tonic-gate } };
30207c478bd9Sstevel@tonic-gate 
30217c478bd9Sstevel@tonic-gate /* END CSTYLED */
30227c478bd9Sstevel@tonic-gate 
30237c478bd9Sstevel@tonic-gate /*
30247c478bd9Sstevel@tonic-gate  * common functions to decode and disassemble an x86 or amd64 instruction
30257c478bd9Sstevel@tonic-gate  */
30267c478bd9Sstevel@tonic-gate 
30277c478bd9Sstevel@tonic-gate /*
30287c478bd9Sstevel@tonic-gate  * These are the individual fields of a REX prefix. Note that a REX
30297c478bd9Sstevel@tonic-gate  * prefix with none of these set is still needed to:
30307c478bd9Sstevel@tonic-gate  *	- use the MOVSXD (sign extend 32 to 64 bits) instruction
30317c478bd9Sstevel@tonic-gate  *	- access the %sil, %dil, %bpl, %spl registers
30327c478bd9Sstevel@tonic-gate  */
30337c478bd9Sstevel@tonic-gate #define	REX_W 0x08	/* 64 bit operand size when set */
30347c478bd9Sstevel@tonic-gate #define	REX_R 0x04	/* high order bit extension of ModRM reg field */
30357c478bd9Sstevel@tonic-gate #define	REX_X 0x02	/* high order bit extension of SIB index field */
30367c478bd9Sstevel@tonic-gate #define	REX_B 0x01	/* extends ModRM r_m, SIB base, or opcode reg */
30377c478bd9Sstevel@tonic-gate 
3038ab47273fSEdward Gillett /*
303981b505b7SJerry Jelinek  * These are the individual fields of a VEX/EVEX prefix.
3040ab47273fSEdward Gillett  */
3041ab47273fSEdward Gillett #define	VEX_R 0x08	/* REX.R in 1's complement form */
3042ab47273fSEdward Gillett #define	VEX_X 0x04	/* REX.X in 1's complement form */
3043ab47273fSEdward Gillett #define	VEX_B 0x02	/* REX.B in 1's complement form */
304481b505b7SJerry Jelinek 
304581b505b7SJerry Jelinek /* Additional EVEX prefix definitions */
304681b505b7SJerry Jelinek #define	EVEX_R 0x01	/* REX.R' in 1's complement form */
304781b505b7SJerry Jelinek #define	EVEX_OPREG_MASK 0x7 /* bit mask for selecting opmask register number */
304881b505b7SJerry Jelinek #define	EVEX_ZERO_MASK 0x80 /* bit mask for selecting zeroing */
304981b505b7SJerry Jelinek 
3050ab47273fSEdward Gillett /* Vector Length, 0: scalar or 128-bit vector, 1: 256-bit vector */
3051ab47273fSEdward Gillett #define	VEX_L 0x04
30523863692fSRobert Mustacchi #define	EVEX_B 0x01	/* Embedded Broadcast, RC, SAE context */
305381b505b7SJerry Jelinek /* Vector Length, 0: scalar or 128-bit vector, 1: 256-bit vector, 2: 512-bit */
305481b505b7SJerry Jelinek #define	EVEX_L 0x06	/* bit mask for EVEX.L'L vector length/RC */
3055ab47273fSEdward Gillett #define	VEX_W 0x08	/* opcode specific, use like REX.W */
3056ab47273fSEdward Gillett #define	VEX_m 0x1F	/* VEX m-mmmm field */
305781b505b7SJerry Jelinek #define	EVEX_m 0x3	/* EVEX mm field */
305881b505b7SJerry Jelinek #define	VEX_v 0x78	/* VEX/EVEX register specifier */
3059ab47273fSEdward Gillett #define	VEX_p 0x03	/* VEX pp field, opcode extension */
30603863692fSRobert Mustacchi #define	EVEX_V 0x8	/* EVEX.V' field, register extension */
3061ab47273fSEdward Gillett 
3062ab47273fSEdward Gillett /* VEX m-mmmm field, only used by three bytes prefix */
3063ab47273fSEdward Gillett #define	VEX_m_0F 0x01   /* implied 0F leading opcode byte */
3064ab47273fSEdward Gillett #define	VEX_m_0F38 0x02 /* implied 0F 38 leading opcode byte */
3065ab47273fSEdward Gillett #define	VEX_m_0F3A 0x03 /* implied 0F 3A leading opcode byte */
3066ab47273fSEdward Gillett 
3067ab47273fSEdward Gillett /* VEX pp field, providing equivalent functionality of a SIMD prefix */
3068ab47273fSEdward Gillett #define	VEX_p_66 0x01
3069ab47273fSEdward Gillett #define	VEX_p_F3 0x02
3070ab47273fSEdward Gillett #define	VEX_p_F2 0x03
3071ab47273fSEdward Gillett 
30727c478bd9Sstevel@tonic-gate /*
30737c478bd9Sstevel@tonic-gate  * Even in 64 bit mode, usually only 4 byte immediate operands are supported.
30747c478bd9Sstevel@tonic-gate  */
30757c478bd9Sstevel@tonic-gate static int isize[] = {1, 2, 4, 4};
30767c478bd9Sstevel@tonic-gate static int isize64[] = {1, 2, 4, 8};
30777c478bd9Sstevel@tonic-gate 
30787c478bd9Sstevel@tonic-gate /*
30797c478bd9Sstevel@tonic-gate  * Just a bunch of useful macros.
30807c478bd9Sstevel@tonic-gate  */
30817c478bd9Sstevel@tonic-gate #define	WBIT(x)	(x & 0x1)		/* to get w bit	*/
30827c478bd9Sstevel@tonic-gate #define	REGNO(x) (x & 0x7)		/* to get 3 bit register */
30837c478bd9Sstevel@tonic-gate #define	VBIT(x)	((x)>>1 & 0x1)		/* to get 'v' bit */
30847c478bd9Sstevel@tonic-gate #define	OPSIZE(osize, wbit) ((wbit) ? isize[osize] : 1)
30857c478bd9Sstevel@tonic-gate #define	OPSIZE64(osize, wbit) ((wbit) ? isize64[osize] : 1)
30867c478bd9Sstevel@tonic-gate 
30877c478bd9Sstevel@tonic-gate #define	REG_ONLY 3	/* mode to indicate a register operand (not memory) */
30887c478bd9Sstevel@tonic-gate 
30897c478bd9Sstevel@tonic-gate #define	BYTE_OPND	0	/* w-bit value indicating byte register */
30907c478bd9Sstevel@tonic-gate #define	LONG_OPND	1	/* w-bit value indicating opnd_size register */
30917c478bd9Sstevel@tonic-gate #define	MM_OPND		2	/* "value" used to indicate a mmx reg */
30927c478bd9Sstevel@tonic-gate #define	XMM_OPND	3	/* "value" used to indicate a xmm reg */
30937c478bd9Sstevel@tonic-gate #define	SEG_OPND	4	/* "value" used to indicate a segment reg */
30947c478bd9Sstevel@tonic-gate #define	CONTROL_OPND	5	/* "value" used to indicate a control reg */
30957c478bd9Sstevel@tonic-gate #define	DEBUG_OPND	6	/* "value" used to indicate a debug reg */
30967c478bd9Sstevel@tonic-gate #define	TEST_OPND	7	/* "value" used to indicate a test reg */
30977c478bd9Sstevel@tonic-gate #define	WORD_OPND	8	/* w-bit value indicating word size reg */
3098ab47273fSEdward Gillett #define	YMM_OPND	9	/* "value" used to indicate a ymm reg */
3099a4e73d5dSJerry Jelinek #define	KOPMASK_OPND	10	/* "value" used to indicate an opmask reg */
310081b505b7SJerry Jelinek #define	ZMM_OPND	11	/* "value" used to indicate a zmm reg */
31017c478bd9Sstevel@tonic-gate 
3102245ac945SRobert Mustacchi /*
3103245ac945SRobert Mustacchi  * The AVX2 gather instructions are a bit of a mess. While there's a pattern,
3104245ac945SRobert Mustacchi  * there's not really a consistent scheme that we can use to know what the mode
3105245ac945SRobert Mustacchi  * is supposed to be for a given type. Various instructions, like VPGATHERDD,
3106245ac945SRobert Mustacchi  * always match the value of VEX_L. Other instructions like VPGATHERDQ, have
3107245ac945SRobert Mustacchi  * some registers match VEX_L, but the VSIB is always XMM.
3108245ac945SRobert Mustacchi  *
3109245ac945SRobert Mustacchi  * The simplest way to deal with this is to just define a table based on the
3110245ac945SRobert Mustacchi  * instruction opcodes, which are 0x90-0x93, so we subtract 0x90 to index into
3111245ac945SRobert Mustacchi  * them.
3112245ac945SRobert Mustacchi  *
3113245ac945SRobert Mustacchi  * We further have to subdivide this based on the value of VEX_W and the value
3114245ac945SRobert Mustacchi  * of VEX_L. The array is constructed to be indexed as:
3115cff040f3SRobert Mustacchi  *	[opcode - 0x90][VEX_W][VEX_L].
3116245ac945SRobert Mustacchi  */
3117245ac945SRobert Mustacchi /* w = 0, 0x90 */
3118245ac945SRobert Mustacchi typedef struct dis_gather_regs {
3119245ac945SRobert Mustacchi 	uint_t dgr_arg0;	/* src reg */
3120245ac945SRobert Mustacchi 	uint_t dgr_arg1;	/* vsib reg */
3121245ac945SRobert Mustacchi 	uint_t dgr_arg2;	/* dst reg */
3122245ac945SRobert Mustacchi 	char   *dgr_suffix;	/* suffix to append */
3123245ac945SRobert Mustacchi } dis_gather_regs_t;
3124245ac945SRobert Mustacchi 
3125245ac945SRobert Mustacchi static dis_gather_regs_t dis_vgather[4][2][2] = {
3126245ac945SRobert Mustacchi 	{
3127245ac945SRobert Mustacchi 		/* op 0x90, W.0 */
3128245ac945SRobert Mustacchi 		{
3129245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "d" },
3130245ac945SRobert Mustacchi 			{ YMM_OPND, YMM_OPND, YMM_OPND, "d" }
3131245ac945SRobert Mustacchi 		},
3132245ac945SRobert Mustacchi 		/* op 0x90, W.1 */
3133245ac945SRobert Mustacchi 		{
3134245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "q" },
3135245ac945SRobert Mustacchi 			{ YMM_OPND, XMM_OPND, YMM_OPND, "q" }
3136245ac945SRobert Mustacchi 		}
3137245ac945SRobert Mustacchi 	},
3138245ac945SRobert Mustacchi 	{
3139245ac945SRobert Mustacchi 		/* op 0x91, W.0 */
3140245ac945SRobert Mustacchi 		{
3141245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "d" },
3142245ac945SRobert Mustacchi 			{ XMM_OPND, YMM_OPND, XMM_OPND, "d" },
3143245ac945SRobert Mustacchi 		},
3144245ac945SRobert Mustacchi 		/* op 0x91, W.1 */
3145245ac945SRobert Mustacchi 		{
3146245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "q" },
3147245ac945SRobert Mustacchi 			{ YMM_OPND, YMM_OPND, YMM_OPND, "q" },
3148245ac945SRobert Mustacchi 		}
3149245ac945SRobert Mustacchi 	},
3150245ac945SRobert Mustacchi 	{
3151245ac945SRobert Mustacchi 		/* op 0x92, W.0 */
3152245ac945SRobert Mustacchi 		{
3153245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "s" },
3154245ac945SRobert Mustacchi 			{ YMM_OPND, YMM_OPND, YMM_OPND, "s" }
3155245ac945SRobert Mustacchi 		},
3156245ac945SRobert Mustacchi 		/* op 0x92, W.1 */
3157245ac945SRobert Mustacchi 		{
3158245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "d" },
3159245ac945SRobert Mustacchi 			{ YMM_OPND, XMM_OPND, YMM_OPND, "d" }
3160245ac945SRobert Mustacchi 		}
3161245ac945SRobert Mustacchi 	},
3162245ac945SRobert Mustacchi 	{
3163245ac945SRobert Mustacchi 		/* op 0x93, W.0 */
3164245ac945SRobert Mustacchi 		{
3165245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "s" },
3166245ac945SRobert Mustacchi 			{ XMM_OPND, YMM_OPND, XMM_OPND, "s" }
3167245ac945SRobert Mustacchi 		},
3168245ac945SRobert Mustacchi 		/* op 0x93, W.1 */
3169245ac945SRobert Mustacchi 		{
3170245ac945SRobert Mustacchi 			{ XMM_OPND, XMM_OPND, XMM_OPND, "d" },
3171245ac945SRobert Mustacchi 			{ YMM_OPND, YMM_OPND, YMM_OPND, "d" }
3172245ac945SRobert Mustacchi 		}
3173245ac945SRobert Mustacchi 	}
3174245ac945SRobert Mustacchi };
3175245ac945SRobert Mustacchi 
31767c478bd9Sstevel@tonic-gate /*
31777c478bd9Sstevel@tonic-gate  * Get the next byte and separate the op code into the high and low nibbles.
31787c478bd9Sstevel@tonic-gate  */
31797c478bd9Sstevel@tonic-gate static int
dtrace_get_opcode(dis86_t * x,uint_t * high,uint_t * low)31807c478bd9Sstevel@tonic-gate dtrace_get_opcode(dis86_t *x, uint_t *high, uint_t *low)
31817c478bd9Sstevel@tonic-gate {
31827c478bd9Sstevel@tonic-gate 	int byte;
31837c478bd9Sstevel@tonic-gate 
31847c478bd9Sstevel@tonic-gate 	/*
31857c478bd9Sstevel@tonic-gate 	 * x86 instructions have a maximum length of 15 bytes.  Bail out if
31867c478bd9Sstevel@tonic-gate 	 * we try to read more.
31877c478bd9Sstevel@tonic-gate 	 */
31887c478bd9Sstevel@tonic-gate 	if (x->d86_len >= 15)
31897c478bd9Sstevel@tonic-gate 		return (x->d86_error = 1);
31907c478bd9Sstevel@tonic-gate 
31917c478bd9Sstevel@tonic-gate 	if (x->d86_error)
31927c478bd9Sstevel@tonic-gate 		return (1);
31937c478bd9Sstevel@tonic-gate 	byte = x->d86_get_byte(x->d86_data);
31947c478bd9Sstevel@tonic-gate 	if (byte < 0)
31957c478bd9Sstevel@tonic-gate 		return (x->d86_error = 1);
31967c478bd9Sstevel@tonic-gate 	x->d86_bytes[x->d86_len++] = byte;
31977c478bd9Sstevel@tonic-gate 	*low = byte & 0xf;		/* ----xxxx low 4 bits */
31987c478bd9Sstevel@tonic-gate 	*high = byte >> 4 & 0xf;	/* xxxx---- bits 7 to 4 */
31997c478bd9Sstevel@tonic-gate 	return (0);
32007c478bd9Sstevel@tonic-gate }
32017c478bd9Sstevel@tonic-gate 
32027c478bd9Sstevel@tonic-gate /*
32037c478bd9Sstevel@tonic-gate  * Get and decode an SIB (scaled index base) byte
32047c478bd9Sstevel@tonic-gate  */
32057c478bd9Sstevel@tonic-gate static void
dtrace_get_SIB(dis86_t * x,uint_t * ss,uint_t * index,uint_t * base)32067c478bd9Sstevel@tonic-gate dtrace_get_SIB(dis86_t *x, uint_t *ss, uint_t *index, uint_t *base)
32077c478bd9Sstevel@tonic-gate {
32087c478bd9Sstevel@tonic-gate 	int byte;
32097c478bd9Sstevel@tonic-gate 
32107c478bd9Sstevel@tonic-gate 	if (x->d86_error)
32117c478bd9Sstevel@tonic-gate 		return;
32127c478bd9Sstevel@tonic-gate 
32137c478bd9Sstevel@tonic-gate 	byte = x->d86_get_byte(x->d86_data);
32147c478bd9Sstevel@tonic-gate 	if (byte < 0) {
32157c478bd9Sstevel@tonic-gate 		x->d86_error = 1;
32167c478bd9Sstevel@tonic-gate 		return;
32177c478bd9Sstevel@tonic-gate 	}
32187c478bd9Sstevel@tonic-gate 	x->d86_bytes[x->d86_len++] = byte;
32197c478bd9Sstevel@tonic-gate 
32207c478bd9Sstevel@tonic-gate 	*base = byte & 0x7;
32217c478bd9Sstevel@tonic-gate 	*index = (byte >> 3) & 0x7;
32227c478bd9Sstevel@tonic-gate 	*ss = (byte >> 6) & 0x3;
32237c478bd9Sstevel@tonic-gate }
32247c478bd9Sstevel@tonic-gate 
32257c478bd9Sstevel@tonic-gate /*
32267c478bd9Sstevel@tonic-gate  * Get the byte following the op code and separate it into the
32277c478bd9Sstevel@tonic-gate  * mode, register, and r/m fields.
32287c478bd9Sstevel@tonic-gate  */
32297c478bd9Sstevel@tonic-gate static void
dtrace_get_modrm(dis86_t * x,uint_t * mode,uint_t * reg,uint_t * r_m)32307c478bd9Sstevel@tonic-gate dtrace_get_modrm(dis86_t *x, uint_t *mode, uint_t *reg, uint_t *r_m)
32317c478bd9Sstevel@tonic-gate {
32327c478bd9Sstevel@tonic-gate 	if (x->d86_got_modrm == 0) {
32337c478bd9Sstevel@tonic-gate 		if (x->d86_rmindex == -1)
32347c478bd9Sstevel@tonic-gate 			x->d86_rmindex = x->d86_len;
32357c478bd9Sstevel@tonic-gate 		dtrace_get_SIB(x, mode, reg, r_m);
32367c478bd9Sstevel@tonic-gate 		x->d86_got_modrm = 1;
32377c478bd9Sstevel@tonic-gate 	}
32387c478bd9Sstevel@tonic-gate }
32397c478bd9Sstevel@tonic-gate 
32407c478bd9Sstevel@tonic-gate /*
32417c478bd9Sstevel@tonic-gate  * Adjust register selection based on any REX prefix bits present.
32427c478bd9Sstevel@tonic-gate  */
32437c478bd9Sstevel@tonic-gate /*ARGSUSED*/
32447c478bd9Sstevel@tonic-gate static void
dtrace_rex_adjust(uint_t rex_prefix,uint_t mode,uint_t * reg,uint_t * r_m)32457c478bd9Sstevel@tonic-gate dtrace_rex_adjust(uint_t rex_prefix, uint_t mode, uint_t *reg, uint_t *r_m)
32467c478bd9Sstevel@tonic-gate {
32477c478bd9Sstevel@tonic-gate 	if (reg != NULL && r_m == NULL) {
32487c478bd9Sstevel@tonic-gate 		if (rex_prefix & REX_B)
32497c478bd9Sstevel@tonic-gate 			*reg += 8;
32507c478bd9Sstevel@tonic-gate 	} else {
32517c478bd9Sstevel@tonic-gate 		if (reg != NULL && (REX_R & rex_prefix) != 0)
32527c478bd9Sstevel@tonic-gate 			*reg += 8;
32537c478bd9Sstevel@tonic-gate 		if (r_m != NULL && (REX_B & rex_prefix) != 0)
32547c478bd9Sstevel@tonic-gate 			*r_m += 8;
32557c478bd9Sstevel@tonic-gate 	}
32567c478bd9Sstevel@tonic-gate }
32577c478bd9Sstevel@tonic-gate 
3258ab47273fSEdward Gillett /*
3259ab47273fSEdward Gillett  * Adjust register selection based on any VEX prefix bits present.
3260ab47273fSEdward Gillett  * Notes: VEX.R, VEX.X and VEX.B use the inverted form compared with REX prefix
3261ab47273fSEdward Gillett  */
3262ab47273fSEdward Gillett /*ARGSUSED*/
3263ab47273fSEdward Gillett static void
dtrace_vex_adjust(uint_t vex_byte1,uint_t mode,uint_t * reg,uint_t * r_m)3264ab47273fSEdward Gillett dtrace_vex_adjust(uint_t vex_byte1, uint_t mode, uint_t *reg, uint_t *r_m)
3265ab47273fSEdward Gillett {
3266ab47273fSEdward Gillett 	if (reg != NULL && r_m == NULL) {
3267ab47273fSEdward Gillett 		if (!(vex_byte1 & VEX_B))
3268ab47273fSEdward Gillett 			*reg += 8;
3269ab47273fSEdward Gillett 	} else {
3270ab47273fSEdward Gillett 		if (reg != NULL && ((VEX_R & vex_byte1) == 0))
3271ab47273fSEdward Gillett 			*reg += 8;
3272ab47273fSEdward Gillett 		if (r_m != NULL && ((VEX_B & vex_byte1) == 0))
3273ab47273fSEdward Gillett 			*r_m += 8;
3274ab47273fSEdward Gillett 	}
3275ab47273fSEdward Gillett }
3276ab47273fSEdward Gillett 
327781b505b7SJerry Jelinek /*
327881b505b7SJerry Jelinek  * Adjust the instruction mnemonic with the appropriate suffix.
327981b505b7SJerry Jelinek  */
328081b505b7SJerry Jelinek /* ARGSUSED */
328181b505b7SJerry Jelinek static void
dtrace_evex_mnem_adjust(dis86_t * x,const instable_t * dp,uint_t vex_W,uint_t evex_byte2)3282c1e9bf00SRobert Mustacchi dtrace_evex_mnem_adjust(dis86_t *x, const instable_t *dp, uint_t vex_W,
328381b505b7SJerry Jelinek     uint_t evex_byte2)
328481b505b7SJerry Jelinek {
328581b505b7SJerry Jelinek #ifdef DIS_TEXT
3286a25e615dSRobert Mustacchi 	if (dp == &dis_opEVEX660F[0x7f] ||		/* vmovdqa */
3287a25e615dSRobert Mustacchi 	    dp == &dis_opEVEX660F[0x6f]) {
3288a25e615dSRobert Mustacchi 		(void) strlcat(x->d86_mnem, vex_W != 0 ? "64" : "32",
3289a25e615dSRobert Mustacchi 		    OPLEN);
3290e4f6ce70SRobert Mustacchi 	}
3291e4f6ce70SRobert Mustacchi 
3292a25e615dSRobert Mustacchi 	if (dp == &dis_opEVEXF20F[0x7f] ||		/* vmovdqu */
3293a25e615dSRobert Mustacchi 	    dp == &dis_opEVEXF20F[0x6f] ||
3294a25e615dSRobert Mustacchi 	    dp == &dis_opEVEXF30F[0x7f] ||
3295a25e615dSRobert Mustacchi 	    dp == &dis_opEVEXF30F[0x6f]) {
3296a25e615dSRobert Mustacchi 		switch (evex_byte2 & 0x81) {
3297a25e615dSRobert Mustacchi 		case 0x0:
3298a25e615dSRobert Mustacchi 			(void) strlcat(x->d86_mnem, "32", OPLEN);
3299a25e615dSRobert Mustacchi 			break;
3300a25e615dSRobert Mustacchi 		case 0x1:
3301a25e615dSRobert Mustacchi 			(void) strlcat(x->d86_mnem, "8", OPLEN);
3302a25e615dSRobert Mustacchi 			break;
3303a25e615dSRobert Mustacchi 		case 0x80:
3304a25e615dSRobert Mustacchi 			(void) strlcat(x->d86_mnem, "64", OPLEN);
3305a25e615dSRobert Mustacchi 			break;
3306a25e615dSRobert Mustacchi 		case 0x81:
3307a25e615dSRobert Mustacchi 			(void) strlcat(x->d86_mnem, "16", OPLEN);
3308a25e615dSRobert Mustacchi 			break;
3309d242cdf5SJerry Jelinek 		}
331081b505b7SJerry Jelinek 	}
3311a25e615dSRobert Mustacchi 
3312a25e615dSRobert Mustacchi 	if (dp->it_avxsuf == AVS5Q) {
3313a25e615dSRobert Mustacchi 		(void) strlcat(x->d86_mnem, vex_W != 0 ?  "q" : "d",
3314a25e615dSRobert Mustacchi 		    OPLEN);
3315*8b0687e2SRobert Mustacchi 	} else if (dp->it_avxsuf == AVS5D) {
3316*8b0687e2SRobert Mustacchi 		(void) strlcat(x->d86_mnem, vex_W != 0 ?  "s" : "d",
3317*8b0687e2SRobert Mustacchi 		    OPLEN);
33183863692fSRobert Mustacchi 	} else if (dp->it_avxsuf == AVS5B) {
33193863692fSRobert Mustacchi 		(void) strlcat(x->d86_mnem, vex_W != 0 ?  "w" : "b",
33203863692fSRobert Mustacchi 		    OPLEN);
3321a25e615dSRobert Mustacchi 	}
332281b505b7SJerry Jelinek #endif
332381b505b7SJerry Jelinek }
332481b505b7SJerry Jelinek 
332581b505b7SJerry Jelinek /*
332681b505b7SJerry Jelinek  * The following three functions adjust the register selection based on any
332781b505b7SJerry Jelinek  * EVEX prefix bits present. See Intel 64 and IA-32 Architectures Software
332881b505b7SJerry Jelinek  * Developer’s Manual Volume 2 (IASDv2), section 2.6.1 Table 2-30 and
332981b505b7SJerry Jelinek  * section 2.6.2 Table 2-31.
333081b505b7SJerry Jelinek  */
333181b505b7SJerry Jelinek static void
dtrace_evex_adjust_reg(uint_t evex_byte1,uint_t * reg)333281b505b7SJerry Jelinek dtrace_evex_adjust_reg(uint_t evex_byte1, uint_t *reg)
333381b505b7SJerry Jelinek {
333481b505b7SJerry Jelinek 	if (reg != NULL) {
333581b505b7SJerry Jelinek 		if ((VEX_R & evex_byte1) == 0) {
333681b505b7SJerry Jelinek 			*reg += 8;
333781b505b7SJerry Jelinek 		}
333881b505b7SJerry Jelinek 		if ((EVEX_R & evex_byte1) == 0) {
333981b505b7SJerry Jelinek 			*reg += 16;
334081b505b7SJerry Jelinek 		}
334181b505b7SJerry Jelinek 	}
334281b505b7SJerry Jelinek }
334381b505b7SJerry Jelinek 
334481b505b7SJerry Jelinek static void
dtrace_evex_adjust_rm(uint_t evex_byte1,uint_t * r_m)334581b505b7SJerry Jelinek dtrace_evex_adjust_rm(uint_t evex_byte1, uint_t *r_m)
334681b505b7SJerry Jelinek {
334781b505b7SJerry Jelinek 	if (r_m != NULL) {
334881b505b7SJerry Jelinek 		if ((VEX_B & evex_byte1) == 0) {
334981b505b7SJerry Jelinek 			*r_m += 8;
335081b505b7SJerry Jelinek 		}
335181b505b7SJerry Jelinek 		if ((VEX_X & evex_byte1) == 0) {
335281b505b7SJerry Jelinek 			*r_m += 16;
335381b505b7SJerry Jelinek 		}
335481b505b7SJerry Jelinek 	}
335581b505b7SJerry Jelinek }
335681b505b7SJerry Jelinek 
335781b505b7SJerry Jelinek /*
335881b505b7SJerry Jelinek  * Use evex_L to set wbit. See IASDv2 Section 2.6.10 and Table 2-36.
335981b505b7SJerry Jelinek  */
336081b505b7SJerry Jelinek static void
dtrace_evex_adjust_reg_name(uint_t evex_L,uint_t * wbitp)336181b505b7SJerry Jelinek dtrace_evex_adjust_reg_name(uint_t evex_L, uint_t *wbitp)
336281b505b7SJerry Jelinek {
336381b505b7SJerry Jelinek 	switch (evex_L) {
336481b505b7SJerry Jelinek 	case 0x0:
336581b505b7SJerry Jelinek 		*wbitp = XMM_OPND;
336681b505b7SJerry Jelinek 		break;
336781b505b7SJerry Jelinek 	case 0x1:
336881b505b7SJerry Jelinek 		*wbitp = YMM_OPND;
336981b505b7SJerry Jelinek 		break;
337081b505b7SJerry Jelinek 	case 0x2:
337181b505b7SJerry Jelinek 		*wbitp = ZMM_OPND;
337281b505b7SJerry Jelinek 		break;
337381b505b7SJerry Jelinek 	}
337481b505b7SJerry Jelinek }
337581b505b7SJerry Jelinek 
3376*8b0687e2SRobert Mustacchi typedef enum {
3377*8b0687e2SRobert Mustacchi 	/*
3378*8b0687e2SRobert Mustacchi 	 * Indicates that this follows the normal full memory disp8*n behavior
3379*8b0687e2SRobert Mustacchi 	 * and that there is no embedded broadcast.
3380*8b0687e2SRobert Mustacchi 	 */
3381*8b0687e2SRobert Mustacchi 	EVEX_DISP8_MEM,
3382*8b0687e2SRobert Mustacchi 	/*
3383*8b0687e2SRobert Mustacchi 	 * Indicates that this needs to use the compressed displacement affected
3384*8b0687e2SRobert Mustacchi 	 * by embedded broadcast table. The first of these is for full tuples,
3385*8b0687e2SRobert Mustacchi 	 * which is the more common case. The second group is for half tuples.
3386*8b0687e2SRobert Mustacchi 	 */
3387*8b0687e2SRobert Mustacchi 	EVEX_DISP8_BCAST,
3388*8b0687e2SRobert Mustacchi 	EVEX_DISP8_BCAST_HALF,
3389*8b0687e2SRobert Mustacchi 
3390*8b0687e2SRobert Mustacchi 	/*
3391*8b0687e2SRobert Mustacchi 	 * Indicates that this is an 8/16-bit Tuple1 Scalar. The 32/64-bit share
3392*8b0687e2SRobert Mustacchi 	 * T1S and use EVEX.W to determine what multiples to use. Strictly
3393*8b0687e2SRobert Mustacchi 	 * speaking the table has the 8/16-bit as different cases, but we find
3394*8b0687e2SRobert Mustacchi 	 * that they generally are distinguished for what we support based on W,
3395*8b0687e2SRobert Mustacchi 	 * so we cheat and use that for cases for not until this proves to not
3396*8b0687e2SRobert Mustacchi 	 * work.
3397*8b0687e2SRobert Mustacchi 	 */
3398*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T1S_8B,
3399*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T1S,
3400*8b0687e2SRobert Mustacchi 	/*
3401*8b0687e2SRobert Mustacchi 	 * Tuple1 Fixed type which ignores EVEX.W and instead is based upon a
3402*8b0687e2SRobert Mustacchi 	 * fixed, expected type.
3403*8b0687e2SRobert Mustacchi 	 */
3404*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T1F32,
3405*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T1F64,
3406*8b0687e2SRobert Mustacchi 	/*
3407*8b0687e2SRobert Mustacchi 	 * T2 and T4 are Tuple2 and Tuple4 respectively. They both change based
3408*8b0687e2SRobert Mustacchi 	 * upon EVEX.W.
3409*8b0687e2SRobert Mustacchi 	 */
3410*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T2,
3411*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T4,
3412*8b0687e2SRobert Mustacchi 	/*
3413*8b0687e2SRobert Mustacchi 	 * Tuple8, which only really acts upon 32-bit broadcasts.
3414*8b0687e2SRobert Mustacchi 	 */
3415*8b0687e2SRobert Mustacchi 	EVEX_DISP8_T8,
3416*8b0687e2SRobert Mustacchi 	/*
3417*8b0687e2SRobert Mustacchi 	 * (H)alf memory, (Q)uarter memory, and (E)ighth memory. These ignore
3418*8b0687e2SRobert Mustacchi 	 * the input size and EVEX.W. They just are fixed factors based on the
3419*8b0687e2SRobert Mustacchi 	 * vector length.
3420*8b0687e2SRobert Mustacchi 	 */
3421*8b0687e2SRobert Mustacchi 	EVEX_DISP8_HMEM,
3422*8b0687e2SRobert Mustacchi 	EVEX_DISP8_QMEM,
3423*8b0687e2SRobert Mustacchi 	EVEX_DISP8_EMEM,
3424*8b0687e2SRobert Mustacchi 	/*
3425*8b0687e2SRobert Mustacchi 	 * This is the Mem128 type, which is used for various shift counts. It
3426*8b0687e2SRobert Mustacchi 	 * ignores the input size and EVEX.W.
3427*8b0687e2SRobert Mustacchi 	 */
3428*8b0687e2SRobert Mustacchi 	EVEX_DISP8_MEM128,
3429*8b0687e2SRobert Mustacchi 	/*
3430*8b0687e2SRobert Mustacchi 	 * This seems like a special case for VMOVDUP. It has its own
3431*8b0687e2SRobert Mustacchi 	 * multiplication pattern.
3432*8b0687e2SRobert Mustacchi 	 */
3433*8b0687e2SRobert Mustacchi 	EVEX_DISP8_MOVDUP
3434*8b0687e2SRobert Mustacchi } evex_disp8_tuple_type_t;
3435*8b0687e2SRobert Mustacchi 
3436*8b0687e2SRobert Mustacchi typedef struct {
3437*8b0687e2SRobert Mustacchi 	evex_disp8_tuple_type_t ed8_type;
3438*8b0687e2SRobert Mustacchi 	uint_t ed8_vl;
3439*8b0687e2SRobert Mustacchi 	uint_t ed8_evex_b;
3440*8b0687e2SRobert Mustacchi 	uint_t ed8_evex_w;
3441*8b0687e2SRobert Mustacchi } evex_disp8_adj_t;
3442*8b0687e2SRobert Mustacchi 
344381b505b7SJerry Jelinek /*
3444*8b0687e2SRobert Mustacchi  * Adjust operand value for disp8*N immediate. See IASDv2 Section 2.7.5
3445*8b0687e2SRobert Mustacchi  * (December 2023).
344681b505b7SJerry Jelinek  */
344781b505b7SJerry Jelinek static void
dtrace_evex_adjust_disp8_n(dis86_t * x,uint_t opindex,uint_t modrm,evex_disp8_tuple_type_t type,uint_t evex_L,uint_t evex_B,uint_t evex_W)3448*8b0687e2SRobert Mustacchi dtrace_evex_adjust_disp8_n(dis86_t *x, uint_t opindex, uint_t modrm,
3449*8b0687e2SRobert Mustacchi     evex_disp8_tuple_type_t type, uint_t evex_L, uint_t evex_B, uint_t evex_W)
345081b505b7SJerry Jelinek {
3451*8b0687e2SRobert Mustacchi 	uint8_t mult[3];
345281b505b7SJerry Jelinek 	d86opnd_t *opnd = &x->d86_opnd[opindex];
345381b505b7SJerry Jelinek 
345481b505b7SJerry Jelinek 	if (x->d86_error)
345581b505b7SJerry Jelinek 		return;
345681b505b7SJerry Jelinek 
345781b505b7SJerry Jelinek 	/* Check disp8 bit in the ModR/M byte */
345881b505b7SJerry Jelinek 	if ((modrm & 0x80) == 0x80)
345981b505b7SJerry Jelinek 		return;
346081b505b7SJerry Jelinek 
3461*8b0687e2SRobert Mustacchi 	switch (type) {
3462*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_MEM:
3463*8b0687e2SRobert Mustacchi 		mult[0] = 16;
3464*8b0687e2SRobert Mustacchi 		mult[1] = 32;
3465*8b0687e2SRobert Mustacchi 		mult[2] = 64;
346681b505b7SJerry Jelinek 		break;
3467*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_BCAST:
3468*8b0687e2SRobert Mustacchi 		if (evex_B != 0) {
3469*8b0687e2SRobert Mustacchi 			if (evex_W != 0) {
3470*8b0687e2SRobert Mustacchi 				mult[0] = 8;
3471*8b0687e2SRobert Mustacchi 				mult[1] = 8;
3472*8b0687e2SRobert Mustacchi 				mult[2] = 8;
3473*8b0687e2SRobert Mustacchi 			} else {
3474*8b0687e2SRobert Mustacchi 				mult[0] = 4;
3475*8b0687e2SRobert Mustacchi 				mult[1] = 4;
3476*8b0687e2SRobert Mustacchi 				mult[2] = 4;
3477*8b0687e2SRobert Mustacchi 			}
3478*8b0687e2SRobert Mustacchi 		} else {
3479*8b0687e2SRobert Mustacchi 			mult[0] = 16;
3480*8b0687e2SRobert Mustacchi 			mult[1] = 32;
3481*8b0687e2SRobert Mustacchi 			mult[2] = 64;
3482*8b0687e2SRobert Mustacchi 		}
348381b505b7SJerry Jelinek 		break;
3484*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_BCAST_HALF:
3485*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3486*8b0687e2SRobert Mustacchi 			x->d86_error = 1;
3487*8b0687e2SRobert Mustacchi 			return;
3488*8b0687e2SRobert Mustacchi 		}
3489*8b0687e2SRobert Mustacchi 		if (evex_B != 0) {
3490*8b0687e2SRobert Mustacchi 			mult[0] = 4;
3491*8b0687e2SRobert Mustacchi 			mult[1] = 4;
3492*8b0687e2SRobert Mustacchi 			mult[2] = 4;
3493*8b0687e2SRobert Mustacchi 		} else {
3494*8b0687e2SRobert Mustacchi 			mult[0] = 8;
3495*8b0687e2SRobert Mustacchi 			mult[1] = 16;
3496*8b0687e2SRobert Mustacchi 			mult[2] = 32;
3497*8b0687e2SRobert Mustacchi 		}
3498*8b0687e2SRobert Mustacchi 		break;
3499*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T1S_8B:
3500*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3501*8b0687e2SRobert Mustacchi 			mult[0] = 2;
3502*8b0687e2SRobert Mustacchi 			mult[1] = 2;
3503*8b0687e2SRobert Mustacchi 			mult[2] = 2;
3504*8b0687e2SRobert Mustacchi 		} else {
3505*8b0687e2SRobert Mustacchi 			mult[0] = 1;
3506*8b0687e2SRobert Mustacchi 			mult[1] = 1;
3507*8b0687e2SRobert Mustacchi 			mult[2] = 1;
3508*8b0687e2SRobert Mustacchi 		}
3509*8b0687e2SRobert Mustacchi 		break;
3510*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T1S:
3511*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3512*8b0687e2SRobert Mustacchi 			mult[0] = 4;
3513*8b0687e2SRobert Mustacchi 			mult[1] = 4;
3514*8b0687e2SRobert Mustacchi 			mult[2] = 4;
3515*8b0687e2SRobert Mustacchi 		} else {
3516*8b0687e2SRobert Mustacchi 			mult[0] = 8;
3517*8b0687e2SRobert Mustacchi 			mult[1] = 8;
3518*8b0687e2SRobert Mustacchi 			mult[2] = 8;
3519*8b0687e2SRobert Mustacchi 		}
3520*8b0687e2SRobert Mustacchi 		break;
3521*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T1F32:
3522*8b0687e2SRobert Mustacchi 		mult[0] = 4;
3523*8b0687e2SRobert Mustacchi 		mult[1] = 4;
3524*8b0687e2SRobert Mustacchi 		mult[2] = 4;
3525*8b0687e2SRobert Mustacchi 		break;
3526*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T1F64:
3527*8b0687e2SRobert Mustacchi 		mult[0] = 8;
3528*8b0687e2SRobert Mustacchi 		mult[1] = 8;
3529*8b0687e2SRobert Mustacchi 		mult[2] = 8;
3530*8b0687e2SRobert Mustacchi 		break;
3531*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T2:
3532*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3533*8b0687e2SRobert Mustacchi 			mult[0] = 8;
3534*8b0687e2SRobert Mustacchi 			mult[1] = 8;
3535*8b0687e2SRobert Mustacchi 			mult[2] = 8;
3536*8b0687e2SRobert Mustacchi 		} else {
3537*8b0687e2SRobert Mustacchi 			mult[0] = 16;
3538*8b0687e2SRobert Mustacchi 			mult[1] = 16;
3539*8b0687e2SRobert Mustacchi 			mult[2] = 16;
3540*8b0687e2SRobert Mustacchi 		}
3541*8b0687e2SRobert Mustacchi 		break;
3542*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T4:
3543*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3544*8b0687e2SRobert Mustacchi 			mult[0] = 16;
3545*8b0687e2SRobert Mustacchi 			mult[1] = 16;
3546*8b0687e2SRobert Mustacchi 			mult[2] = 16;
3547*8b0687e2SRobert Mustacchi 		} else {
3548*8b0687e2SRobert Mustacchi 			mult[0] = 32;
3549*8b0687e2SRobert Mustacchi 			mult[1] = 32;
3550*8b0687e2SRobert Mustacchi 			mult[2] = 32;
3551*8b0687e2SRobert Mustacchi 		}
3552*8b0687e2SRobert Mustacchi 		break;
3553*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_T8:
3554*8b0687e2SRobert Mustacchi 		if (evex_W != 0) {
3555*8b0687e2SRobert Mustacchi 			x->d86_error = 1;
3556*8b0687e2SRobert Mustacchi 			return;
3557*8b0687e2SRobert Mustacchi 		}
3558*8b0687e2SRobert Mustacchi 		mult[0] = 32;
3559*8b0687e2SRobert Mustacchi 		mult[1] = 32;
3560*8b0687e2SRobert Mustacchi 		mult[2] = 32;
3561*8b0687e2SRobert Mustacchi 		break;
3562*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_HMEM:
3563*8b0687e2SRobert Mustacchi 		mult[0] = 8;
3564*8b0687e2SRobert Mustacchi 		mult[1] = 16;
3565*8b0687e2SRobert Mustacchi 		mult[2] = 32;
3566*8b0687e2SRobert Mustacchi 		break;
3567*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_QMEM:
3568*8b0687e2SRobert Mustacchi 		mult[0] = 4;
3569*8b0687e2SRobert Mustacchi 		mult[1] = 8;
3570*8b0687e2SRobert Mustacchi 		mult[2] = 16;
3571*8b0687e2SRobert Mustacchi 		break;
3572*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_EMEM:
3573*8b0687e2SRobert Mustacchi 		mult[0] = 2;
3574*8b0687e2SRobert Mustacchi 		mult[1] = 4;
3575*8b0687e2SRobert Mustacchi 		mult[2] = 8;
3576*8b0687e2SRobert Mustacchi 		break;
3577*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_MEM128:
3578*8b0687e2SRobert Mustacchi 		mult[0] = 16;
3579*8b0687e2SRobert Mustacchi 		mult[1] = 16;
3580*8b0687e2SRobert Mustacchi 		mult[2] = 16;
3581*8b0687e2SRobert Mustacchi 		break;
3582*8b0687e2SRobert Mustacchi 	case EVEX_DISP8_MOVDUP:
3583*8b0687e2SRobert Mustacchi 		mult[0] = 8;
3584*8b0687e2SRobert Mustacchi 		mult[1] = 32;
3585*8b0687e2SRobert Mustacchi 		mult[2] = 64;
358681b505b7SJerry Jelinek 		break;
358781b505b7SJerry Jelinek 	}
3588*8b0687e2SRobert Mustacchi 
3589*8b0687e2SRobert Mustacchi 	opnd->d86_value *= mult[evex_L];
359081b505b7SJerry Jelinek }
359181b505b7SJerry Jelinek 
359281b505b7SJerry Jelinek /*
359381b505b7SJerry Jelinek  * Adjust target for opmask and zeroing. See IASDv2 Section 2.6.1 Table 2-30.
359481b505b7SJerry Jelinek  */
359581b505b7SJerry Jelinek static void
dtrace_evex_adjust_z_opmask(dis86_t * x,uint_t tgtop,uint_t evex_byte3)3596d242cdf5SJerry Jelinek dtrace_evex_adjust_z_opmask(dis86_t *x, uint_t tgtop, uint_t evex_byte3)
359781b505b7SJerry Jelinek {
359881b505b7SJerry Jelinek #ifdef DIS_TEXT
3599d242cdf5SJerry Jelinek 	char *opnd = x->d86_opnd[tgtop].d86_opnd;
360081b505b7SJerry Jelinek 	int opmask_reg = evex_byte3 & EVEX_OPREG_MASK;
360181b505b7SJerry Jelinek #endif
360281b505b7SJerry Jelinek 	if (x->d86_error)
360381b505b7SJerry Jelinek 		return;
360481b505b7SJerry Jelinek 
360581b505b7SJerry Jelinek #ifdef DIS_TEXT
360681b505b7SJerry Jelinek 	if (opmask_reg != 0) {
360781b505b7SJerry Jelinek 		/* Append the opmask register to operand 1 */
360881b505b7SJerry Jelinek 		(void) strlcat(opnd, "{", OPLEN);
360981b505b7SJerry Jelinek 		(void) strlcat(opnd, dis_KOPMASKREG[opmask_reg], OPLEN);
361081b505b7SJerry Jelinek 		(void) strlcat(opnd, "}", OPLEN);
361181b505b7SJerry Jelinek 	}
361281b505b7SJerry Jelinek 	if ((evex_byte3 & EVEX_ZERO_MASK) != 0) {
361381b505b7SJerry Jelinek 		/* Append the 'zeroing' modifier to operand 1 */
361481b505b7SJerry Jelinek 		(void) strlcat(opnd, "{z}", OPLEN);
361581b505b7SJerry Jelinek 	}
361681b505b7SJerry Jelinek #endif /* DIS_TEXT */
361781b505b7SJerry Jelinek }
361881b505b7SJerry Jelinek 
36193863692fSRobert Mustacchi /*
36203863692fSRobert Mustacchi  * Adjust the target for broadcast mode. This uses the GNU syntax for
36213863692fSRobert Mustacchi  * broadcasting of {1toX}. The EVEX W bit determines whether we have a 32-bit or
36223863692fSRobert Mustacchi  * 64-bit target that we're broadcasting to. Once we know that, then the
36233863692fSRobert Mustacchi  * register length determines the ratio.
36243863692fSRobert Mustacchi  */
36253863692fSRobert Mustacchi static void
dtrace_evex_adjust_bcast(dis86_t * x,uint_t tgtop,uint_t vex_W,uint_t wbit,uint_t evex_b)36263863692fSRobert Mustacchi dtrace_evex_adjust_bcast(dis86_t *x, uint_t tgtop, uint_t vex_W, uint_t wbit,
36273863692fSRobert Mustacchi     uint_t evex_b)
36283863692fSRobert Mustacchi {
36293863692fSRobert Mustacchi #ifdef DIS_TEXT
36303863692fSRobert Mustacchi 	char *opnd = x->d86_opnd[tgtop].d86_opnd;
36313863692fSRobert Mustacchi 	const char *bcast;
36323863692fSRobert Mustacchi #endif
36333863692fSRobert Mustacchi 	if (x->d86_error || evex_b == 0)
36343863692fSRobert Mustacchi 		return;
36353863692fSRobert Mustacchi 
36363863692fSRobert Mustacchi 	/*
36373863692fSRobert Mustacchi 	 * vex_W tells us whether this is a 32-bit or 64-bit broadcast. The
36383863692fSRobert Mustacchi 	 * ratio then assumes a full tuple right now and therefore this is just
36393863692fSRobert Mustacchi 	 * vector / size.
36403863692fSRobert Mustacchi 	 */
36413863692fSRobert Mustacchi 	switch (wbit) {
36423863692fSRobert Mustacchi 	case XMM_OPND:
36433863692fSRobert Mustacchi #ifdef DIS_TEXT
36443863692fSRobert Mustacchi 		bcast = vex_W == 0 ? "4" : "2";
36453863692fSRobert Mustacchi #endif
36463863692fSRobert Mustacchi 		break;
36473863692fSRobert Mustacchi 	case YMM_OPND:
36483863692fSRobert Mustacchi #ifdef DIS_TEXT
36493863692fSRobert Mustacchi 		bcast = vex_W == 0 ? "8" : "4";
36503863692fSRobert Mustacchi #endif
36513863692fSRobert Mustacchi 		break;
36523863692fSRobert Mustacchi 	case ZMM_OPND:
36533863692fSRobert Mustacchi #ifdef DIS_TEXT
36543863692fSRobert Mustacchi 		bcast = vex_W == 0 ? "16" : "8";
36553863692fSRobert Mustacchi #endif
36563863692fSRobert Mustacchi 		break;
36573863692fSRobert Mustacchi 	default:
36583863692fSRobert Mustacchi 		x->d86_error = 1;
36593863692fSRobert Mustacchi 		return;
36603863692fSRobert Mustacchi 	}
36613863692fSRobert Mustacchi 
36623863692fSRobert Mustacchi #ifdef DIS_TEXT
36633863692fSRobert Mustacchi 	(void) strlcat(opnd, "{1to", OPLEN);
36643863692fSRobert Mustacchi 	(void) strlcat(opnd, bcast, OPLEN);
36653863692fSRobert Mustacchi 	(void) strlcat(opnd, "}", OPLEN);
36663863692fSRobert Mustacchi #endif /* DIS_TEXT */
36673863692fSRobert Mustacchi }
36683863692fSRobert Mustacchi 
36697c478bd9Sstevel@tonic-gate /*
36707c478bd9Sstevel@tonic-gate  * Get an immediate operand of the given size, with sign extension.
36717c478bd9Sstevel@tonic-gate  */
36727c478bd9Sstevel@tonic-gate static void
dtrace_imm_opnd(dis86_t * x,int wbit,int size,int opindex)36737c478bd9Sstevel@tonic-gate dtrace_imm_opnd(dis86_t *x, int wbit, int size, int opindex)
36747c478bd9Sstevel@tonic-gate {
36757c478bd9Sstevel@tonic-gate 	int i;
36767c478bd9Sstevel@tonic-gate 	int byte;
36777c478bd9Sstevel@tonic-gate 	int valsize;
36787c478bd9Sstevel@tonic-gate 
36797c478bd9Sstevel@tonic-gate 	if (x->d86_numopnds < opindex + 1)
36807c478bd9Sstevel@tonic-gate 		x->d86_numopnds = opindex + 1;
36817c478bd9Sstevel@tonic-gate 
36827c478bd9Sstevel@tonic-gate 	switch (wbit) {
36837c478bd9Sstevel@tonic-gate 	case BYTE_OPND:
36847c478bd9Sstevel@tonic-gate 		valsize = 1;
36857c478bd9Sstevel@tonic-gate 		break;
36867c478bd9Sstevel@tonic-gate 	case LONG_OPND:
36877c478bd9Sstevel@tonic-gate 		if (x->d86_opnd_size == SIZE16)
36887c478bd9Sstevel@tonic-gate 			valsize = 2;
36897c478bd9Sstevel@tonic-gate 		else if (x->d86_opnd_size == SIZE32)
36907c478bd9Sstevel@tonic-gate 			valsize = 4;
36917c478bd9Sstevel@tonic-gate 		else
36927c478bd9Sstevel@tonic-gate 			valsize = 8;
36937c478bd9Sstevel@tonic-gate 		break;
36947c478bd9Sstevel@tonic-gate 	case MM_OPND:
36957c478bd9Sstevel@tonic-gate 	case XMM_OPND:
3696ab47273fSEdward Gillett 	case YMM_OPND:
369781b505b7SJerry Jelinek 	case ZMM_OPND:
36987c478bd9Sstevel@tonic-gate 	case SEG_OPND:
36997c478bd9Sstevel@tonic-gate 	case CONTROL_OPND:
37007c478bd9Sstevel@tonic-gate 	case DEBUG_OPND:
37017c478bd9Sstevel@tonic-gate 	case TEST_OPND:
37027c478bd9Sstevel@tonic-gate 		valsize = size;
37037c478bd9Sstevel@tonic-gate 		break;
37047c478bd9Sstevel@tonic-gate 	case WORD_OPND:
37057c478bd9Sstevel@tonic-gate 		valsize = 2;
37067c478bd9Sstevel@tonic-gate 		break;
37077c478bd9Sstevel@tonic-gate 	}
37087c478bd9Sstevel@tonic-gate 	if (valsize < size)
37097c478bd9Sstevel@tonic-gate 		valsize = size;
37107c478bd9Sstevel@tonic-gate 
37117c478bd9Sstevel@tonic-gate 	if (x->d86_error)
37127c478bd9Sstevel@tonic-gate 		return;
37137c478bd9Sstevel@tonic-gate 	x->d86_opnd[opindex].d86_value = 0;
37147c478bd9Sstevel@tonic-gate 	for (i = 0; i < size; ++i) {
37157c478bd9Sstevel@tonic-gate 		byte = x->d86_get_byte(x->d86_data);
37167c478bd9Sstevel@tonic-gate 		if (byte < 0) {
37177c478bd9Sstevel@tonic-gate 			x->d86_error = 1;
37187c478bd9Sstevel@tonic-gate 			return;
37197c478bd9Sstevel@tonic-gate 		}
37207c478bd9Sstevel@tonic-gate 		x->d86_bytes[x->d86_len++] = byte;
37217c478bd9Sstevel@tonic-gate 		x->d86_opnd[opindex].d86_value |= (uint64_t)byte << (i * 8);
37227c478bd9Sstevel@tonic-gate 	}
37237c478bd9Sstevel@tonic-gate 	/* Do sign extension */
37247c478bd9Sstevel@tonic-gate 	if (x->d86_bytes[x->d86_len - 1] & 0x80) {
3725d267098bSdmick 		for (; i < sizeof (uint64_t); i++)
37267c478bd9Sstevel@tonic-gate 			x->d86_opnd[opindex].d86_value |=
3727d267098bSdmick 			    (uint64_t)0xff << (i * 8);
37287c478bd9Sstevel@tonic-gate 	}
37297c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
37307c478bd9Sstevel@tonic-gate 	x->d86_opnd[opindex].d86_mode = MODE_SIGNED;
37317c478bd9Sstevel@tonic-gate 	x->d86_opnd[opindex].d86_value_size = valsize;
37327c478bd9Sstevel@tonic-gate 	x->d86_imm_bytes += size;
37337c478bd9Sstevel@tonic-gate #endif
37347c478bd9Sstevel@tonic-gate }
37357c478bd9Sstevel@tonic-gate 
37367c478bd9Sstevel@tonic-gate /*
37377c478bd9Sstevel@tonic-gate  * Get an ip relative operand of the given size, with sign extension.
37387c478bd9Sstevel@tonic-gate  */
37397c478bd9Sstevel@tonic-gate static void
dtrace_disp_opnd(dis86_t * x,int wbit,int size,int opindex)37407c478bd9Sstevel@tonic-gate dtrace_disp_opnd(dis86_t *x, int wbit, int size, int opindex)
37417c478bd9Sstevel@tonic-gate {
37427c478bd9Sstevel@tonic-gate 	dtrace_imm_opnd(x, wbit, size, opindex);
37437c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
37447c478bd9Sstevel@tonic-gate 	x->d86_opnd[opindex].d86_mode = MODE_IPREL;
37457c478bd9Sstevel@tonic-gate #endif
37467c478bd9Sstevel@tonic-gate }
37477c478bd9Sstevel@tonic-gate 
37487c478bd9Sstevel@tonic-gate /*
37497c478bd9Sstevel@tonic-gate  * Check to see if there is a segment override prefix pending.
37507c478bd9Sstevel@tonic-gate  * If so, print it in the current 'operand' location and set
37517c478bd9Sstevel@tonic-gate  * the override flag back to false.
37527c478bd9Sstevel@tonic-gate  */
37537c478bd9Sstevel@tonic-gate /*ARGSUSED*/
37547c478bd9Sstevel@tonic-gate static void
dtrace_check_override(dis86_t * x,int opindex)37557c478bd9Sstevel@tonic-gate dtrace_check_override(dis86_t *x, int opindex)
37567c478bd9Sstevel@tonic-gate {
37577c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
37587c478bd9Sstevel@tonic-gate 	if (x->d86_seg_prefix) {
3759dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[opindex].d86_prefix,
37607c478bd9Sstevel@tonic-gate 		    x->d86_seg_prefix, PFIXLEN);
37617c478bd9Sstevel@tonic-gate 	}
37627c478bd9Sstevel@tonic-gate #endif
37637c478bd9Sstevel@tonic-gate 	x->d86_seg_prefix = NULL;
37647c478bd9Sstevel@tonic-gate }
37657c478bd9Sstevel@tonic-gate 
37667c478bd9Sstevel@tonic-gate 
37677c478bd9Sstevel@tonic-gate /*
37687c478bd9Sstevel@tonic-gate  * Process a single instruction Register or Memory operand.
37697c478bd9Sstevel@tonic-gate  *
37707c478bd9Sstevel@tonic-gate  * mode = addressing mode from ModRM byte
37717c478bd9Sstevel@tonic-gate  * r_m = r_m (or reg if mode == 3) field from ModRM byte
37727c478bd9Sstevel@tonic-gate  * wbit = indicates which register (8bit, 16bit, ... MMX, etc.) set to use.
37737c478bd9Sstevel@tonic-gate  * o = index of operand that we are processing (0, 1 or 2)
37747c478bd9Sstevel@tonic-gate  *
37757c478bd9Sstevel@tonic-gate  * the value of reg or r_m must have already been adjusted for any REX prefix.
37767c478bd9Sstevel@tonic-gate  */
37777c478bd9Sstevel@tonic-gate /*ARGSUSED*/
37787c478bd9Sstevel@tonic-gate static void
dtrace_get_operand(dis86_t * x,uint_t mode,uint_t r_m,int wbit,int opindex)37797c478bd9Sstevel@tonic-gate dtrace_get_operand(dis86_t *x, uint_t mode, uint_t r_m, int wbit, int opindex)
37807c478bd9Sstevel@tonic-gate {
37817c478bd9Sstevel@tonic-gate 	int have_SIB = 0;	/* flag presence of scale-index-byte */
37827c478bd9Sstevel@tonic-gate 	uint_t ss;		/* scale-factor from opcode */
37837c478bd9Sstevel@tonic-gate 	uint_t index;		/* index register number */
37847c478bd9Sstevel@tonic-gate 	uint_t base;		/* base register number */
3785cff040f3SRobert Mustacchi 	int dispsize;		/* size of displacement in bytes */
37867c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
37877c478bd9Sstevel@tonic-gate 	char *opnd = x->d86_opnd[opindex].d86_opnd;
37887c478bd9Sstevel@tonic-gate #endif
37897c478bd9Sstevel@tonic-gate 
37907c478bd9Sstevel@tonic-gate 	if (x->d86_numopnds < opindex + 1)
37917c478bd9Sstevel@tonic-gate 		x->d86_numopnds = opindex + 1;
37927c478bd9Sstevel@tonic-gate 
37937c478bd9Sstevel@tonic-gate 	if (x->d86_error)
37947c478bd9Sstevel@tonic-gate 		return;
37957c478bd9Sstevel@tonic-gate 
37967c478bd9Sstevel@tonic-gate 	/*
37977c478bd9Sstevel@tonic-gate 	 * first handle a simple register
37987c478bd9Sstevel@tonic-gate 	 */
37997c478bd9Sstevel@tonic-gate 	if (mode == REG_ONLY) {
38007c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
38017c478bd9Sstevel@tonic-gate 		switch (wbit) {
38027c478bd9Sstevel@tonic-gate 		case MM_OPND:
3803dc0093f4Seschrock 			(void) strlcat(opnd, dis_MMREG[r_m], OPLEN);
38047c478bd9Sstevel@tonic-gate 			break;
38057c478bd9Sstevel@tonic-gate 		case XMM_OPND:
3806dc0093f4Seschrock 			(void) strlcat(opnd, dis_XMMREG[r_m], OPLEN);
38077c478bd9Sstevel@tonic-gate 			break;
3808ab47273fSEdward Gillett 		case YMM_OPND:
3809ab47273fSEdward Gillett 			(void) strlcat(opnd, dis_YMMREG[r_m], OPLEN);
3810ab47273fSEdward Gillett 			break;
381181b505b7SJerry Jelinek 		case ZMM_OPND:
381281b505b7SJerry Jelinek 			(void) strlcat(opnd, dis_ZMMREG[r_m], OPLEN);
381381b505b7SJerry Jelinek 			break;
3814a4e73d5dSJerry Jelinek 		case KOPMASK_OPND:
3815a4e73d5dSJerry Jelinek 			(void) strlcat(opnd, dis_KOPMASKREG[r_m], OPLEN);
3816a4e73d5dSJerry Jelinek 			break;
38177c478bd9Sstevel@tonic-gate 		case SEG_OPND:
3818dc0093f4Seschrock 			(void) strlcat(opnd, dis_SEGREG[r_m], OPLEN);
38197c478bd9Sstevel@tonic-gate 			break;
38207c478bd9Sstevel@tonic-gate 		case CONTROL_OPND:
3821dc0093f4Seschrock 			(void) strlcat(opnd, dis_CONTROLREG[r_m], OPLEN);
38227c478bd9Sstevel@tonic-gate 			break;
38237c478bd9Sstevel@tonic-gate 		case DEBUG_OPND:
3824dc0093f4Seschrock 			(void) strlcat(opnd, dis_DEBUGREG[r_m], OPLEN);
38257c478bd9Sstevel@tonic-gate 			break;
38267c478bd9Sstevel@tonic-gate 		case TEST_OPND:
3827dc0093f4Seschrock 			(void) strlcat(opnd, dis_TESTREG[r_m], OPLEN);
38287c478bd9Sstevel@tonic-gate 			break;
38297c478bd9Sstevel@tonic-gate 		case BYTE_OPND:
38307c478bd9Sstevel@tonic-gate 			if (x->d86_rex_prefix == 0)
3831dc0093f4Seschrock 				(void) strlcat(opnd, dis_REG8[r_m], OPLEN);
38327c478bd9Sstevel@tonic-gate 			else
3833dc0093f4Seschrock 				(void) strlcat(opnd, dis_REG8_REX[r_m], OPLEN);
38347c478bd9Sstevel@tonic-gate 			break;
38357c478bd9Sstevel@tonic-gate 		case WORD_OPND:
3836dc0093f4Seschrock 			(void) strlcat(opnd, dis_REG16[r_m], OPLEN);
38377c478bd9Sstevel@tonic-gate 			break;
38387c478bd9Sstevel@tonic-gate 		case LONG_OPND:
38397c478bd9Sstevel@tonic-gate 			if (x->d86_opnd_size == SIZE16)
3840dc0093f4Seschrock 				(void) strlcat(opnd, dis_REG16[r_m], OPLEN);
38417c478bd9Sstevel@tonic-gate 			else if (x->d86_opnd_size == SIZE32)
3842dc0093f4Seschrock 				(void) strlcat(opnd, dis_REG32[r_m], OPLEN);
38437c478bd9Sstevel@tonic-gate 			else
3844dc0093f4Seschrock 				(void) strlcat(opnd, dis_REG64[r_m], OPLEN);
38457c478bd9Sstevel@tonic-gate 			break;
38467c478bd9Sstevel@tonic-gate 		}
38477c478bd9Sstevel@tonic-gate #endif /* DIS_TEXT */
38487c478bd9Sstevel@tonic-gate 		return;
38497c478bd9Sstevel@tonic-gate 	}
38507c478bd9Sstevel@tonic-gate 
38517c478bd9Sstevel@tonic-gate 	/*
38527c478bd9Sstevel@tonic-gate 	 * if symbolic representation, skip override prefix, if any
38537c478bd9Sstevel@tonic-gate 	 */
38547c478bd9Sstevel@tonic-gate 	dtrace_check_override(x, opindex);
38557c478bd9Sstevel@tonic-gate 
38567c478bd9Sstevel@tonic-gate 	/*
38577c478bd9Sstevel@tonic-gate 	 * Handle 16 bit memory references first, since they decode
38587c478bd9Sstevel@tonic-gate 	 * the mode values more simply.
38597c478bd9Sstevel@tonic-gate 	 * mode 1 is r_m + 8 bit displacement
38607c478bd9Sstevel@tonic-gate 	 * mode 2 is r_m + 16 bit displacement
38617c478bd9Sstevel@tonic-gate 	 * mode 0 is just r_m, unless r_m is 6 which is 16 bit disp
38627c478bd9Sstevel@tonic-gate 	 */
38637c478bd9Sstevel@tonic-gate 	if (x->d86_addr_size == SIZE16) {
38647c478bd9Sstevel@tonic-gate 		if ((mode == 0 && r_m == 6) || mode == 2)
38657c478bd9Sstevel@tonic-gate 			dtrace_imm_opnd(x, WORD_OPND, 2, opindex);
38667c478bd9Sstevel@tonic-gate 		else if (mode == 1)
38677c478bd9Sstevel@tonic-gate 			dtrace_imm_opnd(x, BYTE_OPND, 1, opindex);
38687c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
38697c478bd9Sstevel@tonic-gate 		if (mode == 0 && r_m == 6)
38707c478bd9Sstevel@tonic-gate 			x->d86_opnd[opindex].d86_mode = MODE_SIGNED;
38717c478bd9Sstevel@tonic-gate 		else if (mode == 0)
38727c478bd9Sstevel@tonic-gate 			x->d86_opnd[opindex].d86_mode = MODE_NONE;
38737c478bd9Sstevel@tonic-gate 		else
38747c478bd9Sstevel@tonic-gate 			x->d86_opnd[opindex].d86_mode = MODE_OFFSET;
3875dc0093f4Seschrock 		(void) strlcat(opnd, dis_addr16[mode][r_m], OPLEN);
38767c478bd9Sstevel@tonic-gate #endif
38777c478bd9Sstevel@tonic-gate 		return;
38787c478bd9Sstevel@tonic-gate 	}
38797c478bd9Sstevel@tonic-gate 
38807c478bd9Sstevel@tonic-gate 	/*
3881a25e615dSRobert Mustacchi 	 * 32 and 64 bit addressing modes are more complex since they can
3882a25e615dSRobert Mustacchi 	 * involve an SIB (scaled index and base) byte to decode. When using VEX
3883a25e615dSRobert Mustacchi 	 * and EVEX encodings, the r_m indicator for a SIB may be offset by 8
3884a25e615dSRobert Mustacchi 	 * and 24 (8 + 16) respectively.
38857c478bd9Sstevel@tonic-gate 	 */
3886a25e615dSRobert Mustacchi 	if (r_m == ESP_REGNO || r_m == ESP_REGNO + 8 || r_m == ESP_REGNO + 24) {
38877c478bd9Sstevel@tonic-gate 		have_SIB = 1;
38887c478bd9Sstevel@tonic-gate 		dtrace_get_SIB(x, &ss, &index, &base);
38897c478bd9Sstevel@tonic-gate 		if (x->d86_error)
38907c478bd9Sstevel@tonic-gate 			return;
38917c478bd9Sstevel@tonic-gate 		if (base != 5 || mode != 0)
38927c478bd9Sstevel@tonic-gate 			if (x->d86_rex_prefix & REX_B)
38937c478bd9Sstevel@tonic-gate 				base += 8;
38947c478bd9Sstevel@tonic-gate 		if (x->d86_rex_prefix & REX_X)
38957c478bd9Sstevel@tonic-gate 			index += 8;
38967c478bd9Sstevel@tonic-gate 	} else {
38977c478bd9Sstevel@tonic-gate 		base = r_m;
38987c478bd9Sstevel@tonic-gate 	}
38997c478bd9Sstevel@tonic-gate 
39007c478bd9Sstevel@tonic-gate 	/*
39017c478bd9Sstevel@tonic-gate 	 * Compute the displacement size and get its bytes
39027c478bd9Sstevel@tonic-gate 	 */
39037c478bd9Sstevel@tonic-gate 	dispsize = 0;
39047c478bd9Sstevel@tonic-gate 
39057c478bd9Sstevel@tonic-gate 	if (mode == 1)
39067c478bd9Sstevel@tonic-gate 		dispsize = 1;
39077c478bd9Sstevel@tonic-gate 	else if (mode == 2)
39087c478bd9Sstevel@tonic-gate 		dispsize = 4;
39097c478bd9Sstevel@tonic-gate 	else if ((r_m & 7) == EBP_REGNO ||
39107c478bd9Sstevel@tonic-gate 	    (have_SIB && (base & 7) == EBP_REGNO))
39117c478bd9Sstevel@tonic-gate 		dispsize = 4;
39127c478bd9Sstevel@tonic-gate 
39137c478bd9Sstevel@tonic-gate 	if (dispsize > 0) {
39147c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, dispsize == 4 ? LONG_OPND : BYTE_OPND,
39157c478bd9Sstevel@tonic-gate 		    dispsize, opindex);
39167c478bd9Sstevel@tonic-gate 		if (x->d86_error)
39177c478bd9Sstevel@tonic-gate 			return;
39187c478bd9Sstevel@tonic-gate 	}
39197c478bd9Sstevel@tonic-gate 
39207c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
39217c478bd9Sstevel@tonic-gate 	if (dispsize > 0)
39227c478bd9Sstevel@tonic-gate 		x->d86_opnd[opindex].d86_mode = MODE_OFFSET;
39237c478bd9Sstevel@tonic-gate 
39247c478bd9Sstevel@tonic-gate 	if (have_SIB == 0) {
39257c478bd9Sstevel@tonic-gate 		if (x->d86_mode == SIZE32) {
39267c478bd9Sstevel@tonic-gate 			if (mode == 0)
3927dc0093f4Seschrock 				(void) strlcat(opnd, dis_addr32_mode0[r_m],
39287c478bd9Sstevel@tonic-gate 				    OPLEN);
39297c478bd9Sstevel@tonic-gate 			else
3930dc0093f4Seschrock 				(void) strlcat(opnd, dis_addr32_mode12[r_m],
39317c478bd9Sstevel@tonic-gate 				    OPLEN);
39327c478bd9Sstevel@tonic-gate 		} else {
3933d267098bSdmick 			if (mode == 0) {
3934dc0093f4Seschrock 				(void) strlcat(opnd, dis_addr64_mode0[r_m],
39357c478bd9Sstevel@tonic-gate 				    OPLEN);
3936d267098bSdmick 				if (r_m == 5) {
3937d267098bSdmick 					x->d86_opnd[opindex].d86_mode =
3938d267098bSdmick 					    MODE_RIPREL;
3939d267098bSdmick 				}
3940d267098bSdmick 			} else {
3941dc0093f4Seschrock 				(void) strlcat(opnd, dis_addr64_mode12[r_m],
39427c478bd9Sstevel@tonic-gate 				    OPLEN);
3943d267098bSdmick 			}
39447c478bd9Sstevel@tonic-gate 		}
39457c478bd9Sstevel@tonic-gate 	} else {
39467c478bd9Sstevel@tonic-gate 		uint_t need_paren = 0;
39477c478bd9Sstevel@tonic-gate 		char **regs;
3948245ac945SRobert Mustacchi 		char **bregs;
3949245ac945SRobert Mustacchi 		const char *const *sf;
39507c478bd9Sstevel@tonic-gate 		if (x->d86_mode == SIZE32) /* NOTE this is not addr_size! */
39517c478bd9Sstevel@tonic-gate 			regs = (char **)dis_REG32;
39527c478bd9Sstevel@tonic-gate 		else
39537c478bd9Sstevel@tonic-gate 			regs = (char **)dis_REG64;
39547c478bd9Sstevel@tonic-gate 
3955245ac945SRobert Mustacchi 		if (x->d86_vsib != 0) {
395681b505b7SJerry Jelinek 			if (wbit == YMM_OPND) { /* NOTE this is not addr_size */
3957245ac945SRobert Mustacchi 				bregs = (char **)dis_YMMREG;
395881b505b7SJerry Jelinek 			} else if (wbit == XMM_OPND) {
3959245ac945SRobert Mustacchi 				bregs = (char **)dis_XMMREG;
396081b505b7SJerry Jelinek 			} else {
396181b505b7SJerry Jelinek 				bregs = (char **)dis_ZMMREG;
396281b505b7SJerry Jelinek 			}
3963245ac945SRobert Mustacchi 			sf = dis_vscale_factor;
3964245ac945SRobert Mustacchi 		} else {
3965245ac945SRobert Mustacchi 			bregs = regs;
3966245ac945SRobert Mustacchi 			sf = dis_scale_factor;
3967245ac945SRobert Mustacchi 		}
3968245ac945SRobert Mustacchi 
39697c478bd9Sstevel@tonic-gate 		/*
39707c478bd9Sstevel@tonic-gate 		 * print the base (if any)
39717c478bd9Sstevel@tonic-gate 		 */
39727c478bd9Sstevel@tonic-gate 		if (base == EBP_REGNO && mode == 0) {
3973245ac945SRobert Mustacchi 			if (index != ESP_REGNO || x->d86_vsib != 0) {
3974dc0093f4Seschrock 				(void) strlcat(opnd, "(", OPLEN);
39757c478bd9Sstevel@tonic-gate 				need_paren = 1;
39767c478bd9Sstevel@tonic-gate 			}
39777c478bd9Sstevel@tonic-gate 		} else {
3978dc0093f4Seschrock 			(void) strlcat(opnd, "(", OPLEN);
3979dc0093f4Seschrock 			(void) strlcat(opnd, regs[base], OPLEN);
39807c478bd9Sstevel@tonic-gate 			need_paren = 1;
39817c478bd9Sstevel@tonic-gate 		}
39827c478bd9Sstevel@tonic-gate 
39837c478bd9Sstevel@tonic-gate 		/*
39847c478bd9Sstevel@tonic-gate 		 * print the index (if any)
39857c478bd9Sstevel@tonic-gate 		 */
3986245ac945SRobert Mustacchi 		if (index != ESP_REGNO || x->d86_vsib) {
3987dc0093f4Seschrock 			(void) strlcat(opnd, ",", OPLEN);
3988245ac945SRobert Mustacchi 			(void) strlcat(opnd, bregs[index], OPLEN);
3989245ac945SRobert Mustacchi 			(void) strlcat(opnd, sf[ss], OPLEN);
39907c478bd9Sstevel@tonic-gate 		} else
39917c478bd9Sstevel@tonic-gate 			if (need_paren)
3992dc0093f4Seschrock 				(void) strlcat(opnd, ")", OPLEN);
39937c478bd9Sstevel@tonic-gate 	}
39947c478bd9Sstevel@tonic-gate #endif
39957c478bd9Sstevel@tonic-gate }
39967c478bd9Sstevel@tonic-gate 
39977c478bd9Sstevel@tonic-gate /*
39987c478bd9Sstevel@tonic-gate  * Operand sequence for standard instruction involving one register
39997c478bd9Sstevel@tonic-gate  * and one register/memory operand.
40007c478bd9Sstevel@tonic-gate  * wbit indicates a byte(0) or opnd_size(1) operation
40017c478bd9Sstevel@tonic-gate  * vbit indicates direction (0 for "opcode r,r_m") or (1 for "opcode r_m, r")
40027c478bd9Sstevel@tonic-gate  */
40037c478bd9Sstevel@tonic-gate #define	STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, vbit)  {	\
40047c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);			\
40057c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);	\
40067c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, vbit);		\
40077c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1 - vbit);	\
40087c478bd9Sstevel@tonic-gate }
40097c478bd9Sstevel@tonic-gate 
40107c478bd9Sstevel@tonic-gate /*
40117c478bd9Sstevel@tonic-gate  * Similar to above, but allows for the two operands to be of different
40127c478bd9Sstevel@tonic-gate  * classes (ie. wbit).
40137c478bd9Sstevel@tonic-gate  *	wbit is for the r_m operand
40147c478bd9Sstevel@tonic-gate  *	w2 is for the reg operand
40157c478bd9Sstevel@tonic-gate  */
40167c478bd9Sstevel@tonic-gate #define	MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, w2, vbit)	{	\
40177c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);			\
40187c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);	\
40197c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, vbit);		\
40207c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, w2, 1 - vbit);	\
40217c478bd9Sstevel@tonic-gate }
40227c478bd9Sstevel@tonic-gate 
40237c478bd9Sstevel@tonic-gate /*
40247c478bd9Sstevel@tonic-gate  * Similar, but for 2 operands plus an immediate.
4025a2f205d0Skk  * vbit indicates direction
4026cff040f3SRobert Mustacchi  *	0 for "opcode imm, r, r_m" or
4027a2f205d0Skk  *	1 for "opcode imm, r_m, r"
40287c478bd9Sstevel@tonic-gate  */
4029a2f205d0Skk #define	THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize, vbit) { \
40307c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);			\
40317c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);	\
4032a2f205d0Skk 		dtrace_get_operand(x, mode, r_m, wbit, 2-vbit);		\
4033a2f205d0Skk 		dtrace_get_operand(x, REG_ONLY, reg, w2, 1+vbit);	\
40347c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, immsize, 0);			\
40357c478bd9Sstevel@tonic-gate }
40367c478bd9Sstevel@tonic-gate 
4037f8801251Skk /*
4038f8801251Skk  * Similar, but for 2 operands plus two immediates.
4039f8801251Skk  */
4040f8801251Skk #define	FOUROPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize) { \
4041f8801251Skk 		dtrace_get_modrm(x, &mode, &reg, &r_m);			\
4042f8801251Skk 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);	\
4043f8801251Skk 		dtrace_get_operand(x, mode, r_m, wbit, 2);		\
4044f8801251Skk 		dtrace_get_operand(x, REG_ONLY, reg, w2, 3);		\
4045f8801251Skk 		dtrace_imm_opnd(x, wbit, immsize, 1);			\
4046f8801251Skk 		dtrace_imm_opnd(x, wbit, immsize, 0);			\
4047f8801251Skk }
4048f8801251Skk 
4049f8801251Skk /*
4050f8801251Skk  * 1 operands plus two immediates.
4051f8801251Skk  */
4052f8801251Skk #define	ONEOPERAND_TWOIMM(x, mode, reg, r_m, rex_prefix, wbit, immsize) { \
4053f8801251Skk 		dtrace_get_modrm(x, &mode, &reg, &r_m);			\
4054f8801251Skk 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);	\
4055f8801251Skk 		dtrace_get_operand(x, mode, r_m, wbit, 2);		\
4056f8801251Skk 		dtrace_imm_opnd(x, wbit, immsize, 1);			\
4057f8801251Skk 		dtrace_imm_opnd(x, wbit, immsize, 0);			\
4058f8801251Skk }
4059f8801251Skk 
40607c478bd9Sstevel@tonic-gate /*
40617c478bd9Sstevel@tonic-gate  * Dissassemble a single x86 or amd64 instruction.
40627c478bd9Sstevel@tonic-gate  *
40637c478bd9Sstevel@tonic-gate  * Mode determines the default operating mode (SIZE16, SIZE32 or SIZE64)
40647c478bd9Sstevel@tonic-gate  * for interpreting instructions.
40657c478bd9Sstevel@tonic-gate  *
40667c478bd9Sstevel@tonic-gate  * returns non-zero for bad opcode
40677c478bd9Sstevel@tonic-gate  */
40687c478bd9Sstevel@tonic-gate int
dtrace_disx86(dis86_t * x,uint_t cpu_mode)40697c478bd9Sstevel@tonic-gate dtrace_disx86(dis86_t *x, uint_t cpu_mode)
40707c478bd9Sstevel@tonic-gate {
4071584b574aSToomas Soome 	const instable_t *dp = NULL;	/* decode table being used */
40727c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
40737c478bd9Sstevel@tonic-gate 	uint_t i;
40747c478bd9Sstevel@tonic-gate #endif
40757c478bd9Sstevel@tonic-gate #ifdef DIS_MEM
40767c478bd9Sstevel@tonic-gate 	uint_t nomem = 0;
40777c478bd9Sstevel@tonic-gate #define	NOMEM	(nomem = 1)
40787c478bd9Sstevel@tonic-gate #else
40797c478bd9Sstevel@tonic-gate #define	NOMEM	/* nothing */
40807c478bd9Sstevel@tonic-gate #endif
4081f9b62eacSjhaslam 	uint_t opnd_size;	/* SIZE16, SIZE32 or SIZE64 */
4082f9b62eacSjhaslam 	uint_t addr_size;	/* SIZE16, SIZE32 or SIZE64 */
40837c478bd9Sstevel@tonic-gate 	uint_t wbit;		/* opcode wbit, 0 is 8 bit, !0 for opnd_size */
40847c478bd9Sstevel@tonic-gate 	uint_t w2;		/* wbit value for second operand */
40857c478bd9Sstevel@tonic-gate 	uint_t vbit;
40867c478bd9Sstevel@tonic-gate 	uint_t mode = 0;	/* mode value from ModRM byte */
40877c478bd9Sstevel@tonic-gate 	uint_t reg;		/* reg value from ModRM byte */
40887c478bd9Sstevel@tonic-gate 	uint_t r_m;		/* r_m value from ModRM byte */
40897c478bd9Sstevel@tonic-gate 
40907c478bd9Sstevel@tonic-gate 	uint_t opcode1;		/* high nibble of 1st byte */
40917c478bd9Sstevel@tonic-gate 	uint_t opcode2;		/* low nibble of 1st byte */
40927c478bd9Sstevel@tonic-gate 	uint_t opcode3;		/* extra opcode bits usually from ModRM byte */
40937c478bd9Sstevel@tonic-gate 	uint_t opcode4;		/* high nibble of 2nd byte */
4094d267098bSdmick 	uint_t opcode5;		/* low nibble of 2nd byte */
40957c478bd9Sstevel@tonic-gate 	uint_t opcode6;		/* high nibble of 3rd byte */
40967c478bd9Sstevel@tonic-gate 	uint_t opcode7;		/* low nibble of 3rd byte */
409781b505b7SJerry Jelinek 	uint_t opcode8;		/* high nibble of 4th byte */
409881b505b7SJerry Jelinek 	uint_t opcode9;		/* low nibble of 4th byte */
40997c478bd9Sstevel@tonic-gate 	uint_t opcode_bytes = 1;
41007c478bd9Sstevel@tonic-gate 
41017c478bd9Sstevel@tonic-gate 	/*
41027c478bd9Sstevel@tonic-gate 	 * legacy prefixes come in 5 flavors, you should have only one of each
41037c478bd9Sstevel@tonic-gate 	 */
41047c478bd9Sstevel@tonic-gate 	uint_t	opnd_size_prefix = 0;
41057c478bd9Sstevel@tonic-gate 	uint_t	addr_size_prefix = 0;
41067c478bd9Sstevel@tonic-gate 	uint_t	segment_prefix = 0;
41077c478bd9Sstevel@tonic-gate 	uint_t	lock_prefix = 0;
41087c478bd9Sstevel@tonic-gate 	uint_t	rep_prefix = 0;
41097c478bd9Sstevel@tonic-gate 	uint_t	rex_prefix = 0;	/* amd64 register extension prefix */
4110ab47273fSEdward Gillett 
4111ab47273fSEdward Gillett 	/*
4112ab47273fSEdward Gillett 	 * Intel VEX instruction encoding prefix and fields
4113ab47273fSEdward Gillett 	 */
4114ab47273fSEdward Gillett 
4115ab47273fSEdward Gillett 	/* 0xC4 means 3 bytes prefix, 0xC5 means 2 bytes prefix */
4116ab47273fSEdward Gillett 	uint_t vex_prefix = 0;
4117ab47273fSEdward Gillett 
4118ab47273fSEdward Gillett 	/*
4119ab47273fSEdward Gillett 	 * VEX prefix byte 1, includes vex.r, vex.x and vex.b
4120ab47273fSEdward Gillett 	 * (for 3 bytes prefix)
4121ab47273fSEdward Gillett 	 */
4122ab47273fSEdward Gillett 	uint_t vex_byte1 = 0;
4123ab47273fSEdward Gillett 
412481b505b7SJerry Jelinek 	/*
412581b505b7SJerry Jelinek 	 * EVEX prefix byte 1 includes vex.r, vex.x, vex.b and evex.r.
412681b505b7SJerry Jelinek 	 */
412781b505b7SJerry Jelinek 	uint_t evex_byte1 = 0;
412881b505b7SJerry Jelinek 	uint_t evex_byte2 = 0;
412981b505b7SJerry Jelinek 	uint_t evex_byte3 = 0;
413081b505b7SJerry Jelinek 
4131ab47273fSEdward Gillett 	/*
4132ab47273fSEdward Gillett 	 * For 32-bit mode, it should prefetch the next byte to
4133ab47273fSEdward Gillett 	 * distinguish between AVX and les/lds
4134ab47273fSEdward Gillett 	 */
4135ab47273fSEdward Gillett 	uint_t vex_prefetch = 0;
4136ab47273fSEdward Gillett 
4137ab47273fSEdward Gillett 	uint_t vex_m = 0;
4138ab47273fSEdward Gillett 	uint_t vex_v = 0;
4139ab47273fSEdward Gillett 	uint_t vex_p = 0;
4140ab47273fSEdward Gillett 	uint_t vex_R = 1;
4141ab47273fSEdward Gillett 	uint_t vex_X = 1;
4142ab47273fSEdward Gillett 	uint_t vex_B = 1;
4143ab47273fSEdward Gillett 	uint_t vex_W = 0;
4144d242cdf5SJerry Jelinek 	uint_t vex_L = 0;
4145d242cdf5SJerry Jelinek 	uint_t evex_L = 0;
41463863692fSRobert Mustacchi 	uint_t evex_b = 0;
4147d242cdf5SJerry Jelinek 	uint_t evex_modrm = 0;
4148a25e615dSRobert Mustacchi 	uint_t evex_prefix = 0;
4149245ac945SRobert Mustacchi 	dis_gather_regs_t *vreg;
4150ab47273fSEdward Gillett 
4151245ac945SRobert Mustacchi #ifdef	DIS_TEXT
4152245ac945SRobert Mustacchi 	/* Instruction name for BLS* family of instructions */
4153245ac945SRobert Mustacchi 	char *blsinstr;
4154245ac945SRobert Mustacchi #endif
4155ab47273fSEdward Gillett 
41567c478bd9Sstevel@tonic-gate 	size_t	off;
41577c478bd9Sstevel@tonic-gate 
4158d0f8ff6eSkk 	instable_t dp_mmx;
4159d0f8ff6eSkk 
41607c478bd9Sstevel@tonic-gate 	x->d86_len = 0;
41617c478bd9Sstevel@tonic-gate 	x->d86_rmindex = -1;
41627c478bd9Sstevel@tonic-gate 	x->d86_error = 0;
41637c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
41647c478bd9Sstevel@tonic-gate 	x->d86_numopnds = 0;
41657c478bd9Sstevel@tonic-gate 	x->d86_seg_prefix = NULL;
4166d267098bSdmick 	x->d86_mnem[0] = 0;
4167f8801251Skk 	for (i = 0; i < 4; ++i) {
41687c478bd9Sstevel@tonic-gate 		x->d86_opnd[i].d86_opnd[0] = 0;
41697c478bd9Sstevel@tonic-gate 		x->d86_opnd[i].d86_prefix[0] = 0;
41707c478bd9Sstevel@tonic-gate 		x->d86_opnd[i].d86_value_size = 0;
41717c478bd9Sstevel@tonic-gate 		x->d86_opnd[i].d86_value = 0;
41727c478bd9Sstevel@tonic-gate 		x->d86_opnd[i].d86_mode = MODE_NONE;
41737c478bd9Sstevel@tonic-gate 	}
41747c478bd9Sstevel@tonic-gate #endif
4175ab47273fSEdward Gillett 	x->d86_rex_prefix = 0;
4176ab47273fSEdward Gillett 	x->d86_got_modrm = 0;
41777c478bd9Sstevel@tonic-gate 	x->d86_memsize = 0;
4178245ac945SRobert Mustacchi 	x->d86_vsib = 0;
41797c478bd9Sstevel@tonic-gate 
41807c478bd9Sstevel@tonic-gate 	if (cpu_mode == SIZE16) {
41817c478bd9Sstevel@tonic-gate 		opnd_size = SIZE16;
41827c478bd9Sstevel@tonic-gate 		addr_size = SIZE16;
41837c478bd9Sstevel@tonic-gate 	} else if (cpu_mode == SIZE32) {
41847c478bd9Sstevel@tonic-gate 		opnd_size = SIZE32;
41857c478bd9Sstevel@tonic-gate 		addr_size = SIZE32;
41867c478bd9Sstevel@tonic-gate 	} else {
41877c478bd9Sstevel@tonic-gate 		opnd_size = SIZE32;
41887c478bd9Sstevel@tonic-gate 		addr_size = SIZE64;
41897c478bd9Sstevel@tonic-gate 	}
41907c478bd9Sstevel@tonic-gate 
41917c478bd9Sstevel@tonic-gate 	/*
41927c478bd9Sstevel@tonic-gate 	 * Get one opcode byte and check for zero padding that follows
41937c478bd9Sstevel@tonic-gate 	 * jump tables.
41947c478bd9Sstevel@tonic-gate 	 */
41957c478bd9Sstevel@tonic-gate 	if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
41967c478bd9Sstevel@tonic-gate 		goto error;
41977c478bd9Sstevel@tonic-gate 
41987c478bd9Sstevel@tonic-gate 	if (opcode1 == 0 && opcode2 == 0 &&
4199dc0093f4Seschrock 	    x->d86_check_func != NULL && x->d86_check_func(x->d86_data)) {
42007c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
4201d267098bSdmick 		(void) strncpy(x->d86_mnem, ".byte\t0", OPLEN);
42027c478bd9Sstevel@tonic-gate #endif
42037c478bd9Sstevel@tonic-gate 		goto done;
42047c478bd9Sstevel@tonic-gate 	}
42057c478bd9Sstevel@tonic-gate 
42067c478bd9Sstevel@tonic-gate 	/*
42077c478bd9Sstevel@tonic-gate 	 * Gather up legacy x86 prefix bytes.
42087c478bd9Sstevel@tonic-gate 	 */
42097c478bd9Sstevel@tonic-gate 	for (;;) {
42107c478bd9Sstevel@tonic-gate 		uint_t *which_prefix = NULL;
42117c478bd9Sstevel@tonic-gate 
42127c478bd9Sstevel@tonic-gate 		dp = (instable_t *)&dis_distable[opcode1][opcode2];
42137c478bd9Sstevel@tonic-gate 
42147c478bd9Sstevel@tonic-gate 		switch (dp->it_adrmode) {
42157c478bd9Sstevel@tonic-gate 		case PREFIX:
42167c478bd9Sstevel@tonic-gate 			which_prefix = &rep_prefix;
42177c478bd9Sstevel@tonic-gate 			break;
42187c478bd9Sstevel@tonic-gate 		case LOCK:
42197c478bd9Sstevel@tonic-gate 			which_prefix = &lock_prefix;
42207c478bd9Sstevel@tonic-gate 			break;
42217c478bd9Sstevel@tonic-gate 		case OVERRIDE:
42227c478bd9Sstevel@tonic-gate 			which_prefix = &segment_prefix;
42237c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
42247c478bd9Sstevel@tonic-gate 			x->d86_seg_prefix = (char *)dp->it_name;
42257c478bd9Sstevel@tonic-gate #endif
42267c478bd9Sstevel@tonic-gate 			if (dp->it_invalid64 && cpu_mode == SIZE64)
42277c478bd9Sstevel@tonic-gate 				goto error;
42287c478bd9Sstevel@tonic-gate 			break;
42297c478bd9Sstevel@tonic-gate 		case AM:
42307c478bd9Sstevel@tonic-gate 			which_prefix = &addr_size_prefix;
42317c478bd9Sstevel@tonic-gate 			break;
42327c478bd9Sstevel@tonic-gate 		case DM:
42337c478bd9Sstevel@tonic-gate 			which_prefix = &opnd_size_prefix;
42347c478bd9Sstevel@tonic-gate 			break;
42357c478bd9Sstevel@tonic-gate 		}
42367c478bd9Sstevel@tonic-gate 		if (which_prefix == NULL)
42377c478bd9Sstevel@tonic-gate 			break;
42387c478bd9Sstevel@tonic-gate 		*which_prefix = (opcode1 << 4) | opcode2;
42397c478bd9Sstevel@tonic-gate 		if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
42407c478bd9Sstevel@tonic-gate 			goto error;
42417c478bd9Sstevel@tonic-gate 	}
42427c478bd9Sstevel@tonic-gate 
42437c478bd9Sstevel@tonic-gate 	/*
42447c478bd9Sstevel@tonic-gate 	 * Handle amd64 mode PREFIX values.
42457c478bd9Sstevel@tonic-gate 	 * Some of the segment prefixes are no-ops. (only FS/GS actually work)
42467c478bd9Sstevel@tonic-gate 	 * We might have a REX prefix (opcodes 0x40-0x4f)
42477c478bd9Sstevel@tonic-gate 	 */
42487c478bd9Sstevel@tonic-gate 	if (cpu_mode == SIZE64) {
42497c478bd9Sstevel@tonic-gate 		if (segment_prefix != 0x64 && segment_prefix != 0x65)
42507c478bd9Sstevel@tonic-gate 			segment_prefix = 0;
42517c478bd9Sstevel@tonic-gate 
42527c478bd9Sstevel@tonic-gate 		if (opcode1 == 0x4) {
42537c478bd9Sstevel@tonic-gate 			rex_prefix = (opcode1 << 4) | opcode2;
42547c478bd9Sstevel@tonic-gate 			if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
42557c478bd9Sstevel@tonic-gate 				goto error;
42567c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_distable[opcode1][opcode2];
4257ab47273fSEdward Gillett 		} else if (opcode1 == 0xC &&
4258ab47273fSEdward Gillett 		    (opcode2 == 0x4 || opcode2 == 0x5)) {
4259ab47273fSEdward Gillett 			/* AVX instructions */
4260ab47273fSEdward Gillett 			vex_prefix = (opcode1 << 4) | opcode2;
4261ab47273fSEdward Gillett 			x->d86_rex_prefix = 0x40;
4262ab47273fSEdward Gillett 		}
4263ab47273fSEdward Gillett 	} else if (opcode1 == 0xC && (opcode2 == 0x4 || opcode2 == 0x5)) {
4264ab47273fSEdward Gillett 		/* LDS, LES or AVX */
4265ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
4266ab47273fSEdward Gillett 		vex_prefetch = 1;
4267ab47273fSEdward Gillett 
4268ab47273fSEdward Gillett 		if (mode == REG_ONLY) {
4269ab47273fSEdward Gillett 			/* AVX */
4270ab47273fSEdward Gillett 			vex_prefix = (opcode1 << 4) | opcode2;
4271ab47273fSEdward Gillett 			x->d86_rex_prefix = 0x40;
4272ab47273fSEdward Gillett 			opcode3 = (((mode << 3) | reg)>>1) & 0x0F;
4273ab47273fSEdward Gillett 			opcode4 = ((reg << 3) | r_m) & 0x0F;
4274ab47273fSEdward Gillett 		}
4275ab47273fSEdward Gillett 	}
4276ab47273fSEdward Gillett 
427781b505b7SJerry Jelinek 	/*
427881b505b7SJerry Jelinek 	 * The EVEX prefix and "bound" instruction share the same first byte.
427981b505b7SJerry Jelinek 	 * "bound" is only valid for 32-bit. For 64-bit this byte begins the
428081b505b7SJerry Jelinek 	 * EVEX prefix and the 2nd byte must have bits 2 & 3 set to 0.
428181b505b7SJerry Jelinek 	 */
428281b505b7SJerry Jelinek 	if (opcode1 == 0x6 && opcode2 == 0x2) {
4283a25e615dSRobert Mustacchi 		evex_prefix = 0x62;
4284a25e615dSRobert Mustacchi 
428581b505b7SJerry Jelinek 		/*
428681b505b7SJerry Jelinek 		 * An EVEX prefix is 4 bytes long, get the next 3 bytes.
428781b505b7SJerry Jelinek 		 */
428881b505b7SJerry Jelinek 		if (dtrace_get_opcode(x, &opcode4, &opcode5) != 0)
428981b505b7SJerry Jelinek 			goto error;
429081b505b7SJerry Jelinek 
429181b505b7SJerry Jelinek 		if (addr_size == SIZE32 && (opcode4 & 0xf) == 0) {
429281b505b7SJerry Jelinek 			/*
429381b505b7SJerry Jelinek 			 * Upper bits in 2nd byte == 0 is 'bound' instn.
429481b505b7SJerry Jelinek 			 *
429581b505b7SJerry Jelinek 			 * We've already read the byte so perform the
429681b505b7SJerry Jelinek 			 * equivalent of dtrace_get_modrm on the byte and set
429781b505b7SJerry Jelinek 			 * the flag to indicate we've already read it.
429881b505b7SJerry Jelinek 			 */
429981b505b7SJerry Jelinek 			char b = (opcode4 << 4) | opcode5;
430081b505b7SJerry Jelinek 
430181b505b7SJerry Jelinek 			r_m = b & 0x7;
430281b505b7SJerry Jelinek 			reg = (b >> 3) & 0x7;
430381b505b7SJerry Jelinek 			mode = (b >> 6) & 0x3;
430481b505b7SJerry Jelinek 			vex_prefetch = 1;
430581b505b7SJerry Jelinek 			goto not_avx512;
430681b505b7SJerry Jelinek 		}
430781b505b7SJerry Jelinek 
430881b505b7SJerry Jelinek 		/* check for correct bits being 0 in 2nd byte */
430981b505b7SJerry Jelinek 		if ((opcode5 & 0xc) != 0)
431081b505b7SJerry Jelinek 			goto error;
431181b505b7SJerry Jelinek 
431281b505b7SJerry Jelinek 		if (dtrace_get_opcode(x, &opcode6, &opcode7) != 0)
431381b505b7SJerry Jelinek 			goto error;
431481b505b7SJerry Jelinek 		/* check for correct bit being 1 in 3rd byte */
431581b505b7SJerry Jelinek 		if ((opcode7 & 0x4) == 0)
431681b505b7SJerry Jelinek 			goto error;
431781b505b7SJerry Jelinek 
431881b505b7SJerry Jelinek 		if (dtrace_get_opcode(x, &opcode8, &opcode9) != 0)
431981b505b7SJerry Jelinek 			goto error;
432081b505b7SJerry Jelinek 
432181b505b7SJerry Jelinek 		/* Reuse opcode1 & opcode2 to get the real opcode now */
432281b505b7SJerry Jelinek 		if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
432381b505b7SJerry Jelinek 			goto error;
432481b505b7SJerry Jelinek 
432581b505b7SJerry Jelinek 		/*
432681b505b7SJerry Jelinek 		 * We only use the high nibble from the 2nd byte of the prefix
432781b505b7SJerry Jelinek 		 * and save it in the low bits of evex_byte1. This is because
432881b505b7SJerry Jelinek 		 * two of the bits in opcode5 are constant 0 (checked above),
432981b505b7SJerry Jelinek 		 * and the other two bits are captured in vex_m. Also, the VEX
433081b505b7SJerry Jelinek 		 * constants we check in evex_byte1 are against the low bits.
433181b505b7SJerry Jelinek 		 */
433281b505b7SJerry Jelinek 		evex_byte1 = opcode4;
433381b505b7SJerry Jelinek 		evex_byte2 = (opcode6 << 4) | opcode7;
433481b505b7SJerry Jelinek 		evex_byte3 = (opcode8 << 4) | opcode9;
433581b505b7SJerry Jelinek 
433681b505b7SJerry Jelinek 		vex_m = opcode5 & EVEX_m;
433781b505b7SJerry Jelinek 		vex_W = (opcode6 & VEX_W) >> 3;
433881b505b7SJerry Jelinek 		vex_p = opcode7 & VEX_p;
433981b505b7SJerry Jelinek 
43403863692fSRobert Mustacchi 		/*
43413863692fSRobert Mustacchi 		 * We store both EVEX.V' and EVEX.vvvv in here.
43423863692fSRobert Mustacchi 		 */
43433863692fSRobert Mustacchi 		vex_v = (((opcode6 << 4) | opcode7) & VEX_v) >> 3;
43443863692fSRobert Mustacchi 		vex_v |= (evex_byte3 & EVEX_V) << 1;
43453863692fSRobert Mustacchi 
4346a25e615dSRobert Mustacchi 		/*
4347a25e615dSRobert Mustacchi 		 * Store the corresponding prefix information for later use when
4348a25e615dSRobert Mustacchi 		 * calculating the SIB.
4349a25e615dSRobert Mustacchi 		 */
4350a25e615dSRobert Mustacchi 		if ((evex_byte1 & VEX_R) == 0)
4351a25e615dSRobert Mustacchi 			x->d86_rex_prefix |= REX_R;
4352a25e615dSRobert Mustacchi 		if ((evex_byte1 & VEX_X) == 0)
4353a25e615dSRobert Mustacchi 			x->d86_rex_prefix |= REX_X;
4354a25e615dSRobert Mustacchi 		if ((evex_byte1 & VEX_B) == 0)
4355a25e615dSRobert Mustacchi 			x->d86_rex_prefix |= REX_B;
4356a25e615dSRobert Mustacchi 
435781b505b7SJerry Jelinek 		/* Currently only 3 valid values for evex L'L: 00, 01, 10 */
435881b505b7SJerry Jelinek 		evex_L = (opcode8 & EVEX_L) >> 1;
43593863692fSRobert Mustacchi 		evex_b = opcode8 & EVEX_B;
436081b505b7SJerry Jelinek 
4361a25e615dSRobert Mustacchi 		switch (vex_p) {
4362a25e615dSRobert Mustacchi 		case VEX_p_66:
4363a25e615dSRobert Mustacchi 			switch (vex_m) {
4364a25e615dSRobert Mustacchi 			case VEX_m_0F:
4365a25e615dSRobert Mustacchi 				dp = &dis_opEVEX660F[(opcode1 << 4) | opcode2];
4366a25e615dSRobert Mustacchi 				break;
4367a25e615dSRobert Mustacchi 			case VEX_m_0F38:
4368a25e615dSRobert Mustacchi 				dp = &dis_opEVEX660F38[(opcode1 << 4) |
4369a25e615dSRobert Mustacchi 				    opcode2];
4370a25e615dSRobert Mustacchi 				break;
4371a25e615dSRobert Mustacchi 			case VEX_m_0F3A:
4372a25e615dSRobert Mustacchi 				dp = &dis_opEVEX660F3A[(opcode1 << 4) |
4373a25e615dSRobert Mustacchi 				    opcode2];
4374a25e615dSRobert Mustacchi 				break;
4375a25e615dSRobert Mustacchi 			default:
4376a25e615dSRobert Mustacchi 				goto error;
4377a25e615dSRobert Mustacchi 			}
4378a25e615dSRobert Mustacchi 			break;
4379a25e615dSRobert Mustacchi 		case VEX_p_F3:
4380a25e615dSRobert Mustacchi 			switch (vex_m) {
4381a25e615dSRobert Mustacchi 			case VEX_m_0F:
4382a25e615dSRobert Mustacchi 				dp = &dis_opEVEXF30F[(opcode1 << 4) | opcode2];
4383a25e615dSRobert Mustacchi 				break;
43843863692fSRobert Mustacchi 			case VEX_m_0F38:
43853863692fSRobert Mustacchi 				dp = &dis_opEVEXF30F38[(opcode1 << 4) |
43863863692fSRobert Mustacchi 				    opcode2];
43873863692fSRobert Mustacchi 				break;
4388a25e615dSRobert Mustacchi 			default:
4389a25e615dSRobert Mustacchi 				goto error;
4390a25e615dSRobert Mustacchi 			}
4391a25e615dSRobert Mustacchi 			break;
4392a25e615dSRobert Mustacchi 		case VEX_p_F2:
4393a25e615dSRobert Mustacchi 			switch (vex_m) {
4394a25e615dSRobert Mustacchi 			case VEX_m_0F:
4395a25e615dSRobert Mustacchi 				dp = &dis_opEVEXF20F[(opcode1 << 4) | opcode2];
4396a25e615dSRobert Mustacchi 				break;
43973863692fSRobert Mustacchi 			case VEX_m_0F38:
43983863692fSRobert Mustacchi 				dp = &dis_opEVEXF20F38[(opcode1 << 4) |
43993863692fSRobert Mustacchi 				    opcode2];
44003863692fSRobert Mustacchi 				break;
4401a25e615dSRobert Mustacchi 			default:
4402a25e615dSRobert Mustacchi 				goto error;
4403a25e615dSRobert Mustacchi 			}
4404a25e615dSRobert Mustacchi 			break;
4405a25e615dSRobert Mustacchi 		default:
4406a25e615dSRobert Mustacchi 			dp = &dis_opEVEX0F[(opcode1 << 4) | opcode2];
4407a25e615dSRobert Mustacchi 			break;
4408a25e615dSRobert Mustacchi 		}
440981b505b7SJerry Jelinek 	}
441081b505b7SJerry Jelinek not_avx512:
441181b505b7SJerry Jelinek 
4412ab47273fSEdward Gillett 	if (vex_prefix == VEX_2bytes) {
4413ab47273fSEdward Gillett 		if (!vex_prefetch) {
4414ab47273fSEdward Gillett 			if (dtrace_get_opcode(x, &opcode3, &opcode4) != 0)
4415ab47273fSEdward Gillett 				goto error;
4416ab47273fSEdward Gillett 		}
4417ab47273fSEdward Gillett 		vex_R = ((opcode3 & VEX_R) & 0x0F) >> 3;
4418ab47273fSEdward Gillett 		vex_L = ((opcode4 & VEX_L) & 0x0F) >> 2;
4419ab47273fSEdward Gillett 		vex_v = (((opcode3 << 4) | opcode4) & VEX_v) >> 3;
4420ab47273fSEdward Gillett 		vex_p = opcode4 & VEX_p;
4421ab47273fSEdward Gillett 		/*
4422ab47273fSEdward Gillett 		 * The vex.x and vex.b bits are not defined in two bytes
4423ab47273fSEdward Gillett 		 * mode vex prefix, their default values are 1
4424ab47273fSEdward Gillett 		 */
4425ab47273fSEdward Gillett 		vex_byte1 = (opcode3 & VEX_R) | VEX_X | VEX_B;
4426ab47273fSEdward Gillett 
4427ab47273fSEdward Gillett 		if (vex_R == 0)
4428ab47273fSEdward Gillett 			x->d86_rex_prefix |= REX_R;
4429ab47273fSEdward Gillett 
4430ab47273fSEdward Gillett 		if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
4431ab47273fSEdward Gillett 			goto error;
4432ab47273fSEdward Gillett 
4433ab47273fSEdward Gillett 		switch (vex_p) {
4434ab47273fSEdward Gillett 			case VEX_p_66:
4435ab47273fSEdward Gillett 				dp = (instable_t *)
4436ab47273fSEdward Gillett 				    &dis_opAVX660F[(opcode1 << 4) | opcode2];
4437ab47273fSEdward Gillett 				break;
4438ab47273fSEdward Gillett 			case VEX_p_F3:
4439ab47273fSEdward Gillett 				dp = (instable_t *)
4440ab47273fSEdward Gillett 				    &dis_opAVXF30F[(opcode1 << 4) | opcode2];
4441ab47273fSEdward Gillett 				break;
4442ab47273fSEdward Gillett 			case VEX_p_F2:
4443ab47273fSEdward Gillett 				dp = (instable_t *)
4444ab47273fSEdward Gillett 				    &dis_opAVXF20F [(opcode1 << 4) | opcode2];
4445ab47273fSEdward Gillett 				break;
4446ab47273fSEdward Gillett 			default:
4447ab47273fSEdward Gillett 				dp = (instable_t *)
4448ab47273fSEdward Gillett 				    &dis_opAVX0F[opcode1][opcode2];
4449ab47273fSEdward Gillett 
4450ab47273fSEdward Gillett 		}
4451ab47273fSEdward Gillett 
4452ab47273fSEdward Gillett 	} else if (vex_prefix == VEX_3bytes) {
4453ab47273fSEdward Gillett 		if (!vex_prefetch) {
4454ab47273fSEdward Gillett 			if (dtrace_get_opcode(x, &opcode3, &opcode4) != 0)
4455ab47273fSEdward Gillett 				goto error;
4456ab47273fSEdward Gillett 		}
4457ab47273fSEdward Gillett 		vex_R = (opcode3 & VEX_R) >> 3;
4458ab47273fSEdward Gillett 		vex_X = (opcode3 & VEX_X) >> 2;
4459ab47273fSEdward Gillett 		vex_B = (opcode3 & VEX_B) >> 1;
4460ab47273fSEdward Gillett 		vex_m = (((opcode3 << 4) | opcode4) & VEX_m);
4461ab47273fSEdward Gillett 		vex_byte1 = opcode3 & (VEX_R | VEX_X | VEX_B);
4462ab47273fSEdward Gillett 
4463ab47273fSEdward Gillett 		if (vex_R == 0)
4464ab47273fSEdward Gillett 			x->d86_rex_prefix |= REX_R;
4465ab47273fSEdward Gillett 		if (vex_X == 0)
4466ab47273fSEdward Gillett 			x->d86_rex_prefix |= REX_X;
4467ab47273fSEdward Gillett 		if (vex_B == 0)
4468ab47273fSEdward Gillett 			x->d86_rex_prefix |= REX_B;
4469ab47273fSEdward Gillett 
4470ab47273fSEdward Gillett 		if (dtrace_get_opcode(x, &opcode5, &opcode6) != 0)
4471ab47273fSEdward Gillett 			goto error;
4472ab47273fSEdward Gillett 		vex_W = (opcode5 & VEX_W) >> 3;
4473ab47273fSEdward Gillett 		vex_L = (opcode6 & VEX_L) >> 2;
4474ab47273fSEdward Gillett 		vex_v = (((opcode5 << 4) | opcode6) & VEX_v) >> 3;
4475ab47273fSEdward Gillett 		vex_p = opcode6 & VEX_p;
4476ab47273fSEdward Gillett 
4477ab47273fSEdward Gillett 		if (vex_W)
4478ab47273fSEdward Gillett 			x->d86_rex_prefix |= REX_W;
4479ab47273fSEdward Gillett 
4480ab47273fSEdward Gillett 		/* Only these three vex_m values valid; others are reserved */
4481ab47273fSEdward Gillett 		if ((vex_m != VEX_m_0F) && (vex_m != VEX_m_0F38) &&
4482ab47273fSEdward Gillett 		    (vex_m != VEX_m_0F3A))
4483ab47273fSEdward Gillett 			goto error;
4484ab47273fSEdward Gillett 
4485ab47273fSEdward Gillett 		if (dtrace_get_opcode(x, &opcode1, &opcode2) != 0)
4486ab47273fSEdward Gillett 			goto error;
4487ab47273fSEdward Gillett 
4488ab47273fSEdward Gillett 		switch (vex_p) {
4489ab47273fSEdward Gillett 			case VEX_p_66:
4490ab47273fSEdward Gillett 				if (vex_m == VEX_m_0F) {
4491ab47273fSEdward Gillett 					dp = (instable_t *)
4492ab47273fSEdward Gillett 					    &dis_opAVX660F
4493ab47273fSEdward Gillett 					    [(opcode1 << 4) | opcode2];
4494ab47273fSEdward Gillett 				} else if (vex_m == VEX_m_0F38) {
4495ab47273fSEdward Gillett 					dp = (instable_t *)
4496ab47273fSEdward Gillett 					    &dis_opAVX660F38
4497ab47273fSEdward Gillett 					    [(opcode1 << 4) | opcode2];
4498ab47273fSEdward Gillett 				} else if (vex_m == VEX_m_0F3A) {
4499ab47273fSEdward Gillett 					dp = (instable_t *)
4500ab47273fSEdward Gillett 					    &dis_opAVX660F3A
4501ab47273fSEdward Gillett 					    [(opcode1 << 4) | opcode2];
4502ab47273fSEdward Gillett 				} else {
4503ab47273fSEdward Gillett 					goto error;
4504ab47273fSEdward Gillett 				}
4505ab47273fSEdward Gillett 				break;
4506ab47273fSEdward Gillett 			case VEX_p_F3:
4507ab47273fSEdward Gillett 				if (vex_m == VEX_m_0F) {
4508ab47273fSEdward Gillett 					dp = (instable_t *)
4509ab47273fSEdward Gillett 					    &dis_opAVXF30F
4510ab47273fSEdward Gillett 					    [(opcode1 << 4) | opcode2];
4511245ac945SRobert Mustacchi 				} else if (vex_m == VEX_m_0F38) {
4512245ac945SRobert Mustacchi 					dp = (instable_t *)
4513245ac945SRobert Mustacchi 					    &dis_opAVXF30F38
4514245ac945SRobert Mustacchi 					    [(opcode1 << 4) | opcode2];
4515ab47273fSEdward Gillett 				} else {
4516ab47273fSEdward Gillett 					goto error;
4517ab47273fSEdward Gillett 				}
4518ab47273fSEdward Gillett 				break;
4519ab47273fSEdward Gillett 			case VEX_p_F2:
4520ab47273fSEdward Gillett 				if (vex_m == VEX_m_0F) {
4521ab47273fSEdward Gillett 					dp = (instable_t *)
4522ab47273fSEdward Gillett 					    &dis_opAVXF20F
4523ab47273fSEdward Gillett 					    [(opcode1 << 4) | opcode2];
4524245ac945SRobert Mustacchi 				} else if (vex_m == VEX_m_0F3A) {
4525245ac945SRobert Mustacchi 					dp = (instable_t *)
4526245ac945SRobert Mustacchi 					    &dis_opAVXF20F3A
4527245ac945SRobert Mustacchi 					    [(opcode1 << 4) | opcode2];
4528245ac945SRobert Mustacchi 				} else if (vex_m == VEX_m_0F38) {
4529245ac945SRobert Mustacchi 					dp = (instable_t *)
4530245ac945SRobert Mustacchi 					    &dis_opAVXF20F38
4531245ac945SRobert Mustacchi 					    [(opcode1 << 4) | opcode2];
4532ab47273fSEdward Gillett 				} else {
4533ab47273fSEdward Gillett 					goto error;
4534ab47273fSEdward Gillett 				}
4535ab47273fSEdward Gillett 				break;
4536ab47273fSEdward Gillett 			default:
4537ab47273fSEdward Gillett 				dp = (instable_t *)
4538ab47273fSEdward Gillett 				    &dis_opAVX0F[opcode1][opcode2];
4539ab47273fSEdward Gillett 
45407c478bd9Sstevel@tonic-gate 		}
45417c478bd9Sstevel@tonic-gate 	}
4542ab47273fSEdward Gillett 	if (vex_prefix) {
4543245ac945SRobert Mustacchi 		if (dp->it_vexwoxmm) {
4544245ac945SRobert Mustacchi 			wbit = LONG_OPND;
4545a4e73d5dSJerry Jelinek 		} else if (dp->it_vexopmask) {
4546a4e73d5dSJerry Jelinek 			wbit = KOPMASK_OPND;
4547245ac945SRobert Mustacchi 		} else {
4548a4e73d5dSJerry Jelinek 			if (vex_L) {
4549245ac945SRobert Mustacchi 				wbit = YMM_OPND;
4550a4e73d5dSJerry Jelinek 			} else {
4551245ac945SRobert Mustacchi 				wbit = XMM_OPND;
4552a4e73d5dSJerry Jelinek 			}
4553245ac945SRobert Mustacchi 		}
4554ab47273fSEdward Gillett 	}
45557c478bd9Sstevel@tonic-gate 
45567c478bd9Sstevel@tonic-gate 	/*
45577c478bd9Sstevel@tonic-gate 	 * Deal with selection of operand and address size now.
45587c478bd9Sstevel@tonic-gate 	 * Note that the REX.W bit being set causes opnd_size_prefix to be
45597c478bd9Sstevel@tonic-gate 	 * ignored.
45607c478bd9Sstevel@tonic-gate 	 */
45617c478bd9Sstevel@tonic-gate 	if (cpu_mode == SIZE64) {
4562ab47273fSEdward Gillett 		if ((rex_prefix & REX_W) || vex_W)
45637c478bd9Sstevel@tonic-gate 			opnd_size = SIZE64;
45647c478bd9Sstevel@tonic-gate 		else if (opnd_size_prefix)
45657c478bd9Sstevel@tonic-gate 			opnd_size = SIZE16;
45667c478bd9Sstevel@tonic-gate 
45677c478bd9Sstevel@tonic-gate 		if (addr_size_prefix)
45687c478bd9Sstevel@tonic-gate 			addr_size = SIZE32;
45697c478bd9Sstevel@tonic-gate 	} else if (cpu_mode == SIZE32) {
45707c478bd9Sstevel@tonic-gate 		if (opnd_size_prefix)
45717c478bd9Sstevel@tonic-gate 			opnd_size = SIZE16;
45727c478bd9Sstevel@tonic-gate 		if (addr_size_prefix)
45737c478bd9Sstevel@tonic-gate 			addr_size = SIZE16;
45747c478bd9Sstevel@tonic-gate 	} else {
45757c478bd9Sstevel@tonic-gate 		if (opnd_size_prefix)
45767c478bd9Sstevel@tonic-gate 			opnd_size = SIZE32;
45777c478bd9Sstevel@tonic-gate 		if (addr_size_prefix)
45787c478bd9Sstevel@tonic-gate 			addr_size = SIZE32;
45797c478bd9Sstevel@tonic-gate 	}
45807c478bd9Sstevel@tonic-gate 	/*
45817c478bd9Sstevel@tonic-gate 	 * The pause instruction - a repz'd nop.  This doesn't fit
45827c478bd9Sstevel@tonic-gate 	 * with any of the other prefix goop added for SSE, so we'll
45837c478bd9Sstevel@tonic-gate 	 * special-case it here.
45847c478bd9Sstevel@tonic-gate 	 */
45857c478bd9Sstevel@tonic-gate 	if (rep_prefix == 0xf3 && opcode1 == 0x9 && opcode2 == 0x0) {
45867c478bd9Sstevel@tonic-gate 		rep_prefix = 0;
45877c478bd9Sstevel@tonic-gate 		dp = (instable_t *)&dis_opPause;
45887c478bd9Sstevel@tonic-gate 	}
45897c478bd9Sstevel@tonic-gate 
45907c478bd9Sstevel@tonic-gate 	/*
45917c478bd9Sstevel@tonic-gate 	 * Some 386 instructions have 2 bytes of opcode before the mod_r/m
45927c478bd9Sstevel@tonic-gate 	 * byte so we may need to perform a table indirection.
45937c478bd9Sstevel@tonic-gate 	 */
45947c478bd9Sstevel@tonic-gate 	if (dp->it_indirect == (instable_t *)dis_op0F) {
45957c478bd9Sstevel@tonic-gate 		if (dtrace_get_opcode(x, &opcode4, &opcode5) != 0)
45967c478bd9Sstevel@tonic-gate 			goto error;
45977c478bd9Sstevel@tonic-gate 		opcode_bytes = 2;
45987c478bd9Sstevel@tonic-gate 		if (opcode4 == 0x7 && opcode5 >= 0x1 && opcode5 <= 0x3) {
45997c478bd9Sstevel@tonic-gate 			uint_t	subcode;
46007c478bd9Sstevel@tonic-gate 
46017c478bd9Sstevel@tonic-gate 			if (dtrace_get_opcode(x, &opcode6, &opcode7) != 0)
46027c478bd9Sstevel@tonic-gate 				goto error;
46037c478bd9Sstevel@tonic-gate 			opcode_bytes = 3;
46047c478bd9Sstevel@tonic-gate 			subcode = ((opcode6 & 0x3) << 1) |
46057c478bd9Sstevel@tonic-gate 			    ((opcode7 & 0x8) >> 3);
46067c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_op0F7123[opcode5][subcode];
46077c478bd9Sstevel@tonic-gate 		} else if ((opcode4 == 0xc) && (opcode5 >= 0x8)) {
46087c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_op0FC8[0];
4609d0f8ff6eSkk 		} else if ((opcode4 == 0x3) && (opcode5 == 0xA)) {
4610a2f205d0Skk 			opcode_bytes = 3;
4611d0f8ff6eSkk 			if (dtrace_get_opcode(x, &opcode6, &opcode7) != 0)
4612d0f8ff6eSkk 				goto error;
4613d0f8ff6eSkk 			if (opnd_size == SIZE16)
4614d0f8ff6eSkk 				opnd_size = SIZE32;
4615d0f8ff6eSkk 
4616d0f8ff6eSkk 			dp = (instable_t *)&dis_op0F3A[(opcode6<<4)|opcode7];
4617d0f8ff6eSkk #ifdef DIS_TEXT
4618d0f8ff6eSkk 			if (strcmp(dp->it_name, "INVALID") == 0)
4619d0f8ff6eSkk 				goto error;
4620d0f8ff6eSkk #endif
4621d0f8ff6eSkk 			switch (dp->it_adrmode) {
462281293f93SRobert Mustacchi 				case XMMP:
462381293f93SRobert Mustacchi 					break;
4624d0f8ff6eSkk 				case XMMP_66r:
4625d0f8ff6eSkk 				case XMMPRM_66r:
4626d0f8ff6eSkk 				case XMM3PM_66r:
4627d0f8ff6eSkk 					if (opnd_size_prefix == 0) {
4628d0f8ff6eSkk 						goto error;
4629d0f8ff6eSkk 					}
4630959b2dfdSRobert Mustacchi 
4631d0f8ff6eSkk 					break;
4632d0f8ff6eSkk 				case XMMP_66o:
4633d0f8ff6eSkk 					if (opnd_size_prefix == 0) {
4634d0f8ff6eSkk 						/* SSSE3 MMX instructions */
4635d0f8ff6eSkk 						dp_mmx = *dp;
4636c1e9bf00SRobert Mustacchi 						dp_mmx.it_adrmode = MMOPM_66o;
4637d0f8ff6eSkk #ifdef	DIS_MEM
4638c1e9bf00SRobert Mustacchi 						dp_mmx.it_size = 8;
4639d0f8ff6eSkk #endif
4640c1e9bf00SRobert Mustacchi 						dp = &dp_mmx;
4641d0f8ff6eSkk 					}
4642d0f8ff6eSkk 					break;
4643d0f8ff6eSkk 				default:
4644d0f8ff6eSkk 					goto error;
4645d0f8ff6eSkk 			}
4646d0f8ff6eSkk 		} else if ((opcode4 == 0x3) && (opcode5 == 0x8)) {
4647a2f205d0Skk 			opcode_bytes = 3;
4648d0f8ff6eSkk 			if (dtrace_get_opcode(x, &opcode6, &opcode7) != 0)
4649d0f8ff6eSkk 				goto error;
4650d0f8ff6eSkk 			dp = (instable_t *)&dis_op0F38[(opcode6<<4)|opcode7];
465182d5eb48SKrishnendu Sadhukhan - Sun Microsystems 
465282d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			/*
465382d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			 * Both crc32 and movbe have the same 3rd opcode
465482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			 * byte of either 0xF0 or 0xF1, so we use another
465582d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			 * indirection to distinguish between the two.
465682d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			 */
465782d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			if (dp->it_indirect == (instable_t *)dis_op0F38F0 ||
465882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			    dp->it_indirect == (instable_t *)dis_op0F38F1) {
465982d5eb48SKrishnendu Sadhukhan - Sun Microsystems 
466082d5eb48SKrishnendu Sadhukhan - Sun Microsystems 				dp = dp->it_indirect;
466182d5eb48SKrishnendu Sadhukhan - Sun Microsystems 				if (rep_prefix != 0xF2) {
466282d5eb48SKrishnendu Sadhukhan - Sun Microsystems 					/* It is movbe */
466382d5eb48SKrishnendu Sadhukhan - Sun Microsystems 					dp++;
466482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 				}
466582d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			}
46668889c875SRobert Mustacchi 
46678889c875SRobert Mustacchi 			/*
46688889c875SRobert Mustacchi 			 * The adx family of instructions (adcx and adox)
46698889c875SRobert Mustacchi 			 * continue the classic Intel tradition of abusing
46708889c875SRobert Mustacchi 			 * arbitrary prefixes without actually meaning the
46718889c875SRobert Mustacchi 			 * prefix bit. Therefore, if we find either the
46728889c875SRobert Mustacchi 			 * opnd_size_prefix or rep_prefix we end up zeroing it
46738889c875SRobert Mustacchi 			 * out after making our determination so as to ensure
46748889c875SRobert Mustacchi 			 * that we don't get confused and accidentally print
46758889c875SRobert Mustacchi 			 * repz prefixes and the like on these instructions.
46768889c875SRobert Mustacchi 			 *
46778889c875SRobert Mustacchi 			 * In addition, these instructions are actually much
46788889c875SRobert Mustacchi 			 * closer to AVX instructions in semantics. Importantly,
46798889c875SRobert Mustacchi 			 * they always default to having 32-bit operands.
46808889c875SRobert Mustacchi 			 * However, if the CPU is in 64-bit mode, then and only
46818889c875SRobert Mustacchi 			 * then, does it use REX.w promotes things to 64-bits
46828889c875SRobert Mustacchi 			 * and REX.r allows 64-bit mode to use register r8-r15.
46838889c875SRobert Mustacchi 			 */
46848889c875SRobert Mustacchi 			if (dp->it_indirect == (instable_t *)dis_op0F38F6) {
46858889c875SRobert Mustacchi 				dp = dp->it_indirect;
46868889c875SRobert Mustacchi 				if (opnd_size_prefix == 0 &&
46878889c875SRobert Mustacchi 				    rep_prefix == 0xf3) {
46888889c875SRobert Mustacchi 					/* It is adox */
46898889c875SRobert Mustacchi 					dp++;
46908889c875SRobert Mustacchi 				} else if (opnd_size_prefix != 0x66 &&
46918889c875SRobert Mustacchi 				    rep_prefix != 0) {
46928889c875SRobert Mustacchi 					/* It isn't adcx */
46938889c875SRobert Mustacchi 					goto error;
46948889c875SRobert Mustacchi 				}
46958889c875SRobert Mustacchi 				opnd_size_prefix = 0;
46968889c875SRobert Mustacchi 				rep_prefix = 0;
46978889c875SRobert Mustacchi 				opnd_size = SIZE32;
46988889c875SRobert Mustacchi 				if (rex_prefix & REX_W)
46998889c875SRobert Mustacchi 					opnd_size = SIZE64;
47008889c875SRobert Mustacchi 			}
47018889c875SRobert Mustacchi 
4702d0f8ff6eSkk #ifdef DIS_TEXT
4703d0f8ff6eSkk 			if (strcmp(dp->it_name, "INVALID") == 0)
4704d0f8ff6eSkk 				goto error;
4705d0f8ff6eSkk #endif
4706d0f8ff6eSkk 			switch (dp->it_adrmode) {
47078889c875SRobert Mustacchi 				case ADX:
470881293f93SRobert Mustacchi 				case XMM:
47098889c875SRobert Mustacchi 					break;
47107aa76ffcSBryan Cantrill 				case RM_66r:
4711d0f8ff6eSkk 				case XMM_66r:
4712d0f8ff6eSkk 				case XMMM_66r:
4713d0f8ff6eSkk 					if (opnd_size_prefix == 0) {
4714d0f8ff6eSkk 						goto error;
4715d0f8ff6eSkk 					}
4716d0f8ff6eSkk 					break;
4717d0f8ff6eSkk 				case XMM_66o:
4718d0f8ff6eSkk 					if (opnd_size_prefix == 0) {
4719d0f8ff6eSkk 						/* SSSE3 MMX instructions */
4720d0f8ff6eSkk 						dp_mmx = *dp;
4721c1e9bf00SRobert Mustacchi 						dp_mmx.it_adrmode = MM;
4722d0f8ff6eSkk #ifdef	DIS_MEM
4723c1e9bf00SRobert Mustacchi 						dp_mmx.it_size = 8;
4724d0f8ff6eSkk #endif
4725c1e9bf00SRobert Mustacchi 						dp = &dp_mmx;
4726d0f8ff6eSkk 					}
4727d0f8ff6eSkk 					break;
4728d0f8ff6eSkk 				case CRC32:
4729d0f8ff6eSkk 					if (rep_prefix != 0xF2) {
4730d0f8ff6eSkk 						goto error;
4731d0f8ff6eSkk 					}
4732d0f8ff6eSkk 					rep_prefix = 0;
4733d0f8ff6eSkk 					break;
473482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 				case MOVBE:
473582d5eb48SKrishnendu Sadhukhan - Sun Microsystems 					if (rep_prefix != 0x0) {
473682d5eb48SKrishnendu Sadhukhan - Sun Microsystems 						goto error;
473782d5eb48SKrishnendu Sadhukhan - Sun Microsystems 					}
473882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 					break;
4739fb2cb638SRobert Mustacchi 				case RM:
4740fb2cb638SRobert Mustacchi 					/*
4741fb2cb638SRobert Mustacchi 					 * Currently the MOVDIRI instruction is
4742fb2cb638SRobert Mustacchi 					 * the only known case here. It is not
4743fb2cb638SRobert Mustacchi 					 * allowed to have a prefix.
4744fb2cb638SRobert Mustacchi 					 */
4745fb2cb638SRobert Mustacchi 					if (rep_prefix != 0x0) {
4746fb2cb638SRobert Mustacchi 						goto error;
4747fb2cb638SRobert Mustacchi 					}
4748fb2cb638SRobert Mustacchi 					break;
4749fb2cb638SRobert Mustacchi 				case MOVDIR:
4750fb2cb638SRobert Mustacchi 					/*
4751fb2cb638SRobert Mustacchi 					 * MOVDIR64B requires a opnd size prefix
4752fb2cb638SRobert Mustacchi 					 * of 0x66, but ignores it. This means
4753fb2cb638SRobert Mustacchi 					 * that we need to undo what we did
4754fb2cb638SRobert Mustacchi 					 * earlier and readjust the operator and
4755fb2cb638SRobert Mustacchi 					 * address size prefixes.
4756fb2cb638SRobert Mustacchi 					 */
4757fb2cb638SRobert Mustacchi 					if (opnd_size_prefix != 0x66) {
4758fb2cb638SRobert Mustacchi 						goto error;
4759fb2cb638SRobert Mustacchi 					}
4760fb2cb638SRobert Mustacchi 					if (cpu_mode == SIZE64 ||
4761fb2cb638SRobert Mustacchi 					    cpu_mode == SIZE16) {
4762fb2cb638SRobert Mustacchi 						if (addr_size_prefix == 0x67) {
4763fb2cb638SRobert Mustacchi 							opnd_size = SIZE32;
4764fb2cb638SRobert Mustacchi 						} else {
4765fb2cb638SRobert Mustacchi 							opnd_size = cpu_mode;
4766fb2cb638SRobert Mustacchi 						}
4767fb2cb638SRobert Mustacchi 					} else {
4768fb2cb638SRobert Mustacchi 						if (addr_size_prefix == 0x67) {
4769fb2cb638SRobert Mustacchi 							opnd_size = SIZE16;
4770fb2cb638SRobert Mustacchi 						} else {
4771fb2cb638SRobert Mustacchi 							opnd_size = SIZE32;
4772fb2cb638SRobert Mustacchi 						}
4773fb2cb638SRobert Mustacchi 					}
4774fb2cb638SRobert Mustacchi 					addr_size = opnd_size;
4775fb2cb638SRobert Mustacchi 					addr_size_prefix = 0;
4776fb2cb638SRobert Mustacchi 					opnd_size_prefix = 0;
4777fb2cb638SRobert Mustacchi 					break;
4778d0f8ff6eSkk 				default:
4779d0f8ff6eSkk 					goto error;
4780d0f8ff6eSkk 			}
4781c1e9bf00SRobert Mustacchi 		} else if (rep_prefix == 0xf3 && opcode4 == 0 && opcode5 == 9) {
4782c1e9bf00SRobert Mustacchi 			rep_prefix = 0;
4783c1e9bf00SRobert Mustacchi 			dp = (instable_t *)&dis_opWbnoinvd;
47847c478bd9Sstevel@tonic-gate 		} else {
47857c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_op0F[opcode4][opcode5];
47867c478bd9Sstevel@tonic-gate 		}
47877c478bd9Sstevel@tonic-gate 	}
47887c478bd9Sstevel@tonic-gate 
47897c478bd9Sstevel@tonic-gate 	/*
47907c478bd9Sstevel@tonic-gate 	 * If still not at a TERM decode entry, then a ModRM byte
47917c478bd9Sstevel@tonic-gate 	 * exists and its fields further decode the instruction.
47927c478bd9Sstevel@tonic-gate 	 */
47937c478bd9Sstevel@tonic-gate 	x->d86_got_modrm = 0;
47947c478bd9Sstevel@tonic-gate 	if (dp->it_indirect != TERM) {
47957c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &opcode3, &r_m);
47967c478bd9Sstevel@tonic-gate 		if (x->d86_error)
47977c478bd9Sstevel@tonic-gate 			goto error;
47987c478bd9Sstevel@tonic-gate 		reg = opcode3;
47997c478bd9Sstevel@tonic-gate 
48007c478bd9Sstevel@tonic-gate 		/*
48017c478bd9Sstevel@tonic-gate 		 * decode 287 instructions (D8-DF) from opcodeN
48027c478bd9Sstevel@tonic-gate 		 */
48037c478bd9Sstevel@tonic-gate 		if (opcode1 == 0xD && opcode2 >= 0x8) {
48047c478bd9Sstevel@tonic-gate 			if (opcode2 == 0xB && mode == 0x3 && opcode3 == 4)
48057c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opFP5[r_m];
48067c478bd9Sstevel@tonic-gate 			else if (opcode2 == 0xA && mode == 0x3 && opcode3 < 4)
48077c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opFP7[opcode3];
48087c478bd9Sstevel@tonic-gate 			else if (opcode2 == 0xB && mode == 0x3)
48097c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opFP6[opcode3];
48107c478bd9Sstevel@tonic-gate 			else if (opcode2 == 0x9 && mode == 0x3 && opcode3 >= 4)
48117c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opFP4[opcode3 - 4][r_m];
48127c478bd9Sstevel@tonic-gate 			else if (mode == 0x3)
48137c478bd9Sstevel@tonic-gate 				dp = (instable_t *)
48147c478bd9Sstevel@tonic-gate 				    &dis_opFP3[opcode2 - 8][opcode3];
48157c478bd9Sstevel@tonic-gate 			else
48167c478bd9Sstevel@tonic-gate 				dp = (instable_t *)
48177c478bd9Sstevel@tonic-gate 				    &dis_opFP1n2[opcode2 - 8][opcode3];
48187c478bd9Sstevel@tonic-gate 		} else {
48197c478bd9Sstevel@tonic-gate 			dp = (instable_t *)dp->it_indirect + opcode3;
48207c478bd9Sstevel@tonic-gate 		}
48217c478bd9Sstevel@tonic-gate 	}
48227c478bd9Sstevel@tonic-gate 
48237c478bd9Sstevel@tonic-gate 	/*
4824*8b0687e2SRobert Mustacchi 	 * In amd64 bit mode, ARPL opcode is changed to MOVSXD (sign extend
4825*8b0687e2SRobert Mustacchi 	 * 32-bit to 64-bit). Note, this isn't done when there's either a vex or
4826*8b0687e2SRobert Mustacchi 	 * evex prefix.
48277c478bd9Sstevel@tonic-gate 	 */
4828*8b0687e2SRobert Mustacchi 	if (evex_prefix == 0 && vex_prefix == 0 && cpu_mode == SIZE64 &&
4829ab47273fSEdward Gillett 	    opcode1 == 0x6 && opcode2 == 0x3)
48307c478bd9Sstevel@tonic-gate 		dp = (instable_t *)&dis_opMOVSLD;
48317c478bd9Sstevel@tonic-gate 
48327c478bd9Sstevel@tonic-gate 	/*
48337c478bd9Sstevel@tonic-gate 	 * at this point we should have a correct (or invalid) opcode
48347c478bd9Sstevel@tonic-gate 	 */
48353df2e8b2SRobert Mustacchi 	if ((cpu_mode == SIZE64 && dp->it_invalid64) ||
48363df2e8b2SRobert Mustacchi 	    (cpu_mode != SIZE64 && dp->it_invalid32))
48377c478bd9Sstevel@tonic-gate 		goto error;
48387c478bd9Sstevel@tonic-gate 	if (dp->it_indirect != TERM)
48397c478bd9Sstevel@tonic-gate 		goto error;
48407c478bd9Sstevel@tonic-gate 
48417c478bd9Sstevel@tonic-gate 	/*
4842d4c899eeSRobert Mustacchi 	 * Deal with MMX/SSE opcodes which are changed by prefixes. Note, we do
4843d4c899eeSRobert Mustacchi 	 * need to include UNKNOWN below, as we may have instructions that
4844d4c899eeSRobert Mustacchi 	 * actually have a prefix, but don't exist in any other form.
48457c478bd9Sstevel@tonic-gate 	 */
48467c478bd9Sstevel@tonic-gate 	switch (dp->it_adrmode) {
4847d4c899eeSRobert Mustacchi 	case UNKNOWN:
48487c478bd9Sstevel@tonic-gate 	case MMO:
48497c478bd9Sstevel@tonic-gate 	case MMOIMPL:
48507c478bd9Sstevel@tonic-gate 	case MMO3P:
48517c478bd9Sstevel@tonic-gate 	case MMOM3:
48527c478bd9Sstevel@tonic-gate 	case MMOMS:
48537c478bd9Sstevel@tonic-gate 	case MMOPM:
48547c478bd9Sstevel@tonic-gate 	case MMOPRM:
48557c478bd9Sstevel@tonic-gate 	case MMOS:
48567c478bd9Sstevel@tonic-gate 	case XMMO:
48577c478bd9Sstevel@tonic-gate 	case XMMOM:
48587c478bd9Sstevel@tonic-gate 	case XMMOMS:
48597c478bd9Sstevel@tonic-gate 	case XMMOPM:
48607c478bd9Sstevel@tonic-gate 	case XMMOS:
48617c478bd9Sstevel@tonic-gate 	case XMMOMX:
48627c478bd9Sstevel@tonic-gate 	case XMMOX3:
48637c478bd9Sstevel@tonic-gate 	case XMMOXMM:
48647c478bd9Sstevel@tonic-gate 		/*
48657c478bd9Sstevel@tonic-gate 		 * This is horrible.  Some SIMD instructions take the
48667c478bd9Sstevel@tonic-gate 		 * form 0x0F 0x?? ..., which is easily decoded using the
48677c478bd9Sstevel@tonic-gate 		 * existing tables.  Other SIMD instructions use various
48687c478bd9Sstevel@tonic-gate 		 * prefix bytes to overload existing instructions.  For
48697c478bd9Sstevel@tonic-gate 		 * Example, addps is F0, 58, whereas addss is F3 (repz),
48707c478bd9Sstevel@tonic-gate 		 * F0, 58.  Presumably someone got a raise for this.
48717c478bd9Sstevel@tonic-gate 		 *
48727c478bd9Sstevel@tonic-gate 		 * If we see one of the instructions which can be
48737c478bd9Sstevel@tonic-gate 		 * modified in this way (if we've got one of the SIMDO*
48747c478bd9Sstevel@tonic-gate 		 * address modes), we'll check to see if the last prefix
48757c478bd9Sstevel@tonic-gate 		 * was a repz.  If it was, we strip the prefix from the
48767c478bd9Sstevel@tonic-gate 		 * mnemonic, and we indirect using the dis_opSIMDrepz
48777c478bd9Sstevel@tonic-gate 		 * table.
48787c478bd9Sstevel@tonic-gate 		 */
48797c478bd9Sstevel@tonic-gate 
48807c478bd9Sstevel@tonic-gate 		/*
48817c478bd9Sstevel@tonic-gate 		 * Calculate our offset in dis_op0F
48827c478bd9Sstevel@tonic-gate 		 */
48837c478bd9Sstevel@tonic-gate 		if ((uintptr_t)dp - (uintptr_t)dis_op0F > sizeof (dis_op0F))
48847c478bd9Sstevel@tonic-gate 			goto error;
48857c478bd9Sstevel@tonic-gate 
48867c478bd9Sstevel@tonic-gate 		off = ((uintptr_t)dp - (uintptr_t)dis_op0F) /
48877c478bd9Sstevel@tonic-gate 		    sizeof (instable_t);
48887c478bd9Sstevel@tonic-gate 
48897c478bd9Sstevel@tonic-gate 		/*
48907c478bd9Sstevel@tonic-gate 		 * Rewrite if this instruction used one of the magic prefixes.
48917c478bd9Sstevel@tonic-gate 		 */
48927c478bd9Sstevel@tonic-gate 		if (rep_prefix) {
48937c478bd9Sstevel@tonic-gate 			if (rep_prefix == 0xf2)
48947c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opSIMDrepnz[off];
48957c478bd9Sstevel@tonic-gate 			else
48967c478bd9Sstevel@tonic-gate 				dp = (instable_t *)&dis_opSIMDrepz[off];
48977c478bd9Sstevel@tonic-gate 			rep_prefix = 0;
48987c478bd9Sstevel@tonic-gate 		} else if (opnd_size_prefix) {
48997c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_opSIMDdata16[off];
49007c478bd9Sstevel@tonic-gate 			opnd_size_prefix = 0;
49017c478bd9Sstevel@tonic-gate 			if (opnd_size == SIZE16)
49027c478bd9Sstevel@tonic-gate 				opnd_size = SIZE32;
49037c478bd9Sstevel@tonic-gate 		}
49047c478bd9Sstevel@tonic-gate 		break;
49057c478bd9Sstevel@tonic-gate 
49067aa76ffcSBryan Cantrill 	case MG9:
49077aa76ffcSBryan Cantrill 		/*
49087aa76ffcSBryan Cantrill 		 * More horribleness: the group 9 (0xF0 0xC7) instructions are
49097aa76ffcSBryan Cantrill 		 * allowed an optional prefix of 0x66 or 0xF3.  This is similar
49107aa76ffcSBryan Cantrill 		 * to the SIMD business described above, but with a different
49117aa76ffcSBryan Cantrill 		 * addressing mode (and an indirect table), so we deal with it
49127aa76ffcSBryan Cantrill 		 * separately (if similarly).
4913ebb8ac07SRobert Mustacchi 		 *
4914ebb8ac07SRobert Mustacchi 		 * Intel further complicated this with the release of Ivy Bridge
4915ebb8ac07SRobert Mustacchi 		 * where they overloaded these instructions based on the ModR/M
4916ebb8ac07SRobert Mustacchi 		 * bytes. The VMX instructions have a mode of 0 since they are
4917ebb8ac07SRobert Mustacchi 		 * memory instructions but rdrand instructions have a mode of
4918fb2cb638SRobert Mustacchi 		 * 0b11 (REG_ONLY) because they only operate on registers.
49197aa76ffcSBryan Cantrill 		 */
49207aa76ffcSBryan Cantrill 
49217aa76ffcSBryan Cantrill 		/*
49227aa76ffcSBryan Cantrill 		 * Calculate our offset in dis_op0FC7 (the group 9 table)
49237aa76ffcSBryan Cantrill 		 */
49247aa76ffcSBryan Cantrill 		if ((uintptr_t)dp - (uintptr_t)dis_op0FC7 > sizeof (dis_op0FC7))
49257aa76ffcSBryan Cantrill 			goto error;
49267aa76ffcSBryan Cantrill 
49277aa76ffcSBryan Cantrill 		off = ((uintptr_t)dp - (uintptr_t)dis_op0FC7) /
49287aa76ffcSBryan Cantrill 		    sizeof (instable_t);
49297aa76ffcSBryan Cantrill 
4930ebb8ac07SRobert Mustacchi 		/*
4931fb2cb638SRobert Mustacchi 		 * If we have a mode of 0b11 then we have to rewrite this. We
4932fb2cb638SRobert Mustacchi 		 * must check prefixes first.
4933ebb8ac07SRobert Mustacchi 		 */
4934ebb8ac07SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
4935ebb8ac07SRobert Mustacchi 
49367aa76ffcSBryan Cantrill 		/*
49377aa76ffcSBryan Cantrill 		 * Rewrite if this instruction used one of the magic prefixes.
49387aa76ffcSBryan Cantrill 		 */
49397aa76ffcSBryan Cantrill 		if (rep_prefix) {
4940fb2cb638SRobert Mustacchi 			if (rep_prefix == 0xf3 && mode == REG_ONLY)
4941fb2cb638SRobert Mustacchi 				dp = (instable_t *)&dis_opF30FC7m3[off];
4942fb2cb638SRobert Mustacchi 			else if (rep_prefix == 0xf3)
49437aa76ffcSBryan Cantrill 				dp = (instable_t *)&dis_opF30FC7[off];
49447aa76ffcSBryan Cantrill 			else
49457aa76ffcSBryan Cantrill 				goto error;
49467aa76ffcSBryan Cantrill 			rep_prefix = 0;
49477aa76ffcSBryan Cantrill 		} else if (opnd_size_prefix) {
4948fb2cb638SRobert Mustacchi 			if (mode == REG_ONLY) {
4949fb2cb638SRobert Mustacchi 				dp = (instable_t *)&dis_op0FC7m3[reg];
4950fb2cb638SRobert Mustacchi 			} else {
4951fb2cb638SRobert Mustacchi 				dp = (instable_t *)&dis_op660FC7[off];
4952fb2cb638SRobert Mustacchi 				opnd_size_prefix = 0;
4953fb2cb638SRobert Mustacchi 				if (opnd_size == SIZE16)
4954fb2cb638SRobert Mustacchi 					opnd_size = SIZE32;
4955fb2cb638SRobert Mustacchi 			}
4956fb2cb638SRobert Mustacchi 		} else if (mode == REG_ONLY) {
4957fb2cb638SRobert Mustacchi 			dp = (instable_t *)&dis_op0FC7m3[off];
495892381362SJerry Jelinek 		} else if (reg == 4 || reg == 5) {
495992381362SJerry Jelinek 			/*
496092381362SJerry Jelinek 			 * We have xsavec (4) or xsaves (5), so rewrite.
496192381362SJerry Jelinek 			 */
496292381362SJerry Jelinek 			dp = (instable_t *)&dis_op0FC7[reg];
49637aa76ffcSBryan Cantrill 		}
49647aa76ffcSBryan Cantrill 		break;
49657aa76ffcSBryan Cantrill 
49667aa76ffcSBryan Cantrill 
49677c478bd9Sstevel@tonic-gate 	case MMOSH:
49687c478bd9Sstevel@tonic-gate 		/*
49697c478bd9Sstevel@tonic-gate 		 * As with the "normal" SIMD instructions, the MMX
49707c478bd9Sstevel@tonic-gate 		 * shuffle instructions are overloaded.  These
49717c478bd9Sstevel@tonic-gate 		 * instructions, however, are special in that they use
49727c478bd9Sstevel@tonic-gate 		 * an extra byte, and thus an extra table.  As of this
49737c478bd9Sstevel@tonic-gate 		 * writing, they only use the opnd_size prefix.
49747c478bd9Sstevel@tonic-gate 		 */
49757c478bd9Sstevel@tonic-gate 
49767c478bd9Sstevel@tonic-gate 		/*
49777c478bd9Sstevel@tonic-gate 		 * Calculate our offset in dis_op0F7123
49787c478bd9Sstevel@tonic-gate 		 */
49797c478bd9Sstevel@tonic-gate 		if ((uintptr_t)dp - (uintptr_t)dis_op0F7123 >
49807c478bd9Sstevel@tonic-gate 		    sizeof (dis_op0F7123))
49817c478bd9Sstevel@tonic-gate 			goto error;
49827c478bd9Sstevel@tonic-gate 
49837c478bd9Sstevel@tonic-gate 		if (opnd_size_prefix) {
49847c478bd9Sstevel@tonic-gate 			off = ((uintptr_t)dp - (uintptr_t)dis_op0F7123) /
49857c478bd9Sstevel@tonic-gate 			    sizeof (instable_t);
49867c478bd9Sstevel@tonic-gate 			dp = (instable_t *)&dis_opSIMD7123[off];
49877c478bd9Sstevel@tonic-gate 			opnd_size_prefix = 0;
49887c478bd9Sstevel@tonic-gate 			if (opnd_size == SIZE16)
49897c478bd9Sstevel@tonic-gate 				opnd_size = SIZE32;
49907c478bd9Sstevel@tonic-gate 		}
49917c478bd9Sstevel@tonic-gate 		break;
4992f8801251Skk 	case MRw:
4993f8801251Skk 		if (rep_prefix) {
4994f8801251Skk 			if (rep_prefix == 0xf3) {
4995f8801251Skk 
4996f8801251Skk 				/*
4997f8801251Skk 				 * Calculate our offset in dis_op0F
4998f8801251Skk 				 */
4999cff040f3SRobert Mustacchi 				if ((uintptr_t)dp - (uintptr_t)dis_op0F >
5000cff040f3SRobert Mustacchi 				    sizeof (dis_op0F))
5001f8801251Skk 					goto error;
5002f8801251Skk 
5003f8801251Skk 				off = ((uintptr_t)dp - (uintptr_t)dis_op0F) /
5004f8801251Skk 				    sizeof (instable_t);
5005f8801251Skk 
5006f8801251Skk 				dp = (instable_t *)&dis_opSIMDrepz[off];
5007f8801251Skk 				rep_prefix = 0;
5008f8801251Skk 			} else {
5009f8801251Skk 				goto error;
5010f8801251Skk 			}
5011f8801251Skk 		}
5012f8801251Skk 		break;
5013cff040f3SRobert Mustacchi 	case FSGS:
5014cff040f3SRobert Mustacchi 		if (rep_prefix == 0xf3) {
5015cff040f3SRobert Mustacchi 			if ((uintptr_t)dp - (uintptr_t)dis_op0FAE >
5016cff040f3SRobert Mustacchi 			    sizeof (dis_op0FAE))
5017cff040f3SRobert Mustacchi 				goto error;
5018cff040f3SRobert Mustacchi 
5019cff040f3SRobert Mustacchi 			off = ((uintptr_t)dp - (uintptr_t)dis_op0FAE) /
5020cff040f3SRobert Mustacchi 			    sizeof (instable_t);
5021cff040f3SRobert Mustacchi 			dp = (instable_t *)&dis_opF30FAE[off];
5022cff040f3SRobert Mustacchi 			rep_prefix = 0;
5023cff040f3SRobert Mustacchi 		} else if (rep_prefix != 0x00) {
5024cff040f3SRobert Mustacchi 			goto error;
5025cff040f3SRobert Mustacchi 		}
50267c478bd9Sstevel@tonic-gate 	}
50277c478bd9Sstevel@tonic-gate 
50287c478bd9Sstevel@tonic-gate 	/*
50297c478bd9Sstevel@tonic-gate 	 * In 64 bit mode, some opcodes automatically use opnd_size == SIZE64.
50307c478bd9Sstevel@tonic-gate 	 */
50317c478bd9Sstevel@tonic-gate 	if (cpu_mode == SIZE64)
50327c478bd9Sstevel@tonic-gate 		if (dp->it_always64 || (opnd_size == SIZE32 && dp->it_stackop))
50337c478bd9Sstevel@tonic-gate 			opnd_size = SIZE64;
50347c478bd9Sstevel@tonic-gate 
50357c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
50367c478bd9Sstevel@tonic-gate 	/*
50377c478bd9Sstevel@tonic-gate 	 * At this point most instructions can format the opcode mnemonic
50387c478bd9Sstevel@tonic-gate 	 * including the prefixes.
50397c478bd9Sstevel@tonic-gate 	 */
50407c478bd9Sstevel@tonic-gate 	if (lock_prefix)
5041d267098bSdmick 		(void) strlcat(x->d86_mnem, "lock ", OPLEN);
50427c478bd9Sstevel@tonic-gate 
50437c478bd9Sstevel@tonic-gate 	if (rep_prefix == 0xf2)
5044d267098bSdmick 		(void) strlcat(x->d86_mnem, "repnz ", OPLEN);
50457c478bd9Sstevel@tonic-gate 	else if (rep_prefix == 0xf3)
5046d267098bSdmick 		(void) strlcat(x->d86_mnem, "repz ", OPLEN);
50477c478bd9Sstevel@tonic-gate 
50487c478bd9Sstevel@tonic-gate 	if (cpu_mode == SIZE64 && addr_size_prefix)
5049d267098bSdmick 		(void) strlcat(x->d86_mnem, "addr32 ", OPLEN);
50507c478bd9Sstevel@tonic-gate 
50517c478bd9Sstevel@tonic-gate 	if (dp->it_adrmode != CBW &&
50527c478bd9Sstevel@tonic-gate 	    dp->it_adrmode != CWD &&
50537c478bd9Sstevel@tonic-gate 	    dp->it_adrmode != XMMSFNC) {
50547c478bd9Sstevel@tonic-gate 		if (strcmp(dp->it_name, "INVALID") == 0)
50557c478bd9Sstevel@tonic-gate 			goto error;
5056d267098bSdmick 		(void) strlcat(x->d86_mnem, dp->it_name, OPLEN);
5057d242cdf5SJerry Jelinek 		if (dp->it_avxsuf == AVS2 && dp->it_suffix) {
5058245ac945SRobert Mustacchi 			(void) strlcat(x->d86_mnem, vex_W != 0 ? "q" : "d",
5059245ac945SRobert Mustacchi 			    OPLEN);
5060a4e73d5dSJerry Jelinek 		} else if (dp->it_vexopmask && dp->it_suffix) {
5061a4e73d5dSJerry Jelinek 			/* opmask instructions */
5062a4e73d5dSJerry Jelinek 
5063a4e73d5dSJerry Jelinek 			if (opcode1 == 4 && opcode2 == 0xb) {
5064a4e73d5dSJerry Jelinek 				/* It's a kunpck. */
5065a4e73d5dSJerry Jelinek 				if (vex_prefix == VEX_2bytes) {
5066a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5067a4e73d5dSJerry Jelinek 					    vex_p == 0 ? "wd" : "bw", OPLEN);
5068a4e73d5dSJerry Jelinek 				} else {
5069a4e73d5dSJerry Jelinek 					/* vex_prefix == VEX_3bytes */
5070a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5071a4e73d5dSJerry Jelinek 					    "dq", OPLEN);
5072a4e73d5dSJerry Jelinek 				}
5073a4e73d5dSJerry Jelinek 			} else if (opcode1 == 3) {
5074a4e73d5dSJerry Jelinek 				/* It's a kshift[l|r]. */
5075a4e73d5dSJerry Jelinek 				if (vex_W == 0) {
5076a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5077a4e73d5dSJerry Jelinek 					    opcode2 == 2 ||
5078a4e73d5dSJerry Jelinek 					    opcode2 == 0 ?
5079a4e73d5dSJerry Jelinek 					    "b" : "d", OPLEN);
5080a4e73d5dSJerry Jelinek 				} else {
5081a4e73d5dSJerry Jelinek 					/* W == 1 */
5082a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5083a4e73d5dSJerry Jelinek 					    opcode2 == 3 || opcode2 == 1 ?
5084a4e73d5dSJerry Jelinek 					    "q" : "w", OPLEN);
5085a4e73d5dSJerry Jelinek 				}
5086a4e73d5dSJerry Jelinek 			} else {
5087a4e73d5dSJerry Jelinek 				/* if (vex_prefix == VEX_2bytes) { */
5088a4e73d5dSJerry Jelinek 				if ((cpu_mode == SIZE64 && opnd_size == 2) ||
5089a4e73d5dSJerry Jelinek 				    vex_prefix == VEX_2bytes) {
5090a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5091a4e73d5dSJerry Jelinek 					    vex_p == 0 ? "w" :
5092a4e73d5dSJerry Jelinek 					    vex_p == 1 ? "b" : "d",
5093a4e73d5dSJerry Jelinek 					    OPLEN);
5094a4e73d5dSJerry Jelinek 				} else {
5095a4e73d5dSJerry Jelinek 					/* vex_prefix == VEX_3bytes */
5096a4e73d5dSJerry Jelinek 					(void) strlcat(x->d86_mnem,
5097a4e73d5dSJerry Jelinek 					    vex_p == 1 ? "d" : "q", OPLEN);
5098a4e73d5dSJerry Jelinek 				}
5099a4e73d5dSJerry Jelinek 			}
5100245ac945SRobert Mustacchi 		} else if (dp->it_suffix) {
51017c478bd9Sstevel@tonic-gate 			char *types[] = {"", "w", "l", "q"};
51027c478bd9Sstevel@tonic-gate 			if (opcode_bytes == 2 && opcode4 == 4) {
51037c478bd9Sstevel@tonic-gate 				/* It's a cmovx.yy. Replace the suffix x */
51047c478bd9Sstevel@tonic-gate 				for (i = 5; i < OPLEN; i++) {
5105d267098bSdmick 					if (x->d86_mnem[i] == '.')
51067c478bd9Sstevel@tonic-gate 						break;
51077c478bd9Sstevel@tonic-gate 				}
5108d267098bSdmick 				x->d86_mnem[i - 1] = *types[opnd_size];
5109a2f205d0Skk 			} else if ((opnd_size == 2) && (opcode_bytes == 3) &&
5110a2f205d0Skk 			    ((opcode6 == 1 && opcode7 == 6) ||
5111a2f205d0Skk 			    (opcode6 == 2 && opcode7 == 2))) {
5112a2f205d0Skk 				/*
5113a2f205d0Skk 				 * To handle PINSRD and PEXTRD
5114a2f205d0Skk 				 */
5115a2f205d0Skk 				(void) strlcat(x->d86_mnem, "d", OPLEN);
511681b505b7SJerry Jelinek 			} else if (dp != &dis_distable[0x6][0x2]) {
511781b505b7SJerry Jelinek 				/* bound instructions (0x62) have no suffix */
5118d267098bSdmick 				(void) strlcat(x->d86_mnem, types[opnd_size],
5119dc0093f4Seschrock 				    OPLEN);
5120dc0093f4Seschrock 			}
51217c478bd9Sstevel@tonic-gate 		}
51227c478bd9Sstevel@tonic-gate 	}
51237c478bd9Sstevel@tonic-gate #endif
51247c478bd9Sstevel@tonic-gate 
51257c478bd9Sstevel@tonic-gate 	/*
51267c478bd9Sstevel@tonic-gate 	 * Process operands based on the addressing modes.
51277c478bd9Sstevel@tonic-gate 	 */
51287c478bd9Sstevel@tonic-gate 	x->d86_mode = cpu_mode;
5129ab47273fSEdward Gillett 	/*
5130ab47273fSEdward Gillett 	 * In vex mode the rex_prefix has no meaning
5131ab47273fSEdward Gillett 	 */
5132a25e615dSRobert Mustacchi 	if (!vex_prefix && evex_prefix == 0)
5133ab47273fSEdward Gillett 		x->d86_rex_prefix = rex_prefix;
51347c478bd9Sstevel@tonic-gate 	x->d86_opnd_size = opnd_size;
51357c478bd9Sstevel@tonic-gate 	x->d86_addr_size = addr_size;
51367c478bd9Sstevel@tonic-gate 	vbit = 0;		/* initialize for mem/reg -> reg */
51377c478bd9Sstevel@tonic-gate 	switch (dp->it_adrmode) {
51387c478bd9Sstevel@tonic-gate 		/*
51397c478bd9Sstevel@tonic-gate 		 * amd64 instruction to sign extend 32 bit reg/mem operands
51407c478bd9Sstevel@tonic-gate 		 * into 64 bit register values
51417c478bd9Sstevel@tonic-gate 		 */
51427c478bd9Sstevel@tonic-gate 	case MOVSXZ:
51437c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
51447c478bd9Sstevel@tonic-gate 		if (rex_prefix == 0)
5145d267098bSdmick 			(void) strncpy(x->d86_mnem, "movzld", OPLEN);
51467c478bd9Sstevel@tonic-gate #endif
51477c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
51487c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
51497c478bd9Sstevel@tonic-gate 		x->d86_opnd_size = SIZE64;
51507c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
51517c478bd9Sstevel@tonic-gate 		x->d86_opnd_size = opnd_size = SIZE32;
51527c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
51537c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
51547c478bd9Sstevel@tonic-gate 		break;
51557c478bd9Sstevel@tonic-gate 
51567c478bd9Sstevel@tonic-gate 		/*
51577c478bd9Sstevel@tonic-gate 		 * movsbl movsbw movsbq (0x0FBE) or movswl movswq (0x0FBF)
5158d267098bSdmick 		 * movzbl movzbw movzbq (0x0FB6) or movzwl movzwq (0x0FB7)
51597c478bd9Sstevel@tonic-gate 		 * wbit lives in 2nd byte, note that operands
51607c478bd9Sstevel@tonic-gate 		 * are different sized
51617c478bd9Sstevel@tonic-gate 		 */
51627c478bd9Sstevel@tonic-gate 	case MOVZ:
51637c478bd9Sstevel@tonic-gate 		if (rex_prefix & REX_W) {
51647c478bd9Sstevel@tonic-gate 			/* target register size = 64 bit */
5165d267098bSdmick 			x->d86_mnem[5] = 'q';
51667c478bd9Sstevel@tonic-gate 		}
51677c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
51687c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
51697c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
51707c478bd9Sstevel@tonic-gate 		x->d86_opnd_size = opnd_size = SIZE16;
51717c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode5);
51727c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
51737c478bd9Sstevel@tonic-gate 		break;
5174d0f8ff6eSkk 	case CRC32:
5175d0f8ff6eSkk 		opnd_size = SIZE32;
5176d0f8ff6eSkk 		if (rex_prefix & REX_W)
5177d0f8ff6eSkk 			opnd_size = SIZE64;
5178d0f8ff6eSkk 		x->d86_opnd_size = opnd_size;
5179d0f8ff6eSkk 
5180d0f8ff6eSkk 		dtrace_get_modrm(x, &mode, &reg, &r_m);
5181d0f8ff6eSkk 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
5182d0f8ff6eSkk 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
5183d0f8ff6eSkk 		wbit = WBIT(opcode7);
5184d0f8ff6eSkk 		if (opnd_size_prefix)
5185d0f8ff6eSkk 			x->d86_opnd_size = opnd_size = SIZE16;
5186d0f8ff6eSkk 		dtrace_get_operand(x, mode, r_m, wbit, 0);
5187d0f8ff6eSkk 		break;
518882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 	case MOVBE:
518982d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		opnd_size = SIZE32;
519082d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		if (rex_prefix & REX_W)
519182d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			opnd_size = SIZE64;
519282d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		x->d86_opnd_size = opnd_size;
519382d5eb48SKrishnendu Sadhukhan - Sun Microsystems 
519482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		dtrace_get_modrm(x, &mode, &reg, &r_m);
519582d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
519682d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		wbit = WBIT(opcode7);
519782d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		if (opnd_size_prefix)
519882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			x->d86_opnd_size = opnd_size = SIZE16;
519982d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		if (wbit) {
520082d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			/* reg -> mem */
520182d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 0);
520282d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			dtrace_get_operand(x, mode, r_m, wbit, 1);
520382d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		} else {
520482d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			/* mem -> reg */
520582d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
520682d5eb48SKrishnendu Sadhukhan - Sun Microsystems 			dtrace_get_operand(x, mode, r_m, wbit, 0);
520782d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		}
520882d5eb48SKrishnendu Sadhukhan - Sun Microsystems 		break;
52097c478bd9Sstevel@tonic-gate 
52107c478bd9Sstevel@tonic-gate 	/*
52117c478bd9Sstevel@tonic-gate 	 * imul instruction, with either 8-bit or longer immediate
52127c478bd9Sstevel@tonic-gate 	 * opcode 0x6B for byte, sign-extended displacement, 0x69 for word(s)
52137c478bd9Sstevel@tonic-gate 	 */
52147c478bd9Sstevel@tonic-gate 	case IMUL:
52157c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
52167c478bd9Sstevel@tonic-gate 		THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND,
5217a2f205d0Skk 		    OPSIZE(opnd_size, opcode2 == 0x9), 1);
52187c478bd9Sstevel@tonic-gate 		break;
52197c478bd9Sstevel@tonic-gate 
52207c478bd9Sstevel@tonic-gate 	/* memory or register operand to register, with 'w' bit	*/
52217c478bd9Sstevel@tonic-gate 	case MRw:
52228889c875SRobert Mustacchi 	case ADX:
52237c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
52247c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
52257c478bd9Sstevel@tonic-gate 		break;
52267c478bd9Sstevel@tonic-gate 
52277c478bd9Sstevel@tonic-gate 	/* register to memory or register operand, with 'w' bit	*/
52287c478bd9Sstevel@tonic-gate 	/* arpl happens to fit here also because it is odd */
52297c478bd9Sstevel@tonic-gate 	case RMw:
52307c478bd9Sstevel@tonic-gate 		if (opcode_bytes == 2)
52317c478bd9Sstevel@tonic-gate 			wbit = WBIT(opcode5);
52327c478bd9Sstevel@tonic-gate 		else
52337c478bd9Sstevel@tonic-gate 			wbit = WBIT(opcode2);
52347c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
52357c478bd9Sstevel@tonic-gate 		break;
52367c478bd9Sstevel@tonic-gate 
52377c478bd9Sstevel@tonic-gate 	/* xaddb instruction */
52387c478bd9Sstevel@tonic-gate 	case XADDB:
52397c478bd9Sstevel@tonic-gate 		wbit = 0;
52407c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
52417c478bd9Sstevel@tonic-gate 		break;
52427c478bd9Sstevel@tonic-gate 
52437c478bd9Sstevel@tonic-gate 	/* MMX register to memory or register operand		*/
52447c478bd9Sstevel@tonic-gate 	case MMS:
52457c478bd9Sstevel@tonic-gate 	case MMOS:
52467c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
52477c478bd9Sstevel@tonic-gate 		wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND;
52487c478bd9Sstevel@tonic-gate #else
52497c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
52507c478bd9Sstevel@tonic-gate #endif
52517c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 1);
52527c478bd9Sstevel@tonic-gate 		break;
52537c478bd9Sstevel@tonic-gate 
52547c478bd9Sstevel@tonic-gate 	/* MMX register to memory */
52557c478bd9Sstevel@tonic-gate 	case MMOMS:
52567c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
52577c478bd9Sstevel@tonic-gate 		if (mode == REG_ONLY)
52587c478bd9Sstevel@tonic-gate 			goto error;
52597c478bd9Sstevel@tonic-gate 		wbit = MM_OPND;
52607c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 1);
52617c478bd9Sstevel@tonic-gate 		break;
52627c478bd9Sstevel@tonic-gate 
52637c478bd9Sstevel@tonic-gate 	/* Double shift. Has immediate operand specifying the shift. */
52647c478bd9Sstevel@tonic-gate 	case DSHIFT:
52657c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
52667c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
52677c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
52687c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 2);
52697c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
52707c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 1, 0);
52717c478bd9Sstevel@tonic-gate 		break;
52727c478bd9Sstevel@tonic-gate 
52737c478bd9Sstevel@tonic-gate 	/*
52747c478bd9Sstevel@tonic-gate 	 * Double shift. With no immediate operand, specifies using %cl.
52757c478bd9Sstevel@tonic-gate 	 */
52767c478bd9Sstevel@tonic-gate 	case DSHIFTcl:
52777c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
52787c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
52797c478bd9Sstevel@tonic-gate 		break;
52807c478bd9Sstevel@tonic-gate 
52817c478bd9Sstevel@tonic-gate 	/* immediate to memory or register operand */
52827c478bd9Sstevel@tonic-gate 	case IMlw:
52837c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
52847c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
52857c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 1);
52867c478bd9Sstevel@tonic-gate 		/*
52877c478bd9Sstevel@tonic-gate 		 * Have long immediate for opcode 0x81, but not 0x80 nor 0x83
52887c478bd9Sstevel@tonic-gate 		 */
52897c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, opcode2 == 1), 0);
52907c478bd9Sstevel@tonic-gate 		break;
52917c478bd9Sstevel@tonic-gate 
52927c478bd9Sstevel@tonic-gate 	/* immediate to memory or register operand with the	*/
52937c478bd9Sstevel@tonic-gate 	/* 'w' bit present					*/
52947c478bd9Sstevel@tonic-gate 	case IMw:
52957c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
52967c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
52977c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
52987c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 1);
52997c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, wbit), 0);
53007c478bd9Sstevel@tonic-gate 		break;
53017c478bd9Sstevel@tonic-gate 
53027c478bd9Sstevel@tonic-gate 	/* immediate to register with register in low 3 bits	*/
53037c478bd9Sstevel@tonic-gate 	/* of op code						*/
53047c478bd9Sstevel@tonic-gate 	case IR:
53057c478bd9Sstevel@tonic-gate 		/* w-bit here (with regs) is bit 3 */
53067c478bd9Sstevel@tonic-gate 		wbit = opcode2 >>3 & 0x1;
53077c478bd9Sstevel@tonic-gate 		reg = REGNO(opcode2);
53087c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, NULL);
53097c478bd9Sstevel@tonic-gate 		mode = REG_ONLY;
53107c478bd9Sstevel@tonic-gate 		r_m = reg;
53117c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 1);
53127c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE64(opnd_size, wbit), 0);
53137c478bd9Sstevel@tonic-gate 		break;
53147c478bd9Sstevel@tonic-gate 
53157c478bd9Sstevel@tonic-gate 	/* MMX immediate shift of register */
53167c478bd9Sstevel@tonic-gate 	case MMSH:
53177c478bd9Sstevel@tonic-gate 	case MMOSH:
53187c478bd9Sstevel@tonic-gate 		wbit = MM_OPND;
53197c478bd9Sstevel@tonic-gate 		goto mm_shift;	/* in next case */
53207c478bd9Sstevel@tonic-gate 
53217c478bd9Sstevel@tonic-gate 	/* SIMD immediate shift of register */
53227c478bd9Sstevel@tonic-gate 	case XMMSH:
53237c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
53247c478bd9Sstevel@tonic-gate mm_shift:
53257c478bd9Sstevel@tonic-gate 		reg = REGNO(opcode7);
53267c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, NULL);
53277c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
53287c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 1, 0);
53297c478bd9Sstevel@tonic-gate 		NOMEM;
53307c478bd9Sstevel@tonic-gate 		break;
53317c478bd9Sstevel@tonic-gate 
53327c478bd9Sstevel@tonic-gate 	/* accumulator to memory operand */
53337c478bd9Sstevel@tonic-gate 	case AO:
53347c478bd9Sstevel@tonic-gate 		vbit = 1;
53357c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
53367c478bd9Sstevel@tonic-gate 
53377c478bd9Sstevel@tonic-gate 	/* memory operand to accumulator */
53387c478bd9Sstevel@tonic-gate 	case OA:
53397c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
53407c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1 - vbit);
53417c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE64(addr_size, LONG_OPND), vbit);
53427c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
53437c478bd9Sstevel@tonic-gate 		x->d86_opnd[vbit].d86_mode = MODE_OFFSET;
53447c478bd9Sstevel@tonic-gate #endif
53457c478bd9Sstevel@tonic-gate 		break;
53467c478bd9Sstevel@tonic-gate 
53477c478bd9Sstevel@tonic-gate 
53487c478bd9Sstevel@tonic-gate 	/* segment register to memory or register operand */
53497c478bd9Sstevel@tonic-gate 	case SM:
53507c478bd9Sstevel@tonic-gate 		vbit = 1;
53517c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
53527c478bd9Sstevel@tonic-gate 
53537c478bd9Sstevel@tonic-gate 	/* memory or register operand to segment register */
53547c478bd9Sstevel@tonic-gate 	case MS:
53557c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
53567c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
53577c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, LONG_OPND, vbit);
53587c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 1 - vbit);
53597c478bd9Sstevel@tonic-gate 		break;
53607c478bd9Sstevel@tonic-gate 
53617c478bd9Sstevel@tonic-gate 	/*
53627c478bd9Sstevel@tonic-gate 	 * rotate or shift instructions, which may shift by 1 or
53637c478bd9Sstevel@tonic-gate 	 * consult the cl register, depending on the 'v' bit
53647c478bd9Sstevel@tonic-gate 	 */
53657c478bd9Sstevel@tonic-gate 	case Mv:
53667c478bd9Sstevel@tonic-gate 		vbit = VBIT(opcode2);
53677c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
53687c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
53697c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 1);
53707c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
53717c478bd9Sstevel@tonic-gate 		if (vbit) {
5372dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "%cl", OPLEN);
53737c478bd9Sstevel@tonic-gate 		} else {
53747c478bd9Sstevel@tonic-gate 			x->d86_opnd[0].d86_mode = MODE_SIGNED;
53757c478bd9Sstevel@tonic-gate 			x->d86_opnd[0].d86_value_size = 1;
53767c478bd9Sstevel@tonic-gate 			x->d86_opnd[0].d86_value = 1;
53777c478bd9Sstevel@tonic-gate 		}
53787c478bd9Sstevel@tonic-gate #endif
53797c478bd9Sstevel@tonic-gate 		break;
53807c478bd9Sstevel@tonic-gate 	/*
53817c478bd9Sstevel@tonic-gate 	 * immediate rotate or shift instructions
53827c478bd9Sstevel@tonic-gate 	 */
53837c478bd9Sstevel@tonic-gate 	case MvI:
53847c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
53857c478bd9Sstevel@tonic-gate normal_imm_mem:
53867c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
53877c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 1);
53887c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 1, 0);
53897c478bd9Sstevel@tonic-gate 		break;
53907c478bd9Sstevel@tonic-gate 
53917c478bd9Sstevel@tonic-gate 	/* bit test instructions */
53927c478bd9Sstevel@tonic-gate 	case MIb:
53937c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
53947c478bd9Sstevel@tonic-gate 		goto normal_imm_mem;
53957c478bd9Sstevel@tonic-gate 
53967c478bd9Sstevel@tonic-gate 	/* single memory or register operand with 'w' bit present */
53977c478bd9Sstevel@tonic-gate 	case Mw:
53987c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
53997c478bd9Sstevel@tonic-gate just_mem:
54007c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
54017c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
54027c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
54037c478bd9Sstevel@tonic-gate 		break;
54047c478bd9Sstevel@tonic-gate 
5405eb23829fSBryan Cantrill 	case SWAPGS_RDTSCP:
54067c478bd9Sstevel@tonic-gate 		if (cpu_mode == SIZE64 && mode == 3 && r_m == 0) {
54077c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
5408d267098bSdmick 			(void) strncpy(x->d86_mnem, "swapgs", OPLEN);
5409eb23829fSBryan Cantrill #endif
5410eb23829fSBryan Cantrill 			NOMEM;
5411eb23829fSBryan Cantrill 			break;
5412eb23829fSBryan Cantrill 		} else if (mode == 3 && r_m == 1) {
5413eb23829fSBryan Cantrill #ifdef DIS_TEXT
5414eb23829fSBryan Cantrill 			(void) strncpy(x->d86_mnem, "rdtscp", OPLEN);
5415cff040f3SRobert Mustacchi #endif
5416cff040f3SRobert Mustacchi 			NOMEM;
5417cff040f3SRobert Mustacchi 			break;
5418cff040f3SRobert Mustacchi 		} else if (mode == 3 && r_m == 2) {
5419cff040f3SRobert Mustacchi #ifdef DIS_TEXT
5420cff040f3SRobert Mustacchi 			(void) strncpy(x->d86_mnem, "monitorx", OPLEN);
5421cff040f3SRobert Mustacchi #endif
5422cff040f3SRobert Mustacchi 			NOMEM;
5423cff040f3SRobert Mustacchi 			break;
5424cff040f3SRobert Mustacchi 		} else if (mode == 3 && r_m == 3) {
5425cff040f3SRobert Mustacchi #ifdef DIS_TEXT
5426cff040f3SRobert Mustacchi 			(void) strncpy(x->d86_mnem, "mwaitx", OPLEN);
5427cff040f3SRobert Mustacchi #endif
5428cff040f3SRobert Mustacchi 			NOMEM;
5429cff040f3SRobert Mustacchi 			break;
5430cff040f3SRobert Mustacchi 		} else if (mode == 3 && r_m == 4) {
5431cff040f3SRobert Mustacchi #ifdef DIS_TEXT
5432cff040f3SRobert Mustacchi 			(void) strncpy(x->d86_mnem, "clzero", OPLEN);
54337c478bd9Sstevel@tonic-gate #endif
54347c478bd9Sstevel@tonic-gate 			NOMEM;
54357c478bd9Sstevel@tonic-gate 			break;
54367c478bd9Sstevel@tonic-gate 		}
5437eb23829fSBryan Cantrill 
54387c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
54397c478bd9Sstevel@tonic-gate 
54407c478bd9Sstevel@tonic-gate 	/* prefetch instruction - memory operand, but no memory acess */
54417c478bd9Sstevel@tonic-gate 	case PREF:
54427c478bd9Sstevel@tonic-gate 		NOMEM;
54437c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
54447c478bd9Sstevel@tonic-gate 
54457c478bd9Sstevel@tonic-gate 	/* single memory or register operand */
54467c478bd9Sstevel@tonic-gate 	case M:
54477aa76ffcSBryan Cantrill 	case MG9:
54487c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
54497c478bd9Sstevel@tonic-gate 		goto just_mem;
54507c478bd9Sstevel@tonic-gate 
54517c478bd9Sstevel@tonic-gate 	/* single memory or register byte operand */
54527c478bd9Sstevel@tonic-gate 	case Mb:
54537c478bd9Sstevel@tonic-gate 		wbit = BYTE_OPND;
54547c478bd9Sstevel@tonic-gate 		goto just_mem;
54557c478bd9Sstevel@tonic-gate 
54567aa76ffcSBryan Cantrill 	case VMx:
54577aa76ffcSBryan Cantrill 		if (mode == 3) {
54587aa76ffcSBryan Cantrill #ifdef DIS_TEXT
54597aa76ffcSBryan Cantrill 			char *vminstr;
54607aa76ffcSBryan Cantrill 
54617aa76ffcSBryan Cantrill 			switch (r_m) {
54627aa76ffcSBryan Cantrill 			case 1:
54637aa76ffcSBryan Cantrill 				vminstr = "vmcall";
54647aa76ffcSBryan Cantrill 				break;
54657aa76ffcSBryan Cantrill 			case 2:
54667aa76ffcSBryan Cantrill 				vminstr = "vmlaunch";
54677aa76ffcSBryan Cantrill 				break;
54687aa76ffcSBryan Cantrill 			case 3:
54697aa76ffcSBryan Cantrill 				vminstr = "vmresume";
54707aa76ffcSBryan Cantrill 				break;
54717aa76ffcSBryan Cantrill 			case 4:
54727aa76ffcSBryan Cantrill 				vminstr = "vmxoff";
54737aa76ffcSBryan Cantrill 				break;
54747aa76ffcSBryan Cantrill 			default:
54757aa76ffcSBryan Cantrill 				goto error;
54767aa76ffcSBryan Cantrill 			}
54777aa76ffcSBryan Cantrill 
54787aa76ffcSBryan Cantrill 			(void) strncpy(x->d86_mnem, vminstr, OPLEN);
54797aa76ffcSBryan Cantrill #else
54807aa76ffcSBryan Cantrill 			if (r_m < 1 || r_m > 4)
54817aa76ffcSBryan Cantrill 				goto error;
54827aa76ffcSBryan Cantrill #endif
54837aa76ffcSBryan Cantrill 
54847aa76ffcSBryan Cantrill 			NOMEM;
54857aa76ffcSBryan Cantrill 			break;
54867aa76ffcSBryan Cantrill 		}
54877aa76ffcSBryan Cantrill 		/*FALLTHROUGH*/
548870dc7639SRichard Lowe 	case SVM:
548970dc7639SRichard Lowe 		if (mode == 3) {
549070dc7639SRichard Lowe #if DIS_TEXT
549170dc7639SRichard Lowe 			char *vinstr;
549270dc7639SRichard Lowe 
549370dc7639SRichard Lowe 			switch (r_m) {
549470dc7639SRichard Lowe 			case 0:
549570dc7639SRichard Lowe 				vinstr = "vmrun";
549670dc7639SRichard Lowe 				break;
549770dc7639SRichard Lowe 			case 1:
549870dc7639SRichard Lowe 				vinstr = "vmmcall";
549970dc7639SRichard Lowe 				break;
550070dc7639SRichard Lowe 			case 2:
550170dc7639SRichard Lowe 				vinstr = "vmload";
550270dc7639SRichard Lowe 				break;
550370dc7639SRichard Lowe 			case 3:
550470dc7639SRichard Lowe 				vinstr = "vmsave";
550570dc7639SRichard Lowe 				break;
550670dc7639SRichard Lowe 			case 4:
550770dc7639SRichard Lowe 				vinstr = "stgi";
550870dc7639SRichard Lowe 				break;
550970dc7639SRichard Lowe 			case 5:
551070dc7639SRichard Lowe 				vinstr = "clgi";
551170dc7639SRichard Lowe 				break;
551270dc7639SRichard Lowe 			case 6:
551370dc7639SRichard Lowe 				vinstr = "skinit";
551470dc7639SRichard Lowe 				break;
551570dc7639SRichard Lowe 			case 7:
551670dc7639SRichard Lowe 				vinstr = "invlpga";
551770dc7639SRichard Lowe 				break;
551870dc7639SRichard Lowe 			}
551970dc7639SRichard Lowe 
552070dc7639SRichard Lowe 			(void) strncpy(x->d86_mnem, vinstr, OPLEN);
552170dc7639SRichard Lowe #endif
552270dc7639SRichard Lowe 			NOMEM;
552370dc7639SRichard Lowe 			break;
552470dc7639SRichard Lowe 		}
552570dc7639SRichard Lowe 		/*FALLTHROUGH*/
5526f8801251Skk 	case MONITOR_MWAIT:
5527f8801251Skk 		if (mode == 3) {
5528f8801251Skk 			if (r_m == 0) {
5529f8801251Skk #ifdef DIS_TEXT
5530f8801251Skk 				(void) strncpy(x->d86_mnem, "monitor", OPLEN);
5531f8801251Skk #endif
5532f8801251Skk 				NOMEM;
5533f8801251Skk 				break;
5534f8801251Skk 			} else if (r_m == 1) {
5535f8801251Skk #ifdef DIS_TEXT
5536f8801251Skk 				(void) strncpy(x->d86_mnem, "mwait", OPLEN);
55378889c875SRobert Mustacchi #endif
55388889c875SRobert Mustacchi 				NOMEM;
55398889c875SRobert Mustacchi 				break;
55408889c875SRobert Mustacchi 			} else if (r_m == 2) {
55418889c875SRobert Mustacchi #ifdef DIS_TEXT
55428889c875SRobert Mustacchi 				(void) strncpy(x->d86_mnem, "clac", OPLEN);
55438889c875SRobert Mustacchi #endif
55448889c875SRobert Mustacchi 				NOMEM;
55458889c875SRobert Mustacchi 				break;
55468889c875SRobert Mustacchi 			} else if (r_m == 3) {
55478889c875SRobert Mustacchi #ifdef DIS_TEXT
55488889c875SRobert Mustacchi 				(void) strncpy(x->d86_mnem, "stac", OPLEN);
5549f8801251Skk #endif
5550f8801251Skk 				NOMEM;
5551f8801251Skk 				break;
5552f8801251Skk 			} else {
5553f8801251Skk 				goto error;
5554f8801251Skk 			}
5555f8801251Skk 		}
5556f8801251Skk 		/*FALLTHROUGH*/
5557ab47273fSEdward Gillett 	case XGETBV_XSETBV:
5558ab47273fSEdward Gillett 		if (mode == 3) {
5559ab47273fSEdward Gillett 			if (r_m == 0) {
5560ab47273fSEdward Gillett #ifdef DIS_TEXT
5561ab47273fSEdward Gillett 				(void) strncpy(x->d86_mnem, "xgetbv", OPLEN);
5562ab47273fSEdward Gillett #endif
5563ab47273fSEdward Gillett 				NOMEM;
5564ab47273fSEdward Gillett 				break;
5565ab47273fSEdward Gillett 			} else if (r_m == 1) {
5566ab47273fSEdward Gillett #ifdef DIS_TEXT
5567ab47273fSEdward Gillett 				(void) strncpy(x->d86_mnem, "xsetbv", OPLEN);
5568ab47273fSEdward Gillett #endif
5569ab47273fSEdward Gillett 				NOMEM;
5570ab47273fSEdward Gillett 				break;
5571ab47273fSEdward Gillett 			} else {
5572ab47273fSEdward Gillett 				goto error;
5573ab47273fSEdward Gillett 			}
5574f8801251Skk 
5575ab47273fSEdward Gillett 		}
5576ab47273fSEdward Gillett 		/*FALLTHROUGH*/
55777c478bd9Sstevel@tonic-gate 	case MO:
55787c478bd9Sstevel@tonic-gate 		/* Similar to M, but only memory (no direct registers) */
55797c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
55807c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
55817c478bd9Sstevel@tonic-gate 		if (mode == 3)
55827c478bd9Sstevel@tonic-gate 			goto error;
55837c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
55847c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
55857c478bd9Sstevel@tonic-gate 		break;
55867c478bd9Sstevel@tonic-gate 
55877c478bd9Sstevel@tonic-gate 	/* move special register to register or reverse if vbit */
55887c478bd9Sstevel@tonic-gate 	case SREG:
55897c478bd9Sstevel@tonic-gate 		switch (opcode5) {
55907c478bd9Sstevel@tonic-gate 
55917c478bd9Sstevel@tonic-gate 		case 2:
55927c478bd9Sstevel@tonic-gate 			vbit = 1;
55937c478bd9Sstevel@tonic-gate 			/*FALLTHROUGH*/
55947c478bd9Sstevel@tonic-gate 		case 0:
55957c478bd9Sstevel@tonic-gate 			wbit = CONTROL_OPND;
55967c478bd9Sstevel@tonic-gate 			break;
55977c478bd9Sstevel@tonic-gate 
55987c478bd9Sstevel@tonic-gate 		case 3:
55997c478bd9Sstevel@tonic-gate 			vbit = 1;
56007c478bd9Sstevel@tonic-gate 			/*FALLTHROUGH*/
56017c478bd9Sstevel@tonic-gate 		case 1:
56027c478bd9Sstevel@tonic-gate 			wbit = DEBUG_OPND;
56037c478bd9Sstevel@tonic-gate 			break;
56047c478bd9Sstevel@tonic-gate 
56057c478bd9Sstevel@tonic-gate 		case 6:
56067c478bd9Sstevel@tonic-gate 			vbit = 1;
56077c478bd9Sstevel@tonic-gate 			/*FALLTHROUGH*/
56087c478bd9Sstevel@tonic-gate 		case 4:
56097c478bd9Sstevel@tonic-gate 			wbit = TEST_OPND;
56107c478bd9Sstevel@tonic-gate 			break;
56117c478bd9Sstevel@tonic-gate 
56127c478bd9Sstevel@tonic-gate 		}
56137c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
56147c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
56157c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit);
56167c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, r_m, LONG_OPND, 1 - vbit);
56177c478bd9Sstevel@tonic-gate 		NOMEM;
56187c478bd9Sstevel@tonic-gate 		break;
56197c478bd9Sstevel@tonic-gate 
56207c478bd9Sstevel@tonic-gate 	/*
56217c478bd9Sstevel@tonic-gate 	 * single register operand with register in the low 3
56227c478bd9Sstevel@tonic-gate 	 * bits of op code
56237c478bd9Sstevel@tonic-gate 	 */
56247c478bd9Sstevel@tonic-gate 	case R:
56257c478bd9Sstevel@tonic-gate 		if (opcode_bytes == 2)
56267c478bd9Sstevel@tonic-gate 			reg = REGNO(opcode5);
56277c478bd9Sstevel@tonic-gate 		else
56287c478bd9Sstevel@tonic-gate 			reg = REGNO(opcode2);
56297c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, NULL);
56307c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 0);
56317c478bd9Sstevel@tonic-gate 		NOMEM;
56327c478bd9Sstevel@tonic-gate 		break;
56337c478bd9Sstevel@tonic-gate 
56347c478bd9Sstevel@tonic-gate 	/*
56357c478bd9Sstevel@tonic-gate 	 * register to accumulator with register in the low 3
56367c478bd9Sstevel@tonic-gate 	 * bits of op code, xchg instructions
56377c478bd9Sstevel@tonic-gate 	 */
56387c478bd9Sstevel@tonic-gate 	case RA:
56397c478bd9Sstevel@tonic-gate 		NOMEM;
56407c478bd9Sstevel@tonic-gate 		reg = REGNO(opcode2);
56417c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, NULL);
56427c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 0);
56437c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, EAX_REGNO, LONG_OPND, 1);
56447c478bd9Sstevel@tonic-gate 		break;
56457c478bd9Sstevel@tonic-gate 
5646fb2cb638SRobert Mustacchi 	case RMATCH:
5647fb2cb638SRobert Mustacchi 		x->d86_opnd_size = x->d86_mode;
5648fb2cb638SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
5649fb2cb638SRobert Mustacchi 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
5650fb2cb638SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
5651fb2cb638SRobert Mustacchi 		break;
5652fb2cb638SRobert Mustacchi 
56537c478bd9Sstevel@tonic-gate 	/*
56547c478bd9Sstevel@tonic-gate 	 * single segment register operand, with register in
56557c478bd9Sstevel@tonic-gate 	 * bits 3-4 of op code byte
56567c478bd9Sstevel@tonic-gate 	 */
56577c478bd9Sstevel@tonic-gate 	case SEG:
56587c478bd9Sstevel@tonic-gate 		NOMEM;
56597c478bd9Sstevel@tonic-gate 		reg = (x->d86_bytes[x->d86_len - 1] >> 3) & 0x3;
56607c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 0);
56617c478bd9Sstevel@tonic-gate 		break;
56627c478bd9Sstevel@tonic-gate 
56637c478bd9Sstevel@tonic-gate 	/*
56647c478bd9Sstevel@tonic-gate 	 * single segment register operand, with register in
56657c478bd9Sstevel@tonic-gate 	 * bits 3-5 of op code
56667c478bd9Sstevel@tonic-gate 	 */
56677c478bd9Sstevel@tonic-gate 	case LSEG:
56687c478bd9Sstevel@tonic-gate 		NOMEM;
56697c478bd9Sstevel@tonic-gate 		/* long seg reg from opcode */
56707c478bd9Sstevel@tonic-gate 		reg = (x->d86_bytes[x->d86_len - 1] >> 3) & 0x7;
56717c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 0);
56727c478bd9Sstevel@tonic-gate 		break;
56737c478bd9Sstevel@tonic-gate 
56747c478bd9Sstevel@tonic-gate 	/* memory or register operand to register */
56757c478bd9Sstevel@tonic-gate 	case MR:
5676ab47273fSEdward Gillett 		if (vex_prefetch)
5677ab47273fSEdward Gillett 			x->d86_got_modrm = 1;
56787c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
56797c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
56807c478bd9Sstevel@tonic-gate 		break;
56817c478bd9Sstevel@tonic-gate 
56827c478bd9Sstevel@tonic-gate 	case RM:
56837aa76ffcSBryan Cantrill 	case RM_66r:
568481b505b7SJerry Jelinek 		if (vex_prefetch)
568581b505b7SJerry Jelinek 			x->d86_got_modrm = 1;
56867c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
56877c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 1);
56887c478bd9Sstevel@tonic-gate 		break;
56897c478bd9Sstevel@tonic-gate 
56907c478bd9Sstevel@tonic-gate 	/* MMX/SIMD-Int memory or mm reg to mm reg		*/
56917c478bd9Sstevel@tonic-gate 	case MM:
56927c478bd9Sstevel@tonic-gate 	case MMO:
56937c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
56947c478bd9Sstevel@tonic-gate 		wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND;
56957c478bd9Sstevel@tonic-gate #else
56967c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
56977c478bd9Sstevel@tonic-gate #endif
56987c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 0);
56997c478bd9Sstevel@tonic-gate 		break;
57007c478bd9Sstevel@tonic-gate 
57017c478bd9Sstevel@tonic-gate 	case MMOIMPL:
57027c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
57037c478bd9Sstevel@tonic-gate 		wbit = strcmp(dp->it_name, "movd") ? MM_OPND : LONG_OPND;
57047c478bd9Sstevel@tonic-gate #else
57057c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
57067c478bd9Sstevel@tonic-gate #endif
57077c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
57087c478bd9Sstevel@tonic-gate 		if (mode != REG_ONLY)
57097c478bd9Sstevel@tonic-gate 			goto error;
57107c478bd9Sstevel@tonic-gate 
57117c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
57127c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
57137c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, MM_OPND, 1);
57147c478bd9Sstevel@tonic-gate 		mode = 0;	/* change for memory access size... */
57157c478bd9Sstevel@tonic-gate 		break;
57167c478bd9Sstevel@tonic-gate 
57177c478bd9Sstevel@tonic-gate 	/* MMX/SIMD-Int and SIMD-FP predicated mm reg to r32 */
57187c478bd9Sstevel@tonic-gate 	case MMO3P:
57197c478bd9Sstevel@tonic-gate 		wbit = MM_OPND;
57207c478bd9Sstevel@tonic-gate 		goto xmm3p;
57217c478bd9Sstevel@tonic-gate 	case XMM3P:
57227c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
57237c478bd9Sstevel@tonic-gate xmm3p:
57247c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
57257c478bd9Sstevel@tonic-gate 		if (mode != REG_ONLY)
57267c478bd9Sstevel@tonic-gate 			goto error;
57277c478bd9Sstevel@tonic-gate 
5728a2f205d0Skk 		THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 1,
5729a2f205d0Skk 		    1);
57307c478bd9Sstevel@tonic-gate 		NOMEM;
57317c478bd9Sstevel@tonic-gate 		break;
57327c478bd9Sstevel@tonic-gate 
5733d0f8ff6eSkk 	case XMM3PM_66r:
5734a2f205d0Skk 		THREEOPERAND(x, mode, reg, r_m, rex_prefix, LONG_OPND, XMM_OPND,
5735a2f205d0Skk 		    1, 0);
5736d0f8ff6eSkk 		break;
5737d0f8ff6eSkk 
57387c478bd9Sstevel@tonic-gate 	/* MMX/SIMD-Int predicated r32/mem to mm reg */
57397c478bd9Sstevel@tonic-gate 	case MMOPRM:
57407c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
57417c478bd9Sstevel@tonic-gate 		w2 = MM_OPND;
57427c478bd9Sstevel@tonic-gate 		goto xmmprm;
57437c478bd9Sstevel@tonic-gate 	case XMMPRM:
5744d0f8ff6eSkk 	case XMMPRM_66r:
57457c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
57467c478bd9Sstevel@tonic-gate 		w2 = XMM_OPND;
57477c478bd9Sstevel@tonic-gate xmmprm:
5748a2f205d0Skk 		THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, 1, 1);
57497c478bd9Sstevel@tonic-gate 		break;
57507c478bd9Sstevel@tonic-gate 
57517c478bd9Sstevel@tonic-gate 	/* MMX/SIMD-Int predicated mm/mem to mm reg */
57527c478bd9Sstevel@tonic-gate 	case MMOPM:
5753d0f8ff6eSkk 	case MMOPM_66o:
57547c478bd9Sstevel@tonic-gate 		wbit = w2 = MM_OPND;
57557c478bd9Sstevel@tonic-gate 		goto xmmprm;
57567c478bd9Sstevel@tonic-gate 
57577c478bd9Sstevel@tonic-gate 	/* MMX/SIMD-Int mm reg to r32 */
57587c478bd9Sstevel@tonic-gate 	case MMOM3:
57597c478bd9Sstevel@tonic-gate 		NOMEM;
57607c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
57617c478bd9Sstevel@tonic-gate 		if (mode != REG_ONLY)
57627c478bd9Sstevel@tonic-gate 			goto error;
57637c478bd9Sstevel@tonic-gate 		wbit = MM_OPND;
57647c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 0);
57657c478bd9Sstevel@tonic-gate 		break;
57667c478bd9Sstevel@tonic-gate 
57677c478bd9Sstevel@tonic-gate 	/* SIMD memory or xmm reg operand to xmm reg		*/
57687c478bd9Sstevel@tonic-gate 	case XMM:
5769d0f8ff6eSkk 	case XMM_66o:
5770d0f8ff6eSkk 	case XMM_66r:
57717c478bd9Sstevel@tonic-gate 	case XMMO:
57727c478bd9Sstevel@tonic-gate 	case XMMXIMPL:
57737c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
57747c478bd9Sstevel@tonic-gate 		STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, 0);
57757c478bd9Sstevel@tonic-gate 
57767c478bd9Sstevel@tonic-gate 		if (dp->it_adrmode == XMMXIMPL && mode != REG_ONLY)
57777c478bd9Sstevel@tonic-gate 			goto error;
57787c478bd9Sstevel@tonic-gate 
57797c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
57807c478bd9Sstevel@tonic-gate 		/*
57817c478bd9Sstevel@tonic-gate 		 * movlps and movhlps share opcodes.  They differ in the
57827c478bd9Sstevel@tonic-gate 		 * addressing modes allowed for their operands.
57837c478bd9Sstevel@tonic-gate 		 * movhps and movlhps behave similarly.
57847c478bd9Sstevel@tonic-gate 		 */
57857c478bd9Sstevel@tonic-gate 		if (mode == REG_ONLY) {
57867c478bd9Sstevel@tonic-gate 			if (strcmp(dp->it_name, "movlps") == 0)
5787d267098bSdmick 				(void) strncpy(x->d86_mnem, "movhlps", OPLEN);
57887c478bd9Sstevel@tonic-gate 			else if (strcmp(dp->it_name, "movhps") == 0)
5789d267098bSdmick 				(void) strncpy(x->d86_mnem, "movlhps", OPLEN);
57907c478bd9Sstevel@tonic-gate 		}
57917c478bd9Sstevel@tonic-gate #endif
57927c478bd9Sstevel@tonic-gate 		if (dp->it_adrmode == XMMXIMPL)
57937c478bd9Sstevel@tonic-gate 			mode = 0;	/* change for memory access size... */
57947c478bd9Sstevel@tonic-gate 		break;
57957c478bd9Sstevel@tonic-gate 
57967c478bd9Sstevel@tonic-gate 	/* SIMD xmm reg to memory or xmm reg */
57977c478bd9Sstevel@tonic-gate 	case XMMS:
57987c478bd9Sstevel@tonic-gate 	case XMMOS:
57997c478bd9Sstevel@tonic-gate 	case XMMMS:
58007c478bd9Sstevel@tonic-gate 	case XMMOMS:
58017c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
58027c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
58037c478bd9Sstevel@tonic-gate 		if ((strcmp(dp->it_name, "movlps") == 0 ||
58047c478bd9Sstevel@tonic-gate 		    strcmp(dp->it_name, "movhps") == 0 ||
58057c478bd9Sstevel@tonic-gate 		    strcmp(dp->it_name, "movntps") == 0) &&
58067c478bd9Sstevel@tonic-gate 		    mode == REG_ONLY)
58077c478bd9Sstevel@tonic-gate 			goto error;
58087c478bd9Sstevel@tonic-gate #endif
58097c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
58107c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1);
58117c478bd9Sstevel@tonic-gate 		break;
58127c478bd9Sstevel@tonic-gate 
58137c478bd9Sstevel@tonic-gate 	/* SIMD memory to xmm reg */
58147c478bd9Sstevel@tonic-gate 	case XMMM:
5815d0f8ff6eSkk 	case XMMM_66r:
58167c478bd9Sstevel@tonic-gate 	case XMMOM:
58177c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
58187c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
58197c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
58207c478bd9Sstevel@tonic-gate 		if (mode == REG_ONLY) {
58217c478bd9Sstevel@tonic-gate 			if (strcmp(dp->it_name, "movhps") == 0)
5822d267098bSdmick 				(void) strncpy(x->d86_mnem, "movlhps", OPLEN);
58237c478bd9Sstevel@tonic-gate 			else
58247c478bd9Sstevel@tonic-gate 				goto error;
58257c478bd9Sstevel@tonic-gate 		}
58267c478bd9Sstevel@tonic-gate #endif
58277c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
58287c478bd9Sstevel@tonic-gate 		break;
58297c478bd9Sstevel@tonic-gate 
58307c478bd9Sstevel@tonic-gate 	/* SIMD memory or r32 to xmm reg			*/
58317c478bd9Sstevel@tonic-gate 	case XMM3MX:
58327c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
58337c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
58347c478bd9Sstevel@tonic-gate 		break;
58357c478bd9Sstevel@tonic-gate 
58367c478bd9Sstevel@tonic-gate 	case XMM3MXS:
58377c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
58387c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1);
58397c478bd9Sstevel@tonic-gate 		break;
58407c478bd9Sstevel@tonic-gate 
58417c478bd9Sstevel@tonic-gate 	/* SIMD memory or mm reg to xmm reg			*/
58427c478bd9Sstevel@tonic-gate 	case XMMOMX:
58437c478bd9Sstevel@tonic-gate 	/* SIMD mm to xmm */
58447c478bd9Sstevel@tonic-gate 	case XMMMX:
58457c478bd9Sstevel@tonic-gate 		wbit = MM_OPND;
58467c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 0);
58477c478bd9Sstevel@tonic-gate 		break;
58487c478bd9Sstevel@tonic-gate 
58497c478bd9Sstevel@tonic-gate 	/* SIMD memory or xmm reg to mm reg			*/
58507c478bd9Sstevel@tonic-gate 	case XMMXMM:
58517c478bd9Sstevel@tonic-gate 	case XMMOXMM:
58527c478bd9Sstevel@tonic-gate 	case XMMXM:
58537c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
58547c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, MM_OPND, 0);
58557c478bd9Sstevel@tonic-gate 		break;
58567c478bd9Sstevel@tonic-gate 
58577c478bd9Sstevel@tonic-gate 
58587c478bd9Sstevel@tonic-gate 	/* SIMD memory or xmm reg to r32			*/
58597c478bd9Sstevel@tonic-gate 	case XMMXM3:
58607c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
58617c478bd9Sstevel@tonic-gate 		MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, LONG_OPND, 0);
58627c478bd9Sstevel@tonic-gate 		break;
58637c478bd9Sstevel@tonic-gate 
58647c478bd9Sstevel@tonic-gate 	/* SIMD xmm to r32					*/
58657c478bd9Sstevel@tonic-gate 	case XMMX3:
58667c478bd9Sstevel@tonic-gate 	case XMMOX3:
58677c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
58687c478bd9Sstevel@tonic-gate 		if (mode != REG_ONLY)
58697c478bd9Sstevel@tonic-gate 			goto error;
58707c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
58717c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, XMM_OPND, 0);
58727c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
58737c478bd9Sstevel@tonic-gate 		NOMEM;
58747c478bd9Sstevel@tonic-gate 		break;
58757c478bd9Sstevel@tonic-gate 
58767c478bd9Sstevel@tonic-gate 	/* SIMD predicated memory or xmm reg with/to xmm reg */
58777c478bd9Sstevel@tonic-gate 	case XMMP:
5878d0f8ff6eSkk 	case XMMP_66r:
5879d0f8ff6eSkk 	case XMMP_66o:
58807c478bd9Sstevel@tonic-gate 	case XMMOPM:
58817c478bd9Sstevel@tonic-gate 		wbit = XMM_OPND;
5882a2f205d0Skk 		THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, XMM_OPND, 1,
5883a2f205d0Skk 		    1);
58847c478bd9Sstevel@tonic-gate 
58857c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
58867c478bd9Sstevel@tonic-gate 		/*
58877c478bd9Sstevel@tonic-gate 		 * cmpps and cmpss vary their instruction name based
58887c478bd9Sstevel@tonic-gate 		 * on the value of imm8.  Other XMMP instructions,
58897c478bd9Sstevel@tonic-gate 		 * such as shufps, require explicit specification of
58907c478bd9Sstevel@tonic-gate 		 * the predicate.
58917c478bd9Sstevel@tonic-gate 		 */
58927c478bd9Sstevel@tonic-gate 		if (dp->it_name[0] == 'c' &&
58937c478bd9Sstevel@tonic-gate 		    dp->it_name[1] == 'm' &&
58947c478bd9Sstevel@tonic-gate 		    dp->it_name[2] == 'p' &&
58957c478bd9Sstevel@tonic-gate 		    strlen(dp->it_name) == 5) {
58967c478bd9Sstevel@tonic-gate 			uchar_t pred = x->d86_opnd[0].d86_value & 0xff;
58977c478bd9Sstevel@tonic-gate 
58987c478bd9Sstevel@tonic-gate 			if (pred >= (sizeof (dis_PREDSUFFIX) / sizeof (char *)))
58997c478bd9Sstevel@tonic-gate 				goto error;
59007c478bd9Sstevel@tonic-gate 
5901d267098bSdmick 			(void) strncpy(x->d86_mnem, "cmp", OPLEN);
5902d267098bSdmick 			(void) strlcat(x->d86_mnem, dis_PREDSUFFIX[pred],
59037c478bd9Sstevel@tonic-gate 			    OPLEN);
5904d267098bSdmick 			(void) strlcat(x->d86_mnem,
59057c478bd9Sstevel@tonic-gate 			    dp->it_name + strlen(dp->it_name) - 2,
59067c478bd9Sstevel@tonic-gate 			    OPLEN);
59077c478bd9Sstevel@tonic-gate 			x->d86_opnd[0] = x->d86_opnd[1];
59087c478bd9Sstevel@tonic-gate 			x->d86_opnd[1] = x->d86_opnd[2];
59097c478bd9Sstevel@tonic-gate 			x->d86_numopnds = 2;
59107c478bd9Sstevel@tonic-gate 		}
5911959b2dfdSRobert Mustacchi 
5912959b2dfdSRobert Mustacchi 		/*
5913959b2dfdSRobert Mustacchi 		 * The pclmulqdq instruction has a series of alternate names for
5914959b2dfdSRobert Mustacchi 		 * various encodings of the immediate byte. As such, if we
5915959b2dfdSRobert Mustacchi 		 * happen to find it and the immediate value matches, we'll
5916959b2dfdSRobert Mustacchi 		 * rewrite the mnemonic.
5917959b2dfdSRobert Mustacchi 		 */
5918959b2dfdSRobert Mustacchi 		if (strcmp(dp->it_name, "pclmulqdq") == 0) {
5919959b2dfdSRobert Mustacchi 			boolean_t changed = B_TRUE;
5920959b2dfdSRobert Mustacchi 			switch (x->d86_opnd[0].d86_value) {
5921959b2dfdSRobert Mustacchi 			case 0x00:
5922959b2dfdSRobert Mustacchi 				(void) strncpy(x->d86_mnem, "pclmullqlqdq",
5923959b2dfdSRobert Mustacchi 				    OPLEN);
5924959b2dfdSRobert Mustacchi 				break;
5925959b2dfdSRobert Mustacchi 			case 0x01:
5926959b2dfdSRobert Mustacchi 				(void) strncpy(x->d86_mnem, "pclmulhqlqdq",
5927959b2dfdSRobert Mustacchi 				    OPLEN);
5928959b2dfdSRobert Mustacchi 				break;
5929959b2dfdSRobert Mustacchi 			case 0x10:
5930959b2dfdSRobert Mustacchi 				(void) strncpy(x->d86_mnem, "pclmullqhqdq",
5931959b2dfdSRobert Mustacchi 				    OPLEN);
5932959b2dfdSRobert Mustacchi 				break;
5933959b2dfdSRobert Mustacchi 			case 0x11:
5934959b2dfdSRobert Mustacchi 				(void) strncpy(x->d86_mnem, "pclmulhqhqdq",
5935959b2dfdSRobert Mustacchi 				    OPLEN);
5936959b2dfdSRobert Mustacchi 				break;
5937959b2dfdSRobert Mustacchi 			default:
5938959b2dfdSRobert Mustacchi 				changed = B_FALSE;
5939959b2dfdSRobert Mustacchi 				break;
5940959b2dfdSRobert Mustacchi 			}
5941959b2dfdSRobert Mustacchi 
5942959b2dfdSRobert Mustacchi 			if (changed == B_TRUE) {
5943959b2dfdSRobert Mustacchi 				x->d86_opnd[0].d86_value_size = 0;
5944959b2dfdSRobert Mustacchi 				x->d86_opnd[0] = x->d86_opnd[1];
5945959b2dfdSRobert Mustacchi 				x->d86_opnd[1] = x->d86_opnd[2];
5946959b2dfdSRobert Mustacchi 				x->d86_numopnds = 2;
5947959b2dfdSRobert Mustacchi 			}
5948959b2dfdSRobert Mustacchi 		}
59497c478bd9Sstevel@tonic-gate #endif
59507c478bd9Sstevel@tonic-gate 		break;
59517c478bd9Sstevel@tonic-gate 
5952f8801251Skk 	case XMMX2I:
5953f8801251Skk 		FOUROPERAND(x, mode, reg, r_m, rex_prefix, XMM_OPND, XMM_OPND,
5954f8801251Skk 		    1);
5955f8801251Skk 		NOMEM;
5956f8801251Skk 		break;
5957f8801251Skk 
5958f8801251Skk 	case XMM2I:
5959f8801251Skk 		ONEOPERAND_TWOIMM(x, mode, reg, r_m, rex_prefix, XMM_OPND, 1);
5960f8801251Skk 		NOMEM;
5961f8801251Skk 		break;
5962f8801251Skk 
59637c478bd9Sstevel@tonic-gate 	/* immediate operand to accumulator */
59647c478bd9Sstevel@tonic-gate 	case IA:
59657c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
59667c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1);
59677c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, wbit), 0);
59687c478bd9Sstevel@tonic-gate 		NOMEM;
59697c478bd9Sstevel@tonic-gate 		break;
59707c478bd9Sstevel@tonic-gate 
59717c478bd9Sstevel@tonic-gate 	/* memory or register operand to accumulator */
59727c478bd9Sstevel@tonic-gate 	case MA:
59737c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
59747c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
59757c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, wbit, 0);
59767c478bd9Sstevel@tonic-gate 		break;
59777c478bd9Sstevel@tonic-gate 
59787c478bd9Sstevel@tonic-gate 	/* si register to di register used to reference memory		*/
59797c478bd9Sstevel@tonic-gate 	case SD:
59807c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
59817c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 0);
59827c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 2;
59837c478bd9Sstevel@tonic-gate 		if (addr_size == SIZE64) {
5984dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%rsi)",
59857c478bd9Sstevel@tonic-gate 			    OPLEN);
5986dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%rdi)",
59877c478bd9Sstevel@tonic-gate 			    OPLEN);
59887c478bd9Sstevel@tonic-gate 		} else if (addr_size == SIZE32) {
5989dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%esi)",
59907c478bd9Sstevel@tonic-gate 			    OPLEN);
5991dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%edi)",
59927c478bd9Sstevel@tonic-gate 			    OPLEN);
59937c478bd9Sstevel@tonic-gate 		} else {
5994dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%si)",
59957c478bd9Sstevel@tonic-gate 			    OPLEN);
5996dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%di)",
59977c478bd9Sstevel@tonic-gate 			    OPLEN);
59987c478bd9Sstevel@tonic-gate 		}
59997c478bd9Sstevel@tonic-gate #endif
60007c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60017c478bd9Sstevel@tonic-gate 		break;
60027c478bd9Sstevel@tonic-gate 
60037c478bd9Sstevel@tonic-gate 	/* accumulator to di register				*/
60047c478bd9Sstevel@tonic-gate 	case AD:
60057c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
60067c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
60077c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 1);
60087c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 2;
60097c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 0);
60107c478bd9Sstevel@tonic-gate 		if (addr_size == SIZE64)
6011dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%rdi)",
60127c478bd9Sstevel@tonic-gate 			    OPLEN);
60137c478bd9Sstevel@tonic-gate 		else if (addr_size == SIZE32)
6014dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%edi)",
60157c478bd9Sstevel@tonic-gate 			    OPLEN);
60167c478bd9Sstevel@tonic-gate 		else
6017dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[1].d86_opnd, "(%di)",
60187c478bd9Sstevel@tonic-gate 			    OPLEN);
60197c478bd9Sstevel@tonic-gate #endif
60207c478bd9Sstevel@tonic-gate 		break;
60217c478bd9Sstevel@tonic-gate 
60227c478bd9Sstevel@tonic-gate 	/* si register to accumulator				*/
60237c478bd9Sstevel@tonic-gate 	case SA:
60247c478bd9Sstevel@tonic-gate 		wbit = WBIT(opcode2);
60257c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
60267c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 0);
60277c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 2;
60287c478bd9Sstevel@tonic-gate 		if (addr_size == SIZE64)
6029dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%rsi)",
60307c478bd9Sstevel@tonic-gate 			    OPLEN);
60317c478bd9Sstevel@tonic-gate 		else if (addr_size == SIZE32)
6032dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%esi)",
60337c478bd9Sstevel@tonic-gate 			    OPLEN);
60347c478bd9Sstevel@tonic-gate 		else
6035dc0093f4Seschrock 			(void) strlcat(x->d86_opnd[0].d86_opnd, "(%si)",
60367c478bd9Sstevel@tonic-gate 			    OPLEN);
60377c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1);
60387c478bd9Sstevel@tonic-gate #endif
60397c478bd9Sstevel@tonic-gate 		break;
60407c478bd9Sstevel@tonic-gate 
60417c478bd9Sstevel@tonic-gate 	/*
60427c478bd9Sstevel@tonic-gate 	 * single operand, a 16/32 bit displacement
60437c478bd9Sstevel@tonic-gate 	 */
60447c478bd9Sstevel@tonic-gate 	case D:
60457c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60467c478bd9Sstevel@tonic-gate 		dtrace_disp_opnd(x, wbit, OPSIZE(opnd_size, LONG_OPND), 0);
60477c478bd9Sstevel@tonic-gate 		NOMEM;
60487c478bd9Sstevel@tonic-gate 		break;
60497c478bd9Sstevel@tonic-gate 
60507c478bd9Sstevel@tonic-gate 	/* jmp/call indirect to memory or register operand		*/
60517c478bd9Sstevel@tonic-gate 	case INM:
60527c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
6053dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[0].d86_prefix, "*", OPLEN);
60547c478bd9Sstevel@tonic-gate #endif
60557c478bd9Sstevel@tonic-gate 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
60567c478bd9Sstevel@tonic-gate 		dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
60577c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60587c478bd9Sstevel@tonic-gate 		break;
60597c478bd9Sstevel@tonic-gate 
60607c478bd9Sstevel@tonic-gate 	/*
60617c478bd9Sstevel@tonic-gate 	 * for long jumps and long calls -- a new code segment
60627c478bd9Sstevel@tonic-gate 	 * register and an offset in IP -- stored in object
60637c478bd9Sstevel@tonic-gate 	 * code in reverse order. Note - not valid in amd64
60647c478bd9Sstevel@tonic-gate 	 */
60657c478bd9Sstevel@tonic-gate 	case SO:
60667c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 1);
60677c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60687c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, LONG_OPND), 1);
60697c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
60707c478bd9Sstevel@tonic-gate 		x->d86_opnd[1].d86_mode = MODE_SIGNED;
60717c478bd9Sstevel@tonic-gate #endif
60727c478bd9Sstevel@tonic-gate 		/* will now get segment operand */
60737c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 2, 0);
60747c478bd9Sstevel@tonic-gate 		break;
60757c478bd9Sstevel@tonic-gate 
60767c478bd9Sstevel@tonic-gate 	/*
60777c478bd9Sstevel@tonic-gate 	 * jmp/call. single operand, 8 bit displacement.
60787c478bd9Sstevel@tonic-gate 	 * added to current EIP in 'compofff'
60797c478bd9Sstevel@tonic-gate 	 */
60807c478bd9Sstevel@tonic-gate 	case BD:
60817c478bd9Sstevel@tonic-gate 		dtrace_disp_opnd(x, BYTE_OPND, 1, 0);
60827c478bd9Sstevel@tonic-gate 		NOMEM;
60837c478bd9Sstevel@tonic-gate 		break;
60847c478bd9Sstevel@tonic-gate 
60857c478bd9Sstevel@tonic-gate 	/* single 32/16 bit immediate operand			*/
60867c478bd9Sstevel@tonic-gate 	case I:
60877c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60887c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, OPSIZE(opnd_size, LONG_OPND), 0);
60897c478bd9Sstevel@tonic-gate 		break;
60907c478bd9Sstevel@tonic-gate 
60917c478bd9Sstevel@tonic-gate 	/* single 8 bit immediate operand			*/
60927c478bd9Sstevel@tonic-gate 	case Ib:
60937c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60947c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 1, 0);
60957c478bd9Sstevel@tonic-gate 		break;
60967c478bd9Sstevel@tonic-gate 
60977c478bd9Sstevel@tonic-gate 	case ENTER:
60987c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
60997c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 2, 0);
61007c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 1, 1);
61017c478bd9Sstevel@tonic-gate 		switch (opnd_size) {
61027c478bd9Sstevel@tonic-gate 		case SIZE64:
61037c478bd9Sstevel@tonic-gate 			x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 8;
61047c478bd9Sstevel@tonic-gate 			break;
61057c478bd9Sstevel@tonic-gate 		case SIZE32:
61067c478bd9Sstevel@tonic-gate 			x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 4;
61077c478bd9Sstevel@tonic-gate 			break;
61087c478bd9Sstevel@tonic-gate 		case SIZE16:
61097c478bd9Sstevel@tonic-gate 			x->d86_memsize = (x->d86_opnd[1].d86_value + 1) * 2;
61107c478bd9Sstevel@tonic-gate 			break;
61117c478bd9Sstevel@tonic-gate 		}
61127c478bd9Sstevel@tonic-gate 
61137c478bd9Sstevel@tonic-gate 		break;
61147c478bd9Sstevel@tonic-gate 
61157c478bd9Sstevel@tonic-gate 	/* 16-bit immediate operand */
61167c478bd9Sstevel@tonic-gate 	case RET:
61177c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
61187c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, wbit, 2, 0);
61197c478bd9Sstevel@tonic-gate 		break;
61207c478bd9Sstevel@tonic-gate 
61217c478bd9Sstevel@tonic-gate 	/* single 8 bit port operand				*/
61227c478bd9Sstevel@tonic-gate 	case P:
61237c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 0);
61247c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, BYTE_OPND, 1, 0);
61257c478bd9Sstevel@tonic-gate 		NOMEM;
61267c478bd9Sstevel@tonic-gate 		break;
61277c478bd9Sstevel@tonic-gate 
61287c478bd9Sstevel@tonic-gate 	/* single operand, dx register (variable port instruction) */
61297c478bd9Sstevel@tonic-gate 	case V:
61307c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 1;
61317c478bd9Sstevel@tonic-gate 		dtrace_check_override(x, 0);
61327c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
6133dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[0].d86_opnd, "(%dx)", OPLEN);
61347c478bd9Sstevel@tonic-gate #endif
61357c478bd9Sstevel@tonic-gate 		NOMEM;
61367c478bd9Sstevel@tonic-gate 		break;
61377c478bd9Sstevel@tonic-gate 
61387c478bd9Sstevel@tonic-gate 	/*
61397c478bd9Sstevel@tonic-gate 	 * The int instruction, which has two forms:
61407c478bd9Sstevel@tonic-gate 	 * int 3 (breakpoint) or
61417c478bd9Sstevel@tonic-gate 	 * int n, where n is indicated in the subsequent
61427c478bd9Sstevel@tonic-gate 	 * byte (format Ib).  The int 3 instruction (opcode 0xCC),
61437c478bd9Sstevel@tonic-gate 	 * where, although the 3 looks  like an operand,
61447c478bd9Sstevel@tonic-gate 	 * it is implied by the opcode. It must be converted
61457c478bd9Sstevel@tonic-gate 	 * to the correct base and output.
61467c478bd9Sstevel@tonic-gate 	 */
61477c478bd9Sstevel@tonic-gate 	case INT3:
61487c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
61497c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 1;
61507c478bd9Sstevel@tonic-gate 		x->d86_opnd[0].d86_mode = MODE_SIGNED;
61517c478bd9Sstevel@tonic-gate 		x->d86_opnd[0].d86_value_size = 1;
61527c478bd9Sstevel@tonic-gate 		x->d86_opnd[0].d86_value = 3;
61537c478bd9Sstevel@tonic-gate #endif
61547c478bd9Sstevel@tonic-gate 		NOMEM;
61557c478bd9Sstevel@tonic-gate 		break;
61567c478bd9Sstevel@tonic-gate 
61577c478bd9Sstevel@tonic-gate 	/* single 8 bit immediate operand			*/
61587c478bd9Sstevel@tonic-gate 	case INTx:
61597c478bd9Sstevel@tonic-gate 		dtrace_imm_opnd(x, BYTE_OPND, 1, 0);
61607c478bd9Sstevel@tonic-gate 		NOMEM;
61617c478bd9Sstevel@tonic-gate 		break;
61627c478bd9Sstevel@tonic-gate 
61637c478bd9Sstevel@tonic-gate 	/* an unused byte must be discarded */
61647c478bd9Sstevel@tonic-gate 	case U:
61657c478bd9Sstevel@tonic-gate 		if (x->d86_get_byte(x->d86_data) < 0)
61667c478bd9Sstevel@tonic-gate 			goto error;
61677c478bd9Sstevel@tonic-gate 		x->d86_len++;
61687c478bd9Sstevel@tonic-gate 		NOMEM;
61697c478bd9Sstevel@tonic-gate 		break;
61707c478bd9Sstevel@tonic-gate 
61717c478bd9Sstevel@tonic-gate 	case CBW:
61727c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
61737c478bd9Sstevel@tonic-gate 		if (opnd_size == SIZE16)
6174d267098bSdmick 			(void) strlcat(x->d86_mnem, "cbtw", OPLEN);
61757c478bd9Sstevel@tonic-gate 		else if (opnd_size == SIZE32)
6176d267098bSdmick 			(void) strlcat(x->d86_mnem, "cwtl", OPLEN);
61777c478bd9Sstevel@tonic-gate 		else
6178d267098bSdmick 			(void) strlcat(x->d86_mnem, "cltq", OPLEN);
61797c478bd9Sstevel@tonic-gate #endif
61807c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
61817c478bd9Sstevel@tonic-gate 		NOMEM;
61827c478bd9Sstevel@tonic-gate 		break;
61837c478bd9Sstevel@tonic-gate 
61847c478bd9Sstevel@tonic-gate 	case CWD:
61857c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
61867c478bd9Sstevel@tonic-gate 		if (opnd_size == SIZE16)
6187d267098bSdmick 			(void) strlcat(x->d86_mnem, "cwtd", OPLEN);
61887c478bd9Sstevel@tonic-gate 		else if (opnd_size == SIZE32)
6189d267098bSdmick 			(void) strlcat(x->d86_mnem, "cltd", OPLEN);
61907c478bd9Sstevel@tonic-gate 		else
6191d267098bSdmick 			(void) strlcat(x->d86_mnem, "cqtd", OPLEN);
61927c478bd9Sstevel@tonic-gate #endif
61937c478bd9Sstevel@tonic-gate 		wbit = LONG_OPND;
61947c478bd9Sstevel@tonic-gate 		NOMEM;
61957c478bd9Sstevel@tonic-gate 		break;
61967c478bd9Sstevel@tonic-gate 
61977c478bd9Sstevel@tonic-gate 	case XMMSFNC:
61987c478bd9Sstevel@tonic-gate 		/*
61997c478bd9Sstevel@tonic-gate 		 * sfence is sfence if mode is REG_ONLY.  If mode isn't
62007c478bd9Sstevel@tonic-gate 		 * REG_ONLY, mnemonic should be 'clflush'.
62017c478bd9Sstevel@tonic-gate 		 */
62027c478bd9Sstevel@tonic-gate 		dtrace_get_modrm(x, &mode, &reg, &r_m);
62037c478bd9Sstevel@tonic-gate 
62047c478bd9Sstevel@tonic-gate 		/* sfence doesn't take operands */
6205cff040f3SRobert Mustacchi 		if (mode != REG_ONLY) {
6206cff040f3SRobert Mustacchi 			if (opnd_size_prefix == 0x66) {
62077c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
6208cff040f3SRobert Mustacchi 				(void) strlcat(x->d86_mnem, "clflushopt",
6209cff040f3SRobert Mustacchi 				    OPLEN);
6210cff040f3SRobert Mustacchi #endif
6211cff040f3SRobert Mustacchi 			} else if (opnd_size_prefix == 0) {
6212cff040f3SRobert Mustacchi #ifdef DIS_TEXT
6213cff040f3SRobert Mustacchi 				(void) strlcat(x->d86_mnem, "clflush", OPLEN);
6214cff040f3SRobert Mustacchi #endif
6215cff040f3SRobert Mustacchi 			} else {
6216cff040f3SRobert Mustacchi 				/* Unknown instruction */
6217cff040f3SRobert Mustacchi 				goto error;
6218cff040f3SRobert Mustacchi 			}
6219cff040f3SRobert Mustacchi 
62207c478bd9Sstevel@tonic-gate 			dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
62217c478bd9Sstevel@tonic-gate 			dtrace_get_operand(x, mode, r_m, BYTE_OPND, 0);
62227c478bd9Sstevel@tonic-gate 			NOMEM;
6223cff040f3SRobert Mustacchi #ifdef DIS_TEXT
6224cff040f3SRobert Mustacchi 		} else {
6225cff040f3SRobert Mustacchi 			(void) strlcat(x->d86_mnem, "sfence", OPLEN);
6226cff040f3SRobert Mustacchi #endif
62277c478bd9Sstevel@tonic-gate 		}
6228cff040f3SRobert Mustacchi 		break;
6229cff040f3SRobert Mustacchi 
6230cff040f3SRobert Mustacchi 	case FSGS:
6231cff040f3SRobert Mustacchi 		/*
6232cff040f3SRobert Mustacchi 		 * The FSGSBASE instructions are taken only when the mode is set
6233cff040f3SRobert Mustacchi 		 * to registers. They share opcodes with instructions like
6234cff040f3SRobert Mustacchi 		 * fxrstor, stmxcsr, etc. We handle the repz prefix earlier.
6235cff040f3SRobert Mustacchi 		 */
6236cff040f3SRobert Mustacchi 		wbit = WBIT(opcode2);
6237cff040f3SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6238cff040f3SRobert Mustacchi 		dtrace_rex_adjust(rex_prefix, mode, NULL, &r_m);
6239cff040f3SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6240cff040f3SRobert Mustacchi 		if (mode == REG_ONLY) {
62417c478bd9Sstevel@tonic-gate 			NOMEM;
62427c478bd9Sstevel@tonic-gate 		}
62437c478bd9Sstevel@tonic-gate 		break;
62447c478bd9Sstevel@tonic-gate 
62457c478bd9Sstevel@tonic-gate 	/*
62467c478bd9Sstevel@tonic-gate 	 * no disassembly, the mnemonic was all there was so go on
62477c478bd9Sstevel@tonic-gate 	 */
62487c478bd9Sstevel@tonic-gate 	case NORM:
62497c478bd9Sstevel@tonic-gate 		if (dp->it_invalid32 && cpu_mode != SIZE64)
62507c478bd9Sstevel@tonic-gate 			goto error;
62517c478bd9Sstevel@tonic-gate 		NOMEM;
62527c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
62537c478bd9Sstevel@tonic-gate 	case IMPLMEM:
62547c478bd9Sstevel@tonic-gate 		break;
62557c478bd9Sstevel@tonic-gate 
62567c478bd9Sstevel@tonic-gate 	case XMMFENCE:
62577c478bd9Sstevel@tonic-gate 		/*
625892381362SJerry Jelinek 		 * XRSTOR, XSAVEOPT and LFENCE share the same opcode but
625992381362SJerry Jelinek 		 * differ in mode and reg.
62607c478bd9Sstevel@tonic-gate 		 */
6261ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
62627c478bd9Sstevel@tonic-gate 
6263ab47273fSEdward Gillett 		if (mode == REG_ONLY) {
6264ab47273fSEdward Gillett 			/*
6265ab47273fSEdward Gillett 			 * Only the following exact byte sequences are allowed:
6266ab47273fSEdward Gillett 			 *
6267cff040f3SRobert Mustacchi 			 *	0f ae e8	lfence
6268cff040f3SRobert Mustacchi 			 *	0f ae f0	mfence
6269ab47273fSEdward Gillett 			 */
6270ab47273fSEdward Gillett 			if ((uint8_t)x->d86_bytes[x->d86_len - 1] != 0xe8 &&
6271ab47273fSEdward Gillett 			    (uint8_t)x->d86_bytes[x->d86_len - 1] != 0xf0)
6272ab47273fSEdward Gillett 				goto error;
6273ab47273fSEdward Gillett 		} else {
6274ab47273fSEdward Gillett #ifdef DIS_TEXT
627592381362SJerry Jelinek 			if (reg == 5) {
627692381362SJerry Jelinek 				(void) strncpy(x->d86_mnem, "xrstor", OPLEN);
627792381362SJerry Jelinek 			} else if (reg == 6) {
6278cff040f3SRobert Mustacchi 				if (opnd_size_prefix == 0x66) {
6279cff040f3SRobert Mustacchi 					(void) strncpy(x->d86_mnem, "clwb",
6280cff040f3SRobert Mustacchi 					    OPLEN);
6281cff040f3SRobert Mustacchi 				} else if (opnd_size_prefix == 0x00) {
6282cff040f3SRobert Mustacchi 					(void) strncpy(x->d86_mnem, "xsaveopt",
6283cff040f3SRobert Mustacchi 					    OPLEN);
6284cff040f3SRobert Mustacchi 				} else {
6285cff040f3SRobert Mustacchi 					goto error;
6286cff040f3SRobert Mustacchi 				}
628792381362SJerry Jelinek 			} else {
628892381362SJerry Jelinek 				goto error;
628992381362SJerry Jelinek 			}
6290ab47273fSEdward Gillett #endif
6291ab47273fSEdward Gillett 			dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
6292ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, BYTE_OPND, 0);
6293ab47273fSEdward Gillett 		}
62947c478bd9Sstevel@tonic-gate 		break;
62957c478bd9Sstevel@tonic-gate 
62967c478bd9Sstevel@tonic-gate 	/* float reg */
62977c478bd9Sstevel@tonic-gate 	case F:
62987c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
62997c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 1;
6300dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[0].d86_opnd, "%st(X)", OPLEN);
63017c478bd9Sstevel@tonic-gate 		x->d86_opnd[0].d86_opnd[4] = r_m + '0';
63027c478bd9Sstevel@tonic-gate #endif
63037c478bd9Sstevel@tonic-gate 		NOMEM;
63047c478bd9Sstevel@tonic-gate 		break;
63057c478bd9Sstevel@tonic-gate 
63067c478bd9Sstevel@tonic-gate 	/* float reg to float reg, with ret bit present */
63077c478bd9Sstevel@tonic-gate 	case FF:
63087c478bd9Sstevel@tonic-gate 		vbit = opcode2 >> 2 & 0x1;	/* vbit = 1: st -> st(i) */
63097c478bd9Sstevel@tonic-gate 		/*FALLTHROUGH*/
63107c478bd9Sstevel@tonic-gate 	case FFC:				/* case for vbit always = 0 */
63117c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
63127c478bd9Sstevel@tonic-gate 		x->d86_numopnds = 2;
6313dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[1 - vbit].d86_opnd, "%st", OPLEN);
6314dc0093f4Seschrock 		(void) strlcat(x->d86_opnd[vbit].d86_opnd, "%st(X)", OPLEN);
63157c478bd9Sstevel@tonic-gate 		x->d86_opnd[vbit].d86_opnd[4] = r_m + '0';
63167c478bd9Sstevel@tonic-gate #endif
63177c478bd9Sstevel@tonic-gate 		NOMEM;
63187c478bd9Sstevel@tonic-gate 		break;
63197c478bd9Sstevel@tonic-gate 
6320ab47273fSEdward Gillett 	/* AVX instructions */
6321ab47273fSEdward Gillett 	case VEX_MO:
6322ab47273fSEdward Gillett 		/* op(ModR/M.r/m) */
6323ab47273fSEdward Gillett 		x->d86_numopnds = 1;
6324ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6325ab47273fSEdward Gillett #ifdef DIS_TEXT
6326ab47273fSEdward Gillett 		if ((dp == &dis_opAVX0F[0xA][0xE]) && (reg == 3))
6327ab47273fSEdward Gillett 			(void) strncpy(x->d86_mnem, "vstmxcsr", OPLEN);
6328ab47273fSEdward Gillett #endif
6329ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6330ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6331ab47273fSEdward Gillett 		break;
6332ab47273fSEdward Gillett 	case VEX_RMrX:
6333245ac945SRobert Mustacchi 	case FMA:
6334ab47273fSEdward Gillett 		/* ModR/M.reg := op(VEX.vvvv, ModR/M.r/m) */
6335ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6336ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6337ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6338ab47273fSEdward Gillett 
6339245ac945SRobert Mustacchi 		/*
6340245ac945SRobert Mustacchi 		 * In classic Intel fashion, the opcodes for all of the FMA
6341245ac945SRobert Mustacchi 		 * instructions all have two possible mnemonics which vary by
6342245ac945SRobert Mustacchi 		 * one letter, which is selected based on the value of the wbit.
6343245ac945SRobert Mustacchi 		 * When wbit is one, they have the 'd' suffix and when 'wbit' is
6344245ac945SRobert Mustacchi 		 * 0, they have the 's' suffix. Otherwise, the FMA instructions
6345245ac945SRobert Mustacchi 		 * are all a standard VEX_RMrX.
6346245ac945SRobert Mustacchi 		 */
6347245ac945SRobert Mustacchi #ifdef DIS_TEXT
6348245ac945SRobert Mustacchi 		if (dp->it_adrmode == FMA) {
6349245ac945SRobert Mustacchi 			size_t len = strlen(dp->it_name);
6350245ac945SRobert Mustacchi 			(void) strncpy(x->d86_mnem, dp->it_name, OPLEN);
6351245ac945SRobert Mustacchi 			if (len + 1 < OPLEN) {
6352245ac945SRobert Mustacchi 				(void) strncpy(x->d86_mnem + len,
6353245ac945SRobert Mustacchi 				    vex_W != 0 ? "d" : "s", OPLEN - len);
6354245ac945SRobert Mustacchi 			}
6355245ac945SRobert Mustacchi 		}
6356245ac945SRobert Mustacchi #endif
6357245ac945SRobert Mustacchi 
6358ab47273fSEdward Gillett 		if (mode != REG_ONLY) {
6359ab47273fSEdward Gillett 			if ((dp == &dis_opAVXF20F[0x10]) ||
6360ab47273fSEdward Gillett 			    (dp == &dis_opAVXF30F[0x10])) {
6361ab47273fSEdward Gillett 				/* vmovsd <m64>, <xmm> */
6362ab47273fSEdward Gillett 				/* or vmovss <m64>, <xmm> */
6363ab47273fSEdward Gillett 				x->d86_numopnds = 2;
6364ab47273fSEdward Gillett 				goto L_VEX_MX;
6365ab47273fSEdward Gillett 			}
6366ab47273fSEdward Gillett 		}
6367ab47273fSEdward Gillett 
6368ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
6369ab47273fSEdward Gillett 		/*
6370ab47273fSEdward Gillett 		 * VEX prefix uses the 1's complement form to encode the
6371ab47273fSEdward Gillett 		 * XMM/YMM regs
6372ab47273fSEdward Gillett 		 */
6373ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1);
6374ab47273fSEdward Gillett 
6375ab47273fSEdward Gillett 		if ((dp == &dis_opAVXF20F[0x2A]) ||
6376ab47273fSEdward Gillett 		    (dp == &dis_opAVXF30F[0x2A])) {
6377ab47273fSEdward Gillett 			/*
6378ab47273fSEdward Gillett 			 * vcvtsi2si </r,m>, <xmm>, <xmm> or vcvtsi2ss </r,m>,
6379ab47273fSEdward Gillett 			 * <xmm>, <xmm>
6380ab47273fSEdward Gillett 			 */
6381ab47273fSEdward Gillett 			wbit = LONG_OPND;
6382ab47273fSEdward Gillett 		}
6383ab47273fSEdward Gillett #ifdef DIS_TEXT
6384ab47273fSEdward Gillett 		else if ((mode == REG_ONLY) &&
6385ab47273fSEdward Gillett 		    (dp == &dis_opAVX0F[0x1][0x6])) {	/* vmovlhps */
6386ab47273fSEdward Gillett 			(void) strncpy(x->d86_mnem, "vmovlhps", OPLEN);
6387ab47273fSEdward Gillett 		} else if ((mode == REG_ONLY) &&
6388ab47273fSEdward Gillett 		    (dp == &dis_opAVX0F[0x1][0x2])) {	/* vmovhlps */
6389ab47273fSEdward Gillett 			(void) strncpy(x->d86_mnem, "vmovhlps", OPLEN);
6390ab47273fSEdward Gillett 		}
6391ab47273fSEdward Gillett #endif
6392ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6393ab47273fSEdward Gillett 
6394ab47273fSEdward Gillett 		break;
6395ab47273fSEdward Gillett 
6396245ac945SRobert Mustacchi 	case VEX_VRMrX:
6397245ac945SRobert Mustacchi 		/* ModR/M.reg := op(MODR/M.r/m, VEX.vvvv) */
6398245ac945SRobert Mustacchi 		x->d86_numopnds = 3;
6399245ac945SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6400245ac945SRobert Mustacchi 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6401245ac945SRobert Mustacchi 
6402245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
6403245ac945SRobert Mustacchi 		/*
6404245ac945SRobert Mustacchi 		 * VEX prefix uses the 1's complement form to encode the
6405245ac945SRobert Mustacchi 		 * XMM/YMM regs
6406245ac945SRobert Mustacchi 		 */
6407245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 0);
6408245ac945SRobert Mustacchi 
6409245ac945SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 1);
6410245ac945SRobert Mustacchi 		break;
6411245ac945SRobert Mustacchi 
6412245ac945SRobert Mustacchi 	case VEX_SbVM:
6413245ac945SRobert Mustacchi 		/* ModR/M.reg := op(MODR/M.r/m, VSIB, VEX.vvvv) */
6414245ac945SRobert Mustacchi 		x->d86_numopnds = 3;
6415245ac945SRobert Mustacchi 		x->d86_vsib = 1;
6416245ac945SRobert Mustacchi 
6417245ac945SRobert Mustacchi 		/*
6418245ac945SRobert Mustacchi 		 * All instructions that use VSIB are currently a mess. See the
6419245ac945SRobert Mustacchi 		 * comment around the dis_gather_regs_t structure definition.
6420245ac945SRobert Mustacchi 		 */
6421245ac945SRobert Mustacchi 
6422245ac945SRobert Mustacchi 		vreg = &dis_vgather[opcode2][vex_W][vex_L];
6423245ac945SRobert Mustacchi 
6424245ac945SRobert Mustacchi #ifdef DIS_TEXT
6425245ac945SRobert Mustacchi 		(void) strncpy(x->d86_mnem, dp->it_name, OPLEN);
6426245ac945SRobert Mustacchi 		(void) strlcat(x->d86_mnem + strlen(dp->it_name),
6427245ac945SRobert Mustacchi 		    vreg->dgr_suffix, OPLEN - strlen(dp->it_name));
6428245ac945SRobert Mustacchi #endif
6429245ac945SRobert Mustacchi 
6430245ac945SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6431245ac945SRobert Mustacchi 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6432245ac945SRobert Mustacchi 
6433245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, vreg->dgr_arg2, 2);
6434245ac945SRobert Mustacchi 		/*
6435245ac945SRobert Mustacchi 		 * VEX prefix uses the 1's complement form to encode the
6436245ac945SRobert Mustacchi 		 * XMM/YMM regs
6437245ac945SRobert Mustacchi 		 */
6438245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), vreg->dgr_arg0,
6439245ac945SRobert Mustacchi 		    0);
6440245ac945SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, vreg->dgr_arg1, 1);
6441245ac945SRobert Mustacchi 		break;
6442245ac945SRobert Mustacchi 
6443ab47273fSEdward Gillett 	case VEX_RRX:
6444ab47273fSEdward Gillett 		/* ModR/M.rm := op(VEX.vvvv, ModR/M.reg) */
6445ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6446ab47273fSEdward Gillett 
6447ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6448ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6449ab47273fSEdward Gillett 
6450ab47273fSEdward Gillett 		if (mode != REG_ONLY) {
6451ab47273fSEdward Gillett 			if ((dp == &dis_opAVXF20F[0x11]) ||
6452ab47273fSEdward Gillett 			    (dp == &dis_opAVXF30F[0x11])) {
6453ab47273fSEdward Gillett 				/* vmovsd <xmm>, <m64> */
6454ab47273fSEdward Gillett 				/* or vmovss <xmm>, <m64> */
6455ab47273fSEdward Gillett 				x->d86_numopnds = 2;
6456ab47273fSEdward Gillett 				goto L_VEX_RM;
6457ab47273fSEdward Gillett 			}
6458ab47273fSEdward Gillett 		}
6459ab47273fSEdward Gillett 
6460ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 2);
6461ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1);
6462ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6463ab47273fSEdward Gillett 		break;
6464ab47273fSEdward Gillett 
6465ab47273fSEdward Gillett 	case VEX_RMRX:
6466ab47273fSEdward Gillett 		/* ModR/M.reg := op(VEX.vvvv, ModR/M.r_m, imm8[7:4]) */
6467ab47273fSEdward Gillett 		x->d86_numopnds = 4;
6468ab47273fSEdward Gillett 
6469ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6470ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6471ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 3);
6472ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 2);
6473ab47273fSEdward Gillett 		if (dp == &dis_opAVX660F3A[0x18]) {
6474ab47273fSEdward Gillett 			/* vinsertf128 <imm8>, <xmm>, <ymm>, <ymm> */
6475ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, XMM_OPND, 1);
6476ab47273fSEdward Gillett 		} else if ((dp == &dis_opAVX660F3A[0x20]) ||
6477ab47273fSEdward Gillett 		    (dp == & dis_opAVX660F[0xC4])) {
6478ab47273fSEdward Gillett 			/* vpinsrb <imm8>, <reg/mm>, <xmm>, <xmm> */
6479ab47273fSEdward Gillett 			/* or vpinsrw <imm8>, <reg/mm>, <xmm>, <xmm> */
6480ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
6481ab47273fSEdward Gillett 		} else if (dp == &dis_opAVX660F3A[0x22]) {
6482ab47273fSEdward Gillett 			/* vpinsrd/q <imm8>, <reg/mm>, <xmm>, <xmm> */
6483ab47273fSEdward Gillett #ifdef DIS_TEXT
6484ab47273fSEdward Gillett 			if (vex_W)
6485ab47273fSEdward Gillett 				x->d86_mnem[6] = 'q';
6486ab47273fSEdward Gillett #endif
6487ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
6488ab47273fSEdward Gillett 		} else {
6489ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, wbit, 1);
6490ab47273fSEdward Gillett 		}
6491ab47273fSEdward Gillett 
6492ab47273fSEdward Gillett 		/* one byte immediate number */
6493ab47273fSEdward Gillett 		dtrace_imm_opnd(x, wbit, 1, 0);
6494ab47273fSEdward Gillett 
6495ab47273fSEdward Gillett 		/* vblendvpd, vblendvps, vblendvb use the imm encode the regs */
6496ab47273fSEdward Gillett 		if ((dp == &dis_opAVX660F3A[0x4A]) ||
6497ab47273fSEdward Gillett 		    (dp == &dis_opAVX660F3A[0x4B]) ||
6498ab47273fSEdward Gillett 		    (dp == &dis_opAVX660F3A[0x4C])) {
6499ab47273fSEdward Gillett #ifdef DIS_TEXT
6500ab47273fSEdward Gillett 			int regnum = (x->d86_opnd[0].d86_value & 0xF0) >> 4;
6501ab47273fSEdward Gillett #endif
6502ab47273fSEdward Gillett 			x->d86_opnd[0].d86_mode = MODE_NONE;
6503ab47273fSEdward Gillett #ifdef DIS_TEXT
6504ab47273fSEdward Gillett 			if (vex_L)
6505ab47273fSEdward Gillett 				(void) strncpy(x->d86_opnd[0].d86_opnd,
6506ab47273fSEdward Gillett 				    dis_YMMREG[regnum], OPLEN);
6507ab47273fSEdward Gillett 			else
6508ab47273fSEdward Gillett 				(void) strncpy(x->d86_opnd[0].d86_opnd,
6509ab47273fSEdward Gillett 				    dis_XMMREG[regnum], OPLEN);
6510ab47273fSEdward Gillett #endif
6511ab47273fSEdward Gillett 		}
6512ab47273fSEdward Gillett 		break;
6513ab47273fSEdward Gillett 
6514ab47273fSEdward Gillett 	case VEX_MX:
6515ab47273fSEdward Gillett 		/* ModR/M.reg := op(ModR/M.rm) */
6516ab47273fSEdward Gillett 		x->d86_numopnds = 2;
6517ab47273fSEdward Gillett 
6518ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6519ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6520ab47273fSEdward Gillett L_VEX_MX:
6521ab47273fSEdward Gillett 
6522ab47273fSEdward Gillett 		if ((dp == &dis_opAVXF20F[0xE6]) ||
6523ab47273fSEdward Gillett 		    (dp == &dis_opAVX660F[0x5A]) ||
6524ab47273fSEdward Gillett 		    (dp == &dis_opAVX660F[0xE6])) {
6525ab47273fSEdward Gillett 			/* vcvtpd2dq <ymm>, <xmm> */
6526ab47273fSEdward Gillett 			/* or vcvtpd2ps <ymm>, <xmm> */
6527ab47273fSEdward Gillett 			/* or vcvttpd2dq <ymm>, <xmm> */
6528ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, XMM_OPND, 1);
6529ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, wbit, 0);
6530ab47273fSEdward Gillett 		} else if ((dp == &dis_opAVXF30F[0xE6]) ||
6531ebb8ac07SRobert Mustacchi 		    (dp == &dis_opAVX0F[0x5][0xA]) ||
6532245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x13]) ||
6533245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x18]) ||
6534245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x19]) ||
6535245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x58]) ||
6536245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x78]) ||
6537245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x79]) ||
6538245ac945SRobert Mustacchi 		    (dp == &dis_opAVX660F38[0x59])) {
6539ab47273fSEdward Gillett 			/* vcvtdq2pd <xmm>, <ymm> */
6540ab47273fSEdward Gillett 			/* or vcvtps2pd <xmm>, <ymm> */
6541245ac945SRobert Mustacchi 			/* or vcvtph2ps <xmm>, <ymm> */
6542245ac945SRobert Mustacchi 			/* or vbroadcasts* <xmm>, <ymm> */
6543ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6544ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, XMM_OPND, 0);
6545ab47273fSEdward Gillett 		} else if (dp == &dis_opAVX660F[0x6E]) {
6546ab47273fSEdward Gillett 			/* vmovd/q <reg/mem 32/64>, <xmm> */
6547ab47273fSEdward Gillett #ifdef DIS_TEXT
6548ab47273fSEdward Gillett 			if (vex_W)
6549ab47273fSEdward Gillett 				x->d86_mnem[4] = 'q';
6550ab47273fSEdward Gillett #endif
6551ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6552ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
6553ab47273fSEdward Gillett 		} else {
6554ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6555ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, wbit, 0);
6556ab47273fSEdward Gillett 		}
6557ab47273fSEdward Gillett 
6558ab47273fSEdward Gillett 		break;
6559ab47273fSEdward Gillett 
6560ab47273fSEdward Gillett 	case VEX_MXI:
6561ab47273fSEdward Gillett 		/* ModR/M.reg := op(ModR/M.rm, imm8) */
6562ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6563ab47273fSEdward Gillett 
6564ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6565ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6566ab47273fSEdward Gillett 
6567ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
6568ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 1);
6569ab47273fSEdward Gillett 
6570ab47273fSEdward Gillett 		/* one byte immediate number */
6571ab47273fSEdward Gillett 		dtrace_imm_opnd(x, wbit, 1, 0);
6572ab47273fSEdward Gillett 		break;
6573ab47273fSEdward Gillett 
6574ab47273fSEdward Gillett 	case VEX_XXI:
6575ab47273fSEdward Gillett 		/* VEX.vvvv := op(ModR/M.rm, imm8) */
6576ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6577ab47273fSEdward Gillett 
6578ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6579ab47273fSEdward Gillett #ifdef DIS_TEXT
6580ab47273fSEdward Gillett 		(void) strncpy(x->d86_mnem, dis_AVXvgrp7[opcode2 - 1][reg],
6581ab47273fSEdward Gillett 		    OPLEN);
6582ab47273fSEdward Gillett #endif
6583ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6584ab47273fSEdward Gillett 
6585ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 2);
6586ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, r_m, wbit, 1);
6587ab47273fSEdward Gillett 
6588ab47273fSEdward Gillett 		/* one byte immediate number */
6589ab47273fSEdward Gillett 		dtrace_imm_opnd(x, wbit, 1, 0);
6590ab47273fSEdward Gillett 		break;
6591ab47273fSEdward Gillett 
6592ab47273fSEdward Gillett 	case VEX_MR:
6593ab47273fSEdward Gillett 		/* ModR/M.reg (reg32/64) := op(ModR/M.rm) */
6594ab47273fSEdward Gillett 		if (dp == &dis_opAVX660F[0xC5]) {
6595ab47273fSEdward Gillett 			/* vpextrw <imm8>, <xmm>, <reg> */
6596ab47273fSEdward Gillett 			x->d86_numopnds = 2;
6597ab47273fSEdward Gillett 			vbit = 2;
6598ab47273fSEdward Gillett 		} else {
6599ab47273fSEdward Gillett 			x->d86_numopnds = 2;
6600ab47273fSEdward Gillett 			vbit = 1;
6601ab47273fSEdward Gillett 		}
6602ab47273fSEdward Gillett 
6603ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6604ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6605ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, vbit);
6606ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, vbit - 1);
6607ab47273fSEdward Gillett 
6608ab47273fSEdward Gillett 		if (vbit == 2)
6609ab47273fSEdward Gillett 			dtrace_imm_opnd(x, wbit, 1, 0);
6610ab47273fSEdward Gillett 
6611ab47273fSEdward Gillett 		break;
6612ab47273fSEdward Gillett 
6613a4e73d5dSJerry Jelinek 	case VEX_KMR:
6614a4e73d5dSJerry Jelinek 		/* opmask: mod_rm := %k */
6615a4e73d5dSJerry Jelinek 		x->d86_numopnds = 2;
6616a4e73d5dSJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6617a4e73d5dSJerry Jelinek 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6618a4e73d5dSJerry Jelinek 		dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
6619a4e73d5dSJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6620a4e73d5dSJerry Jelinek 		break;
6621a4e73d5dSJerry Jelinek 
6622a4e73d5dSJerry Jelinek 	case VEX_KRM:
6623a4e73d5dSJerry Jelinek 		/* opmask: mod_reg := mod_rm */
6624a4e73d5dSJerry Jelinek 		x->d86_numopnds = 2;
6625a4e73d5dSJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6626a4e73d5dSJerry Jelinek 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6627a4e73d5dSJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6628a4e73d5dSJerry Jelinek 		if (mode == REG_ONLY) {
6629a4e73d5dSJerry Jelinek 			dtrace_get_operand(x, mode, r_m, KOPMASK_OPND, 0);
6630a4e73d5dSJerry Jelinek 		} else {
6631a4e73d5dSJerry Jelinek 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
6632a4e73d5dSJerry Jelinek 		}
6633a4e73d5dSJerry Jelinek 		break;
6634a4e73d5dSJerry Jelinek 
6635a4e73d5dSJerry Jelinek 	case VEX_KRR:
6636a4e73d5dSJerry Jelinek 		/* opmask: mod_reg := mod_rm */
6637a4e73d5dSJerry Jelinek 		x->d86_numopnds = 2;
6638a4e73d5dSJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6639a4e73d5dSJerry Jelinek 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6640a4e73d5dSJerry Jelinek 		dtrace_get_operand(x, mode, reg, wbit, 1);
6641a4e73d5dSJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, r_m, LONG_OPND, 0);
6642a4e73d5dSJerry Jelinek 		break;
6643a4e73d5dSJerry Jelinek 
6644ab47273fSEdward Gillett 	case VEX_RRI:
6645ab47273fSEdward Gillett 		/* implicit(eflags/r32) := op(ModR/M.reg, ModR/M.rm) */
6646ab47273fSEdward Gillett 		x->d86_numopnds = 2;
6647ab47273fSEdward Gillett 
6648ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6649ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6650ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6651ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6652ab47273fSEdward Gillett 		break;
6653ab47273fSEdward Gillett 
6654ab47273fSEdward Gillett 	case VEX_RX:
6655ab47273fSEdward Gillett 		/* ModR/M.rm := op(ModR/M.reg) */
6656ebb8ac07SRobert Mustacchi 		/* vextractf128 || vcvtps2ph */
6657ebb8ac07SRobert Mustacchi 		if (dp == &dis_opAVX660F3A[0x19] ||
6658ebb8ac07SRobert Mustacchi 		    dp == &dis_opAVX660F3A[0x1d]) {
6659ab47273fSEdward Gillett 			x->d86_numopnds = 3;
6660ab47273fSEdward Gillett 
6661ab47273fSEdward Gillett 			dtrace_get_modrm(x, &mode, &reg, &r_m);
6662ab47273fSEdward Gillett 			dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6663ab47273fSEdward Gillett 
6664ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, XMM_OPND, 2);
6665ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6666ab47273fSEdward Gillett 
6667ab47273fSEdward Gillett 			/* one byte immediate number */
6668ab47273fSEdward Gillett 			dtrace_imm_opnd(x, wbit, 1, 0);
6669ab47273fSEdward Gillett 			break;
6670ab47273fSEdward Gillett 		}
6671ab47273fSEdward Gillett 
6672ab47273fSEdward Gillett 		x->d86_numopnds = 2;
6673ab47273fSEdward Gillett 
6674ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6675ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6676ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 1);
6677ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6678ab47273fSEdward Gillett 		break;
6679ab47273fSEdward Gillett 
6680ab47273fSEdward Gillett 	case VEX_RR:
6681ab47273fSEdward Gillett 		/* ModR/M.rm := op(ModR/M.reg) */
6682ab47273fSEdward Gillett 		x->d86_numopnds = 2;
6683ab47273fSEdward Gillett 
6684ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6685ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6686ab47273fSEdward Gillett 
6687ab47273fSEdward Gillett 		if (dp == &dis_opAVX660F[0x7E]) {
6688ab47273fSEdward Gillett 			/* vmovd/q <reg/mem 32/64>, <xmm> */
6689ab47273fSEdward Gillett #ifdef DIS_TEXT
6690ab47273fSEdward Gillett 			if (vex_W)
6691ab47273fSEdward Gillett 				x->d86_mnem[4] = 'q';
6692ab47273fSEdward Gillett #endif
6693ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 1);
6694ab47273fSEdward Gillett 		} else
6695ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, wbit, 1);
6696ab47273fSEdward Gillett 
6697ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6698ab47273fSEdward Gillett 		break;
6699ab47273fSEdward Gillett 
6700ab47273fSEdward Gillett 	case VEX_RRi:
6701ab47273fSEdward Gillett 		/* ModR/M.rm := op(ModR/M.reg, imm) */
6702ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6703ab47273fSEdward Gillett 
6704ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6705ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6706ab47273fSEdward Gillett 
6707ab47273fSEdward Gillett #ifdef DIS_TEXT
6708ab47273fSEdward Gillett 		if (dp == &dis_opAVX660F3A[0x16]) {
6709ab47273fSEdward Gillett 			/* vpextrd/q <imm>, <xmm>, <reg/mem 32/64> */
6710ab47273fSEdward Gillett 			if (vex_W)
6711ab47273fSEdward Gillett 				x->d86_mnem[6] = 'q';
6712ab47273fSEdward Gillett 		}
6713ab47273fSEdward Gillett #endif
6714ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, LONG_OPND, 2);
6715ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6716ab47273fSEdward Gillett 
6717ab47273fSEdward Gillett 		/* one byte immediate number */
6718ab47273fSEdward Gillett 		dtrace_imm_opnd(x, wbit, 1, 0);
6719ab47273fSEdward Gillett 		break;
6720245ac945SRobert Mustacchi 	case VEX_RIM:
6721245ac945SRobert Mustacchi 		/* ModR/M.rm := op(ModR/M.reg, imm) */
6722245ac945SRobert Mustacchi 		x->d86_numopnds = 3;
6723245ac945SRobert Mustacchi 
6724245ac945SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6725245ac945SRobert Mustacchi 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6726245ac945SRobert Mustacchi 
6727245ac945SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, XMM_OPND, 2);
6728245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6729245ac945SRobert Mustacchi 		/* one byte immediate number */
6730245ac945SRobert Mustacchi 		dtrace_imm_opnd(x, wbit, 1, 0);
6731245ac945SRobert Mustacchi 		break;
6732ab47273fSEdward Gillett 
6733ab47273fSEdward Gillett 	case VEX_RM:
6734ab47273fSEdward Gillett 		/* ModR/M.rm := op(ModR/M.reg) */
6735ab47273fSEdward Gillett 		if (dp == &dis_opAVX660F3A[0x17]) {	/* vextractps */
6736ab47273fSEdward Gillett 			x->d86_numopnds = 3;
6737ab47273fSEdward Gillett 
6738ab47273fSEdward Gillett 			dtrace_get_modrm(x, &mode, &reg, &r_m);
6739ab47273fSEdward Gillett 			dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6740ab47273fSEdward Gillett 
6741ab47273fSEdward Gillett 			dtrace_get_operand(x, mode, r_m, LONG_OPND, 2);
6742ab47273fSEdward Gillett 			dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6743ab47273fSEdward Gillett 			/* one byte immediate number */
6744ab47273fSEdward Gillett 			dtrace_imm_opnd(x, wbit, 1, 0);
6745ab47273fSEdward Gillett 			break;
6746ab47273fSEdward Gillett 		}
6747ab47273fSEdward Gillett 		x->d86_numopnds = 2;
6748ab47273fSEdward Gillett 
6749ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6750ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6751ab47273fSEdward Gillett L_VEX_RM:
6752ab47273fSEdward Gillett 		vbit = 1;
6753ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, vbit);
6754ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit - 1);
6755ab47273fSEdward Gillett 
6756ab47273fSEdward Gillett 		break;
6757ab47273fSEdward Gillett 
6758ab47273fSEdward Gillett 	case VEX_RRM:
6759ab47273fSEdward Gillett 		/* ModR/M.rm := op(VEX.vvvv, ModR/M.reg) */
6760ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6761ab47273fSEdward Gillett 
6762ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6763ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6764ab47273fSEdward Gillett 		dtrace_get_operand(x, mode, r_m, wbit, 2);
6765ab47273fSEdward Gillett 		/* VEX use the 1's complement form encode the XMM/YMM regs */
6766ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1);
6767ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6768ab47273fSEdward Gillett 		break;
6769ab47273fSEdward Gillett 
6770ab47273fSEdward Gillett 	case VEX_RMX:
6771ab47273fSEdward Gillett 		/* ModR/M.reg := op(VEX.vvvv, ModR/M.rm) */
6772ab47273fSEdward Gillett 		x->d86_numopnds = 3;
6773ab47273fSEdward Gillett 
6774ab47273fSEdward Gillett 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6775ab47273fSEdward Gillett 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6776ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
6777ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1);
6778ab47273fSEdward Gillett 		dtrace_get_operand(x, REG_ONLY, r_m, wbit, 0);
6779ab47273fSEdward Gillett 		break;
6780ab47273fSEdward Gillett 
6781ab47273fSEdward Gillett 	case VEX_NONE:
6782ab47273fSEdward Gillett #ifdef DIS_TEXT
6783ab47273fSEdward Gillett 		if (vex_L)
6784ab47273fSEdward Gillett 			(void) strncpy(x->d86_mnem, "vzeroall", OPLEN);
6785ab47273fSEdward Gillett #endif
6786ab47273fSEdward Gillett 		break;
6787245ac945SRobert Mustacchi 	case BLS: {
6788245ac945SRobert Mustacchi 
6789245ac945SRobert Mustacchi 		/*
6790245ac945SRobert Mustacchi 		 * The BLS instructions are VEX instructions that are based on
6791245ac945SRobert Mustacchi 		 * VEX.0F38.F3; however, they are considered special group 17
6792245ac945SRobert Mustacchi 		 * and like everything else, they use the bits in 3-5 of the
6793245ac945SRobert Mustacchi 		 * MOD R/M to determine the sub instruction. Unlike many others
6794245ac945SRobert Mustacchi 		 * like the VMX instructions, these are valid both for memory
6795245ac945SRobert Mustacchi 		 * and register forms.
6796245ac945SRobert Mustacchi 		 */
6797245ac945SRobert Mustacchi 
6798245ac945SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6799245ac945SRobert Mustacchi 		dtrace_vex_adjust(vex_byte1, mode, &reg, &r_m);
6800245ac945SRobert Mustacchi 
6801245ac945SRobert Mustacchi 		switch (reg) {
6802245ac945SRobert Mustacchi 		case 1:
6803245ac945SRobert Mustacchi #ifdef	DIS_TEXT
6804245ac945SRobert Mustacchi 			blsinstr = "blsr";
6805245ac945SRobert Mustacchi #endif
6806245ac945SRobert Mustacchi 			break;
6807245ac945SRobert Mustacchi 		case 2:
6808245ac945SRobert Mustacchi #ifdef	DIS_TEXT
6809245ac945SRobert Mustacchi 			blsinstr = "blsmsk";
6810245ac945SRobert Mustacchi #endif
6811245ac945SRobert Mustacchi 			break;
6812245ac945SRobert Mustacchi 		case 3:
6813245ac945SRobert Mustacchi #ifdef	DIS_TEXT
6814245ac945SRobert Mustacchi 			blsinstr = "blsi";
6815245ac945SRobert Mustacchi #endif
6816245ac945SRobert Mustacchi 			break;
6817245ac945SRobert Mustacchi 		default:
6818245ac945SRobert Mustacchi 			goto error;
6819245ac945SRobert Mustacchi 		}
6820245ac945SRobert Mustacchi 
6821245ac945SRobert Mustacchi 		x->d86_numopnds = 2;
6822245ac945SRobert Mustacchi #ifdef DIS_TEXT
6823245ac945SRobert Mustacchi 		(void) strncpy(x->d86_mnem, blsinstr, OPLEN);
6824245ac945SRobert Mustacchi #endif
6825245ac945SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), wbit, 1);
6826245ac945SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6827245ac945SRobert Mustacchi 		break;
6828245ac945SRobert Mustacchi 	}
682981b505b7SJerry Jelinek 	case EVEX_MX:
683081b505b7SJerry Jelinek 		/* ModR/M.reg := op(ModR/M.rm) */
683181b505b7SJerry Jelinek 		x->d86_numopnds = 2;
683281b505b7SJerry Jelinek 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
683381b505b7SJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
683481b505b7SJerry Jelinek 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
683581b505b7SJerry Jelinek 		dtrace_evex_adjust_reg(evex_byte1, &reg);
683681b505b7SJerry Jelinek 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
683781b505b7SJerry Jelinek 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
683881b505b7SJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6839d242cdf5SJerry Jelinek 		dtrace_evex_adjust_z_opmask(x, 1, evex_byte3);
684081b505b7SJerry Jelinek 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6841*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_MEM,
6842*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
6843*8b0687e2SRobert Mustacchi 		break;
6844*8b0687e2SRobert Mustacchi 	case EVEX_MXT1S8B:
6845*8b0687e2SRobert Mustacchi 		/* ModR/M.reg := op(ModR/M.rm) Tuple1 8-bit Scalar */
6846*8b0687e2SRobert Mustacchi 		x->d86_numopnds = 2;
6847*8b0687e2SRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
6848*8b0687e2SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6849*8b0687e2SRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
6850*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
6851*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
6852*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
6853*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6854*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 1, evex_byte3);
6855*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6856*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_T1S_8B,
6857*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
685881b505b7SJerry Jelinek 		break;
68593863692fSRobert Mustacchi 	case EVEX_MBX:
68603863692fSRobert Mustacchi 		/* ModR/M.reg := op(ModR/M.rm/M.bcast) */
68613863692fSRobert Mustacchi 		x->d86_numopnds = 2;
68623863692fSRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
68633863692fSRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
68643863692fSRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
68653863692fSRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
68663863692fSRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
68673863692fSRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
68683863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
68693863692fSRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 1, evex_byte3);
68703863692fSRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6871*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_BCAST,
6872*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
68733863692fSRobert Mustacchi 		dtrace_evex_adjust_bcast(x, 0, vex_W, wbit, evex_b);
68743863692fSRobert Mustacchi 		break;
687581b505b7SJerry Jelinek 	case EVEX_RX:
687681b505b7SJerry Jelinek 		/* ModR/M.rm := op(ModR/M.reg) */
687781b505b7SJerry Jelinek 		x->d86_numopnds = 2;
687881b505b7SJerry Jelinek 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
687981b505b7SJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
688081b505b7SJerry Jelinek 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
688181b505b7SJerry Jelinek 		dtrace_evex_adjust_reg(evex_byte1, &reg);
688281b505b7SJerry Jelinek 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
688381b505b7SJerry Jelinek 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
688481b505b7SJerry Jelinek 		dtrace_get_operand(x, mode, r_m, wbit, 1);
6885*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 1, evex_modrm, EVEX_DISP8_MEM,
6886*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
6887*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 1, evex_byte3);
6888*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
6889*8b0687e2SRobert Mustacchi 		break;
6890*8b0687e2SRobert Mustacchi 	case EVEX_RXT1S8B:
6891*8b0687e2SRobert Mustacchi 		/* ModR/M.rm := op(ModR/M.reg) Tuple1 8-bit Scalar */
6892*8b0687e2SRobert Mustacchi 		x->d86_numopnds = 2;
6893*8b0687e2SRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
6894*8b0687e2SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6895*8b0687e2SRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
6896*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
6897*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
6898*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
6899*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 1);
6900*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 1, evex_modrm, EVEX_DISP8_T1S_8B,
6901*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
6902d242cdf5SJerry Jelinek 		dtrace_evex_adjust_z_opmask(x, 1, evex_byte3);
690381b505b7SJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 0);
690481b505b7SJerry Jelinek 		break;
6905d242cdf5SJerry Jelinek 	case EVEX_RMrX:
6906d242cdf5SJerry Jelinek 		/* ModR/M.reg := op(EVEX.vvvv, ModR/M.r/m) */
6907d242cdf5SJerry Jelinek 		x->d86_numopnds = 3;
6908d242cdf5SJerry Jelinek 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
6909d242cdf5SJerry Jelinek 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6910d242cdf5SJerry Jelinek 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
6911d242cdf5SJerry Jelinek 		dtrace_evex_adjust_reg(evex_byte1, &reg);
6912d242cdf5SJerry Jelinek 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
6913d242cdf5SJerry Jelinek 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
6914d242cdf5SJerry Jelinek 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
6915d242cdf5SJerry Jelinek 		/*
6916d242cdf5SJerry Jelinek 		 * EVEX.vvvv is the same as VEX.vvvv (ones complement of the
6917d242cdf5SJerry Jelinek 		 * register specifier). The EVEX prefix handling uses the vex_v
6918d242cdf5SJerry Jelinek 		 * variable for these bits.
6919d242cdf5SJerry Jelinek 		 */
69203863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0x1F - vex_v), wbit, 1);
69213863692fSRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6922*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_MEM,
6923*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
69243863692fSRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 2, evex_byte3);
69253863692fSRobert Mustacchi 		break;
69263863692fSRobert Mustacchi 	case EVEX_RMBrX:
69273863692fSRobert Mustacchi 		/* ModR/M.reg := op(EVEX.vvvv, ModR/M.r/m) */
69283863692fSRobert Mustacchi 		x->d86_numopnds = 3;
69293863692fSRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
69303863692fSRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
69313863692fSRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
69323863692fSRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
69333863692fSRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
69343863692fSRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
69353863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 2);
69363863692fSRobert Mustacchi 		/*
69373863692fSRobert Mustacchi 		 * EVEX.vvvv is the same as VEX.vvvv (ones complement of the
69383863692fSRobert Mustacchi 		 * register specifier). The EVEX prefix handling uses the vex_v
69393863692fSRobert Mustacchi 		 * variable for these bits.
69403863692fSRobert Mustacchi 		 */
69413863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0x1F - vex_v), wbit, 1);
69423863692fSRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6943*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_BCAST,
6944*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
69453863692fSRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 2, evex_byte3);
69463863692fSRobert Mustacchi 		dtrace_evex_adjust_bcast(x, 0, vex_W, wbit, evex_b);
69473863692fSRobert Mustacchi 		break;
69483863692fSRobert Mustacchi 	case EVEX_RMrK:
69493863692fSRobert Mustacchi 		/* opmask := op(EVEX.vvvv, ModR/M.r/m) */
69503863692fSRobert Mustacchi 		x->d86_numopnds = 3;
69513863692fSRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
69523863692fSRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
69533863692fSRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
69543863692fSRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
69553863692fSRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
69563863692fSRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
69573863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, KOPMASK_OPND, 2);
69583863692fSRobert Mustacchi 		/*
69593863692fSRobert Mustacchi 		 * EVEX.vvvv is the same as VEX.vvvv (ones complement of the
69603863692fSRobert Mustacchi 		 * register specifier). The EVEX prefix handling uses the vex_v
69613863692fSRobert Mustacchi 		 * variable for these bits.
69623863692fSRobert Mustacchi 		 */
69633863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0x1F - vex_v), wbit, 1);
6964d242cdf5SJerry Jelinek 		dtrace_get_operand(x, mode, r_m, wbit, 0);
6965*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 0, evex_modrm, EVEX_DISP8_MEM,
6966*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
6967d242cdf5SJerry Jelinek 		dtrace_evex_adjust_z_opmask(x, 2, evex_byte3);
6968d242cdf5SJerry Jelinek 		break;
6969*8b0687e2SRobert Mustacchi 	case EVEX_KR:
6970*8b0687e2SRobert Mustacchi 		/* mod_reg := op(mod_r/m (opmask only)) */
6971*8b0687e2SRobert Mustacchi 		x->d86_numopnds = 2;
69723863692fSRobert Mustacchi 
6973*8b0687e2SRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
6974*8b0687e2SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6975*8b0687e2SRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
6976*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
6977*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
6978*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
6979*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 1);
6980*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, r_m, KOPMASK_OPND, 0);
6981*8b0687e2SRobert Mustacchi 		break;
6982a25e615dSRobert Mustacchi 	case EVEX_RMRX:
6983a25e615dSRobert Mustacchi 		/* ModR/M.reg := op(EVEX.vvvv, ModR/M.r_m, imm8) */
6984a25e615dSRobert Mustacchi 		x->d86_numopnds = 4;
6985a25e615dSRobert Mustacchi 
6986a25e615dSRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
6987a25e615dSRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
6988a25e615dSRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
6989a25e615dSRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
6990a25e615dSRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
6991a25e615dSRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
6992a25e615dSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 3);
6993a25e615dSRobert Mustacchi 		/*
6994a25e615dSRobert Mustacchi 		 * EVEX.vvvv is the same as VEX.vvvv (ones complement of the
6995a25e615dSRobert Mustacchi 		 * register specifier). The EVEX prefix handling uses the vex_v
6996a25e615dSRobert Mustacchi 		 * variable for these bits.
6997a25e615dSRobert Mustacchi 		 */
69983863692fSRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0x1F - vex_v), wbit, 2);
6999a25e615dSRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 1);
7000*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 1, evex_modrm, EVEX_DISP8_MEM,
7001*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
7002*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 3, evex_byte3);
7003*8b0687e2SRobert Mustacchi 
7004*8b0687e2SRobert Mustacchi 		dtrace_imm_opnd(x, wbit, 1, 0);
7005*8b0687e2SRobert Mustacchi 		break;
7006*8b0687e2SRobert Mustacchi 	case EVEX_RMBRX:
7007*8b0687e2SRobert Mustacchi 		/* ModR/M.reg := op(EVEX.vvvv, ModR/M.r_m/bcast, imm8) */
7008*8b0687e2SRobert Mustacchi 		x->d86_numopnds = 4;
7009*8b0687e2SRobert Mustacchi 
7010*8b0687e2SRobert Mustacchi 		dtrace_evex_mnem_adjust(x, dp, vex_W, evex_byte2);
7011*8b0687e2SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
7012*8b0687e2SRobert Mustacchi 		evex_modrm = x->d86_bytes[x->d86_len - 1] & 0xff;
7013*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg(evex_byte1, &reg);
7014*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_rm(evex_byte1, &r_m);
7015*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_reg_name(evex_L, &wbit);
7016*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, wbit, 3);
7017*8b0687e2SRobert Mustacchi 		/*
7018*8b0687e2SRobert Mustacchi 		 * EVEX.vvvv is the same as VEX.vvvv (ones complement of the
7019*8b0687e2SRobert Mustacchi 		 * register specifier). The EVEX prefix handling uses the vex_v
7020*8b0687e2SRobert Mustacchi 		 * variable for these bits.
7021*8b0687e2SRobert Mustacchi 		 */
7022*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, (0x1F - vex_v), wbit, 2);
7023*8b0687e2SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, wbit, 1);
7024*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_disp8_n(x, 1, evex_modrm, EVEX_DISP8_BCAST,
7025*8b0687e2SRobert Mustacchi 		    evex_L, evex_b, vex_W);
7026*8b0687e2SRobert Mustacchi 		dtrace_evex_adjust_bcast(x, 1, vex_W, wbit, evex_b);
7027a25e615dSRobert Mustacchi 		dtrace_evex_adjust_z_opmask(x, 3, evex_byte3);
7028a25e615dSRobert Mustacchi 
7029a25e615dSRobert Mustacchi 		dtrace_imm_opnd(x, wbit, 1, 0);
7030a25e615dSRobert Mustacchi 		break;
7031*8b0687e2SRobert Mustacchi 
7032fb2cb638SRobert Mustacchi 	case MOVDIR:
7033fb2cb638SRobert Mustacchi 		/*
7034fb2cb638SRobert Mustacchi 		 * The semantics of the movdir64b instruction is a little bit
7035fb2cb638SRobert Mustacchi 		 * weird and we need to trick the rest of the engine. In this
7036fb2cb638SRobert Mustacchi 		 * case we change d86_mode to match the operand/address size
7037fb2cb638SRobert Mustacchi 		 * that we overrode to earlier. Basically the standard CPU mode
7038fb2cb638SRobert Mustacchi 		 * doesn't actually influence which register set is used, but
7039fb2cb638SRobert Mustacchi 		 * the 0x67 prefix does.
7040fb2cb638SRobert Mustacchi 		 */
7041fb2cb638SRobert Mustacchi 		x->d86_numopnds = 2;
7042fb2cb638SRobert Mustacchi 		x->d86_mode = x->d86_opnd_size;
7043fb2cb638SRobert Mustacchi 		dtrace_get_modrm(x, &mode, &reg, &r_m);
7044fb2cb638SRobert Mustacchi 		dtrace_rex_adjust(rex_prefix, mode, &reg, &r_m);
7045fb2cb638SRobert Mustacchi 		dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, 1);
7046fb2cb638SRobert Mustacchi 		dtrace_get_operand(x, mode, r_m, LONG_OPND, 0);
7047fb2cb638SRobert Mustacchi 		break;
70487c478bd9Sstevel@tonic-gate 	/* an invalid op code */
70497c478bd9Sstevel@tonic-gate 	case AM:
70507c478bd9Sstevel@tonic-gate 	case DM:
70517c478bd9Sstevel@tonic-gate 	case OVERRIDE:
70527c478bd9Sstevel@tonic-gate 	case PREFIX:
70537c478bd9Sstevel@tonic-gate 	case UNKNOWN:
70547c478bd9Sstevel@tonic-gate 		NOMEM;
70557c478bd9Sstevel@tonic-gate 	default:
70567c478bd9Sstevel@tonic-gate 		goto error;
70577c478bd9Sstevel@tonic-gate 	} /* end switch */
70587c478bd9Sstevel@tonic-gate 	if (x->d86_error)
70597c478bd9Sstevel@tonic-gate 		goto error;
70607c478bd9Sstevel@tonic-gate 
70617c478bd9Sstevel@tonic-gate done:
70627c478bd9Sstevel@tonic-gate #ifdef DIS_MEM
7063584b574aSToomas Soome 	if (dp == NULL)
7064584b574aSToomas Soome 		return (1);
70657c478bd9Sstevel@tonic-gate 	/*
70667c478bd9Sstevel@tonic-gate 	 * compute the size of any memory accessed by the instruction
70677c478bd9Sstevel@tonic-gate 	 */
70687c478bd9Sstevel@tonic-gate 	if (x->d86_memsize != 0) {
70697c478bd9Sstevel@tonic-gate 		return (0);
70707c478bd9Sstevel@tonic-gate 	} else if (dp->it_stackop) {
70717c478bd9Sstevel@tonic-gate 		switch (opnd_size) {
70727c478bd9Sstevel@tonic-gate 		case SIZE16:
70737c478bd9Sstevel@tonic-gate 			x->d86_memsize = 2;
70747c478bd9Sstevel@tonic-gate 			break;
70757c478bd9Sstevel@tonic-gate 		case SIZE32:
70767c478bd9Sstevel@tonic-gate 			x->d86_memsize = 4;
70777c478bd9Sstevel@tonic-gate 			break;
70787c478bd9Sstevel@tonic-gate 		case SIZE64:
70797c478bd9Sstevel@tonic-gate 			x->d86_memsize = 8;
70807c478bd9Sstevel@tonic-gate 			break;
70817c478bd9Sstevel@tonic-gate 		}
70827c478bd9Sstevel@tonic-gate 	} else if (nomem || mode == REG_ONLY) {
70837c478bd9Sstevel@tonic-gate 		x->d86_memsize = 0;
70847c478bd9Sstevel@tonic-gate 
70857c478bd9Sstevel@tonic-gate 	} else if (dp->it_size != 0) {
70867c478bd9Sstevel@tonic-gate 		/*
70877c478bd9Sstevel@tonic-gate 		 * In 64 bit mode descriptor table entries
70887c478bd9Sstevel@tonic-gate 		 * go up to 10 bytes and popf/pushf are always 8 bytes
70897c478bd9Sstevel@tonic-gate 		 */
70907c478bd9Sstevel@tonic-gate 		if (x->d86_mode == SIZE64 && dp->it_size == 6)
70917c478bd9Sstevel@tonic-gate 			x->d86_memsize = 10;
70927c478bd9Sstevel@tonic-gate 		else if (x->d86_mode == SIZE64 && opcode1 == 0x9 &&
70937c478bd9Sstevel@tonic-gate 		    (opcode2 == 0xc || opcode2 == 0xd))
70947c478bd9Sstevel@tonic-gate 			x->d86_memsize = 8;
70957c478bd9Sstevel@tonic-gate 		else
70967c478bd9Sstevel@tonic-gate 			x->d86_memsize = dp->it_size;
70977c478bd9Sstevel@tonic-gate 
70987c478bd9Sstevel@tonic-gate 	} else if (wbit == 0) {
70997c478bd9Sstevel@tonic-gate 		x->d86_memsize = 1;
71007c478bd9Sstevel@tonic-gate 
71017c478bd9Sstevel@tonic-gate 	} else if (wbit == LONG_OPND) {
71027c478bd9Sstevel@tonic-gate 		if (opnd_size == SIZE64)
71037c478bd9Sstevel@tonic-gate 			x->d86_memsize = 8;
71047c478bd9Sstevel@tonic-gate 		else if (opnd_size == SIZE32)
71057c478bd9Sstevel@tonic-gate 			x->d86_memsize = 4;
71067c478bd9Sstevel@tonic-gate 		else
71077c478bd9Sstevel@tonic-gate 			x->d86_memsize = 2;
71087c478bd9Sstevel@tonic-gate 
71097c478bd9Sstevel@tonic-gate 	} else if (wbit == SEG_OPND) {
71107c478bd9Sstevel@tonic-gate 		x->d86_memsize = 4;
71117c478bd9Sstevel@tonic-gate 
71127c478bd9Sstevel@tonic-gate 	} else {
71137c478bd9Sstevel@tonic-gate 		x->d86_memsize = 8;
71147c478bd9Sstevel@tonic-gate 	}
71157c478bd9Sstevel@tonic-gate #endif
71167c478bd9Sstevel@tonic-gate 	return (0);
71177c478bd9Sstevel@tonic-gate 
71187c478bd9Sstevel@tonic-gate error:
71197c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
7120d267098bSdmick 	(void) strlcat(x->d86_mnem, "undef", OPLEN);
71217c478bd9Sstevel@tonic-gate #endif
71227c478bd9Sstevel@tonic-gate 	return (1);
71237c478bd9Sstevel@tonic-gate }
71247c478bd9Sstevel@tonic-gate 
71257c478bd9Sstevel@tonic-gate #ifdef DIS_TEXT
71267c478bd9Sstevel@tonic-gate 
71277c478bd9Sstevel@tonic-gate /*
71287c478bd9Sstevel@tonic-gate  * Some instructions should have immediate operands printed
71297c478bd9Sstevel@tonic-gate  * as unsigned integers. We compare against this table.
71307c478bd9Sstevel@tonic-gate  */
71317c478bd9Sstevel@tonic-gate static char *unsigned_ops[] = {
71327c478bd9Sstevel@tonic-gate 	"or", "and", "xor", "test", "in", "out", "lcall", "ljmp",
71337c478bd9Sstevel@tonic-gate 	"rcr", "rcl", "ror", "rol", "shl", "shr", "sal", "psr", "psl",
71347c478bd9Sstevel@tonic-gate 	0
71357c478bd9Sstevel@tonic-gate };
71367c478bd9Sstevel@tonic-gate 
7137d267098bSdmick 
71387c478bd9Sstevel@tonic-gate static int
isunsigned_op(char * opcode)71397c478bd9Sstevel@tonic-gate isunsigned_op(char *opcode)
71407c478bd9Sstevel@tonic-gate {
71417c478bd9Sstevel@tonic-gate 	char *where;
71427c478bd9Sstevel@tonic-gate 	int i;
71437c478bd9Sstevel@tonic-gate 	int is_unsigned = 0;
71447c478bd9Sstevel@tonic-gate 
71457c478bd9Sstevel@tonic-gate 	/*
71467c478bd9Sstevel@tonic-gate 	 * Work back to start of last mnemonic, since we may have
71477c478bd9Sstevel@tonic-gate 	 * prefixes on some opcodes.
71487c478bd9Sstevel@tonic-gate 	 */
71497c478bd9Sstevel@tonic-gate 	where = opcode + strlen(opcode) - 1;
71507c478bd9Sstevel@tonic-gate 	while (where > opcode && *where != ' ')
71517c478bd9Sstevel@tonic-gate 		--where;
71527c478bd9Sstevel@tonic-gate 	if (*where == ' ')
71537c478bd9Sstevel@tonic-gate 		++where;
71547c478bd9Sstevel@tonic-gate 
71557c478bd9Sstevel@tonic-gate 	for (i = 0; unsigned_ops[i]; ++i) {
71567c478bd9Sstevel@tonic-gate 		if (strncmp(where, unsigned_ops[i],
71577c478bd9Sstevel@tonic-gate 		    strlen(unsigned_ops[i])))
71587c478bd9Sstevel@tonic-gate 			continue;
71597c478bd9Sstevel@tonic-gate 		is_unsigned = 1;
71607c478bd9Sstevel@tonic-gate 		break;
71617c478bd9Sstevel@tonic-gate 	}
71627c478bd9Sstevel@tonic-gate 	return (is_unsigned);
71637c478bd9Sstevel@tonic-gate }
71647c478bd9Sstevel@tonic-gate 
7165d267098bSdmick /*
7166d267098bSdmick  * Print a numeric immediate into end of buf, maximum length buflen.
7167d267098bSdmick  * The immediate may be an address or a displacement.  Mask is set
7168d267098bSdmick  * for address size.  If the immediate is a "small negative", or
7169d267098bSdmick  * if it's a negative displacement of any magnitude, print as -<absval>.
7170d267098bSdmick  * Respect the "octal" flag.  "Small negative" is defined as "in the
7171d267098bSdmick  * interval [NEG_LIMIT, 0)".
7172d267098bSdmick  *
7173d267098bSdmick  * Also, "isunsigned_op()" instructions never print negatives.
7174d267098bSdmick  *
7175d267098bSdmick  * Return whether we decided to print a negative value or not.
7176d267098bSdmick  */
7177d267098bSdmick 
7178d267098bSdmick #define	NEG_LIMIT	-255
7179d267098bSdmick enum {IMM, DISP};
7180d267098bSdmick enum {POS, TRY_NEG};
7181d267098bSdmick 
7182d267098bSdmick static int
print_imm(dis86_t * dis,uint64_t usv,uint64_t mask,char * buf,size_t buflen,int disp,int try_neg)7183d267098bSdmick print_imm(dis86_t *dis, uint64_t usv, uint64_t mask, char *buf,
7184d267098bSdmick     size_t buflen, int disp, int try_neg)
7185d267098bSdmick {
7186d267098bSdmick 	int curlen;
7187d267098bSdmick 	int64_t sv = (int64_t)usv;
7188d267098bSdmick 	int octal = dis->d86_flags & DIS_F_OCTAL;
7189d267098bSdmick 
7190d267098bSdmick 	curlen = strlen(buf);
7191d267098bSdmick 
7192d267098bSdmick 	if (try_neg == TRY_NEG && sv < 0 &&
7193d267098bSdmick 	    (disp || sv >= NEG_LIMIT) &&
7194d267098bSdmick 	    !isunsigned_op(dis->d86_mnem)) {
7195d267098bSdmick 		dis->d86_sprintf_func(buf + curlen, buflen - curlen,
7196d267098bSdmick 		    octal ? "-0%llo" : "-0x%llx", (-sv) & mask);
7197d267098bSdmick 		return (1);
7198d267098bSdmick 	} else {
7199d267098bSdmick 		if (disp == DISP)
7200d267098bSdmick 			dis->d86_sprintf_func(buf + curlen, buflen - curlen,
7201d267098bSdmick 			    octal ? "+0%llo" : "+0x%llx", usv & mask);
7202d267098bSdmick 		else
7203d267098bSdmick 			dis->d86_sprintf_func(buf + curlen, buflen - curlen,
7204d267098bSdmick 			    octal ? "0%llo" : "0x%llx", usv & mask);
7205d267098bSdmick 		return (0);
7206d267098bSdmick 
7207d267098bSdmick 	}
7208d267098bSdmick }
7209d267098bSdmick 
7210d267098bSdmick 
7211d267098bSdmick static int
log2(int size)7212d267098bSdmick log2(int size)
7213d267098bSdmick {
7214d267098bSdmick 	switch (size) {
7215d267098bSdmick 	case 1: return (0);
7216d267098bSdmick 	case 2: return (1);
7217d267098bSdmick 	case 4: return (2);
7218d267098bSdmick 	case 8: return (3);
7219d267098bSdmick 	}
7220d267098bSdmick 	return (0);
7221d267098bSdmick }
7222d267098bSdmick 
72237c478bd9Sstevel@tonic-gate /* ARGSUSED */
72247c478bd9Sstevel@tonic-gate void
dtrace_disx86_str(dis86_t * dis,uint_t mode,uint64_t pc,char * buf,size_t buflen)7225d267098bSdmick dtrace_disx86_str(dis86_t *dis, uint_t mode, uint64_t pc, char *buf,
72267c478bd9Sstevel@tonic-gate     size_t buflen)
72277c478bd9Sstevel@tonic-gate {
7228d267098bSdmick 	uint64_t reltgt = 0;
7229d267098bSdmick 	uint64_t tgt = 0;
7230d267098bSdmick 	int curlen;
7231d267098bSdmick 	int (*lookup)(void *, uint64_t, char *, size_t);
72327c478bd9Sstevel@tonic-gate 	int i;
7233d267098bSdmick 	int64_t sv;
7234d267098bSdmick 	uint64_t usv, mask, save_mask, save_usv;
7235d267098bSdmick 	static uint64_t masks[] =
7236d267098bSdmick 	    {0xffU, 0xffffU, 0xffffffffU, 0xffffffffffffffffULL};
7237d267098bSdmick 	save_usv = 0;
72387c478bd9Sstevel@tonic-gate 
7239d267098bSdmick 	dis->d86_sprintf_func(buf, buflen, "%-6s ", dis->d86_mnem);
72407c478bd9Sstevel@tonic-gate 
7241dc0093f4Seschrock 	/*
7242dc0093f4Seschrock 	 * For PC-relative jumps, the pc is really the next pc after executing
7243dc0093f4Seschrock 	 * this instruction, so increment it appropriately.
7244dc0093f4Seschrock 	 */
7245dc0093f4Seschrock 	pc += dis->d86_len;
7246dc0093f4Seschrock 
72477c478bd9Sstevel@tonic-gate 	for (i = 0; i < dis->d86_numopnds; i++) {
72487c478bd9Sstevel@tonic-gate 		d86opnd_t *op = &dis->d86_opnd[i];
72497c478bd9Sstevel@tonic-gate 
72507c478bd9Sstevel@tonic-gate 		if (i != 0)
72517c478bd9Sstevel@tonic-gate 			(void) strlcat(buf, ",", buflen);
72527c478bd9Sstevel@tonic-gate 
72537c478bd9Sstevel@tonic-gate 		(void) strlcat(buf, op->d86_prefix, buflen);
72547c478bd9Sstevel@tonic-gate 
7255d267098bSdmick 		/*
7256d267098bSdmick 		 * sv is for the signed, possibly-truncated immediate or
7257d267098bSdmick 		 * displacement; usv retains the original size and
7258d267098bSdmick 		 * unsignedness for symbol lookup.
7259d267098bSdmick 		 */
7260d267098bSdmick 
7261d267098bSdmick 		sv = usv = op->d86_value;
7262d267098bSdmick 
7263d267098bSdmick 		/*
7264d267098bSdmick 		 * About masks: for immediates that represent
7265d267098bSdmick 		 * addresses, the appropriate display size is
7266d267098bSdmick 		 * the effective address size of the instruction.
7267d267098bSdmick 		 * This includes MODE_OFFSET, MODE_IPREL, and
7268d267098bSdmick 		 * MODE_RIPREL.  Immediates that are simply
7269d267098bSdmick 		 * immediate values should display in the operand's
7270d267098bSdmick 		 * size, however, since they don't represent addresses.
7271d267098bSdmick 		 */
7272d267098bSdmick 
7273d267098bSdmick 		/* d86_addr_size is SIZEnn, which is log2(real size) */
7274d267098bSdmick 		mask = masks[dis->d86_addr_size];
7275d267098bSdmick 
7276d267098bSdmick 		/* d86_value_size and d86_imm_bytes are in bytes */
7277d267098bSdmick 		if (op->d86_mode == MODE_SIGNED ||
7278d267098bSdmick 		    op->d86_mode == MODE_IMPLIED)
7279d267098bSdmick 			mask = masks[log2(op->d86_value_size)];
72807c478bd9Sstevel@tonic-gate 
72817c478bd9Sstevel@tonic-gate 		switch (op->d86_mode) {
72827c478bd9Sstevel@tonic-gate 
72837c478bd9Sstevel@tonic-gate 		case MODE_NONE:
72847c478bd9Sstevel@tonic-gate 
72857c478bd9Sstevel@tonic-gate 			(void) strlcat(buf, op->d86_opnd, buflen);
72867c478bd9Sstevel@tonic-gate 			break;
72877c478bd9Sstevel@tonic-gate 
72887c478bd9Sstevel@tonic-gate 		case MODE_SIGNED:
72897c478bd9Sstevel@tonic-gate 		case MODE_IMPLIED:
72907c478bd9Sstevel@tonic-gate 		case MODE_OFFSET:
72917c478bd9Sstevel@tonic-gate 
7292d267098bSdmick 			tgt = usv;
7293d267098bSdmick 
72947c478bd9Sstevel@tonic-gate 			if (dis->d86_seg_prefix)
7295dc0093f4Seschrock 				(void) strlcat(buf, dis->d86_seg_prefix,
7296dc0093f4Seschrock 				    buflen);
72977c478bd9Sstevel@tonic-gate 
72987c478bd9Sstevel@tonic-gate 			if (op->d86_mode == MODE_SIGNED ||
7299d267098bSdmick 			    op->d86_mode == MODE_IMPLIED) {
7300dc0093f4Seschrock 				(void) strlcat(buf, "$", buflen);
7301d267098bSdmick 			}
73027c478bd9Sstevel@tonic-gate 
7303d267098bSdmick 			if (print_imm(dis, usv, mask, buf, buflen,
7304d267098bSdmick 			    IMM, TRY_NEG) &&
7305d267098bSdmick 			    (op->d86_mode == MODE_SIGNED ||
7306d267098bSdmick 			    op->d86_mode == MODE_IMPLIED)) {
7307d267098bSdmick 
7308d267098bSdmick 				/*
7309d267098bSdmick 				 * We printed a negative value for an
7310d267098bSdmick 				 * immediate that wasn't a
7311d267098bSdmick 				 * displacement.  Note that fact so we can
7312d267098bSdmick 				 * print the positive value as an
7313d267098bSdmick 				 * annotation.
7314d267098bSdmick 				 */
7315d267098bSdmick 
7316d267098bSdmick 				save_usv = usv;
7317d267098bSdmick 				save_mask = mask;
73187c478bd9Sstevel@tonic-gate 			}
7319dc0093f4Seschrock 			(void) strlcat(buf, op->d86_opnd, buflen);
73207c478bd9Sstevel@tonic-gate 			break;
73217c478bd9Sstevel@tonic-gate 
73227c478bd9Sstevel@tonic-gate 		case MODE_IPREL:
7323d267098bSdmick 		case MODE_RIPREL:
73247c478bd9Sstevel@tonic-gate 
7325d267098bSdmick 			reltgt = pc + sv;
7326d267098bSdmick 
7327d267098bSdmick 			switch (mode) {
7328d267098bSdmick 			case SIZE16:
7329d267098bSdmick 				reltgt = (uint16_t)reltgt;
73307c478bd9Sstevel@tonic-gate 				break;
7331d267098bSdmick 			case SIZE32:
7332d267098bSdmick 				reltgt = (uint32_t)reltgt;
73337c478bd9Sstevel@tonic-gate 				break;
73347c478bd9Sstevel@tonic-gate 			}
73357c478bd9Sstevel@tonic-gate 
7336d267098bSdmick 			(void) print_imm(dis, usv, mask, buf, buflen,
7337d267098bSdmick 			    DISP, TRY_NEG);
73387c478bd9Sstevel@tonic-gate 
7339d267098bSdmick 			if (op->d86_mode == MODE_RIPREL)
7340d267098bSdmick 				(void) strlcat(buf, "(%rip)", buflen);
7341d267098bSdmick 			break;
7342d267098bSdmick 		}
7343d267098bSdmick 	}
73447c478bd9Sstevel@tonic-gate 
7345d267098bSdmick 	/*
7346d267098bSdmick 	 * The symbol lookups may result in false positives,
7347d267098bSdmick 	 * particularly on object files, where small numbers may match
7348d267098bSdmick 	 * the 0-relative non-relocated addresses of symbols.
7349d267098bSdmick 	 */
73507c478bd9Sstevel@tonic-gate 
7351d267098bSdmick 	lookup = dis->d86_sym_lookup;
7352d267098bSdmick 	if (tgt != 0) {
7353e0070315Sdmick 		if ((dis->d86_flags & DIS_F_NOIMMSYM) == 0 &&
7354e0070315Sdmick 		    lookup(dis->d86_data, tgt, NULL, 0) == 0) {
7355d267098bSdmick 			(void) strlcat(buf, "\t<", buflen);
7356d267098bSdmick 			curlen = strlen(buf);
7357d267098bSdmick 			lookup(dis->d86_data, tgt, buf + curlen,
7358d267098bSdmick 			    buflen - curlen);
7359dc0093f4Seschrock 			(void) strlcat(buf, ">", buflen);
7360d267098bSdmick 		}
73617c478bd9Sstevel@tonic-gate 
7362d267098bSdmick 		/*
7363d267098bSdmick 		 * If we printed a negative immediate above, print the
7364d267098bSdmick 		 * positive in case our heuristic was unhelpful
7365d267098bSdmick 		 */
7366d267098bSdmick 		if (save_usv) {
7367d267098bSdmick 			(void) strlcat(buf, "\t<", buflen);
7368d267098bSdmick 			(void) print_imm(dis, save_usv, save_mask, buf, buflen,
7369d267098bSdmick 			    IMM, POS);
7370d267098bSdmick 			(void) strlcat(buf, ">", buflen);
73717c478bd9Sstevel@tonic-gate 		}
73727c478bd9Sstevel@tonic-gate 	}
7373d267098bSdmick 
7374d267098bSdmick 	if (reltgt != 0) {
7375d267098bSdmick 		/* Print symbol or effective address for reltgt */
7376d267098bSdmick 
7377d267098bSdmick 		(void) strlcat(buf, "\t<", buflen);
7378d267098bSdmick 		curlen = strlen(buf);
7379d267098bSdmick 		lookup(dis->d86_data, reltgt, buf + curlen,
7380d267098bSdmick 		    buflen - curlen);
7381d267098bSdmick 		(void) strlcat(buf, ">", buflen);
7382d267098bSdmick 	}
73837c478bd9Sstevel@tonic-gate }
73847c478bd9Sstevel@tonic-gate 
73857c478bd9Sstevel@tonic-gate #endif /* DIS_TEXT */
7386