17aec1d6eScindi /*
27aec1d6eScindi  * CDDL HEADER START
37aec1d6eScindi  *
47aec1d6eScindi  * The contents of this file are subject to the terms of the
58a40a695Sgavinm  * Common Development and Distribution License (the "License").
68a40a695Sgavinm  * You may not use this file except in compliance with the License.
77aec1d6eScindi  *
87aec1d6eScindi  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97aec1d6eScindi  * or http://www.opensolaris.org/os/licensing.
107aec1d6eScindi  * See the License for the specific language governing permissions
117aec1d6eScindi  * and limitations under the License.
127aec1d6eScindi  *
137aec1d6eScindi  * When distributing Covered Code, include this CDDL HEADER in each
147aec1d6eScindi  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157aec1d6eScindi  * If applicable, add the following below this CDDL HEADER, with the
167aec1d6eScindi  * fields enclosed by brackets "[]" replaced with your own identifying
177aec1d6eScindi  * information: Portions Copyright [yyyy] [name of copyright owner]
187aec1d6eScindi  *
197aec1d6eScindi  * CDDL HEADER END
207aec1d6eScindi  *
21*e4b86885SCheng Sean Ye  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
227aec1d6eScindi  * Use is subject to license terms.
237aec1d6eScindi  */
247aec1d6eScindi 
257aec1d6eScindi #include <mdb/mdb_modapi.h>
267aec1d6eScindi #include <amd_opteron/ao.h>
277aec1d6eScindi 
287aec1d6eScindi #define	ALLBITS	(u_longlong_t)-1
297aec1d6eScindi 
307aec1d6eScindi static const mdb_bitmask_t ao_nbcfg_bits[] = {
318a40a695Sgavinm 	{ "SyncOnDramAdrParErrEn", ALLBITS, AMD_NB_CFG_SYNCONDRAMADRPARERREN },
327aec1d6eScindi 	{ "NbMcaToMstCpuEn", ALLBITS, AMD_NB_CFG_NBMCATOMSTCPUEN },
338a40a695Sgavinm 	{ "ReservedBit26", ALLBITS, 0x4000000 },
347aec1d6eScindi 	{ "DisPciCfgCpuErrRsp", ALLBITS, AMD_NB_CFG_DISPCICFGCPUERRRSP },
357aec1d6eScindi 	{ "IoRdDatErrEn", ALLBITS, AMD_NB_CFG_IORDDATERREN },
367aec1d6eScindi 	{ "ChipKillEccEn", ALLBITS, AMD_NB_CFG_CHIPKILLECCEN },
377aec1d6eScindi 	{ "EccEn", ALLBITS, AMD_NB_CFG_ECCEN },
387aec1d6eScindi 	{ "SyncOnAnyErrEn", ALLBITS, AMD_NB_CFG_SYNCONANYERREN },
397aec1d6eScindi 	{ "SyncOnWdogEn", ALLBITS, AMD_NB_CFG_SYNCONWDOGEN },
407aec1d6eScindi 	{ "GenCrcErrByte1", ALLBITS, AMD_NB_CFG_GENCRCERRBYTE1 },
417aec1d6eScindi 	{ "GenCrcErrByte0", ALLBITS, AMD_NB_CFG_GENCRCERRBYTE0 },
427aec1d6eScindi 	/* LdtLinkSel handled separately */
437aec1d6eScindi 	/* WdogTmrBaseSel handled separately */
447aec1d6eScindi 	/* WdogTmrCntSel handled separately */
457aec1d6eScindi 	/* WdogTmrDis handled separately */
467aec1d6eScindi 	{ "IoErrDis", ALLBITS, AMD_NB_CFG_IOERRDIS },
477aec1d6eScindi 	{ "CpuErrDis", ALLBITS, AMD_NB_CFG_CPUERRDIS },
487aec1d6eScindi 	{ "IoMstAbortDis", ALLBITS, AMD_NB_CFG_IOMSTABORTDIS },
497aec1d6eScindi 	{ "SyncPktPropDis", ALLBITS, AMD_NB_CFG_SYNCPKTPROPDIS },
507aec1d6eScindi 	{ "SyncPktGenDis", ALLBITS, AMD_NB_CFG_SYNCPKTGENDIS },
517aec1d6eScindi 	{ "SyncOnUcEccEn", ALLBITS, AMD_NB_CFG_SYNCONUCECCEN },
527aec1d6eScindi 	{ "CpuRdDatErrEn", ALLBITS, AMD_NB_CFG_CPURDDATERREN }
537aec1d6eScindi };
547aec1d6eScindi 
557aec1d6eScindi /*ARGSUSED*/
567aec1d6eScindi static int
ao_nbcfg_describe(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv)577aec1d6eScindi ao_nbcfg_describe(uintptr_t val, uint_t flags, int argc, const mdb_arg_t *argv)
587aec1d6eScindi {
597aec1d6eScindi 	const mdb_bitmask_t *bm;
607aec1d6eScindi 	uintptr_t field;
617aec1d6eScindi 	int nbits, i;
627aec1d6eScindi 
637aec1d6eScindi 	if (argc != 0 || !(flags & DCMD_ADDRSPEC))
647aec1d6eScindi 		return (DCMD_USAGE);
657aec1d6eScindi 
667aec1d6eScindi 	for (nbits = 0, bm = ao_nbcfg_bits, i = 0;
677aec1d6eScindi 	    i < sizeof (ao_nbcfg_bits) / sizeof (mdb_bitmask_t); i++, bm++) {
687aec1d6eScindi 		if (!(val & bm->bm_bits))
697aec1d6eScindi 			continue;
707aec1d6eScindi 
717aec1d6eScindi 		mdb_printf("\t0x%08x  %s\n", bm->bm_bits, bm->bm_name);
727aec1d6eScindi 
737aec1d6eScindi 		val &= ~bm->bm_bits;
747aec1d6eScindi 		nbits++;
757aec1d6eScindi 	}
767aec1d6eScindi 
777aec1d6eScindi 	if ((field = (val & AMD_NB_CFG_LDTLINKSEL_MASK)) != 0) {
787aec1d6eScindi 		mdb_printf("\tLdtLinkSel = %d", field >>
797aec1d6eScindi 		    AMD_NB_CFG_LDTLINKSEL_SHIFT);
807aec1d6eScindi 	}
817aec1d6eScindi 
828a40a695Sgavinm 	if (val & AMD_NB_CFG_WDOGTMRDIS) {
838a40a695Sgavinm 		mdb_printf("\t0x%08x  %s\n", AMD_NB_CFG_WDOGTMRDIS,
848a40a695Sgavinm 		    "WdogTmrDis");
858a40a695Sgavinm 	} else {
867aec1d6eScindi 		static const uint_t wdogcounts[] = {
877aec1d6eScindi 			4095, 2047, 1023, 511, 255, 127, 63, 31
887aec1d6eScindi 		};
897aec1d6eScindi 
907aec1d6eScindi 		uintptr_t cntfld = (val & AMD_NB_CFG_WDOGTMRCNTSEL_MASK);
917aec1d6eScindi 		uintptr_t basefld = (val & AMD_NB_CFG_WDOGTMRBASESEL_MASK);
927aec1d6eScindi 		uintptr_t count;
937aec1d6eScindi 		int valid = 1;
947aec1d6eScindi 		const char *units;
957aec1d6eScindi 
967aec1d6eScindi 		if (cntfld < sizeof (wdogcounts) / sizeof (uint_t))
977aec1d6eScindi 			count = wdogcounts[cntfld];
987aec1d6eScindi 		else
997aec1d6eScindi 			valid = 0;
1007aec1d6eScindi 
1017aec1d6eScindi 		switch (basefld) {
1027aec1d6eScindi 		case AMD_NB_CFG_WDOGTMRBASESEL_1MS:
1037aec1d6eScindi 			units = "ms";
1047aec1d6eScindi 			break;
1057aec1d6eScindi 		case AMD_NB_CFG_WDOGTMRBASESEL_1US:
1067aec1d6eScindi 			units = "us";
1077aec1d6eScindi 			break;
1087aec1d6eScindi 		case AMD_NB_CFG_WDOGTMRBASESEL_5NS:
1097aec1d6eScindi 			count *= 5;
1107aec1d6eScindi 			units = "ns";
1117aec1d6eScindi 			break;
1127aec1d6eScindi 		default:
1137aec1d6eScindi 			units = " (unknown units)";
1147aec1d6eScindi 			break;
1157aec1d6eScindi 		}
1167aec1d6eScindi 
1177aec1d6eScindi 		if (valid) {
1187aec1d6eScindi 			mdb_printf("\tWatchdog timeout: %u%s\n", count,
1197aec1d6eScindi 			    units);
1207aec1d6eScindi 		} else {
1217aec1d6eScindi 			mdb_printf("\tInvalid Watchdog: Count %u, Base %u\n",
1227aec1d6eScindi 			    cntfld, basefld);
1237aec1d6eScindi 		}
1247aec1d6eScindi 	}
1257aec1d6eScindi 
1267aec1d6eScindi 	return (DCMD_OK);
1277aec1d6eScindi }
1287aec1d6eScindi 
1298a40a695Sgavinm static const char *ao_scrub_rate[] = {
1308a40a695Sgavinm 	"Do not scrub",		/* 0b00000 */
1318a40a695Sgavinm 	"40.0 nanosec",		/* 0b00001 */
1328a40a695Sgavinm 	"80.0 nanosec",		/* 0b00010 */
1338a40a695Sgavinm 	"160.0 nanosec",	/* 0b00011 */
1348a40a695Sgavinm 	"320.0 nanosec",	/* 0b00100 */
1358a40a695Sgavinm 	"640.0 nanosec",	/* 0b00101 */
1368a40a695Sgavinm 	"1.28 microsec",	/* 0b00110 */
1378a40a695Sgavinm 	"2.56 microsec",	/* 0b00111 */
1388a40a695Sgavinm 	"5.12 microsec",	/* 0b01000 */
1398a40a695Sgavinm 	"10.2 microsec",	/* 0b01001 */
1408a40a695Sgavinm 	"20.5 microsec",	/* 0b01010 */
1418a40a695Sgavinm 	"41.0 microsec",	/* 0b01011 */
1428a40a695Sgavinm 	"81.9 microsec",	/* 0b01100 */
1438a40a695Sgavinm 	"163.8 microsec",	/* 0b01101 */
1448a40a695Sgavinm 	"327.7 microsec",	/* 0b01110 */
1458a40a695Sgavinm 	"655.4 microsec",	/* 0b01111 */
1468a40a695Sgavinm 	"1.31 millsec",		/* 0b10000 */
1478a40a695Sgavinm 	"2.62 millsec",		/* 0b10001 */
1488a40a695Sgavinm 	"5.24 millsec",		/* 0b10010 */
1498a40a695Sgavinm 	"10.49 millsec",	/* 0b10011 */
1508a40a695Sgavinm 	"20.97 millsec",	/* 0b10100 */
1518a40a695Sgavinm 	"42.00 millsec",	/* 0b10101 */
1528a40a695Sgavinm 	"84.00 millsec",	/* 0b10110 */
1538a40a695Sgavinm };
1548a40a695Sgavinm 
1558a40a695Sgavinm #define	SCRUBCODE(val, low) ((val) >> low & 0x1f)
1568a40a695Sgavinm 
1578a40a695Sgavinm #define	SCRUBSTR(val, low) \
1588a40a695Sgavinm 	(SCRUBCODE(val, low) < sizeof (ao_scrub_rate) / sizeof (char *) ? \
1598a40a695Sgavinm 	ao_scrub_rate[SCRUBCODE(val, low)] : "reserved value!")
1608a40a695Sgavinm 
1618a40a695Sgavinm /*ARGSUSED*/
1628a40a695Sgavinm static int
ao_scrubctl_describe(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv)1638a40a695Sgavinm ao_scrubctl_describe(uintptr_t val, uint_t flags, int argc,
1648a40a695Sgavinm     const mdb_arg_t *argv)
1658a40a695Sgavinm {
1668a40a695Sgavinm 	if (argc != 0 || !(flags & DCMD_ADDRSPEC))
1678a40a695Sgavinm 		return (DCMD_USAGE);
1688a40a695Sgavinm 
1698a40a695Sgavinm 	mdb_printf("\tDcacheScrub: %s\n\t    L2Scrub: %s\n\t  DramScrub: %s\n",
1708a40a695Sgavinm 	    SCRUBSTR(val, 16), SCRUBSTR(val, 8), SCRUBSTR(val, 0));
1718a40a695Sgavinm 
1728a40a695Sgavinm 	return (DCMD_OK);
1738a40a695Sgavinm }
1748a40a695Sgavinm 
1758a40a695Sgavinm /*ARGSUSED*/
1768a40a695Sgavinm static int
ao_sparectl_describe(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv)1778a40a695Sgavinm ao_sparectl_describe(uintptr_t val, uint_t flags, int argc,
1788a40a695Sgavinm     const mdb_arg_t *argv)
1798a40a695Sgavinm {
1808a40a695Sgavinm 	const char *itypes[] = {
1818a40a695Sgavinm 		"No Interrupt",	/* 0b00 */
1828a40a695Sgavinm 		"Reserved",	/* 0b01 */
1838a40a695Sgavinm 		"SMI",		/* 0b10 */
1848a40a695Sgavinm 		"Reserved",	/* 0b11 */
1858a40a695Sgavinm 	};
1868a40a695Sgavinm 
1878a40a695Sgavinm 	if (argc != 0 || !(flags & DCMD_ADDRSPEC))
1888a40a695Sgavinm 		return (DCMD_USAGE);
1898a40a695Sgavinm 
1908a40a695Sgavinm 	mdb_printf(
1918a40a695Sgavinm 	    "\t  EccErrInt: %s\n"
1928a40a695Sgavinm 	    "\tSwapDoneInt: %s\n"
1938a40a695Sgavinm 	    "\t  BadDramCs: %d\n"
1948a40a695Sgavinm 	    "\t   SwapDone: %s\n"
1958a40a695Sgavinm 	    "\t     SwapEn: %s\n",
1968a40a695Sgavinm 	    itypes[val >> 14 & 0x3],
1978a40a695Sgavinm 	    itypes[val >> 12 & 0x3],
1988a40a695Sgavinm 	    val >> 4 & 0x7,
1998a40a695Sgavinm 	    val & 0x2 ? "Yes" : "No",
2008a40a695Sgavinm 	    val & 0x1 ? "Yes" : "No");
2018a40a695Sgavinm 
2028a40a695Sgavinm 	return (DCMD_OK);
2038a40a695Sgavinm }
2048a40a695Sgavinm 
2058a40a695Sgavinm static const char *ao_mcactl_dc[] = {
2068a40a695Sgavinm 	"ECCI (Single-bit ECC Data Errors)",
2078a40a695Sgavinm 	"ECCM (Multi-bit ECC Data Errors)",
2088a40a695Sgavinm 	"DECC (Data Array ECC Errors)",
2098a40a695Sgavinm 	"DMTP (Main Tag Array Parity Errors)",
2108a40a695Sgavinm 	"DSTP (Snoop Tag Array Parity Errors)",
2118a40a695Sgavinm 	"L1TP (L1 TLB Parity Errors)",
2128a40a695Sgavinm 	"L2TP (L2 TLB Parity Errors)",
2138a40a695Sgavinm };
2148a40a695Sgavinm 
2158a40a695Sgavinm static const char *ao_mcactl_ic[] = {
2168a40a695Sgavinm 	"ECCI (Single-bit ECC data errors)",
2178a40a695Sgavinm 	"ECCM (Multi-bit ECC data errors)",
2188a40a695Sgavinm 	"IDP (Data array parity errors)",
2198a40a695Sgavinm 	"IMTP (Main tag array parity errors)",
2208a40a695Sgavinm 	"ISTP (Snoop tag array parity errors)",
2218a40a695Sgavinm 	"L1TP (L1 TLB Parity Errors)",
2228a40a695Sgavinm 	"L2TP (L2 TLB Parity Errors)",
2238a40a695Sgavinm 	NULL,	/* reserved */
2248a40a695Sgavinm 	NULL,	/* reserved */
2258a40a695Sgavinm 	"RDDE (Read Data Errors)",
2268a40a695Sgavinm };
2278a40a695Sgavinm 
2288a40a695Sgavinm static const char *ao_mcactl_bu[] = {
2298a40a695Sgavinm 	"S_RDE_HP (System read data hardware prefetch)",
2308a40a695Sgavinm 	"S_RDE_TLB (System read data TLB reload)",
2318a40a695Sgavinm 	"S_RDE_ALL (All system read data)",
2328a40a695Sgavinm 	"S_ECC1_TLB (System data 1-bit ECC TLB reload)",
2338a40a695Sgavinm 	"S_ECC1_HP (System data 1-bit ECC hardware prefetch)",
2348a40a695Sgavinm 	"S_ECCM_TLB (System data multi-bit ECC TLB reload)",
2358a40a695Sgavinm 	"S_ECCM_HP (System data multi-bit ECC hardware prefetch)",
2368a40a695Sgavinm 	"L2T_PAR_ICDC (L2 tag array parity IC or DC fetch)",
2378a40a695Sgavinm 	"L2T_PAR_TLB (L2 tag array parity TLB reload)",
2388a40a695Sgavinm 	"L2T_PAR_SNP (L2 tag array parity snoop)",
2398a40a695Sgavinm 	"L2T_PAR_CPB (L2 tag array parity copyback)",
2408a40a695Sgavinm 	"L2T_PAR_SCR (L2 tag array parity scrub)",
2418a40a695Sgavinm 	"L2D_ECC1_TLB (L2 data array 1-bit ECC TLB reload)",
2428a40a695Sgavinm 	"L2D_ECC1_SNP (L2 data array 1-bit ECC snoop)",
2438a40a695Sgavinm 	"L2D_ECC1_CPB (L2 data array 1-bit ECC copyback)",
2448a40a695Sgavinm 	"L2D_ECCM_TLB (L2 data array multi-bit ECC TLB reload)",
2458a40a695Sgavinm 	"L2D_ECCM_SNP (L2 data array multi-bit ECC snoop)",
2468a40a695Sgavinm 	"L2D_ECCM_CPB (L2 data array multi-bit ECC copyback)",
2478a40a695Sgavinm 	"L2T_ECC1_SCR (L2 tag array 1-bit ECC Scrub)",
2488a40a695Sgavinm 	"L2T_ECCM_SCR (L2 tag array multi-bit ECC Scrub)",
2498a40a695Sgavinm };
2508a40a695Sgavinm 
2518a40a695Sgavinm static const char *ao_mcactl_ls[] = {
2528a40a695Sgavinm 	"S_RDE_L (Read Data Errors on Load)",
2538a40a695Sgavinm 	"S_RDE_S (Read Data Errors on Store)",
2548a40a695Sgavinm };
2558a40a695Sgavinm 
2568a40a695Sgavinm static const char *ao_mcactl_nb[] = {
2578a40a695Sgavinm 	"CorrEccEn (Correctable ECC Error Reporting Enable)",
2588a40a695Sgavinm 	"UnCorrEccEn (Uncorrectable ECC Error Reporting Enable)",
2598a40a695Sgavinm 	"CrcErr0En (HT Link 0 CRC Error Reporting Enable)",
2608a40a695Sgavinm 	"CrcErr1En (HT Link 1 CRC Error Reporting Enable)",
2618a40a695Sgavinm 	"CrcErr2En (HT Link 2 CRC Error Reporting Enable)",
2628a40a695Sgavinm 	"SyncPkt0En (HT Link 0 Sync Packet Error Reporting Enable)",
2638a40a695Sgavinm 	"SyncPkt1En (HT Link 1 Sync Packet Error Reporting Enable)",
2648a40a695Sgavinm 	"SyncPkt2En (HT Link 2 Sync Packet Error Reporting Enable)",
2658a40a695Sgavinm 	"MstrAbrtEn (Master Abort Error Reporting Enable)",
2668a40a695Sgavinm 	"TgtAbrtEn (Target Abort Error Reporting Enable)",
2678a40a695Sgavinm 	"GartTblWkEn (GART Table Walk Error Reporting Enable)",
2688a40a695Sgavinm 	"AtomicRMWEn (Atomic Read-Modify-Write Error Reporting Enable)",
2698a40a695Sgavinm 	"WchDogTmrEn (Watchdog Timer Error Reporting Enable)",
2708a40a695Sgavinm 	NULL,	/* reserved */
2718a40a695Sgavinm 	NULL,	/* reserved */
2728a40a695Sgavinm 	NULL,	/* reserved */
2738a40a695Sgavinm 	NULL,	/* reserved */
2748a40a695Sgavinm 	NULL,	/* reserved */
2758a40a695Sgavinm 	"DramParEn (DRAM Parity Error Reporting enable)",
2768a40a695Sgavinm };
2778a40a695Sgavinm 
2788a40a695Sgavinm static const struct ao_mcactl {
2798a40a695Sgavinm 	const char *bank_name;
2808a40a695Sgavinm 	const char **bank_ctlbits;
2818a40a695Sgavinm 	int bank_tblsz;
2828a40a695Sgavinm } ao_mcactls[] = {
2838a40a695Sgavinm 	{ "dc", &ao_mcactl_dc[0], sizeof (ao_mcactl_dc) / sizeof (char *) },
2848a40a695Sgavinm 	{ "ic", &ao_mcactl_ic[0], sizeof (ao_mcactl_ic) / sizeof (char *) },
2858a40a695Sgavinm 	{ "bu", &ao_mcactl_bu[0], sizeof (ao_mcactl_bu) / sizeof (char *) },
2868a40a695Sgavinm 	{ "ls", &ao_mcactl_ls[0], sizeof (ao_mcactl_ls) / sizeof (char *) },
2878a40a695Sgavinm 	{ "nb", &ao_mcactl_nb[0], sizeof (ao_mcactl_nb) / sizeof (char *) }
2888a40a695Sgavinm };
2898a40a695Sgavinm 
2908a40a695Sgavinm #define	AO_MCI_CTL	0x0
2918a40a695Sgavinm #define	AO_MCI_MASK	0x1
2928a40a695Sgavinm 
2938a40a695Sgavinm static int
ao_mci_ctlmask_common(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv,int which)2948a40a695Sgavinm ao_mci_ctlmask_common(uintptr_t val, uint_t flags, int argc,
2958a40a695Sgavinm     const mdb_arg_t *argv, int which)
2968a40a695Sgavinm {
2978a40a695Sgavinm 	uint64_t bank;
2988a40a695Sgavinm 	const char *bankname = NULL;
2998a40a695Sgavinm 	int i;
3008a40a695Sgavinm 
3018a40a695Sgavinm 	if (argc != 2 || !(flags & DCMD_ADDRSPEC))
3028a40a695Sgavinm 		return (DCMD_USAGE);
3038a40a695Sgavinm 
3048a40a695Sgavinm 	if (mdb_getopts(argc, argv,
3058a40a695Sgavinm 	    't', MDB_OPT_STR, &bankname, NULL) != 2)
3068a40a695Sgavinm 		return (DCMD_USAGE);
3078a40a695Sgavinm 
3088a40a695Sgavinm 	for (i = 0; i < AMD_MCA_BANK_COUNT; i++) {
3098a40a695Sgavinm 		if (strncmp(bankname, ao_mcactls[i].bank_name,
3108a40a695Sgavinm 		    2) == 0) {
3118a40a695Sgavinm 			bank = i;
3128a40a695Sgavinm 			break;
3138a40a695Sgavinm 		}
3148a40a695Sgavinm 	}
3158a40a695Sgavinm 
3168a40a695Sgavinm 	if (i == AMD_MCA_BANK_COUNT) {
3178a40a695Sgavinm 		mdb_warn("Valid bank names: dc, ic, bu, ls, nb\n");
3188a40a695Sgavinm 		return (DCMD_ERR);
3198a40a695Sgavinm 	}
3208a40a695Sgavinm 
3218a40a695Sgavinm 	mdb_printf("Reporting %s for %s:\n", which == AO_MCI_CTL ? "enables" :
3228a40a695Sgavinm 	    "masks", ao_mcactls[bank].bank_name);
3238a40a695Sgavinm 	mdb_printf("%3s %4s %s\n", "Bit", "Set?", "Description");
3248a40a695Sgavinm 
3258a40a695Sgavinm 	for (i = 0; i < 63; i++) {
3268a40a695Sgavinm 		int set = val & 0x1ULL << i;
3278a40a695Sgavinm 		int inrange = i < ao_mcactls[bank].bank_tblsz;
3288a40a695Sgavinm 		const char *desc = ao_mcactls[bank].bank_ctlbits[i];
3298a40a695Sgavinm 
3308a40a695Sgavinm 		if (inrange) {
3318a40a695Sgavinm 			int known = desc != NULL;
3328a40a695Sgavinm 
3338a40a695Sgavinm 			mdb_printf("%2d  %4s ", i, set ? "Yes" : "- ");
3348a40a695Sgavinm 			if (known)
3358a40a695Sgavinm 				mdb_printf("%s\n", desc);
3368a40a695Sgavinm 			else
3378a40a695Sgavinm 				mdb_printf("reserved%s\n",
3388a40a695Sgavinm 				    set ? " - but set!" : "");
3398a40a695Sgavinm 		} else if (set) {
3408a40a695Sgavinm 				mdb_printf("%2d  %4s Reserved - but set!\n",
3418a40a695Sgavinm 				    i, "Yes");
3428a40a695Sgavinm 		}
3438a40a695Sgavinm 	}
3448a40a695Sgavinm 
3458a40a695Sgavinm 	return (DCMD_OK);
3468a40a695Sgavinm }
3478a40a695Sgavinm 
3488a40a695Sgavinm /*ARGSUSED3*/
3498a40a695Sgavinm static int
ao_mci_ctl(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv)3508a40a695Sgavinm ao_mci_ctl(uintptr_t val, uint_t flags, int argc, const mdb_arg_t *argv)
3518a40a695Sgavinm {
3528a40a695Sgavinm 	return (ao_mci_ctlmask_common(val, flags, argc, argv, AO_MCI_CTL));
3538a40a695Sgavinm }
3548a40a695Sgavinm 
3558a40a695Sgavinm /*ARGSUSED3*/
3568a40a695Sgavinm static int
ao_mci_mask(uintptr_t val,uint_t flags,int argc,const mdb_arg_t * argv)3578a40a695Sgavinm ao_mci_mask(uintptr_t val, uint_t flags, int argc, const mdb_arg_t *argv)
3588a40a695Sgavinm {
3598a40a695Sgavinm 	return (ao_mci_ctlmask_common(val, flags, argc, argv, AO_MCI_MASK));
3608a40a695Sgavinm }
3618a40a695Sgavinm 
3627aec1d6eScindi static const mdb_dcmd_t dcmds[] = {
3637aec1d6eScindi 	{ "ao_nbcfg", ":", "decode Northbridge config bits",
3647aec1d6eScindi 	    ao_nbcfg_describe },
3658a40a695Sgavinm 	{ "ao_scrubctl", ":", "decode Scrub Control Register",
3668a40a695Sgavinm 	    ao_scrubctl_describe },
3678a40a695Sgavinm 	{ "ao_sparectl", ":", "decode Online Spare Control Register",
3688a40a695Sgavinm 	    ao_sparectl_describe },
3698a40a695Sgavinm 	{ "ao_mci_ctl", ":  -t <dc|ic|bu|ls|nb>",
3708a40a695Sgavinm 	    "decode MCi_CTL", ao_mci_ctl },
3718a40a695Sgavinm 	{ "ao_mci_mask", ":  -t <dc|ic|bu|ls|nb>",
3728a40a695Sgavinm 	    "decode MCi_MASK", ao_mci_mask },
3737aec1d6eScindi 	{ NULL }
3747aec1d6eScindi };
3757aec1d6eScindi 
3767aec1d6eScindi static const mdb_walker_t walkers[] = {
3777aec1d6eScindi 	{ NULL }
3787aec1d6eScindi };
3797aec1d6eScindi 
3807aec1d6eScindi static const mdb_modinfo_t modinfo = { MDB_API_VERSION, dcmds, walkers };
3817aec1d6eScindi 
3827aec1d6eScindi const mdb_modinfo_t *
_mdb_init(void)3837aec1d6eScindi _mdb_init(void)
3847aec1d6eScindi {
3857aec1d6eScindi 	return (&modinfo);
3867aec1d6eScindi }
387