1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21/*
22 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23 * Use is subject to license terms.
24 */
25
26#pragma dictionary "SUN4"
27
28/*
29 * Eversholt rules for the Fire nexus driver
30 */
31
32#define SW_FIT			5000	/* No real fit rate, SW */
33#define HV_FIT			5000	/* No real fit rate, SW */
34#define SW_HV_MISMATCH_FIT	20000	/* No real fit rate, SW */
35#define HB_FIT			400
36#define HBUS_FIT		400
37#define CPU_FIT			500
38#define PCI_DEV_FIT		1000
39#define PCIEX_DEV_FIT		1000
40#define EBUS_FIT		1000
41#define LINK_EVENTS_COUNT	10
42#define LINK_EVENTS_TIME	1h
43#define	CE_EVENTS_COUNT		10
44#define	CE_EVENTS_TIME		1h
45
46/*
47 * Macros for CE Fabric ereports
48 *
49 * The current kernel sends ereports with a severity of PF_CE and PF_NO_ERROR.
50 * However, a simple change in the kernel may end up sending only a severity
51 * of PF_CE for CE errors. Since both methods are correct, we match on
52 * an ereport severity of either PF_CE only or PF_CE plus PF_NO_ERROR.
53 */
54#define	PF_NO_ERROR (1 << 0)
55#define	PF_CE (1 << 1)
56#define	MATCH_CE ((payloadprop("severity") == PF_CE) || \
57    (payloadprop("severity") == (PF_CE | PF_NO_ERROR)))
58
59
60#define MATCH_UNRECOGNIZED ((payloadprop("sysino") == 0) && \
61    (payloadprop("ehdl") == 0) && \
62    (payloadprop("stick") == 0))
63
64/*
65 * Test for primary or secondary ereports
66 */
67#define IS_PRIMARY (payloadprop("primary"))
68#define IS_SECONDARY (! payloadprop("primary"))
69
70/*
71 * payload: imu-rds
72 *
73 * Extract the request id, the BDF, value in the IMU RDS log register
74 * Example:
75 *   0x7766554433221100
76 *         ^^^^
77 */
78#define IMU_MATCH_BDF(b, d, f) \
79	( IS_PRIMARY && ((payloadprop("imu-rds") >> 32) & 0xFFFF) == \
80		((b << 8) | (d << 3) | f))
81
82/***************
83 * JBC ereports
84 ***************/
85event ereport.io.fire.jbc.ape@hostbridge/pciexrc{within(5s)};
86event ereport.io.fire.jbc.bjc@hostbridge/pciexrc{within(5s)};
87event ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc{within(5s)};
88event ereport.io.fire.jbc.cpe@hostbridge/pciexrc{within(5s)};
89event ereport.io.fire.jbc.ebus_to@hostbridge/pciexrc{within(5s)};
90event ereport.io.fire.jbc.ebus_to@hostbridge{within(5s)};
91event ereport.io.fire.jbc.icise@hostbridge/pciexrc{within(5s)};
92event ereport.io.fire.jbc.ijp@hostbridge/pciexrc{within(5s)};
93event ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc{within(5s)};
94event ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc{within(5s)};
95event ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc{within(5s)};
96event ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc{within(5s)};
97event ereport.io.fire.jbc.jbe@hostbridge/pciexrc{within(5s)};
98event ereport.io.fire.jbc.jtceei@hostbridge/pciexrc{within(5s)};
99event ereport.io.fire.jbc.jtceer@hostbridge/pciexrc{within(5s)};
100event ereport.io.fire.jbc.jtceew@hostbridge/pciexrc{within(5s)};
101event ereport.io.fire.jbc.jte@hostbridge/pciexrc{within(5s)};
102event ereport.io.fire.jbc.jue@hostbridge/pciexrc{within(5s)};
103event ereport.io.fire.jbc.mb_pea@hostbridge/pciexrc{within(5s)};
104event ereport.io.fire.jbc.mb_per@hostbridge/pciexrc{within(5s)};
105event ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc{within(5s)};
106event ereport.io.fire.jbc.pio_cpe@hostbridge/pciexrc{within(5s)};
107event ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc{within(5s)};
108event ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc{within(5s)};
109event ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc{within(5s)};
110event ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc{within(5s)};
111event ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc{within(5s)};
112event ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc{within(5s)};
113event ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc{within(5s)};
114event ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc{within(5s)};
115
116/***************
117 * DMC ereports
118 ***************/
119event ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc{within(5s)};
120event ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc{within(5s)};
121event ereport.io.fire.dmc.eq_over@hostbridge/pciexrc{within(5s)};
122event ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc{within(5s)};
123event ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{within(5s)};
124event ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc{within(5s)};
125event ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc{within(5s)};
126event ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc{within(5s)};
127event ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc{within(5s)};
128event ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc{within(5s)};
129event ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc{within(5s)};
130event ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc{within(5s)};
131event ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc{within(5s)};
132event ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc{within(5s)};
133event ereport.io.fire.dmc.trn_err@hostbridge/pciexrc{within(5s)};
134event ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc{within(5s)};
135event ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc{within(5s)};
136
137/***************
138 * TLU Other Event ereports
139 ***************/
140event ereport.io.fire.pec.crs@hostbridge/pciexrc{within(5s)};
141event ereport.io.fire.pec.edp@hostbridge/pciexrc{within(5s)};
142event ereport.io.fire.pec.ehp@hostbridge/pciexrc{within(5s)};
143event ereport.io.fire.pec.eip@hostbridge/pciexrc{within(5s)};
144event ereport.io.fire.pec.erp@hostbridge/pciexrc{within(5s)};
145event ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc{within(5s)};
146event ereport.io.fire.pec.iip@hostbridge/pciexrc{within(5s)};
147event ereport.io.fire.pec.ldn@hostbridge/pciexrc{within(5s)};
148event ereport.io.fire.pec.lin@hostbridge/pciexrc{within(5s)};
149event ereport.io.fire.pec.lrs@hostbridge/pciexrc{within(5s)};
150event ereport.io.fire.pec.lup@hostbridge/pciexrc{within(5s)};
151event ereport.io.fire.pec.mrc@hostbridge/pciexrc{within(5s)};
152
153/***************
154 * Fire Fabric ereport
155 * -------------
156 * Whenever a leaf device sends an error message (fatal, non-fatal, or CE) to
157 * root complex, the nexus driver publishes this ereport to log the ereport.
158 ***************/
159event ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn {within(1s)};
160event ereport.io.fire.fabric@pcibus/pcidev/pcifn {within(1s)};
161event error.io.fire.fabric-sib@hostbridge/pciexrc;
162event error.io.fire.fabric@pciexbus/pciexdev/pciexfn;
163event error.io.fire.fabric@pcibus/pcidev/pcifn;
164
165/***************
166 * sun4v unknown error packets
167 * -------------
168 * In a sun4v system, if HV sends an epkt to the guest the following wrong
169 * things can happen.
170 * o HV sends malformed epkt
171 * o Guest has coding error and doesn't understand epkt
172 * o HV and Guest are out of sync.
173 ***************/
174event ereport.io.fire.epkt@hostbridge/pciexrc {within(5s)};
175event ereport.io.fire.epkt@hostbridge {within(5s)};
176
177/******************************
178 * Generic Rules Begin Here   *
179 ******************************/
180
181/***************
182 * Fire Asic HW error
183 * -------------
184 * Errors caused by parity or unexpected behaviors in the asic.
185 ***************/
186fru hostbridge/pciexrc;
187asru hostbridge/pciexrc;
188event fault.io.fire.asic@hostbridge/pciexrc,
189    FITrate=HB_FIT,
190    ASRU=hostbridge/pciexrc,
191    FRU=hostbridge/pciexrc;
192
193event error.io.fire.jbc.asic@hostbridge/pciexrc;
194event error.io.fire.dmc.asic@hostbridge/pciexrc;
195event error.io.fire.pec.asic@hostbridge/pciexrc;
196
197prop fault.io.fire.asic@hostbridge/pciexrc (0)->
198    error.io.fire.jbc.asic@hostbridge/pciexrc,
199    error.io.fire.dmc.asic@hostbridge/pciexrc,
200    error.io.fire.pec.asic@hostbridge/pciexrc;
201
202/***************
203 * Fire PX SW/HV error
204 * -------------
205 * Errors caused by bad SW or HV
206 ***************/
207event fault.io.fire.sw-epkt@hostbridge/pciexrc, retire=0, response=0,
208    FITrate=SW_FIT;
209event fault.io.fire.fw-epkt@hostbridge/pciexrc, retire=0, response=0,
210    FITrate=HV_FIT;
211event fault.io.fire.sw-fw-mismatch@hostbridge/pciexrc, retire=0, response=0,
212    FITrate=SW_HV_MISMATCH_FIT;
213event fault.io.fire.sw-epkt@hostbridge, retire=0, response=0,
214    FITrate=SW_FIT;
215event fault.io.fire.fw-epkt@hostbridge, retire=0, response=0,
216    FITrate=HV_FIT;
217event fault.io.fire.sw-fw-mismatch@hostbridge, retire=0, response=0,
218    FITrate=SW_HV_MISMATCH_FIT;
219event fault.io.fire.hb.sw-config@hostbridge/pciexrc, retire=0, response=0,
220    FITrate=SW_FIT;
221event fault.io.fire.dmc.sw-algorithm@hostbridge/pciexrc, retire=0, response=0,
222    FITrate=SW_FIT;
223event fault.io.fire.dmc.sw-state@hostbridge/pciexrc, retire=0, response=0,
224    FITrate=SW_FIT;
225event fault.io.fire.pec.sw-algorithm@hostbridge/pciexrc, retire=0, response=0,
226    FITrate=SW_FIT;
227
228event error.io.fire.jbc.driver@hostbridge/pciexrc;
229event error.io.fire.dmc.driver@hostbridge/pciexrc;
230event error.io.fire.dmc.bad_state@hostbridge/pciexrc;
231
232prop fault.io.fire.sw-epkt@hostbridge/pciexrc,
233	fault.io.fire.fw-epkt@hostbridge/pciexrc,
234	fault.io.fire.sw-fw-mismatch@hostbridge/pciexrc->(A)
235    ereport.io.fire.epkt@hostbridge/pciexrc { MATCH_UNRECOGNIZED };
236
237prop fault.io.fire.sw-epkt@hostbridge,
238	fault.io.fire.fw-epkt@hostbridge,
239	fault.io.fire.sw-fw-mismatch@hostbridge->(A)
240    ereport.io.fire.epkt@hostbridge { MATCH_UNRECOGNIZED };
241
242prop fault.io.fire.hb.sw-config@hostbridge/pciexrc (0)->
243    error.io.fire.jbc.driver@hostbridge/pciexrc;
244
245prop fault.io.fire.dmc.sw-algorithm@hostbridge/pciexrc (0)->
246    error.io.fire.dmc.driver@hostbridge/pciexrc;
247
248prop fault.io.fire.dmc.sw-state@hostbridge/pciexrc (0)->
249    error.io.fire.dmc.bad_state@hostbridge/pciexrc;
250
251/***************
252 * PCI-E/PCI device fault and SW defects
253 ***************/
254fru pciexbus/pciexdev;
255asru pciexbus/pciexdev/pciexfn;
256event fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn,
257    FRU=pciexbus/pciexdev,
258    ASRU=pciexbus/pciexdev/pciexfn,
259    FITrate=PCIEX_DEV_FIT;
260
261fru pcibus/pcidev;
262asru pcibus/pcidev/pcifn;
263event fault.io.fire.pci.device@pcibus/pcidev/pcifn,
264    FITrate=PCI_DEV_FIT,
265    FRU=pcibus/pcidev,
266    ASRU=pcibus/pcidev/pcifn;
267
268/******************************
269 * JBC Rules Begin Here       *
270 ******************************/
271
272/***************
273 * EBUS fault
274 * -------------
275 * Errors involving the ebus
276 ***************/
277fru hostbridge/pciexrc;
278asru hostbridge/pciexrc;
279event fault.io.ebus@hostbridge/pciexrc,
280    FITrate=EBUS_FIT,
281    FRU=hostbridge/pciexrc,
282    ASRU=hostbridge/pciexrc;
283
284/*
285 * A faulty ebus can cause ebus timeout ebus_to
286 * ebus_to   ereport:
287 *   sun4v: The fmri of the ereport is ioboard/hostbridge
288 *   sun4u: The fmri of the ereport is pciexrc
289 */
290prop fault.io.ebus@hostbridge/pciexrc (1)->
291    ereport.io.fire.jbc.ebus_to@hostbridge,
292    ereport.io.fire.jbc.ebus_to@hostbridge/pciexrc;
293
294/***************
295 * Fire Asic HW error
296 * -------------
297 * Errors caused by parity or unexpected behaviors in the asic.
298 ***************/
299prop error.io.fire.jbc.asic@hostbridge/pciexrc (1)->
300    ereport.io.fire.jbc.cpe@hostbridge/pciexrc,
301    ereport.io.fire.jbc.mb_pea@hostbridge/pciexrc,
302    ereport.io.fire.jbc.mb_per@hostbridge/pciexrc,
303    ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc,
304    ereport.io.fire.jbc.pio_cpe@hostbridge/pciexrc,
305    ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc;
306
307/***************
308 * JBC Hostbus Link Errors
309 * -------------
310 * Possible Parity Errors caused by bad links traces or cables.
311 * For instance on Ontarios there is a flex cable.  For Chicagos
312 * it could be the link trace between the CPU and Fire.
313 ***************/
314event error.io.fire.jbc.bad_link@hostbridge/pciexrc;
315
316prop error.io.fire.jbc.bad_link@hostbridge/pciexrc (1)->
317    ereport.io.fire.jbc.ape@hostbridge/pciexrc,
318    ereport.io.fire.jbc.bjc@hostbridge/pciexrc,
319    ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc,
320    ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc;
321
322/***************
323 * JBC Hostbus Errors
324 * -------------
325 * Errors being returned from the hostbus side and detected by fire asic.
326 ***************/
327fru hostbridge/pciexrc;
328asru hostbridge/pciexrc;
329event fault.io.fire.hbus@hostbridge/pciexrc,
330    FITrate=HBUS_FIT,
331    FRU=hostbridge/pciexrc,
332    ASRU=hostbridge/pciexrc;
333
334prop fault.io.fire.hbus@hostbridge/pciexrc (0)->
335    error.io.fire.jbc.bad_link@hostbridge/pciexrc,
336    ereport.io.fire.jbc.icise@hostbridge/pciexrc,
337    ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc,
338    ereport.io.fire.jbc.jtceei@hostbridge/pciexrc,
339    ereport.io.fire.jbc.jtceer@hostbridge/pciexrc,
340    ereport.io.fire.jbc.jtceew@hostbridge/pciexrc;
341
342/***************
343 * JBC Datapath Errors
344 * -------------
345 * Errors resulting from the datapath of the hostbus and detected by fire asic.
346 ***************/
347fru cmp;
348asru cmp;
349event fault.io.fire.datapath@cmp,
350    FITrate=CPU_FIT,
351    FRU=cmp,
352    ASRU=cmp;
353
354prop fault.io.fire.datapath@cmp (0)->
355    error.io.fire.jbc.bad_link@hostbridge/pciexrc;
356
357/* Duplicate the above fault prop for cpumodule */
358fru cpumodule/cpu;
359asru cpumodule/cpu;
360event fault.io.fire.datapath@cpumodule/cpu,
361    FITrate=CPU_FIT,
362    FRU=cpumodule/cpu,
363    ASRU=cpumodule/cpu;
364
365prop fault.io.fire.datapath@cpumodule/cpu (0)->
366    error.io.fire.jbc.bad_link@hostbridge/pciexrc,
367    ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc;
368
369/***************
370 * Fire driver is at fault.
371 * -------------
372 * The px driver should not have been in this state.  Defect the px driver.
373 ***************/
374prop error.io.fire.jbc.driver@hostbridge/pciexrc (1)->
375    ereport.io.fire.jbc.ijp@hostbridge/pciexrc,
376    ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc,
377    ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc,
378    ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc,
379    ereport.io.fire.jbc.jue@hostbridge/pciexrc,
380    ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc,
381    ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc;
382
383
384/******************************
385 * DMC Rules Begin Here       *
386 ******************************/
387
388/***************
389 * Fire PX SW error
390 * -------------
391 * Errors caused by bad SW
392 ***************/
393prop error.io.fire.dmc.driver@hostbridge/pciexrc (1)->
394    ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc;
395
396/***************
397 * Unexpected Fire State
398 * -------------
399 * The px driver should not have been in this state.  Defect the px driver.
400 ***************/
401event error.io.fire.dmc.bad_state-mmu@hostbridge/pciexrc;
402
403prop error.io.fire.dmc.bad_state@hostbridge/pciexrc (1)->
404    ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc,
405    ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc,
406    ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc,
407    ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc,
408    ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc,
409    ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc,
410    ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc;
411
412prop error.io.fire.dmc.bad_state-mmu@hostbridge/pciexrc (1)->
413    ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc,
414    ereport.io.fire.dmc.trn_err@hostbridge/pciexrc;
415
416/***************
417 * Fire Asic HW error
418 * -------------
419 * Errors caused by parity or unexpected behaviors in the asic.
420 ***************/
421event error.io.fire.dmc.bad_parity@hostbridge/pciexrc;
422
423prop error.io.fire.dmc.asic@hostbridge/pciexrc (1)->
424    error.io.fire.dmc.bad_parity@hostbridge/pciexrc,
425    ereport.io.fire.dmc.eq_over@hostbridge/pciexrc;
426
427/***************
428 * Parity errors caused by dmc
429 * -------------
430 * Fire asic error.
431 ***************/
432event error.io.fire.dmc.bad_parity-mmu@hostbridge/pciexrc;
433
434prop error.io.fire.dmc.bad_parity@hostbridge/pciexrc (1)->
435    ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc;
436
437prop error.io.fire.dmc.bad_parity-mmu@hostbridge/pciexrc (1)->
438    ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc,
439    ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc,
440    ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc;
441
442/***************
443 * Malformed MSI
444 * -------------
445 * A non-compliant PCIe/PCI device sent a malformed MSI.
446 ***************/
447prop fault.io.fire.pciex.device@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) ->
448    ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc
449        {
450            IMU_MATCH_BDF(b, d, f) &&
451            is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
452        };
453prop fault.io.fire.pci.device@pcibus[b]/pcidev[d]/pcifn[f] (0) ->
454    ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc
455        {
456            IMU_MATCH_BDF(b, d, f) &&
457            is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
458        };
459
460/***************
461 * Event queue overflow
462 * -------------
463 * Since we don't know which devices are sending too many EQ's, we must
464 * indict Fire asic and all PCIe/PCI devices
465 ***************/
466#define PROP_PLAT_FRU "FRU"
467#define GET_HB_FRU (confprop(asru(hostbridge/pciexrc), PROP_PLAT_FRU))
468#define GET_PCIE_FRU (confprop(asru(pciexbus[b]/pciexdev[d]/pciexfn[0]), PROP_PLAT_FRU))
469#define GET_PCI_FRU (confprop(asru(pcibus[b]/pcidev[d]/pcifn[0]), PROP_PLAT_FRU))
470
471prop fault.io.fire.pciex.device@pciexbus[b]/pciexdev[d]/pciexfn[0] (0) ->
472    ereport.io.fire.dmc.eq_over@hostbridge/pciexrc
473        {
474            /*
475             * Indict PCI-E FRU(s) under this root complex excluding the
476             * one that the Fire ASIC resides on.
477             */
478            is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[0]) &&
479	    (GET_HB_FRU != GET_PCIE_FRU)
480        };
481
482prop fault.io.fire.pci.device@pcibus[b]/pcidev[d]/pcifn[0] (0) ->
483    ereport.io.fire.dmc.eq_over@hostbridge/pciexrc
484        {
485            /*
486             * Indict PCI FRU(s) under this root complex excluding the
487             * one that the Fire ASIC resides on.
488             */
489            is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[0]) &&
490	    (GET_HB_FRU != GET_PCI_FRU)
491        };
492
493/***************
494 * Secondary errors
495 * -------------
496 * These are errors that require logs to be diagnosable.  Secondary errors
497 * do not have logs so, just propagate them to no-diag.
498 ***************/
499event error.io.fire.dmc.secondary@hostbridge/pciexrc;
500
501prop error.io.fire.dmc.secondary@hostbridge/pciexrc (0) ->
502    ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{ IS_SECONDARY };
503
504/******************************
505 * PEC Rules Begin Here       *
506 ******************************/
507
508event error.io.fire.pec.buffer-parity@hostbridge/pciexrc;
509event error.io.fire.pec.adjacentnode@hostbridge/pciexrc ;
510
511/***************
512 * Fire PX SW error
513 * -------------
514 * Errors caused by bad SW
515 ***************/
516
517prop fault.io.fire.pec.sw-algorithm@hostbridge/pciexrc (0) ->
518    ereport.io.fire.pec.crs@hostbridge/pciexrc,
519    ereport.io.fire.pec.mrc@hostbridge/pciexrc;
520
521/***************
522 * Fire Asic HW error
523 * -------------
524 * Errors caused by parity or unexpected behaviors in the asic.
525 ***************/
526prop error.io.fire.pec.asic@hostbridge/pciexrc (1)->
527    error.io.fire.pec.buffer-parity@hostbridge/pciexrc,
528    error.io.fire.pec.adjacentnode@hostbridge/pciexrc;
529
530prop error.io.fire.pec.buffer-parity@hostbridge/pciexrc (1) ->
531    ereport.io.fire.pec.edp@hostbridge/pciexrc,
532    ereport.io.fire.pec.ehp@hostbridge/pciexrc,
533    ereport.io.fire.pec.eip@hostbridge/pciexrc,
534    ereport.io.fire.pec.erp@hostbridge/pciexrc,
535    ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc,
536    ereport.io.fire.pec.iip@hostbridge/pciexrc;
537
538/***************
539 * Failed Links
540 * -------------
541 * They will cause the fabric to be scanned and a fire.fabric ereport
542 * for the suspected devices will be sent.  Do no diagnose these
543 * ereports and let the fire.fabric ereport be diagnosed.
544 ***************/
545event ereport.io.fire.link-events-trip@hostbridge/pciexrc ;
546
547engine serd.io.fire.link-events@hostbridge/pciexrc,
548    N=LINK_EVENTS_COUNT, T=LINK_EVENTS_TIME, method=persistent,
549    trip=ereport.io.fire.link-events-trip@hostbridge/pciexrc ;
550
551event upset.io.fire.link-events@hostbridge/pciexrc,
552    engine=serd.io.fire.link-events@hostbridge/pciexrc ;
553
554event error.io.fire.link-events@hostbridge/pciexrc;
555
556prop upset.io.fire.link-events@hostbridge/pciexrc (0)->
557    error.io.fire.link-events@hostbridge/pciexrc;
558
559prop error.io.fire.link-events@hostbridge/pciexrc (1)->
560    ereport.io.fire.pec.lrs@hostbridge/pciexrc,
561    ereport.io.fire.pec.ldn@hostbridge/pciexrc;
562
563
564/*
565 * Fault at the adjacent node which is right below the Fire ASIC
566 */
567fru hostbridge/pciexrc/pciexbus/pciexdev;
568asru hostbridge/pciexrc/pciexbus/pciexdev/pciexfn;
569event fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn,
570    FITrate=HB_FIT, FRU=hostbridge/pciexrc/pciexbus/pciexdev,
571    ASRU=hostbridge/pciexrc/pciexbus/pciexdev/pciexfn;
572
573prop fault.io.fire.asic@hostbridge/pciexrc (0) ->
574    error.io.fire.pec.adjacentnode@hostbridge/pciexrc;
575
576prop fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn
577(0) ->
578    error.io.fire.pec.adjacentnode@hostbridge/pciexrc
579        {
580            is_under(hostbridge/pciexrc,
581                     hostbridge/pciexrc/pciexbus/pciexdev/pciexfn)
582        };
583
584prop error.io.fire.pec.adjacentnode@hostbridge/pciexrc (0) ->
585    ereport.io.fire.link-events-trip@hostbridge/pciexrc;
586
587
588/******************************
589 * Fabric Rules Begin Here       *
590 ******************************/
591
592/***************
593 * fire.fabric rules
594 * -------------
595 * Below rules are so we get a single suspect list in 1 fault with percentage
596 * of indiction being equal among all the suspect FRUs
597 ***************/
598prop fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn (0) ->
599	error.io.fire.fabric@pciexbus/pciexdev/pciexfn;
600
601prop fault.io.fire.pci.device@pcibus/pcidev/pcifn (0) ->
602	error.io.fire.fabric@pcibus/pcidev/pcifn;
603
604prop error.io.fire.fabric@pciexbus/pciexdev/pciexfn (1) ->
605	ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn { !MATCH_CE };
606
607prop error.io.fire.fabric@pcibus/pcidev/pcifn (1) ->
608	ereport.io.fire.fabric@pcibus/pcidev/pcifn;
609
610prop error.io.fire.fabric-sib@hostbridge/pciexrc (0) ->
611	ereport.io.fire.fabric@pciexbus/pciexdev/pciexfn {
612		is_under(hostbridge/pciexrc, pciexbus/pciexdev/pciexfn) && !MATCH_CE
613	};
614
615prop error.io.fire.fabric-sib@hostbridge/pciexrc (0) ->
616	ereport.io.fire.fabric@pcibus/pcidev/pcifn {
617		is_under(hostbridge/pciexrc, pcibus/pcidev/pcifn)
618	};
619
620prop error.io.fire.fabric@pciexbus/pciexdev/pciexfn (1) ->
621	error.io.fire.fabric-sib@hostbridge/pciexrc {
622		is_under(hostbridge/pciexrc, pciexbus/pciexdev/pciexfn)
623	};
624
625prop error.io.fire.fabric@pcibus/pcidev/pcifn (1) ->
626	error.io.fire.fabric-sib@hostbridge/pciexrc {
627		is_under(hostbridge/pciexrc, pcibus/pcidev/pcifn)
628	};
629
630event upset.io.fire.fabric@pciexbus/pciexdev/pciexfn{within(1s)};
631event ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn{within(1s)};
632
633/* SERD CEs */
634prop upset.io.fire.fabric@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) ->
635	ereport.io.fire.fabric@pciexbus[b]/pciexdev[d]/pciexfn[f]
636	    { MATCH_CE };
637
638event upset.io.fire.fabric@pciexbus/pciexdev/pciexfn,
639    engine=serd.io.fire.fabric@pciexbus/pciexdev/pciexfn;
640
641engine serd.io.fire.fabric@pciexbus/pciexdev/pciexfn,
642    N=CE_EVENTS_COUNT, T=CE_EVENTS_TIME, method=persistent,
643    trip=ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn;
644
645prop fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn (0) ->
646	ereport.io.fire.pciex.ce@pciexbus/pciexdev/pciexfn;
647
648/***************
649 * Upsets
650 * -------------
651 * Used to hide ereports that are not currently diagnose or should not be
652 * diagnosed
653 ***************/
654event upset.io.fire.nodiag@hostbridge/pciexrc;
655event error.io.fire.dmc.nodiag@hostbridge/pciexrc;
656
657prop error.io.fire.dmc.nodiag@hostbridge/pciexrc (1)->
658    ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc;
659
660prop upset.io.fire.nodiag@hostbridge/pciexrc (0)->
661    ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc, /* CPU */
662    ereport.io.fire.jbc.jbe@hostbridge/pciexrc, /* CPU */
663    ereport.io.fire.jbc.jte@hostbridge/pciexrc, /* CPU */
664    ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc, /* CPU */
665    ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc, /* CPU */
666    ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc, /* CPU */
667    ereport.io.fire.pec.lin@hostbridge/pciexrc,
668    ereport.io.fire.pec.lup@hostbridge/pciexrc,
669    error.io.fire.dmc.nodiag@hostbridge/pciexrc,
670    error.io.fire.dmc.secondary@hostbridge/pciexrc,
671    ereport.io.fire.epkt@hostbridge { !MATCH_UNRECOGNIZED },
672    ereport.io.fire.epkt@hostbridge/pciexrc { !MATCH_UNRECOGNIZED };
673