xref: /illumos-gate/usr/src/cmd/cxgbetool/cudbg_view_entity.h

/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright (c) 2019 by Chelsio Communications, Inc.
 */

#ifndef __CUDBG_VIEW_ENTITY_H__
#define __CUDBG_VIEW_ENTITY_H__

#include "cudbg_entity.h"

static const char * const memory[] = { "EDC0:", "EDC1:", "MC:",
	"MC0:", "MC1:", "HMA:"};

static const char * const lb_stat_name[] = {
	"OctetsOK:", "FramesOK:", "BcastFrames:", "McastFrames:",
	"UcastFrames:", "ErrorFrames:", "Frames64:", "Frames65To127:",
	"Frames128To255:", "Frames256To511:", "Frames512To1023:",
	"Frames1024To1518:", "Frames1519ToMax:", "FramesDropped:",
	"BG0FramesDropped:", "BG1FramesDropped:", "BG2FramesDropped:",
	"BG3FramesDropped:", "BG0FramesTrunc:", "BG1FramesTrunc:",
	"BG2FramesTrunc:", "BG3FramesTrunc:"
};


static struct field_desc tp_la0[] = {
	{ "RcfOpCodeOut", 60, 4 },
	{ "State", 56, 4 },
	{ "WcfState", 52, 4 },
	{ "RcfOpcSrcOut", 50, 2 },
	{ "CRxError", 49, 1 },
	{ "ERxError", 48, 1 },
	{ "SanityFailed", 47, 1 },
	{ "SpuriousMsg", 46, 1 },
	{ "FlushInputMsg", 45, 1 },
	{ "FlushInputCpl", 44, 1 },
	{ "RssUpBit", 43, 1 },
	{ "RssFilterHit", 42, 1 },
	{ "Tid", 32, 10 },
	{ "InitTcb", 31, 1 },
	{ "LineNumber", 24, 7 },
	{ "Emsg", 23, 1 },
	{ "EdataOut", 22, 1 },
	{ "Cmsg", 21, 1 },
	{ "CdataOut", 20, 1 },
	{ "EreadPdu", 19, 1 },
	{ "CreadPdu", 18, 1 },
	{ "TunnelPkt", 17, 1 },
	{ "RcfPeerFin", 16, 1 },
	{ "RcfReasonOut", 12, 4 },
	{ "TxCchannel", 10, 2 },
	{ "RcfTxChannel", 8, 2 },
	{ "RxEchannel", 6, 2 },
	{ "RcfRxChannel", 5, 1 },
	{ "RcfDataOutSrdy", 4, 1 },
	{ "RxDvld", 3, 1 },
	{ "RxOoDvld", 2, 1 },
	{ "RxCongestion", 1, 1 },
	{ "TxCongestion", 0, 1 },
	{ NULL }
};

static struct field_desc tp_la1[] = {
	{ "CplCmdIn", 56, 8 },
	{ "CplCmdOut", 48, 8 },
	{ "ESynOut", 47, 1 },
	{ "EAckOut", 46, 1 },
	{ "EFinOut", 45, 1 },
	{ "ERstOut", 44, 1 },
	{ "SynIn", 43, 1 },
	{ "AckIn", 42, 1 },
	{ "FinIn", 41, 1 },
	{ "RstIn", 40, 1 },
	{ "DataIn", 39, 1 },
	{ "DataInVld", 38, 1 },
	{ "PadIn", 37, 1 },
	{ "RxBufEmpty", 36, 1 },
	{ "RxDdp", 35, 1 },
	{ "RxFbCongestion", 34, 1 },
	{ "TxFbCongestion", 33, 1 },
	{ "TxPktSumSrdy", 32, 1 },
	{ "RcfUlpType", 28, 4 },
	{ "Eread", 27, 1 },
	{ "Ebypass", 26, 1 },
	{ "Esave", 25, 1 },
	{ "Static0", 24, 1 },
	{ "Cread", 23, 1 },
	{ "Cbypass", 22, 1 },
	{ "Csave", 21, 1 },
	{ "CPktOut", 20, 1 },
	{ "RxPagePoolFull", 18, 2 },
	{ "RxLpbkPkt", 17, 1 },
	{ "TxLpbkPkt", 16, 1 },
	{ "RxVfValid", 15, 1 },
	{ "SynLearned", 14, 1 },
	{ "SetDelEntry", 13, 1 },
	{ "SetInvEntry", 12, 1 },
	{ "CpcmdDvld", 11, 1 },
	{ "CpcmdSave", 10, 1 },
	{ "RxPstructsFull", 8, 2 },
	{ "EpcmdDvld", 7, 1 },
	{ "EpcmdFlush", 6, 1 },
	{ "EpcmdTrimPrefix", 5, 1 },
	{ "EpcmdTrimPostfix", 4, 1 },
	{ "ERssIp4Pkt", 3, 1 },
	{ "ERssIp6Pkt", 2, 1 },
	{ "ERssTcpUdpPkt", 1, 1 },
	{ "ERssFceFipPkt", 0, 1 },
	{ NULL }
};

static struct field_desc tp_la2[] = {
	{ "CplCmdIn", 56, 8 },
	{ "MpsVfVld", 55, 1 },
	{ "MpsPf", 52, 3 },
	{ "MpsVf", 44, 8 },
	{ "SynIn", 43, 1 },
	{ "AckIn", 42, 1 },
	{ "FinIn", 41, 1 },
	{ "RstIn", 40, 1 },
	{ "DataIn", 39, 1 },
	{ "DataInVld", 38, 1 },
	{ "PadIn", 37, 1 },
	{ "RxBufEmpty", 36, 1 },
	{ "RxDdp", 35, 1 },
	{ "RxFbCongestion", 34, 1 },
	{ "TxFbCongestion", 33, 1 },
	{ "TxPktSumSrdy", 32, 1 },
	{ "RcfUlpType", 28, 4 },
	{ "Eread", 27, 1 },
	{ "Ebypass", 26, 1 },
	{ "Esave", 25, 1 },
	{ "Static0", 24, 1 },
	{ "Cread", 23, 1 },
	{ "Cbypass", 22, 1 },
	{ "Csave", 21, 1 },
	{ "CPktOut", 20, 1 },
	{ "RxPagePoolFull", 18, 2 },
	{ "RxLpbkPkt", 17, 1 },
	{ "TxLpbkPkt", 16, 1 },
	{ "RxVfValid", 15, 1 },
	{ "SynLearned", 14, 1 },
	{ "SetDelEntry", 13, 1 },
	{ "SetInvEntry", 12, 1 },
	{ "CpcmdDvld", 11, 1 },
	{ "CpcmdSave", 10, 1 },
	{ "RxPstructsFull", 8, 2 },
	{ "EpcmdDvld", 7, 1 },
	{ "EpcmdFlush", 6, 1 },
	{ "EpcmdTrimPrefix", 5, 1 },
	{ "EpcmdTrimPostfix", 4, 1 },
	{ "ERssIp4Pkt", 3, 1 },
	{ "ERssIp6Pkt", 2, 1 },
	{ "ERssTcpUdpPkt", 1, 1 },
	{ "ERssFceFipPkt", 0, 1 },
	{ NULL }
};

static const char * const devlog_level_strings[] = {
	/*[FW_DEVLOG_LEVEL_EMERG]	=*/ "EMERG",
	/*[FW_DEVLOG_LEVEL_CRIT]	=*/ "CRIT",
	/*[FW_DEVLOG_LEVEL_ERR]		=*/ "ERR",
	/*[FW_DEVLOG_LEVEL_NOTICE]	=*/ "NOTICE",
	/*[FW_DEVLOG_LEVEL_INFO]	=*/ "INFO",
	/*[FW_DEVLOG_LEVEL_DEBUG]	=*/ "DEBUG",
	/*[FW_DEVLOG_LEVEL_MAX]		=*/ "MAX"
};

static const char * const devlog_facility_strings[] = {
	/*[FW_DEVLOG_FACILITY_CORE]   =*/ "CORE",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_SCHED]  =*/ "SCHED",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_TIMER]  =*/ "TIMER",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_RES]    =*/ "RES",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_HW]     =*/ "HW",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_FLR]    =*/ "FLR",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DMAQ]   =*/ "DMAQ",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_PHY]    =*/ "PHY",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_MAC]    =*/ "MAC",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_PORT]   =*/ "PORT",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_VI]     =*/ "VI",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_FILTER] =*/ "FILTER",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_ACL]    =*/ "ACL",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_TM]     =*/ "TM",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_QFC]    =*/ "QFC",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_DCB]    =*/ "DCB",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_ETH]    =*/ "ETH",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_OFLD]   =*/ "OFLD",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_RI]     =*/ "RI",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_ISCSI]  =*/ "ISCSI",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_FCOE]   =*/ "FCOE",
	/*[FW_DEVLOG_FACILITY_DUMMY]  =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_FOISCSI]	 =*/ "FOISCSI",
	/*[FW_DEVLOG_FACILITY_DUMMY]   =*/ "DUMMY",
	/*[FW_DEVLOG_FACILITY_FOFCOE] =*/ "FOFCOE",
	/*[FW_DEVLOG_FACILITY_MAX]    =*/ "MAX"
};

static struct tp1_reg_info t6_tp_mib_index_reg_array[] = {
	{"0x0", "TP_MIB_MAC_IN_ERR_0"},
	{"0x1", "TP_MIB_MAC_IN_ERR_1"},
	{"0x2", "TP_MIB_MAC_IN_ERR_2"},
	{"0x3", "TP_MIB_MAC_IN_ERR_3"},
	{"0x4", "TP_MIB_HDR_IN_ERR_0"},
	{"0x5", "TP_MIB_HDR_IN_ERR_1"},
	{"0x6", "TP_MIB_HDR_IN_ERR_2"},
	{"0x7", "TP_MIB_HDR_IN_ERR_3"},
	{"0x8", "TP_MIB_TCP_IN_ERR_0"},
	{"0x9", "TP_MIB_TCP_IN_ERR_1"},
	{"0xA", "TP_MIB_TCP_IN_ERR_2"},
	{"0xB", "TP_MIB_TCP_IN_ERR_3"},
	{"0xC", "TP_MIB_TCP_OUT_RST"},
	{"0x10", "TP_MIB_TCP_IN_SEG_HI"},
	{"0x11", "TP_MIB_TCP_IN_SEG_LO"},
	{"0x12", "TP_MIB_TCP_OUT_SEG_HI"},
	{"0x13", "TP_MIB_TCP_OUT_SEG_LO"},
	{"0x14", "TP_MIB_TCP_RXT_SEG_HI"},
	{"0x15", "TP_MIB_TCP_RXT_SEG_LO"},
	{"0x18", "TP_MIB_TNL_CNG_DROP_0"},
	{"0x19", "TP_MIB_TNL_CNG_DROP_1"},
	{"0x1A", "TP_MIB_TNL_CNG_DROP_2"},
	{"0x1B", "TP_MIB_TNL_CNG_DROP_3"},
	{"0x1C", "TP_MIB_OFD_CHN_DROP_0"},
	{"0x1D", "TP_MIB_OFD_CHN_DROP_1"},
	{"0x1E", "TP_MIB_OFD_CHN_DROP_2"},
	{"0x1F", "TP_MIB_OFD_CHN_DROP_3"},
	{"0x20", "TP_MIB_TNL_OUT_PKT_0"},
	{"0x21", "TP_MIB_TNL_OUT_PKT_1"},
	{"0x22", "TP_MIB_TNL_OUT_PKT_2"},
	{"0x23", "TP_MIB_TNL_OUT_PKT_3"},
	{"0x24", "TP_MIB_TNL_IN_PKT_0"},
	{"0x25", "TP_MIB_TNL_IN_PKT_1"},
	{"0x26", "TP_MIB_TNL_IN_PKT_2"},
	{"0x27", "TP_MIB_TNL_IN_PKT_3"},
	{"0x28", "TP_MIB_TCP_V6IN_ERR_0"},
	{"0x29", "TP_MIB_TCP_V6IN_ERR_1"},
	{"0x2A", "TP_MIB_TCP_V6IN_ERR_2"},
	{"0x2B", "TP_MIB_TCP_V6IN_ERR_3"},
	{"0x2C", "TP_MIB_TCP_V6OUT_RST"},
	{"0x30", "TP_MIB_TCP_V6IN_SEG_HI"},
	{"0x31", "TP_MIB_TCP_V6IN_SEG_LO"},
	{"0x32", "TP_MIB_TCP_V6OUT_SEG_HI"},
	{"0x33", "TP_MIB_TCP_V6OUT_SEG_LO"},
	{"0x34", "TP_MIB_TCP_V6RXT_SEG_HI"},
	{"0x35", "TP_MIB_TCP_V6RXT_SEG_LO"},
	{"0x36", "TP_MIB_OFD_ARP_DROP"},
	{"0x37", "TP_MIB_OFD_DFR_DROP"},
	{"0x38", "TP_MIB_CPL_IN_REQ_0"},
	{"0x39", "TP_MIB_CPL_IN_REQ_1"},
	{"0x3A", "TP_MIB_CPL_IN_REQ_2"},
	{"0x3B", "TP_MIB_CPL_IN_REQ_3"},
	{"0x3C", "TP_MIB_CPL_OUT_RSP_0"},
	{"0x3D", "TP_MIB_CPL_OUT_RSP_1"},
	{"0x3E", "TP_MIB_CPL_OUT_RSP_2"},
	{"0x3F", "TP_MIB_CPL_OUT_RSP_3"},
	{"0x40", "TP_MIB_TNL_LPBK_0"},
	{"0x41", "TP_MIB_TNL_LPBK_1"},
	{"0x42", "TP_MIB_TNL_LPBK_2"},
	{"0x43", "TP_MIB_TNL_LPBK_3"},
	{"0x44", "TP_MIB_TNL_DROP_0"},
	{"0x45", "TP_MIB_TNL_DROP_1"},
	{"0x46", "TP_MIB_TNL_DROP_2"},
	{"0x47", "TP_MIB_TNL_DROP_3"},
	{"0x48", "TP_MIB_FCOE_DDP_0"},
	{"0x49", "TP_MIB_FCOE_DDP_1"},
	{"0x4A", "TP_MIB_FCOE_DDP_2"},
	{"0x4B", "TP_MIB_FCOE_DDP_3"},
	{"0x4C", "TP_MIB_FCOE_DROP_0"},
	{"0x4D", "TP_MIB_FCOE_DROP_1"},
	{"0x4E", "TP_MIB_FCOE_DROP_2"},
	{"0x4F", "TP_MIB_FCOE_DROP_3"},
	{"0x50", "TP_MIB_FCOE_BYTE_0_HI"},
	{"0x51", "TP_MIB_FCOE_BYTE_0_LO"},
	{"0x52", "TP_MIB_FCOE_BYTE_1_HI"},
	{"0x53", "TP_MIB_FCOE_BYTE_1_LO"},
	{"0x54", "TP_MIB_FCOE_BYTE_2_HI"},
	{"0x55", "TP_MIB_FCOE_BYTE_2_LO"},
	{"0x56", "TP_MIB_FCOE_BYTE_3_HI"},
	{"0x57", "TP_MIB_FCOE_BYTE_3_LO"},
	{"0x58", "TP_MIB_OFD_VLN_DROP_0"},
	{"0x59", "TP_MIB_OFD_VLN_DROP_1"},
	{"0x5A", "TP_MIB_OFD_VLN_DROP_2"},
	{"0x5B", "TP_MIB_OFD_VLN_DROP_3"},
	{"0x5C", "TP_MIB_USM_PKTS"},
	{"0x5D", "TP_MIB_USM_DROP"},
	{"0x5E", "TP_MIB_USM_BYTES_HI"},
	{"0x5F", "TP_MIB_USM_BYTES_LO"},
	{"0x60", "TP_MIB_TID_DEL"},
	{"0x61", "TP_MIB_TID_INV"},
	{"0x62", "TP_MIB_TID_ACT"},
	{"0x63", "TP_MIB_TID_PAS"},
	{"0x64", "TP_MIB_RQE_DFR_PKT"},
	{"0x65", "TP_MIB_RQE_DFR_MOD"},
	{"0x68", "TP_MIB_CPL_OUT_ERR_0"},
	{"0x69", "TP_MIB_CPL_OUT_ERR_1"},
	{"0x6A", "TP_MIB_CPL_OUT_ERR_2"},
	{"0x6B", "TP_MIB_CPL_OUT_ERR_3"},
	{"0x6c", "TP_MIB_ENG_LINE_0"},
	{"0x6d", "TP_MIB_ENG_LINE_1"},
	{"0x6e", "TP_MIB_ENG_LINE_2"},
	{"0x6f", "TP_MIB_ENG_LINE_3"},
	{"0x70", "TP_MIB_TNL_ERR_0"},
	{"0x71", "TP_MIB_TNL_ERR_1"},
	{"0x72", "TP_MIB_TNL_ERR_2"},
	{"0x73", "TP_MIB_TNL_ERR_3"}
};

static struct tp1_reg_info t5_tp_mib_index_reg_array[] = {
	{"0x0", "TP_MIB_MAC_IN_ERR_0"},
	{"0x1", "TP_MIB_MAC_IN_ERR_1"},
	{"0x2", "TP_MIB_MAC_IN_ERR_2"},
	{"0x3", "TP_MIB_MAC_IN_ERR_3"},
	{"0x4", "TP_MIB_HDR_IN_ERR_0"},
	{"0x5", "TP_MIB_HDR_IN_ERR_1"},
	{"0x6", "TP_MIB_HDR_IN_ERR_2"},
	{"0x7", "TP_MIB_HDR_IN_ERR_3"},
	{"0x8", "TP_MIB_TCP_IN_ERR_0"},
	{"0x9", "TP_MIB_TCP_IN_ERR_1"},
	{"0xA", "TP_MIB_TCP_IN_ERR_2"},
	{"0xB", "TP_MIB_TCP_IN_ERR_3"},
	{"0xC", "TP_MIB_TCP_OUT_RST"},
	{"0x10", "TP_MIB_TCP_IN_SEG_HI"},
	{"0x11", "TP_MIB_TCP_IN_SEG_LO"},
	{"0x12", "TP_MIB_TCP_OUT_SEG_HI"},
	{"0x13", "TP_MIB_TCP_OUT_SEG_LO"},
	{"0x14", "TP_MIB_TCP_RXT_SEG_HI"},
	{"0x15", "TP_MIB_TCP_RXT_SEG_LO"},
	{"0x18", "TP_MIB_TNL_CNG_DROP_0"},
	{"0x19", "TP_MIB_TNL_CNG_DROP_1"},
	{"0x1A", "TP_MIB_TNL_CNG_DROP_2"},
	{"0x1B", "TP_MIB_TNL_CNG_DROP_3"},
	{"0x1C", "TP_MIB_OFD_CHN_DROP_0"},
	{"0x1D", "TP_MIB_OFD_CHN_DROP_1"},
	{"0x1E", "TP_MIB_OFD_CHN_DROP_2"},
	{"0x1F", "TP_MIB_OFD_CHN_DROP_3"},
	{"0x20", "TP_MIB_TNL_OUT_PKT_0"},
	{"0x21", "TP_MIB_TNL_OUT_PKT_1"},
	{"0x22", "TP_MIB_TNL_OUT_PKT_2"},
	{"0x23", "TP_MIB_TNL_OUT_PKT_3"},
	{"0x24", "TP_MIB_TNL_IN_PKT_0"},
	{"0x25", "TP_MIB_TNL_IN_PKT_1"},
	{"0x26", "TP_MIB_TNL_IN_PKT_2"},
	{"0x27", "TP_MIB_TNL_IN_PKT_3"},
	{"0x28", "TP_MIB_TCP_V6IN_ERR_0"},
	{"0x29", "TP_MIB_TCP_V6IN_ERR_1"},
	{"0x2A", "TP_MIB_TCP_V6IN_ERR_2"},
	{"0x2B", "TP_MIB_TCP_V6IN_ERR_3"},
	{"0x2C", "TP_MIB_TCP_V6OUT_RST"},
	{"0x30", "TP_MIB_TCP_V6IN_SEG_HI"},
	{"0x31", "TP_MIB_TCP_V6IN_SEG_LO"},
	{"0x32", "TP_MIB_TCP_V6OUT_SEG_HI"},
	{"0x33", "TP_MIB_TCP_V6OUT_SEG_LO"},
	{"0x34", "TP_MIB_TCP_V6RXT_SEG_HI"},
	{"0x35", "TP_MIB_TCP_V6RXT_SEG_LO"},
	{"0x36", "TP_MIB_OFD_ARP_DROP"},
	{"0x37", "TP_MIB_OFD_DFR_DROP"},
	{"0x38", "TP_MIB_CPL_IN_REQ_0"},
	{"0x39", "TP_MIB_CPL_IN_REQ_1"},
	{"0x3A", "TP_MIB_CPL_IN_REQ_2"},
	{"0x3B", "TP_MIB_CPL_IN_REQ_3"},
	{"0x3C", "TP_MIB_CPL_OUT_RSP_0"},
	{"0x3D", "TP_MIB_CPL_OUT_RSP_1"},
	{"0x3E", "TP_MIB_CPL_OUT_RSP_2"},
	{"0x3F", "TP_MIB_CPL_OUT_RSP_3"},
	{"0x40", "TP_MIB_TNL_LPBK_0"},
	{"0x41", "TP_MIB_TNL_LPBK_1"},
	{"0x42", "TP_MIB_TNL_LPBK_2"},
	{"0x43", "TP_MIB_TNL_LPBK_3"},
	{"0x44", "TP_MIB_TNL_DROP_0"},
	{"0x45", "TP_MIB_TNL_DROP_1"},
	{"0x46", "TP_MIB_TNL_DROP_2"},
	{"0x47", "TP_MIB_TNL_DROP_3"},
	{"0x48", "TP_MIB_FCOE_DDP_0"},
	{"0x49", "TP_MIB_FCOE_DDP_1"},
	{"0x4A", "TP_MIB_FCOE_DDP_2"},
	{"0x4B", "TP_MIB_FCOE_DDP_3"},
	{"0x4C", "TP_MIB_FCOE_DROP_0"},
	{"0x4D", "TP_MIB_FCOE_DROP_1"},
	{"0x4E", "TP_MIB_FCOE_DROP_2"},
	{"0x4F", "TP_MIB_FCOE_DROP_3"},
	{"0x50", "TP_MIB_FCOE_BYTE_0_HI"},
	{"0x51", "TP_MIB_FCOE_BYTE_0_LO"},
	{"0x52", "TP_MIB_FCOE_BYTE_1_HI"},
	{"0x53", "TP_MIB_FCOE_BYTE_1_LO"},
	{"0x54", "TP_MIB_FCOE_BYTE_2_HI"},
	{"0x55", "TP_MIB_FCOE_BYTE_2_LO"},
	{"0x56", "TP_MIB_FCOE_BYTE_3_HI"},
	{"0x57", "TP_MIB_FCOE_BYTE_3_LO"},
	{"0x58", "TP_MIB_OFD_VLN_DROP_0"},
	{"0x59", "TP_MIB_OFD_VLN_DROP_1"},
	{"0x5A", "TP_MIB_OFD_VLN_DROP_2"},
	{"0x5B", "TP_MIB_OFD_VLN_DROP_3"},
	{"0x5C", "TP_MIB_USM_PKTS"},
	{"0x5D", "TP_MIB_USM_DROP"},
	{"0x5E", "TP_MIB_USM_BYTES_HI"},
	{"0x5F", "TP_MIB_USM_BYTES_LO"},
	{"0x60", "TP_MIB_TID_DEL"},
	{"0x61", "TP_MIB_TID_INV"},
	{"0x62", "TP_MIB_TID_ACT"},
	{"0x63", "TP_MIB_TID_PAS"},
	{"0x64", "TP_MIB_RQE_DFR_PKT"},
	{"0x65", "TP_MIB_RQE_DFR_MOD"},
	{"0x68", "TP_MIB_CPL_OUT_ERR_0"},
	{"0x69", "TP_MIB_CPL_OUT_ERR_1"},
	{"0x6A", "TP_MIB_CPL_OUT_ERR_2"},
	{"0x6B", "TP_MIB_CPL_OUT_ERR_3"}
};

static struct cudbg_reg_info t6_tp_tm_regs[] = {
	{ "TP_TX_MOD_Q7_Q6_TIMER_SEPARATOR", 0x0, 0 },
	{ "S_TXTIMERSEPQ7", 16, 16 },
	{ "S_TXTIMERSEPQ6", 0, 16 },
	{ "TP_TX_MOD_Q5_Q4_TIMER_SEPARATOR", 0x1, 0 },
	{ "S_TXTIMERSEPQ4", 16, 16 },
	{ "S_TXTIMERSEPQ4", 0, 16 },
	{ "TP_TX_MOD_Q3_Q2_TIMER_SEPARATOR", 0x2, 0 },
	{ "S_TXTIMERSEPQ3", 16, 16 },
	{ "S_TXTIMERSEPQ2", 0, 16 },
	{ "TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR", 0x3, 0 },
	{ "S_TXTIMERSEPQ1", 16, 16 },
	{ "S_TXTIMERSEPQ0", 0, 16 },
	{ "TP_RX_MOD_Q1_Q0_TIMER_SEPARATOR", 0x4, 0 },
	{ "S_RXTIMERSEPQ1", 16, 16 },
	{ "S_RXTIMERSEPQ0", 0, 16 },
	{ "TP_TX_MOD_Q7_Q6_RATE_LIMIT", 0x5, 0 },
	{ "S_TXRATEINCQ7", 24, 8 },
	{ "S_TXRATETCKQ7", 16, 8 },
	{ "S_TXRATEINCQ6", 8, 8 },
	{ "S_TXRATETCKQ6", 0, 8 },
	{ "TP_TX_MOD_Q5_Q4_RATE_LIMIT", 0x6, 0 },
	{ "S_TXRATEINCQ5", 24, 8 },
	{ "S_TXRATETCKQ5", 16, 8 },
	{ "S_TXRATEINCQ4", 8, 8 },
	{ "S_TXRATETCKQ4", 0, 8 },
	{ "TP_TX_MOD_Q3_Q2_RATE_LIMIT", 0x7, 0 },
	{ "S_TXRATEINCQ3", 24, 8 },
	{ "S_TXRATETCKQ3", 16, 8 },
	{ "S_TXRATEINCQ2", 8, 8 },
	{ "S_TXRATETCKQ2", 0, 8 },
	{ "TP_TX_MOD_Q1_Q0_RATE_LIMIT", 0x8, 0 },
	{ "S_TXRATEINCQ1", 24, 8 },
	{ "S_TXRATETCKQ1", 16, 8 },
	{ "S_TXRATEINCQ0", 8, 8 },
	{ "S_TXRATETCKQ0", 0, 8 },
	{ "TP_RX_MOD_Q1_Q0_RATE_LIMIT", 0x9, 0 },
	{ "S_RXRATEINCQ1", 24, 8 },
	{ "S_RXRATETCKQ1", 16, 8 },
	{ "S_RXRATEINCQ0", 8, 8 },
	{ "S_RXRATETCKQ0", 0, 8 },
	{ "TP_TX_MOD_C3_C2_RATE_LIMIT", 0xA, 0 },
	{ "TP_TX_MOD_C1_C0_RATE_LIMIT", 0xB, 0 },
	{ NULL }
};

static struct cudbg_reg_info t5_tp_tm_regs[] = {
	{ "TP_TX_MOD_Q7_Q6_TIMER_SEPARATOR", 0x0, 0 },
	{ "S_TXTIMERSEPQ7", 16, 16 },
	{ "S_TXTIMERSEPQ6", 0, 16 },
	{ "TP_TX_MOD_Q5_Q4_TIMER_SEPARATOR", 0x1, 0 },
	{ "S_TXTIMERSEPQ4", 16, 16 },
	{ "S_TXTIMERSEPQ4", 0, 16 },
	{ "TP_TX_MOD_Q3_Q2_TIMER_SEPARATOR", 0x2, 0 },
	{ "S_TXTIMERSEPQ3", 16, 16 },
	{ "S_TXTIMERSEPQ2", 0, 16 },
	{ "TP_TX_MOD_Q1_Q0_TIMER_SEPARATOR", 0x3, 0 },
	{ "S_TXTIMERSEPQ1", 16, 16 },
	{ "S_TXTIMERSEPQ0", 0, 16 },
	{ "TP_RX_MOD_Q1_Q0_TIMER_SEPARATOR", 0x4, 0 },
	{ "S_RXTIMERSEPQ1", 16, 16 },
	{ "S_RXTIMERSEPQ0", 0, 16 },
	{ "TP_TX_MOD_Q7_Q6_RATE_LIMIT", 0x5, 0 },
	{ "S_TXRATEINCQ7", 24, 8 },
	{ "S_TXRATETCKQ7", 16, 8 },
	{ "S_TXRATEINCQ6", 8, 8 },
	{ "S_TXRATETCKQ6", 0, 8 },
	{ "TP_TX_MOD_Q5_Q4_RATE_LIMIT", 0x6, 0 },
	{ "S_TXRATEINCQ5", 24, 8 },
	{ "S_TXRATETCKQ5", 16, 8 },
	{ "S_TXRATEINCQ4", 8, 8 },
	{ "S_TXRATETCKQ4", 0, 8 },
	{ "TP_TX_MOD_Q3_Q2_RATE_LIMIT", 0x7, 0 },
	{ "S_TXRATEINCQ3", 24, 8 },
	{ "S_TXRATETCKQ3", 16, 8 },
	{ "S_TXRATEINCQ2", 8, 8 },
	{ "S_TXRATETCKQ2", 0, 8 },
	{ "TP_TX_MOD_Q1_Q0_RATE_LIMIT", 0x8, 0 },
	{ "S_TXRATEINCQ1", 24, 8 },
	{ "S_TXRATETCKQ1", 16, 8 },
	{ "S_TXRATEINCQ0", 8, 8 },
	{ "S_TXRATETCKQ0", 0, 8 },
	{ "TP_RX_MOD_Q1_Q0_RATE_LIMIT", 0x9, 0 },
	{ "S_RXRATEINCQ1", 24, 8 },
	{ "S_RXRATETCKQ1", 16, 8 },
	{ "S_RXRATEINCQ0", 8, 8 },
	{ "S_RXRATETCKQ0", 0, 8 },
	{ "TP_TX_MOD_C3_C2_RATE_LIMIT", 0xA, 0 },
	{ "TP_TX_MOD_C1_C0_RATE_LIMIT", 0xB, 0 },
	{ NULL }
};

static struct cudbg_reg_info t6_tp_pio_regs_20_to_3b[] = {
	{ "TP_RX_SCHED_MAP", 0x20, 0 },
	{ "S_RXMAPCHANNEL3", 24, 8 },
	{ "S_RXMAPCHANNEL2", 16, 8 },
	{ "S_RXMAPCHANNEL1", 8, 8 },
	{ "S_RXMAPCHANNEL0", 0, 8 },
	{ "TP_RX_SCHED_SGE", 0x21, 0 },
	{ "S_RXSGEMOD1", 12, 4 },
	{ "S_RXSGEMOD0", 8, 4 },
	{ "S_RXSGECHANNEL3", 3, 1 },
	{ "S_RXSGECHANNEL2", 2, 1 },
	{ "S_RXSGECHANNEL1", 1, 1 },
	{ "S_RXSGECHANNEL0", 0, 1 },
	{ "TP_TX_SCHED_MAP", 0x22, 0 },
	{ "S_TXMAPCHANNEL3", 12, 4 },
	{ "S_TXMAPCHANNEL2", 8, 4 },
	{ "S_TXMAPCHANNEL1", 4, 4 },
	{ "S_TXMAPCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_HDR", 0x23, 0 },
	{ "S_TXMAPHDRCHANNEL7", 28, 4 },
	{ "S_TXMAPHDRCHANNEL6", 24, 4 },
	{ "S_TXMAPHDRCHANNEL5", 20, 4 },
	{ "S_TXMAPHDRCHANNEL4", 16, 4 },
	{ "S_TXMAPHDRCHANNEL3", 12, 4 },
	{ "S_TXMAPHDRCHANNEL2", 8, 4 },
	{ "S_TXMAPHDRCHANNEL1", 4, 4 },
	{ "S_TXMAPHDRCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_FIFO", 0x24, 0 },
	{ "S_TXMAPFIFOCHANNEL7", 28, 4 },
	{ "S_TXMAPFIFOCHANNEL6", 24, 4 },
	{ "S_TXMAPFIFOCHANNEL5", 20, 4 },
	{ "S_TXMAPFIFOCHANNEL4", 16, 4 },
	{ "S_TXMAPFIFOCHANNEL3", 12, 4 },
	{ "S_TXMAPFIFOCHANNEL2", 8, 4 },
	{ "S_TXMAPFIFOCHANNEL1", 4, 4 },
	{ "S_TXMAPFIFOCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_PCMD", 0x25, 0 },
	{ "S_TXMAPPCMDCHANNEL7", 28, 4 },
	{ "S_TXMAPPCMDCHANNEL6", 24, 4 },
	{ "S_TXMAPPCMDCHANNEL5", 20, 4 },
	{ "S_TXMAPPCMDCHANNEL4", 16, 4 },
	{ "S_TXMAPPCMDCHANNEL3", 12, 4 },
	{ "S_TXMAPPCMDCHANNEL2", 8, 4 },
	{ "S_TXMAPPCMDCHANNEL1", 4, 4 },
	{ "S_TXMAPPCMDCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_LPBK", 0x26, 0 },
	{ "S_TXMAPLPBKCHANNEL7", 28, 4 },
	{ "S_TXMAPLPBKCHANNEL6", 24, 4 },
	{ "S_TXMAPLPBKCHANNEL5", 20, 4 },
	{ "S_TXMAPLPBKCHANNEL4", 16, 4 },
	{ "S_TXMAPLPBKCHANNEL3", 12, 4 },
	{ "S_TXMAPLPBKCHANNEL2", 8, 4 },
	{ "S_TXMAPLPBKCHANNEL1", 4, 4 },
	{ "S_TXMAPLPBKCHANNEL0", 0, 4 },
	{ "TP_CHANNEL_MAP", 0x27, 0 },
	{ "RxMapChannelELN", 16, 4 },
	{ "RxMapE2LChannel3", 14, 2 },
	{ "RxMapE2LChannel2", 12, 2 },
	{ "RxMapE2LChannel1", 10, 2 },
	{ "RxMapE2LChannel0", 8, 2 },
	{ "RxMapC2CChannel3", 7, 1 },
	{ "RxMapC2CChannel2", 6, 1 },
	{ "RxMapC2CChannel1", 5, 1 },
	{ "RxMapC2CChannel0", 4, 1 },
	{ "RxMapE2CChannel3", 3, 1 },
	{ "RxMapE2CChannel2", 2, 1 },
	{ "RxMapE2CChannel1", 1, 1 },
	{ "RxMapE2CChannel0", 0, 1 },
	{ "TP_RX_LPBK", 0x28, 0 },
	{ "CommitReset3", 31, 1 },
	{ "CommitReset2", 30, 1 },
	{ "CommitReset1", 29, 1 },
	{ "CommitReset0", 28, 1 },
	{ "ForceCong3", 27, 1 },
	{ "ForceCong2", 26, 1 },
	{ "ForceCong1", 25, 1 },
	{ "ForceCong0", 24, 1 },
	{ "CommitLimit3", 18, 6 },
	{ "CommitLimit2", 12, 6},
	{ "CommitLimit1", 6, 6 },
	{ "CommitLimit0", 0, 6 },
	{ "TP_TX_LPBK", 0x29, 0 },
	{ "CommitReset3", 31, 1 },
	{ "CommitReset2", 30, 1 },
	{ "CommitReset1", 29, 1 },
	{ "CommitReset0", 28, 1 },
	{ "ForceCong3", 27, 1 },
	{ "ForceCong2", 26, 1 },
	{ "ForceCong1", 25, 1 },
	{ "ForceCong0", 24, 1 },
	{ "CommitLimit3", 18, 6 },
	{ "CommitLimit2", 12, 6},
	{ "CommitLimit1", 6, 6 },
	{ "CommitLimit0", 0, 6 },

	{ "TP_TX_SCHED_PPP", 0x2A, 0 },
	{ "S_TXPPPENPORT3", 24, 8 },
	{ "S_TXPPPENPORT2", 16, 8 },
	{ "S_TXPPPENPORT1", 8, 8 },
	{ "S_TXPPPENPORT0", 0, 8 },
	{ "TP_RX_SCHED_FIFO", 0x2B, 0 },
	{ "S_COMMITLIMIT1H", 24, 8 },
	{ "S_COMMITLIMIT1L", 16, 8 },
	{ "S_COMMITLIMIT0H", 8, 8 },
	{ "S_COMMITLIMIT0L", 0, 8 },
	{ "TP_IPMI_CFG1", 0x2E, 0 },
	{ "S_VLANENABLE", 31, 1 },
	{ "S_PRIMARYPORTENABLE", 30, 1 },
	{ "S_SECUREPORTENABLE", 29, 1 },
	{ "S_ARPENABLE", 28, 1 },
	{ "S_IPMI_VLAN", 0, 16 },
	{ "TP_IPMI_CFG2", 0x2F, 0 },
	{ "S_SECUREPORT", 16, 16 },
	{ "S_PRIMARYPORT", 0, 16 },
	{ "TP_RSS_PF0_CONFIG", 0x30, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF1_CONFIG", 0x31, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF2_CONFIG", 0x32, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF3_CONFIG", 0x33, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF4_CONFIG", 0x34, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF5_CONFIG", 0x35, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF6_CONFIG", 0x36, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF7_CONFIG", 0x37, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_CHNENABLE", 30, 1 },
	{ "S_PRTENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF_MAP", 0x38, 0 },
	{ "S_LKPIDXSIZE", 24, 2 },
	{ "S_PF7LKPIDX", 21, 3 },
	{ "S_PF6LKPIDX", 18, 3 },
	{ "S_PF5LKPIDX", 15, 3 },
	{ "S_PF4LKPIDX", 12, 3 },
	{ "S_PF3LKPIDX", 9, 3 },
	{ "S_PF2LKPIDX", 6, 3 },
	{ "S_PF1LKPIDX", 3, 3 },
	{ "S_PF0LKPIDX", 0, 3 },
	{ "TP_RSS_PF_MSK", 0x39, 0 },
	{ "S_PF7MSKSIZE", 28, 4 },
	{ "S_PF6MSKSIZE", 24, 4 },
	{ "S_PF5MSKSIZE", 20, 4 },
	{ "S_PF4MSKSIZE", 16, 4 },
	{ "S_PF3MSKSIZE", 12, 4 },
	{ "S_PF2MSKSIZE", 8, 4 },
	{ "S_PF1MSKSIZE", 4, 4 },
	{ "S_PF0MSKSIZE", 0, 4 },
	{ "TP_RSS_VFL_CONFIG", 0x3A, 0 },
	{ "S_KEYSCRAMBLE", 0, 32 },
	{ "TP_RSS_VFH_CONFIG", 0x3B, 0 },
	{ "S_ENABLEUDPHASH", 31, 1 },
	{ "S_VFUPEN", 30, 1 },
	{ "S_RESERVED", 29, 1 },
	{ "S_VFVLNEX", 28, 1 },
	{ "S_VFPRTEN", 27, 1 },
	{ "S_VFCHNEN", 26, 1 },
	{ "S_DEFAULTQUEUE", 16, 10 },
	{ "S_VFLKPIDX", 8, 8 },
	{ "S_VFIP6FOURTUPEN", 7, 1 },
	{ "S_VFIP6TWOTUPEN", 6, 1 },
	{ "S_VFIP4FOURTUPEN", 5, 1 },
	{ "S_VFIP4TWOTUPEN", 4, 1 },
	{ "S_KEYINDEX", 0, 4 },
	{ NULL }
};

static struct cudbg_reg_info t5_tp_pio_regs_20_to_3b[] = {
	{ "TP_RX_SCHED_MAP", 0x20, 0 },
	{ "S_RXMAPCHANNEL3", 24, 8 },
	{ "S_RXMAPCHANNEL2", 16, 8 },
	{ "S_RXMAPCHANNEL1", 8, 8 },
	{ "S_RXMAPCHANNEL0", 0, 8 },
	{ "TP_RX_SCHED_SGE", 0x21, 0 },
	{ "S_RXSGEMOD1", 12, 4 },
	{ "S_RXSGEMOD0", 8, 4 },
	{ "S_RXSGECHANNEL3", 3, 1 },
	{ "S_RXSGECHANNEL2", 2, 1 },
	{ "S_RXSGECHANNEL1", 1, 1 },
	{ "S_RXSGECHANNEL0", 0, 1 },
	{ "TP_TX_SCHED_MAP", 0x22, 0 },
	{ "S_TXMAPCHANNEL3", 12, 4 },
	{ "S_TXMAPCHANNEL2", 8, 4 },
	{ "S_TXMAPCHANNEL1", 4, 4 },
	{ "S_TXMAPCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_HDR", 0x23, 0 },
	{ "S_TXMAPHDRCHANNEL7", 28, 4 },
	{ "S_TXMAPHDRCHANNEL6", 24, 4 },
	{ "S_TXMAPHDRCHANNEL5", 20, 4 },
	{ "S_TXMAPHDRCHANNEL4", 16, 4 },
	{ "S_TXMAPHDRCHANNEL3", 12, 4 },
	{ "S_TXMAPHDRCHANNEL2", 8, 4 },
	{ "S_TXMAPHDRCHANNEL1", 4, 4 },
	{ "S_TXMAPHDRCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_FIFO", 0x24, 0 },
	{ "S_TXMAPFIFOCHANNEL7", 28, 4 },
	{ "S_TXMAPFIFOCHANNEL6", 24, 4 },
	{ "S_TXMAPFIFOCHANNEL5", 20, 4 },
	{ "S_TXMAPFIFOCHANNEL4", 16, 4 },
	{ "S_TXMAPFIFOCHANNEL3", 12, 4 },
	{ "S_TXMAPFIFOCHANNEL2", 8, 4 },
	{ "S_TXMAPFIFOCHANNEL1", 4, 4 },
	{ "S_TXMAPFIFOCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_PCMD", 0x25, 0 },
	{ "S_TXMAPPCMDCHANNEL7", 28, 4 },
	{ "S_TXMAPPCMDCHANNEL6", 24, 4 },
	{ "S_TXMAPPCMDCHANNEL5", 20, 4 },
	{ "S_TXMAPPCMDCHANNEL4", 16, 4 },
	{ "S_TXMAPPCMDCHANNEL3", 12, 4 },
	{ "S_TXMAPPCMDCHANNEL2", 8, 4 },
	{ "S_TXMAPPCMDCHANNEL1", 4, 4 },
	{ "S_TXMAPPCMDCHANNEL0", 0, 4 },
	{ "TP_TX_SCHED_LPBK", 0x26, 0 },
	{ "S_TXMAPLPBKCHANNEL7", 28, 4 },
	{ "S_TXMAPLPBKCHANNEL6", 24, 4 },
	{ "S_TXMAPLPBKCHANNEL5", 20, 4 },
	{ "S_TXMAPLPBKCHANNEL4", 16, 4 },
	{ "S_TXMAPLPBKCHANNEL3", 12, 4 },
	{ "S_TXMAPLPBKCHANNEL2", 8, 4 },
	{ "S_TXMAPLPBKCHANNEL1", 4, 4 },
	{ "S_TXMAPLPBKCHANNEL0", 0, 4 },
	{ "TP_CHANNEL_MAP", 0x27, 0 },
	{ "RxMapChannelELN", 16, 4 },
	{ "RxMapE2LChannel3", 14, 2 },
	{ "RxMapE2LChannel2", 12, 2 },
	{ "RxMapE2LChannel1", 10, 2 },
	{ "RxMapE2LChannel0", 8, 2 },
	{ "RxMapC2CChannel3", 7, 1 },
	{ "RxMapC2CChannel2", 6, 1 },
	{ "RxMapC2CChannel1", 5, 1 },
	{ "RxMapC2CChannel0", 4, 1 },
	{ "RxMapE2CChannel3", 3, 1 },
	{ "RxMapE2CChannel2", 2, 1 },
	{ "RxMapE2CChannel1", 1, 1 },
	{ "RxMapE2CChannel0", 0, 1 },
	{ "TP_RX_LPBK", 0x28, 0 },
	{ "TP_TX_LPBK", 0x29, 0 },
	{ "TP_TX_SCHED_PPP", 0x2A, 0 },
	{ "S_TXPPPENPORT3", 24, 8 },
	{ "S_TXPPPENPORT2", 16, 8 },
	{ "S_TXPPPENPORT1", 8, 8 },
	{ "S_TXPPPENPORT0", 0, 8 },
	{ "TP_RX_SCHED_FIFO", 0x2B, 0 },
	{ "S_COMMITLIMIT1H", 24, 8 },
	{ "S_COMMITLIMIT1L", 16, 8 },
	{ "S_COMMITLIMIT0H", 8, 8 },
	{ "S_COMMITLIMIT0L", 0, 8 },
	{ "TP_IPMI_CFG1", 0x2E, 0 },
	{ "S_VLANENABLE", 31, 1 },
	{ "S_PRIMARYPORTENABLE", 30, 1 },
	{ "S_SECUREPORTENABLE", 29, 1 },
	{ "S_ARPENABLE", 28, 1 },
	{ "S_IPMI_VLAN", 0, 16 },
	{ "TP_IPMI_CFG2", 0x2F, 0 },
	{ "S_SECUREPORT", 16, 16 },
	{ "S_PRIMARYPORT", 0, 16 },
	{ "TP_RSS_PF0_CONFIG", 0x30, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_PRTENABLE", 30, 1 },
	{ "S_CHNENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF1_CONFIG", 0x31, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_PRTENABLE", 30, 1 },
	{ "S_CHNENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF2_CONFIG", 0x32, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_PRTENABLE", 30, 1 },
	{ "S_CHNENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF3_CONFIG", 0x33, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_PRTENABLE", 30, 1 },
	{ "S_CHNENABLE", 29, 1 },
	{ "S_UDPFOURTUPEN", 28, 1 },
	{ "S_IP6FOURTUPEN", 27, 1 },
	{ "S_IP6TWOTUPEN", 26, 1 },
	{ "S_IP4FOURTUPEN", 25, 1 },
	{ "S_IP4TWOTUPEN", 24, 1 },
	{ "S_IVFWIDTH", 20, 4 },
	{ "S_CH1DEFAULTQUEUE", 10, 10 },
	{ "S_CH0DEFAULTQUEUE", 0, 10 },
	{ "TP_RSS_PF4_CONFIG", 0x34, 0 },
	{ "S_MAPENABLE", 31, 1 },
	{ "S_PRTENABLE", 30, 1 },