xref: /illumos-gate/usr/src/cmd/cxgbetool/cudbg_view.c

/*
 * This file and its contents are supplied under the terms of the
 * Common Development and Distribution License ("CDDL"), version 1.0.
 * You may only use this file in accordance with the terms of version
 * 1.0 of the CDDL.
 *
 * A full copy of the text of the CDDL should have accompanied this
 * source.  A copy of the CDDL is also available via the Internet at
 * http://www.illumos.org/license/CDDL.
 */

/*
 * Copyright (c) 2019 by Chelsio Communications, Inc.
 */

#include <stdio.h>
#include <stddef.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <fcntl.h>
#include <unistd.h>
#include <assert.h>

#include "t4_regs.h"
#include "t4_chip_type.h"
#include "cudbg_view.h"
#include "osdep.h"
#include "t4fw_interface.h"

#include "cudbg_view_entity.h"
#include "cudbg_entity.h"
#include "cudbg.h"
#include "cudbg_lib_common.h"
#include "fastlz.h"

extern struct reg_info t6_sge_regs[];
extern struct reg_info t6_pcie_regs[];
extern struct reg_info t6_dbg_regs[];
extern struct reg_info t6_ma_regs[];
extern struct reg_info t6_cim_regs[];
extern struct reg_info t6_tp_regs[];
extern struct reg_info t6_ulp_tx_regs[];
extern struct reg_info t6_pm_rx_regs[];
extern struct reg_info t6_pm_tx_regs[];
extern struct reg_info t6_mps_regs[];
extern struct reg_info t6_cpl_switch_regs[];
extern struct reg_info t6_smb_regs[];
extern struct reg_info t6_i2cm_regs[];
extern struct reg_info t6_mi_regs[];
extern struct reg_info t6_uart_regs[];
extern struct reg_info t6_pmu_regs[];
extern struct reg_info t6_ulp_rx_regs[];
extern struct reg_info t6_sf_regs[];
extern struct reg_info t6_pl_regs[];
extern struct reg_info t6_le_regs[];
extern struct reg_info t6_ncsi_regs[];
extern struct reg_info t6_mac_regs[];
extern struct reg_info t6_mc_0_regs[];
extern struct reg_info t6_edc_t60_regs[];
extern struct reg_info t6_edc_t61_regs[];
extern struct reg_info t6_hma_t6_regs[];

extern struct reg_info t5_sge_regs[];
extern struct reg_info t5_pcie_regs[];
extern struct reg_info t5_dbg_regs[];
extern struct reg_info t5_ma_regs[];
extern struct reg_info t5_cim_regs[];
extern struct reg_info t5_tp_regs[];
extern struct reg_info t5_ulp_tx_regs[];
extern struct reg_info t5_pm_rx_regs[];
extern struct reg_info t5_pm_tx_regs[];
extern struct reg_info t5_mps_regs[];
extern struct reg_info t5_cpl_switch_regs[];
extern struct reg_info t5_smb_regs[];
extern struct reg_info t5_i2cm_regs[];
extern struct reg_info t5_mi_regs[];
extern struct reg_info t5_uart_regs[];
extern struct reg_info t5_pmu_regs[];
extern struct reg_info t5_ulp_rx_regs[];
extern struct reg_info t5_sf_regs[];
extern struct reg_info t5_pl_regs[];
extern struct reg_info t5_le_regs[];
extern struct reg_info t5_ncsi_regs[];
extern struct reg_info t5_mac_regs[];
extern struct reg_info t5_mc_0_regs[];
extern struct reg_info t5_mc_1_regs[];
extern struct reg_info t5_edc_t50_regs[];
extern struct reg_info t5_edc_t51_regs[];
extern struct reg_info t5_hma_t5_regs[];

#include "reg_defs_t5.c"
#include "reg_defs_t6.c"

#include <time.h>
#include <stdarg.h>

int is_t5(enum chip_type chip)
{
	return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
}

int is_t6(enum chip_type chip)
{
	return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6);
}

enum {                                 /* adapter flags */
	FULL_INIT_DONE     = (1 << 0),
	USING_MSI          = (1 << 1),
	USING_MSIX         = (1 << 2),
	QUEUES_BOUND       = (1 << 3),
	FW_OK              = (1 << 4),
	RSS_TNLALLLOOKUP   = (1 << 5),
	USING_SOFT_PARAMS  = (1 << 6),
	MASTER_PF          = (1 << 7),
	BYPASS_DROP        = (1 << 8),
	FW_OFLD_CONN       = (1 << 9),
};

static struct ver_cs {
	int major;
	int minor;
	int changeset;
} ver_to_cs[] = {
	{1, 9, 12852},
	{1, 10, 13182},
	{1, 11, 13257},
	{1, 12, 13495},
	{1, 13, 13905},
	{1, 14, 13969},
};

static bool flash_info_banner = true;

#include "cudbg_view_compat.c"

int
cudbg_sge_ctxt_check_valid(u32 *buf, int type)
{
	int index, bit, bit_pos = 0;

	switch (type) {
		case CTXT_EGRESS:
			bit_pos = 176;
			break;
		case CTXT_INGRESS:
			bit_pos = 141;
			break;
		case CTXT_FLM:
			bit_pos = 89;
			break;
	}
	index = bit_pos / 32;
	bit =  bit_pos % 32;
	return buf[index] & (1U << bit);
}

int
cudbg_view_decompress_buff(char *pbuf,
			   struct cudbg_entity_hdr *entity_hdr,
			   struct cudbg_buffer *c_buff,
			   struct cudbg_buffer *dc_buff)
{
	int rc = 0;

	c_buff->data = pbuf + entity_hdr->start_offset;
	/* Remove padding bytes, if any */
	if (entity_hdr->num_pad)
		c_buff->size = entity_hdr->size - entity_hdr->num_pad;
	else
		c_buff->size = entity_hdr->size;
	c_buff->offset = 0;
	memset(dc_buff, 0, sizeof(struct cudbg_buffer));

	rc = validate_buffer(c_buff);
	if (rc)
		return rc;

	rc = decompress_buffer_wrapper(c_buff, dc_buff);
	if (rc) {
		free(dc_buff->data);
		return rc;
	}
	return rc;
}

int
get_entity_rev(struct cudbg_ver_hdr *ver_hdr)
{
	if (ver_hdr->signature == CUDBG_ENTITY_SIGNATURE)
		return ver_hdr->revision;
	return 0;
}

/* Find Mercurial sw repo changeset number
 * where major or minor number set to given number
 * */
int
cudbg_find_changeset(int major, int minor)
{
	int i;

	for (i = 0; i < sizeof(ver_to_cs)/sizeof(struct ver_cs); i++) {
		if (ver_to_cs[i].major == major &&
		    ver_to_cs[i].minor == minor)
			return ver_to_cs[i].changeset;
	}

	return -1;
}

/* Format a value in a unit that differs from the
 * value's native unit by the
 * given factor.
 */
static void
unit_conv(char *buf, size_t len, unsigned int val,
	  unsigned int factor)
{
	unsigned int rem = val % factor;

	if (rem == 0)
		(void) snprintf(buf, len, "%u", val / factor);
	else {
		while (rem % 10 == 0)
			rem /= 10;
		(void) snprintf(buf, len, "%u.%u", val / factor, rem);
	}
}

int
validate_next_rec_offset(void *pinbuf, u32 inbuf_size, u32
			 next_rec_offset)
{
	struct cudbg_hdr *cudbg_hdr;

	if (inbuf_size <= next_rec_offset)
		return 0;

	cudbg_hdr = (struct cudbg_hdr *)((char *)pinbuf + next_rec_offset);
	if ((cudbg_hdr->signature != CUDBG_SIGNATURE) &&
	    (cudbg_hdr->signature != CUDBG_LEGACY_SIGNATURE))
		return 0; /* no next rec */

	return next_rec_offset;
}

int
view_ext_entity(char *pinbuf, struct cudbg_entity_hdr *ent_hdr,
		struct cudbg_buffer *cudbg_poutbuf,
		enum chip_type chip)
{
	struct cudbg_entity_hdr *entity_hdr = NULL;
	u32 size, total_size = 0;
	u32 next_ext_offset = 0;
	u32 entity_type;
	int rc = 0;

	entity_hdr = (struct cudbg_entity_hdr *)
		     (pinbuf + ent_hdr->start_offset);
	/* Remove padding bytes, if any */
	size = ent_hdr->num_pad ? ent_hdr->size - ent_hdr->num_pad :
				  ent_hdr->size;
	while ((entity_hdr->flag & CUDBG_EXT_DATA_VALID)
		&& (total_size < size)) {
		entity_type = entity_hdr->entity_type;
		if (entity_hdr->sys_warn)
			printf("Entity warning: Type %s , %d\n",
			       entity_list[entity_type].name,
			       entity_hdr->sys_warn);

		if (entity_hdr->hdr_flags) {
			printf("Entity error: Type %s, %s\n",
			       entity_list[entity_type].name,
			       err_msg[-entity_hdr->hdr_flags]);
			if (entity_hdr->sys_err)
				printf("System error  %d\n",
				       entity_hdr->sys_err);

			next_ext_offset = entity_hdr->next_ext_offset;
			entity_hdr = (struct cudbg_entity_hdr *)
				     (pinbuf + ent_hdr->start_offset +
				      next_ext_offset);
			continue;
		}
		if (entity_hdr->size > 0) {
			total_size += entity_hdr->size +
					sizeof(struct cudbg_entity_hdr);

			rc = view_entity[entity_type - 1]
				(pinbuf + ent_hdr->start_offset,
				 entity_hdr,
				 cudbg_poutbuf,
				 chip);
			if (rc < 0)
				goto out;
		}
		next_ext_offset = entity_hdr->next_ext_offset;
		entity_hdr = (struct cudbg_entity_hdr *)
			     (pinbuf + ent_hdr->start_offset + next_ext_offset);
	}

	if (total_size != size)
		printf("Entity warning: Extended entity size mismatch\n");

out:
	return rc;
}

static void
cudbg_print_cudbg_header(struct cudbg_hdr *hdr)
{
	printf("\n/***************Header Information***************/\n");
	printf("Library Version: %u.%u\n", hdr->major_ver, hdr->minor_ver);
	printf("Compressed with: ");
	printf("Chip Version: ");
	switch (CHELSIO_CHIP_VERSION(hdr->chip_ver)) {
	case CHELSIO_T4:
		printf("T4 rev: %u\n", CHELSIO_CHIP_RELEASE(hdr->chip_ver));
		break;
	case CHELSIO_T5:
		printf("T5 rev: %u\n", CHELSIO_CHIP_RELEASE(hdr->chip_ver));
		break;
	case CHELSIO_T6:
		printf("T6 rev: %u\n", CHELSIO_CHIP_RELEASE(hdr->chip_ver));
		break;
	default:
		printf("%u (unknown)\n", hdr->chip_ver);
		break;
	}
	printf("/************************************************/\n\n");
}

void
cudbg_print_flash_header(void *pinbuf)
{
	struct cudbg_flash_hdr *fl_hdr = (struct cudbg_flash_hdr *)pinbuf;

	if (fl_hdr->signature == CUDBG_FL_SIGNATURE && flash_info_banner) {
		printf("\n/***************Flash Header information***************/\n");
		printf("Flash signature: %c%c%c%c\n",
		       (fl_hdr->signature  >> 24) & 0xFF,
		       (fl_hdr->signature  >> 16) & 0xFF,
		       (fl_hdr->signature  >> 8) & 0xFF,
		       fl_hdr->signature & 0xFF);

		printf("Flash payload timestamp (GMT): %s",
		       asctime(gmtime((time_t *)&fl_hdr->timestamp)));
		printf("Flash payload size: %u bytes\n", fl_hdr->data_len);
		printf("/******************************************************/\n");
		flash_info_banner = false;
	}
}

int
cudbg_view(void *handle, void *pinbuf, u32 inbuf_size,
	   void *poutbuf, s64 *poutbuf_size)
{

	struct cudbg_buffer cudbg_poutbuf = {0};
	struct cudbg_entity_hdr *entity_hdr;
	u32 info, offset, max_entities, i;
	struct cudbg_hdr *tmp_hdr;
	u32 next_rec_offset = 0;
	int index, bit, all;
	int rc = 0, cs;
	u8 *dbg_bitmap;
	int count = 0;

	dbg_bitmap = ((struct cudbg_private *)handle)->dbg_init.dbg_bitmap;
	info = ((struct cudbg_private *)handle)->dbg_init.info;

	if (inbuf_size < (sizeof(struct cudbg_entity_hdr) +
			  sizeof(struct cudbg_hdr))) {
		printf("\n\tInvalid cudbg dump file\n");
		return CUDBG_STATUS_NO_SIGNATURE;
	}

	tmp_hdr  = (struct cudbg_hdr *)pinbuf;
	if ((tmp_hdr->signature != CUDBG_SIGNATURE) &&
	    (tmp_hdr->signature != CUDBG_LEGACY_SIGNATURE)) {
		printf("\n\tInvalid cudbg dump file\n");
		return CUDBG_STATUS_NO_SIGNATURE;
	}

	if ((tmp_hdr->major_ver != CUDBG_MAJOR_VERSION) ||
	    (tmp_hdr->minor_ver != CUDBG_MINOR_VERSION)) {
		printf("\n\tMeta data version mismatch\n");
		printf("\tMeta data version expected %d.%d\n",
		       CUDBG_MAJOR_VERSION, CUDBG_MINOR_VERSION);
		printf("\tMeta data version in dump %d.%d\n",
		       tmp_hdr->major_ver, tmp_hdr->minor_ver);

		cs = cudbg_find_changeset(tmp_hdr->major_ver,
					  tmp_hdr->minor_ver);
		if (cs != -1) {
			printf("\n\tPlease use changeset %d in sw Mercurial "\
			       "repo to build cudbg_app with version %d.%d\n",
			       cs, tmp_hdr->major_ver, tmp_hdr->minor_ver);

			printf("\n\tOr\n\n\tUse precompiled cudbg_app binary for RHEL 5.x from "\
			       "vnc52:/home/surendra/vnc52/"\
			       "cudbg_app/cudbg_app_<version>\"\n\n");


		}
		return CUDBG_METADATA_VERSION_MISMATCH;
	}

	if (info)
		cudbg_print_cudbg_header(tmp_hdr);

	next_rec_offset += tmp_hdr->data_len;
	offset = tmp_hdr->hdr_len;
	all = dbg_bitmap[0] & (1 << CUDBG_ALL);
	max_entities = min(tmp_hdr->max_entities, CUDBG_MAX_ENTITY);

	for (i = 1; i < max_entities; i++) {
		index = i / 8;
		bit = i % 8;

		if (all || (dbg_bitmap[index] & (1 << bit))) {
			entity_hdr =
				(struct cudbg_entity_hdr *)((char *)pinbuf + offset);

			if (entity_hdr->sys_warn)
				printf("Entity warning: Type %s , %d\n",
				       entity_list[i].name,
				       entity_hdr->sys_warn);

			if (entity_hdr->hdr_flags) {
				offset += sizeof(struct cudbg_entity_hdr);
				printf("Entity error: Type %s, %s\n",
				       entity_list[i].name,
				       err_msg[-entity_hdr->hdr_flags]);
				if (entity_hdr->sys_err)
					printf("System error  %d\n",
					       entity_hdr->sys_err);

				if (poutbuf)
					*poutbuf_size = 0;

				continue;
			}
			memset(&cudbg_poutbuf, 0, sizeof(cudbg_poutbuf));
			if (entity_hdr->size > 0) {
				if (poutbuf) {
					cudbg_poutbuf.data = poutbuf;
					/* poutbuf_size value should not be
 					 * more than 32 bit value
 					 */
					assert(!((*poutbuf_size) >> 32));
					cudbg_poutbuf.size = (u32)*poutbuf_size;
					cudbg_poutbuf.offset = 0;
				}

				if (info)
					printf("%-20s compressed size %u\n",
					       entity_list[i].name,
					       entity_hdr->size);
				else {
					if (entity_hdr->entity_type !=
					    CUDBG_EXT_ENTITY)
						printf("%s() dbg entity : %s\n",
						       __func__,
						       entity_list[i].name);

					rc = view_entity[i - 1]
						((char *)pinbuf,
						 entity_hdr,
						 &cudbg_poutbuf,
						 tmp_hdr->chip_ver);

					count++;
				}
			} else if (!all && i !=
				   CUDBG_EXT_ENTITY) {
				printf("%s() dbg entity : %s\n",
				       __func__, entity_list[i].name);
				printf("\t%s not available\n",
				       entity_list[i].name);
			}
			if (rc < 0)
				goto out;
		}
		offset += sizeof(struct cudbg_entity_hdr);
	}

	/* if max_entities in dump is less than current CUDBG_MAX_ENTITY
	 * it means entities after tmp_hdr->max_entities does not exist
	 * in that dump
	 */
	if (tmp_hdr->max_entities < CUDBG_MAX_ENTITY) {
		for (i = tmp_hdr->max_entities; i < CUDBG_MAX_ENTITY; i++) {
			index = i / 8;
			bit = i % 8;

			if (all || (dbg_bitmap[index] & (1 << bit))) {
				printf("%s() dbg entity : %s\n",
				       __func__, entity_list[i].name);
				printf("\t%s does not Exist\n",
				       entity_list[i].name);
			}
		}
	}
	if (poutbuf) {
		if (!count)
			*poutbuf_size = 0;
		else
			*poutbuf_size = cudbg_poutbuf.size;
	}

	return validate_next_rec_offset(pinbuf, inbuf_size, next_rec_offset);

out:
	if (poutbuf)
		*poutbuf_size = cudbg_poutbuf.size;
	return rc;
}

int
view_cim_q(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	   struct cudbg_buffer *cudbg_poutbuf,
	   enum chip_type chip)
{
	struct cudbg_buffer c_buff, dc_buff;
	u32 i, *pdata = NULL;
	int rc;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	pdata = (u32 *)dc_buff.data;
	for (i = 0; i < dc_buff.offset / 4; i += 4)
		printf("%#06x: %08x %08x %08x "\
			     "%08x\n", i * 4,
			     pdata[i + 0], pdata[i + 1],
			     pdata[i + 2], pdata[i + 3]);

	return rc;
}

static int
view_cim_la_t6(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	       struct cudbg_buffer *cudbg_poutbuf)
{
	struct cudbg_buffer c_buff, dc_buff;
	u32 i, *p, cfg, dc_size;
	int rc;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	dc_size = dc_buff.offset;
	p = (u32 *)((char *)dc_buff.data + sizeof(cfg));
	cfg = *((u32 *)dc_buff.data);
	dc_size -= sizeof(cfg);

	if (cfg & F_UPDBGLACAPTPCONLY) {
		printf("Status   Inst    Data      "\
			     "PC\r\n");

		for (i = 0; i < dc_size; i += 40, p += 10) {
			printf("  %02x   %08x %08x %08x\n",
				p[3] & 0xff, p[2], p[1], p[0]);

			printf("  %02x   %02x%06x %02x%06x %02x%06x\n",
				(p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8,
				     p[5] & 0xff, p[4] >> 8, p[4] & 0xff,
				     p[3] >> 8);

			printf("  %02x   %04x%04x %04x%04x %04x%04x\n",
				(p[9] >> 16) & 0xff, p[9] & 0xffff,
				p[8] >> 16, p[8] & 0xffff, p[7] >> 16,
				p[7] & 0xffff, p[6] >> 16);
		}
		goto err1;
	}

	printf("Status   Inst    Data      PC     "\
		     "LS0Stat  LS0Addr  LS0Data  LS1Stat  LS1Addr  LS1Data\n");

	for (i = 0; i < dc_size; i += 40, p += 10) {
		printf("  %02x   %04x%04x %04x%04x "\
			     "%04x%04x %08x %08x %08x %08x %08x %08x\n",
			     (p[9] >> 16) & 0xff,       /* Status */
			     p[9] & 0xffff, p[8] >> 16, /* Inst */
			     p[8] & 0xffff, p[7] >> 16, /* Data */
			     p[7] & 0xffff, p[6] >> 16, /* PC */
			     p[2], p[1], p[0],          /* LS0 Stat, Addr
							   and Data */
			     p[5], p[4], p[3]);         /* LS1 Stat, Addr
							   and Data */
	}

err1:
	return rc;
}

static int
view_cim_la_t5(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	       struct cudbg_buffer *cudbg_poutbuf)
{
	struct cudbg_buffer c_buff, dc_buff;
	u32 i, *p, cfg, dc_size;
	int rc;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	dc_size = dc_buff.offset;
	p = (u32 *)((char *)dc_buff.data + sizeof(cfg));
	cfg = *((u32 *)dc_buff.data);
	dc_size -= sizeof(cfg);

	if (cfg & F_UPDBGLACAPTPCONLY) {
		/* as per cim_la_show_3in1() (in
		 * sw\dev\linux\drv\cxgb4_main.c)*/
		printf("Status   Data      PC\r\n");

		for (i = 0; i < dc_size; i += 32, p += 8) {
			printf("  %02X   %08X %08X\r\n",
				(p[5] & 0xFF), p[6], p[7]);

			printf(
				     "  %02X   %02X%06X %02X%06X\n",
				     ((p[3] >> 8) & 0xFF), (p[3] & 0xFF),
				     (p[4] >> 8), (p[4] & 0xFF), (p[5] >> 8));

			printf(
				     "  %02X   %X%07X %X%07X\r\n",
				     ((p[0] >> 4) & 0xFF), (p[0] & 0xF),
				     (p[1] >> 4), (p[1] & 0xF), (p[2] >> 4));
		}
		goto err1;
	}

	printf("Status   Data      PC     LS0Stat  "\
		     "LS0Addr             LS0Data\n");

	for (i = 0; i < dc_size; i += 32, p += 8) {
		printf("%02x   %x%07x %x%07x %08x "\
			     "%08x %08x%08x%08x%08x\n",
			     ((p[0] >> 4) & 0xFF), (p[0] & 0xF), (p[1] >> 4),
			     (p[1] & 0xF), (p[2] >> 4), (p[2] & 0xF), p[3],
			     p[4], p[5], p[6], p[7]);
	}
err1:
	return rc;
}

int
view_cim_la(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	    struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	int rc = -1;

	if (is_t5(chip))
		rc = view_cim_la_t5(pbuf, entity_hdr, cudbg_poutbuf);
	else if (is_t6(chip))
		rc = view_cim_la_t6(pbuf, entity_hdr, cudbg_poutbuf);

	return rc;
}

int
view_cim_ma_la(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	       struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	struct cudbg_buffer c_buff, dc_buff;
	int rc, i, j;
	u32 *p;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	p = (u32 *)dc_buff.data;
	for (i = 0; i <= CIM_MALA_SIZE; i++, p += 4) {
		if (i < CIM_MALA_SIZE) {
			printf(
				     "%02x%08x%08x%08x%08x\n",
				     p[4], p[3], p[2], p[1], p[0]);
		} else {
			printf("\nCnt ID Tag UE   "\
				     "   Data       RDY VLD\n");
			for (j = 0; j < CIM_MALA_SIZE ; j++, p += 3) {
				printf(
					     "%3u %2u  %x  %u %08x%08x  %u   "\
					     "%u\n",
					     (p[2] >> 10) & 0xff,
					     (p[2] >> 7) & 7, (p[2] >> 3) & 0xf,
					     (p[2] >> 2) & 1,
					     (p[1] >> 2) | ((p[2] & 3) << 30),
					     (p[0] >> 2) | ((p[1] & 3) << 30),
					     (p[0] >> 1) & 1, p[0] & 1);
			}
		}
	}

	return rc;
}

int
view_cim_qcfg(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	      struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	static const char * const pQname[] = {
		"TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
		"ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI"
	};
	struct cudbg_buffer c_buff, dc_buff;
	struct struct_cim_qcfg *q_cfg_data;
	u32 *p, *wr;
	int rc, i;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	q_cfg_data = (struct struct_cim_qcfg *) (dc_buff.data);
	p = q_cfg_data->stat;
	wr = q_cfg_data->obq_wr;

	printf("  Queue Base Size Thres  RdPtr "\
		     "WrPtr  SOP  EOP Avail\n");
	for (i = 0; i < CIM_NUM_IBQ; i++, p += 4) {
		printf("%5s %5x %5u %4u %6x  %4x "\
			     "%4u %4u %5u\n",
			     pQname[i],
			     q_cfg_data->base[i], q_cfg_data->size[i],
			     q_cfg_data->thres[i], G_IBQRDADDR(p[0]),
			     G_IBQWRADDR(p[1]), G_QUESOPCNT(p[3]),
			     G_QUEEOPCNT(p[3]), G_QUEREMFLITS(p[2]) * 16);
	}

	for (; i < CIM_NUM_IBQ + CIM_NUM_OBQ; i++, p += 4, wr += 2) {
		printf("%5s %5x %5u %11x  %4x %4u "\
			     "%4u %5u\n",
			     pQname[i],
			     q_cfg_data->base[i], q_cfg_data->size[i],
			     G_QUERDADDR(p[0]) & 0x3fff,
			     wr[0] - q_cfg_data->base[i], G_QUESOPCNT(p[3]),
			     G_QUEEOPCNT(p[3]), G_QUEREMFLITS(p[2]) * 16);
	}

	return rc;
}

int
decompress_buffer_wrapper(struct cudbg_buffer *pc_buff,
			  struct cudbg_buffer *pdc_buff)
{
	int rc = 0;
	pdc_buff->data =  malloc(2 * CUDBG_CHUNK_SIZE);
	if (pdc_buff->data == NULL) {
		rc = CUDBG_STATUS_NOSPACE;
		goto err;
	}
	pdc_buff->size = 2 * CUDBG_CHUNK_SIZE;

	rc = decompress_buffer(pc_buff, pdc_buff);
	if (rc == CUDBG_STATUS_SMALL_BUFF) {
		free(pdc_buff->data);
		pdc_buff->data =  malloc(pdc_buff->size);

		if (pdc_buff->data == NULL) {
			printf("malloc failed for size %u\n", pdc_buff->size);
			rc = CUDBG_STATUS_NOSPACE;
			goto err;
		}
		rc = decompress_buffer(pc_buff, pdc_buff);
	}
err:
	return rc;
}

int
copy_bin_data(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	      const char *fname, struct cudbg_buffer *cudbg_poutbuf)
{
	struct cudbg_buffer c_buff, dc_buff;
	int rc = 0;

	if (cudbg_poutbuf->data == NULL)
		return 0;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	if (dc_buff.size > cudbg_poutbuf->size) {
		rc = CUDBG_STATUS_OUTBUFF_OVERFLOW;
		cudbg_poutbuf->size = dc_buff.size;
		goto err1;
	}

	memcpy(cudbg_poutbuf->data, dc_buff.data, dc_buff.size);
	cudbg_poutbuf->size = dc_buff.size;

err1:
	return rc;
}

int
view_edc0_data(char *pbuf, struct cudbg_entity_hdr *ent_hdr,
	       struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	return copy_bin_data(pbuf, ent_hdr, "_cudbg_edc0.bin", cudbg_poutbuf);
}

int
view_edc1_data(char *pbuf, struct cudbg_entity_hdr *ent_hdr,
	       struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	return copy_bin_data(pbuf, ent_hdr, "_cudbg_edc1.bin", cudbg_poutbuf);
}

int
view_mc0_data(char *pbuf, struct cudbg_entity_hdr *ent_hdr,
	      struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	return copy_bin_data(pbuf, ent_hdr, "_cudbg_mc0.bin", cudbg_poutbuf);
}

int
view_mc1_data(char *pbuf, struct cudbg_entity_hdr *ent_hdr,
	      struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	return copy_bin_data(pbuf, ent_hdr, "_cudbg_mc1.bin", cudbg_poutbuf);
}

int
view_hma_data(char *pbuf, struct cudbg_entity_hdr *ent_hdr,
	      struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	return copy_bin_data(pbuf, ent_hdr, "_cudbg_hma.bin", cudbg_poutbuf);
}

int
view_sw_state(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	      struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	struct cudbg_buffer c_buff, dc_buff;
	u8 os_type, *caller_string;
	struct sw_state *swstate;
	char *os, *fwstate;
	u32 fw_state;
	int rc = 0;

	rc = cudbg_view_decompress_buff(pbuf, entity_hdr, &c_buff, &dc_buff);
	if (rc)
		return rc;

	swstate = (struct sw_state *) dc_buff.data;
	fw_state = swstate->fw_state;
	caller_string = swstate->caller_string;
	os_type = swstate->os_type;

	printf("\n");
	if (fw_state & F_PCIE_FW_ERR && G_PCIE_FW_EVAL(fw_state) ==
	    PCIE_FW_EVAL_CRASH)
		fwstate = "Crashed";
	else
		fwstate = "Alive";

	switch (os_type) {
	case CUDBG_OS_TYPE_WINDOWS:
		os = "Windows";
		break;
	case CUDBG_OS_TYPE_LINUX:
		os = "Linux";
		break;
	case CUDBG_OS_TYPE_ESX:
		os = "ESX";
		break;
	case CUDBG_OS_TYPE_UNKNOWN:
	default:
		os = "Unknown";
	}

	printf("\tFW STATE  : %s\n", fwstate);
	printf("\tOS        : %s\n", os);
	printf("\tCALLER    : %s\n", caller_string);
	printf("\n");

	return rc;
}

int
view_cpl_stats(char *pbuf, struct cudbg_entity_hdr *entity_hdr,
	       struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip)
{
	struct struct_tp_cpl_stats *tp_cpl_stats_buff;
	struct cudbg_buffer c_buff, dc_buff;
	struct tp_cpl_stats stats;
	int rc = 0;