1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2001 Tsubai Masanari.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 *	NetBSD: ki2c.c,v 1.11 2007/12/06 17:00:33 ad Exp
30 *	Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp
31 */
32
33/*
34 * 	Support routines for the Keywest I2C controller.
35 */
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/kernel.h>
40#include <sys/module.h>
41#include <sys/bus.h>
42#include <sys/lock.h>
43#include <sys/mutex.h>
44#include <machine/resource.h>
45#include <machine/bus.h>
46#include <sys/rman.h>
47
48#include <dev/iicbus/iicbus.h>
49#include <dev/iicbus/iiconf.h>
50#include <dev/ofw/ofw_bus.h>
51#include "iicbus_if.h"
52
53/* Keywest I2C Register offsets */
54#define MODE	0
55#define CONTROL	1
56#define STATUS	2
57#define ISR	3
58#define IER	4
59#define ADDR	5
60#define SUBADDR	6
61#define DATA	7
62#define REV	8
63
64/* MODE */
65#define I2C_SPEED	0x03	/* Speed mask */
66#define  I2C_100kHz	0x00
67#define  I2C_50kHz	0x01
68#define  I2C_25kHz	0x02
69#define I2C_MODE	0x0c	/* Mode mask */
70#define  I2C_DUMBMODE	0x00	/*  Dumb mode */
71#define  I2C_STDMODE	0x04	/*  Standard mode */
72#define  I2C_STDSUBMODE	0x08	/*  Standard mode + sub address */
73#define  I2C_COMBMODE	0x0c	/*  Combined mode */
74#define I2C_PORT	0xf0	/* Port mask */
75
76/* CONTROL */
77#define I2C_CT_AAK	0x01	/* Send AAK */
78#define I2C_CT_ADDR	0x02	/* Send address(es) */
79#define I2C_CT_STOP	0x04	/* Send STOP */
80#define I2C_CT_START	0x08	/* Send START */
81
82/* STATUS */
83#define I2C_ST_BUSY	0x01	/* Busy */
84#define I2C_ST_LASTAAK	0x02	/* Last AAK */
85#define I2C_ST_LASTRW	0x04	/* Last R/W */
86#define I2C_ST_SDA	0x08	/* SDA */
87#define I2C_ST_SCL	0x10	/* SCL */
88
89/* ISR/IER */
90#define I2C_INT_DATA	0x01	/* Data byte sent/received */
91#define I2C_INT_ADDR	0x02	/* Address sent */
92#define I2C_INT_STOP	0x04	/* STOP condition sent */
93#define I2C_INT_START	0x08	/* START condition sent */
94
95/* I2C flags */
96#define I2C_BUSY	0x01
97#define I2C_READING	0x02
98#define I2C_ERROR	0x04
99#define I2C_SELECTED	0x08
100
101struct kiic_softc {
102	device_t 		 sc_dev;
103	phandle_t		 sc_node;
104	struct mtx 		 sc_mutex;
105	struct resource		*sc_reg;
106	int			 sc_irqrid;
107	struct resource		*sc_irq;
108	void			*sc_ih;
109	u_int 			 sc_regstep;
110	u_int 			 sc_flags;
111	u_char			*sc_data;
112	int 			 sc_resid;
113	uint16_t		 sc_i2c_base;
114	device_t 		 sc_iicbus;
115};
116
117static int 	kiic_probe(device_t dev);
118static int 	kiic_attach(device_t dev);
119static void 	kiic_writereg(struct kiic_softc *sc, u_int, u_int);
120static u_int 	kiic_readreg(struct kiic_softc *, u_int);
121static void 	kiic_setport(struct kiic_softc *, u_int);
122static void 	kiic_setmode(struct kiic_softc *, u_int);
123static void 	kiic_setspeed(struct kiic_softc *, u_int);
124static void 	kiic_intr(void *xsc);
125static int	kiic_transfer(device_t dev, struct iic_msg *msgs,
126		    uint32_t nmsgs);
127static phandle_t kiic_get_node(device_t bus, device_t dev);
128
129static device_method_t kiic_methods[] = {
130	/* device interface */
131	DEVMETHOD(device_probe, 	kiic_probe),
132	DEVMETHOD(device_attach, 	kiic_attach),
133
134	/* iicbus interface */
135	DEVMETHOD(iicbus_callback,	iicbus_null_callback),
136	DEVMETHOD(iicbus_transfer,	kiic_transfer),
137
138	/* ofw_bus interface */
139	DEVMETHOD(ofw_bus_get_node,	kiic_get_node),
140
141	{ 0, 0 }
142};
143
144static driver_t kiic_driver = {
145	"iichb",
146	kiic_methods,
147	sizeof(struct kiic_softc)
148};
149static devclass_t kiic_devclass;
150
151DRIVER_MODULE(kiic, macio, kiic_driver, kiic_devclass, 0, 0);
152DRIVER_MODULE(kiic, unin, kiic_driver, kiic_devclass, 0, 0);
153
154static int
155kiic_probe(device_t self)
156{
157	const char *name;
158
159	name = ofw_bus_get_name(self);
160	if (name && strcmp(name, "i2c") == 0) {
161		device_set_desc(self, "Keywest I2C controller");
162		return (0);
163	}
164
165	return (ENXIO);
166}
167
168static int
169kiic_attach(device_t self)
170{
171	struct kiic_softc *sc = device_get_softc(self);
172	int rid, rate;
173	phandle_t node;
174	char name[64];
175
176	bzero(sc, sizeof(*sc));
177	sc->sc_dev = self;
178
179	node = ofw_bus_get_node(self);
180	if (node == 0 || node == -1) {
181		return (EINVAL);
182	}
183
184	rid = 0;
185	sc->sc_reg = bus_alloc_resource_any(self, SYS_RES_MEMORY,
186			&rid, RF_ACTIVE);
187	if (sc->sc_reg == NULL) {
188		return (ENOMEM);
189	}
190
191	if (OF_getencprop(node, "AAPL,i2c-rate", &rate, 4) != 4) {
192		device_printf(self, "cannot get i2c-rate\n");
193		return (ENXIO);
194	}
195	if (OF_getencprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) {
196		device_printf(self, "unable to find i2c address step\n");
197		return (ENXIO);
198	}
199
200	/*
201	 * Some Keywest I2C devices have their children attached directly
202	 * underneath them.  Some have a single 'iicbus' child with the
203	 * devices underneath that.  Sort this out, and make sure that the
204	 * OFW I2C layer has the correct node.
205	 *
206	 * Note: the I2C children of the Uninorth bridges have two ports.
207	 *  In general, the port is designated in the 9th bit of the I2C
208	 *  address. However, for kiic devices with children attached below
209	 *  an i2c-bus node, the port is indicated in the 'reg' property
210	 *  of the i2c-bus node.
211	 */
212
213	sc->sc_node = node;
214
215	node = OF_child(node);
216	if (OF_getprop(node, "name", name, sizeof(name)) > 0) {
217		if (strcmp(name,"i2c-bus") == 0) {
218			phandle_t reg;
219			if (OF_getprop(node, "reg", &reg, sizeof(reg)) > 0)
220				sc->sc_i2c_base = reg << 8;
221
222			sc->sc_node = node;
223		}
224	}
225
226	mtx_init(&sc->sc_mutex, "kiic", NULL, MTX_DEF);
227
228	sc->sc_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, &sc->sc_irqrid,
229	    RF_ACTIVE);
230	bus_setup_intr(self, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE, NULL,
231	    kiic_intr, sc, &sc->sc_ih);
232
233	kiic_writereg(sc, ISR, kiic_readreg(sc, ISR));
234	kiic_writereg(sc, STATUS, 0);
235	kiic_writereg(sc, IER, 0);
236
237	kiic_setmode(sc, I2C_STDMODE);
238	kiic_setspeed(sc, I2C_100kHz);		/* XXX rate */
239
240	kiic_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR | I2C_INT_STOP);
241
242	if (bootverbose)
243		device_printf(self, "Revision: %02X\n", kiic_readreg(sc, REV));
244
245	/* Add the IIC bus layer */
246	sc->sc_iicbus = device_add_child(self, "iicbus", -1);
247
248	return (bus_generic_attach(self));
249}
250
251static void
252kiic_writereg(struct kiic_softc *sc, u_int reg, u_int val)
253{
254	bus_write_4(sc->sc_reg, sc->sc_regstep * reg, val);
255	DELAY(100); /* register access delay */
256}
257
258static u_int
259kiic_readreg(struct kiic_softc *sc, u_int reg)
260{
261	return bus_read_4(sc->sc_reg, sc->sc_regstep * reg) & 0xff;
262}
263
264static void
265kiic_setmode(struct kiic_softc *sc, u_int mode)
266{
267	u_int x;
268
269	KASSERT((mode & ~I2C_MODE) == 0, ("bad mode"));
270	x = kiic_readreg(sc, MODE);
271	x &= ~I2C_MODE;
272	x |= mode;
273	kiic_writereg(sc, MODE, x);
274}
275
276static void
277kiic_setport(struct kiic_softc *sc, u_int port)
278{
279	u_int x;
280
281	KASSERT(port == 1 || port == 0, ("bad port"));
282	x = kiic_readreg(sc, MODE);
283	x &= ~I2C_PORT;
284	x |= (port << 4);
285	kiic_writereg(sc, MODE, x);
286}
287
288static void
289kiic_setspeed(struct kiic_softc *sc, u_int speed)
290{
291	u_int x;
292
293	KASSERT((speed & ~I2C_SPEED) == 0, ("bad speed"));
294	x = kiic_readreg(sc, MODE);
295	x &= ~I2C_SPEED;
296	x |= speed;
297	kiic_writereg(sc, MODE, x);
298}
299
300static void
301kiic_intr(void *xsc)
302{
303	struct kiic_softc *sc = xsc;
304	u_int isr;
305	uint32_t x;
306
307	mtx_lock(&sc->sc_mutex);
308	isr = kiic_readreg(sc, ISR);
309
310	if (isr & I2C_INT_ADDR) {
311		sc->sc_flags |= I2C_SELECTED;
312
313		if (sc->sc_flags & I2C_READING) {
314			if (sc->sc_resid > 1) {
315				x = kiic_readreg(sc, CONTROL);
316				x |= I2C_CT_AAK;
317				kiic_writereg(sc, CONTROL, x);
318			}
319		} else {
320			kiic_writereg(sc, DATA, *sc->sc_data++);
321			sc->sc_resid--;
322		}
323	}
324
325	if (isr & I2C_INT_DATA) {
326		if (sc->sc_flags & I2C_READING) {
327			if (sc->sc_resid > 0) {
328				*sc->sc_data++ = kiic_readreg(sc, DATA);
329				sc->sc_resid--;
330			}
331			if (sc->sc_resid == 0)  /* done */
332				kiic_writereg(sc, CONTROL, 0);
333		} else {
334			if (sc->sc_resid == 0) {
335				x = kiic_readreg(sc, CONTROL);
336				x |= I2C_CT_STOP;
337				kiic_writereg(sc, CONTROL, x);
338			} else {
339				kiic_writereg(sc, DATA, *sc->sc_data++);
340				sc->sc_resid--;
341			}
342		}
343	}
344
345	if (isr & I2C_INT_STOP) {
346		kiic_writereg(sc, CONTROL, 0);
347		sc->sc_flags &= ~I2C_SELECTED;
348		wakeup(sc->sc_dev);
349	}
350
351	kiic_writereg(sc, ISR, isr);
352	mtx_unlock(&sc->sc_mutex);
353}
354
355static int
356kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
357{
358	struct kiic_softc *sc;
359	int i, x, timo, err;
360	uint16_t addr;
361	uint8_t subaddr;
362
363	sc = device_get_softc(dev);
364	timo = 100;
365	subaddr = 0;
366
367	mtx_lock(&sc->sc_mutex);
368
369	if (sc->sc_flags & I2C_BUSY)
370		mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo);
371
372	if (sc->sc_flags & I2C_BUSY) {
373		mtx_unlock(&sc->sc_mutex);
374		return (ETIMEDOUT);
375	}
376
377	sc->sc_flags = I2C_BUSY;
378
379	/* Clear pending interrupts, and reset controller */
380	kiic_writereg(sc, ISR, kiic_readreg(sc, ISR));
381	kiic_writereg(sc, STATUS, 0);
382
383	for (i = 0; i < nmsgs; i++) {
384		if (msgs[i].flags & IIC_M_NOSTOP) {
385			if (msgs[i+1].flags & IIC_M_RD)
386				kiic_setmode(sc, I2C_COMBMODE);
387			else
388				kiic_setmode(sc, I2C_STDSUBMODE);
389			KASSERT(msgs[i].len == 1, ("oversize I2C message"));
390			subaddr = msgs[i].buf[0];
391			i++;
392		} else {
393			kiic_setmode(sc, I2C_STDMODE);
394		}
395
396		sc->sc_data = msgs[i].buf;
397		sc->sc_resid = msgs[i].len;
398		sc->sc_flags = I2C_BUSY;
399		addr = msgs[i].slave;
400		timo = 1000 + sc->sc_resid * 200;
401		timo += 100000;
402
403		if (msgs[i].flags & IIC_M_RD) {
404			sc->sc_flags |= I2C_READING;
405			addr |= 1;
406		}
407
408		addr |= sc->sc_i2c_base;
409
410		kiic_setport(sc, (addr & 0x100) >> 8);
411		kiic_writereg(sc, ADDR, addr & 0xff);
412		kiic_writereg(sc, SUBADDR, subaddr);
413
414		x = kiic_readreg(sc, CONTROL) | I2C_CT_ADDR;
415		kiic_writereg(sc, CONTROL, x);
416
417		err = mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo);
418
419		msgs[i].len -= sc->sc_resid;
420
421		if ((sc->sc_flags & I2C_ERROR) || err == EWOULDBLOCK) {
422			device_printf(sc->sc_dev, "I2C error\n");
423			sc->sc_flags = 0;
424			mtx_unlock(&sc->sc_mutex);
425			return (EIO);
426		}
427	}
428
429	sc->sc_flags = 0;
430
431	mtx_unlock(&sc->sc_mutex);
432
433	return (0);
434}
435
436static phandle_t
437kiic_get_node(device_t bus, device_t dev)
438{
439	struct kiic_softc *sc;
440
441	sc = device_get_softc(bus);
442	/* We only have one child, the I2C bus, which needs our own node. */
443
444	return sc->sc_node;
445}
446
447