1d626af5arybchik/*-
2d626af5arybchik * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3d626af5arybchik *
4d626af5arybchik * Copyright (c) 2015-2018 Solarflare Communications Inc.
5d626af5arybchik * All rights reserved.
6d626af5arybchik *
7d626af5arybchik * Redistribution and use in source and binary forms, with or without
8d626af5arybchik * modification, are permitted provided that the following conditions are met:
9d626af5arybchik *
10d626af5arybchik * 1. Redistributions of source code must retain the above copyright notice,
11d626af5arybchik *    this list of conditions and the following disclaimer.
12d626af5arybchik * 2. Redistributions in binary form must reproduce the above copyright notice,
13d626af5arybchik *    this list of conditions and the following disclaimer in the documentation
14d626af5arybchik *    and/or other materials provided with the distribution.
15d626af5arybchik *
16d626af5arybchik * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17d626af5arybchik * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18d626af5arybchik * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19d626af5arybchik * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
20d626af5arybchik * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21d626af5arybchik * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22d626af5arybchik * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23d626af5arybchik * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24d626af5arybchik * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25d626af5arybchik * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26d626af5arybchik * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27d626af5arybchik *
28d626af5arybchik * The views and conclusions contained in the software and documentation are
29d626af5arybchik * those of the authors and should not be interpreted as representing official
30d626af5arybchik * policies, either expressed or implied, of the FreeBSD Project.
31d626af5arybchik */
32d626af5arybchik
33d626af5arybchik#include <sys/cdefs.h>
34d626af5arybchik__FBSDID("$FreeBSD$");
35d626af5arybchik
36d626af5arybchik#include "efx.h"
37d626af5arybchik#include "efx_impl.h"
38d626af5arybchik
39d626af5arybchik
40d626af5arybchik#if EFSYS_OPT_MEDFORD2
41d626af5arybchik
42d626af5arybchikstatic	__checkReturn	efx_rc_t
43d626af5arybchikmedford2_nic_get_required_pcie_bandwidth(
44d626af5arybchik	__in		efx_nic_t *enp,
45d626af5arybchik	__out		uint32_t *bandwidth_mbpsp)
46d626af5arybchik{
47d626af5arybchik	uint32_t bandwidth;
48d626af5arybchik	efx_rc_t rc;
49d626af5arybchik
50d626af5arybchik	/* FIXME: support new Medford2 dynamic port modes */
51d626af5arybchik
528eae730arybchik	if ((rc = ef10_nic_get_port_mode_bandwidth(enp,
53d626af5arybchik						    &bandwidth)) != 0)
54d626af5arybchik		goto fail1;
55d626af5arybchik
56d626af5arybchik	*bandwidth_mbpsp = bandwidth;
57d626af5arybchik
58d626af5arybchik	return (0);
59d626af5arybchik
60d626af5arybchikfail1:
61d626af5arybchik	EFSYS_PROBE1(fail1, efx_rc_t, rc);
62d626af5arybchik
63d626af5arybchik	return (rc);
64d626af5arybchik}
65d626af5arybchik
66d626af5arybchik	__checkReturn	efx_rc_t
67d626af5arybchikmedford2_board_cfg(
68d626af5arybchik	__in		efx_nic_t *enp)
69d626af5arybchik{
70d626af5arybchik	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
71d626af5arybchik	uint32_t sysclk, dpcpu_clk;
72d626af5arybchik	uint32_t end_padding;
73d626af5arybchik	uint32_t bandwidth;
74d626af5arybchik	efx_rc_t rc;
75d626af5arybchik
76d626af5arybchik	/*
77d626af5arybchik	 * Enable firmware workarounds for hardware errata.
78d626af5arybchik	 * Expected responses are:
79d626af5arybchik	 *  - 0 (zero):
80d626af5arybchik	 *	Success: workaround enabled or disabled as requested.
81d626af5arybchik	 *  - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
82d626af5arybchik	 *	Firmware does not support the MC_CMD_WORKAROUND request.
83d626af5arybchik	 *	(assume that the workaround is not supported).
84d626af5arybchik	 *  - MC_CMD_ERR_ENOENT (reported as ENOENT):
85d626af5arybchik	 *	Firmware does not support the requested workaround.
86d626af5arybchik	 *  - MC_CMD_ERR_EPERM  (reported as EACCES):
87d626af5arybchik	 *	Unprivileged function cannot enable/disable workarounds.
88d626af5arybchik	 *
89d626af5arybchik	 * See efx_mcdi_request_errcode() for MCDI error translations.
90d626af5arybchik	 */
91d626af5arybchik
92d626af5arybchik
93d626af5arybchik	if (EFX_PCI_FUNCTION_IS_VF(encp)) {
94d626af5arybchik		/*
95ae4036carybchik		 * Interrupt testing does not work for VFs on Medford2.
96ae4036carybchik		 * See bug50084 and bug71432 comment 21.
97d626af5arybchik		 */
98d626af5arybchik		encp->enc_bug41750_workaround = B_TRUE;
99d626af5arybchik	}
100d626af5arybchik
101d626af5arybchik	/* Chained multicast is always enabled on Medford2 */
102d626af5arybchik	encp->enc_bug26807_workaround = B_TRUE;
103d626af5arybchik
104d626af5arybchik	/*
105d626af5arybchik	 * If the bug61265 workaround is enabled, then interrupt holdoff timers
106d626af5arybchik	 * cannot be controlled by timer table writes, so MCDI must be used
107d626af5arybchik	 * (timer table writes can still be used for wakeup timers).
108d626af5arybchik	 */
109d626af5arybchik	rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
110d626af5arybchik	    NULL);
111d626af5arybchik	if ((rc == 0) || (rc == EACCES))
112d626af5arybchik		encp->enc_bug61265_workaround = B_TRUE;
113d626af5arybchik	else if ((rc == ENOTSUP) || (rc == ENOENT))
114d626af5arybchik		encp->enc_bug61265_workaround = B_FALSE;
115d626af5arybchik	else
11673a9c56arybchik		goto fail1;
117d626af5arybchik
11857e163earybchik	/* Checksums for TSO sends should always be correct on Medford2. */
11957e163earybchik	encp->enc_bug61297_workaround = B_FALSE;
12057e163earybchik
121d626af5arybchik	/* Get clock frequencies (in MHz). */
122d626af5arybchik	if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
12373a9c56arybchik		goto fail2;
124d626af5arybchik
125d626af5arybchik	/*
126d626af5arybchik	 * The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
127d626af5arybchik	 * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
128d626af5arybchik	 */
129d626af5arybchik	encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
130d626af5arybchik	encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
131d626af5arybchik		    FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
132d626af5arybchik
133d626af5arybchik	/* Alignment for receive packet DMA buffers */
134d626af5arybchik	encp->enc_rx_buf_align_start = 1;
135d626af5arybchik
136d626af5arybchik	/* Get the RX DMA end padding alignment configuration */
137d626af5arybchik	if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
138d626af5arybchik		if (rc != EACCES)
13973a9c56arybchik			goto fail3;
140d626af5arybchik
141d626af5arybchik		/* Assume largest tail padding size supported by hardware */
142d626af5arybchik		end_padding = 256;
143d626af5arybchik	}
144d626af5arybchik	encp->enc_rx_buf_align_end = end_padding;
145d626af5arybchik
146d626af5arybchik	/*
147d626af5arybchik	 * The maximum supported transmit queue size is 2048. TXQs with 4096
148d626af5arybchik	 * descriptors are not supported as the top bit is used for vfifo
149d626af5arybchik	 * stuffing.
150d626af5arybchik	 */
151d626af5arybchik	encp->enc_txq_max_ndescs = 2048;
152d626af5arybchik
153cb198e0arybchik	EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
154d626af5arybchik	encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
155d626af5arybchik	encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
156d626af5arybchik	encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
157d626af5arybchik
158d626af5arybchik	/*
159d626af5arybchik	 * Medford2 stores a single global copy of VPD, not per-PF as on
160d626af5arybchik	 * Huntington.
161d626af5arybchik	 */
162d626af5arybchik	encp->enc_vpd_is_global = B_TRUE;
163d626af5arybchik
164d626af5arybchik	rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
165d626af5arybchik	if (rc != 0)
16673a9c56arybchik		goto fail4;
167d626af5arybchik	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
168d626af5arybchik	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
169d626af5arybchik
170d626af5arybchik	return (0);
171d626af5arybchik
172d626af5arybchikfail4:
173d626af5arybchik	EFSYS_PROBE(fail4);
174d626af5arybchikfail3:
175d626af5arybchik	EFSYS_PROBE(fail3);
176d626af5arybchikfail2:
177d626af5arybchik	EFSYS_PROBE(fail2);
178d626af5arybchikfail1:
179d626af5arybchik	EFSYS_PROBE1(fail1, efx_rc_t, rc);
180d626af5arybchik
181d626af5arybchik	return (rc);
182d626af5arybchik}
183d626af5arybchik
184d626af5arybchik#endif	/* EFSYS_OPT_MEDFORD2 */
185