1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2015-2018 Solarflare Communications Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 *    this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 *    this list of conditions and the following disclaimer in the documentation
14 *    and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * The views and conclusions contained in the software and documentation are
29 * those of the authors and should not be interpreted as representing official
30 * policies, either expressed or implied, of the FreeBSD Project.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD$");
35
36#include "efx.h"
37#include "efx_impl.h"
38
39
40#if EFSYS_OPT_MEDFORD2
41
42static	__checkReturn	efx_rc_t
43medford2_nic_get_required_pcie_bandwidth(
44	__in		efx_nic_t *enp,
45	__out		uint32_t *bandwidth_mbpsp)
46{
47	uint32_t bandwidth;
48	efx_rc_t rc;
49
50	/* FIXME: support new Medford2 dynamic port modes */
51
52	if ((rc = ef10_nic_get_port_mode_bandwidth(enp,
53						    &bandwidth)) != 0)
54		goto fail1;
55
56	*bandwidth_mbpsp = bandwidth;
57
58	return (0);
59
60fail1:
61	EFSYS_PROBE1(fail1, efx_rc_t, rc);
62
63	return (rc);
64}
65
66	__checkReturn	efx_rc_t
67medford2_board_cfg(
68	__in		efx_nic_t *enp)
69{
70	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
71	uint32_t sysclk, dpcpu_clk;
72	uint32_t end_padding;
73	uint32_t bandwidth;
74	efx_rc_t rc;
75
76	/*
77	 * Enable firmware workarounds for hardware errata.
78	 * Expected responses are:
79	 *  - 0 (zero):
80	 *	Success: workaround enabled or disabled as requested.
81	 *  - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
82	 *	Firmware does not support the MC_CMD_WORKAROUND request.
83	 *	(assume that the workaround is not supported).
84	 *  - MC_CMD_ERR_ENOENT (reported as ENOENT):
85	 *	Firmware does not support the requested workaround.
86	 *  - MC_CMD_ERR_EPERM  (reported as EACCES):
87	 *	Unprivileged function cannot enable/disable workarounds.
88	 *
89	 * See efx_mcdi_request_errcode() for MCDI error translations.
90	 */
91
92
93	if (EFX_PCI_FUNCTION_IS_VF(encp)) {
94		/*
95		 * Interrupt testing does not work for VFs on Medford2.
96		 * See bug50084 and bug71432 comment 21.
97		 */
98		encp->enc_bug41750_workaround = B_TRUE;
99	}
100
101	/* Chained multicast is always enabled on Medford2 */
102	encp->enc_bug26807_workaround = B_TRUE;
103
104	/*
105	 * If the bug61265 workaround is enabled, then interrupt holdoff timers
106	 * cannot be controlled by timer table writes, so MCDI must be used
107	 * (timer table writes can still be used for wakeup timers).
108	 */
109	rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
110	    NULL);
111	if ((rc == 0) || (rc == EACCES))
112		encp->enc_bug61265_workaround = B_TRUE;
113	else if ((rc == ENOTSUP) || (rc == ENOENT))
114		encp->enc_bug61265_workaround = B_FALSE;
115	else
116		goto fail1;
117
118	/* Checksums for TSO sends should always be correct on Medford2. */
119	encp->enc_bug61297_workaround = B_FALSE;
120
121	/* Get clock frequencies (in MHz). */
122	if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
123		goto fail2;
124
125	/*
126	 * The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
127	 * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
128	 */
129	encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
130	encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
131		    FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
132
133	/* Alignment for receive packet DMA buffers */
134	encp->enc_rx_buf_align_start = 1;
135
136	/* Get the RX DMA end padding alignment configuration */
137	if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
138		if (rc != EACCES)
139			goto fail3;
140
141		/* Assume largest tail padding size supported by hardware */
142		end_padding = 256;
143	}
144	encp->enc_rx_buf_align_end = end_padding;
145
146	/*
147	 * The maximum supported transmit queue size is 2048. TXQs with 4096
148	 * descriptors are not supported as the top bit is used for vfifo
149	 * stuffing.
150	 */
151	encp->enc_txq_max_ndescs = 2048;
152
153	EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
154	encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
155	encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
156	encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
157
158	/*
159	 * Medford2 stores a single global copy of VPD, not per-PF as on
160	 * Huntington.
161	 */
162	encp->enc_vpd_is_global = B_TRUE;
163
164	rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
165	if (rc != 0)
166		goto fail4;
167	encp->enc_required_pcie_bandwidth_mbps = bandwidth;
168	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
169
170	return (0);
171
172fail4:
173	EFSYS_PROBE(fail4);
174fail3:
175	EFSYS_PROBE(fail3);
176fail2:
177	EFSYS_PROBE(fail2);
178fail1:
179	EFSYS_PROBE1(fail1, efx_rc_t, rc);
180
181	return (rc);
182}
183
184#endif	/* EFSYS_OPT_MEDFORD2 */
185