1c2fa353ps/*-
2ebda8d9pfg * SPDX-License-Identifier: BSD-3-Clause
3ebda8d9pfg *
48095e01davidcs * Copyright (c) 2006-2014 QLogic Corporation
5c2fa353ps *
6c2fa353ps * Redistribution and use in source and binary forms, with or without
7c2fa353ps * modification, are permitted provided that the following conditions
8c2fa353ps * are met:
9c2fa353ps * 1. Redistributions of source code must retain the above copyright
10c2fa353ps *    notice, this list of conditions and the following disclaimer.
11c2fa353ps * 2. Redistributions in binary form must reproduce the above copyright
12c2fa353ps *    notice, this list of conditions and the following disclaimer in the
13c2fa353ps *    documentation and/or other materials provided with the distribution.
14c2fa353ps *
15c2fa353ps * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
16c2fa353ps * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17c2fa353ps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18c2fa353ps * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
19c2fa353ps * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20c2fa353ps * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21c2fa353ps * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22c2fa353ps * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23c2fa353ps * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24c2fa353ps * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
25c2fa353ps * THE POSSIBILITY OF SUCH DAMAGE.
26c2fa353ps *
27c2fa353ps * $FreeBSD$
28c2fa353ps */
29c2fa353ps
303b8bffcdavidch#ifndef	_BCEREG_H_DEFINED
313b8bffcdavidch#define _BCEREG_H_DEFINED
32c2fa353ps
33c2fa353ps/****************************************************************************/
34c2fa353ps/* Conversion to FreeBSD type definitions.                                  */
35c2fa353ps/****************************************************************************/
36c2fa353ps#define u64 uint64_t
37d037577davidch#define u32 uint32_t
38d037577davidch#define u16 uint16_t
39d037577davidch#define u8  uint8_t
40c2fa353ps
41c2fa353ps#if BYTE_ORDER == BIG_ENDIAN
42c2fa353ps#define __BIG_ENDIAN 1
43c2fa353ps#undef  __LITTLE_ENDIAN
44c2fa353ps#else
45c2fa353ps#undef  __BIG_ENDIAN
46c2fa353ps#define __LITTLE_ENDIAN 1
47c2fa353ps#endif
480f2382bdavidch
490f2382bdavidch#define BCE_DWORD_PRINTFB	\
50d037577davidch	"\020"			\
51d037577davidch	"\40b31"		\
52d037577davidch	"\37b30"		\
53d037577davidch	"\36b29"		\
54d037577davidch	"\35b28"		\
55d037577davidch	"\34b27"		\
56d037577davidch	"\33b26"		\
57d037577davidch	"\32b25"		\
58d037577davidch	"\31b24"		\
59d037577davidch	"\30b23"		\
60d037577davidch	"\27b22"		\
61d037577davidch	"\26b21"		\
62d037577davidch	"\25b20"		\
63d037577davidch	"\24b19"		\
64d037577davidch	"\23b18"		\
65d037577davidch	"\22b17"		\
66d037577davidch	"\21b16"		\
67d037577davidch	"\20b15"		\
68d037577davidch	"\17b14"		\
69d037577davidch	"\16b13"		\
70d037577davidch	"\15b12"		\
71d037577davidch	"\14b11"		\
72d037577davidch	"\13b10"		\
73d037577davidch	"\12b9"			\
74d037577davidch	"\11b8"			\
75d037577davidch	"\10b7"			\
76d037577davidch	"\07b6"			\
77d037577davidch	"\06b5"			\
78d037577davidch	"\05b4"			\
79d037577davidch	"\04b3"			\
80d037577davidch	"\03b2"			\
81d037577davidch	"\02b1"			\
820f2382bdavidch	"\01b0"
830f2382bdavidch
842156989davidch/* MII Control Register 0x0 */
852156989davidch#define BCE_BMCR_PRINTFB	\
86d037577davidch	"\020"			\
87d037577davidch	"\20Reset"		\
88d037577davidch	"\17Loopback"		\
89d037577davidch	"\16Spd0"		\
90d037577davidch	"\15AnegEna"		\
91d037577davidch	"\14PwrDn"		\
92d037577davidch	"\13Isolate"		\
93d037577davidch	"\12RstrtAneg"		\
94d037577davidch	"\11FD"			\
95d037577davidch	"\10CollTst"		\
96d037577davidch	"\07Spd1"		\
97d037577davidch	"\06Rsrvd"		\
98d037577davidch	"\05Rsrvd"		\
99d037577davidch	"\04Rsrvd"		\
100d037577davidch	"\03Rsrvd"		\
101d037577davidch	"\02Rsrvd"		\
1022156989davidch	"\01Rsrvd"
1032156989davidch
1042156989davidch/* MII Status Register 0x1 */
1052156989davidch#define BCE_BMSR_PRINTFB	\
106d037577davidch	"\020"			\
107d037577davidch	"\20Cap100T4"		\
108d037577davidch	"\17Cap100XFD"		\
109d037577davidch	"\16Cap100XHD"		\
110d037577davidch	"\15Cap10FD"		\
111d037577davidch	"\14Cap10HD"		\
112d037577davidch	"\13Cap100T2FD"		\
113d037577davidch	"\12Cap100T2HD"		\
114d037577davidch	"\11ExtStsPrsnt"	\
115d037577davidch	"\10Rsrvd"		\
116d037577davidch	"\07PrmblSupp"		\
117d037577davidch	"\06AnegCmpl"		\
118d037577davidch	"\05RemFaultDet"	\
119d037577davidch	"\04AnegCap"		\
120d037577davidch	"\03LnkUp"		\
121d037577davidch	"\02JabberDet"		\
1222156989davidch	"\01ExtCapSupp"
1232156989davidch
1242156989davidch/* MII Autoneg Advertisement Register 0x4 */
1252156989davidch#define BCE_ANAR_PRINTFB	\
126d037577davidch	"\020"			\
127d037577davidch	"\20AdvNxtPg"		\
128d037577davidch	"\17Rsrvd"		\
129d037577davidch	"\16AdvRemFault"	\
130d037577davidch	"\15Rsrvd"		\
131d037577davidch	"\14AdvAsymPause"	\
132d037577davidch	"\13AdvPause"		\
133d037577davidch	"\12Adv100T4"		\
134d037577davidch	"\11Adv100FD"		\
135d037577davidch	"\10Adv100HD"		\
136d037577davidch	"\07Adv10FD"		\
137d037577davidch	"\06Adv10HD"		\
138d037577davidch	"\05Rsrvd"		\
139d037577davidch	"\04Rsrvd"		\
140d037577davidch	"\03Rsrvd"		\
141d037577davidch	"\02Rsrvd"		\
1422156989davidch	"\01Adv802.3"
1432156989davidch
1442156989davidch/* MII Autoneg Link Partner Ability Register 0x5 */
1452156989davidch#define BCE_ANLPAR_PRINTFB	\
146d037577davidch	"\020"			\
147d037577davidch	"\20CapNxtPg"		\
148d037577davidch	"\17Ack"		\
149d037577davidch	"\16CapRemFault"	\
150d037577davidch	"\15Rsrvd"		\
151d037577davidch	"\14CapAsymPause"	\
152d037577davidch	"\13CapPause"		\
153d037577davidch	"\12Cap100T4"		\
154d037577davidch	"\11Cap100FD"		\
155d037577davidch	"\10Cap100HD"		\
156d037577davidch	"\07Cap10FD"		\
157d037577davidch	"\06Cap10HD"		\
158d037577davidch	"\05Rsrvd"		\
159d037577davidch	"\04Rsrvd"		\
160d037577davidch	"\03Rsrvd"		\
161d037577davidch	"\02Rsrvd"		\
1622156989davidch	"\01Cap802.3"
1632156989davidch
1642156989davidch/* 1000Base-T Control Register 0x09 */
1652156989davidch#define BCE_1000CTL_PRINTFB	\
166d037577davidch	"\020"			\
167d037577davidch	"\20Test3"		\
168d037577davidch	"\17Test2"		\
169d037577davidch	"\16Test1"		\
170d037577davidch	"\15MasterSlave"	\
171d037577davidch	"\14ForceMaster"	\
172d037577davidch	"\13SwitchDev" 		\
173d037577davidch	"\12Adv1000TFD"		\
174d037577davidch	"\11Adv1000THD"		\
175d037577davidch	"\10Rsrvd"		\
176d037577davidch	"\07Rsrvd"		\
177d037577davidch	"\06Rsrvd"		\
178d037577davidch	"\05Rsrvd"		\
179d037577davidch	"\04Rsrvd"		\
180d037577davidch	"\03Rsrvd"		\
181d037577davidch	"\02Rsrvd"		\
1822156989davidch	"\01Rsrvd"
1832156989davidch
1842156989davidch/* MII 1000Base-T Status Register 0x0a */
1852156989davidch#define BCE_1000STS_PRINTFB	\
186d037577davidch	"\020"			\
187d037577davidch	"\20MstrSlvFault"	\
188d037577davidch	"\17Master"		\
189d037577davidch	"\16LclRcvrOk"		\
190d037577davidch	"\15RemRcvrOk"		\
191d037577davidch	"\14Cap1000FD"		\
192d037577davidch	"\13Cpa1000HD"		\
193d037577davidch	"\12Rsrvd"		\
1942156989davidch	"\11Rsrvd"
1952156989davidch
1962156989davidch/* MII Extended Status Register 0x0f */
1972156989davidch#define BCE_EXTSTS_PRINTFB	\
198d037577davidch	"\020"			\
199d037577davidch	"\20b15"		\
200d037577davidch	"\17b14"		\
201d037577davidch	"\16b13"		\
202d037577davidch	"\15b12"		\
203d037577davidch	"\14Rsrvd"		\
204d037577davidch	"\13Rsrvd"		\
205d037577davidch	"\12Rsrvd"		\
206d037577davidch	"\11Rsrvd"		\
207d037577davidch	"\10Rsrvd"		\
208d037577davidch	"\07Rsrvd"		\
209d037577davidch	"\06Rsrvd" 		\
210d037577davidch	"\05Rsrvd"		\
211d037577davidch	"\04Rsrvd"		\
212d037577davidch	"\03Rsrvd"		\
213d037577davidch	"\02Rsrvd"		\
2142156989davidch	"\01Rsrvd"
2152156989davidch
2162156989davidch/* MII Autoneg Link Partner Ability Register 0x19 */
2172156989davidch#define BCE_AUXSTS_PRINTFB	\
218d037577davidch	"\020"			\
219d037577davidch	"\20AnegCmpl"		\
220d037577davidch	"\17AnegCmplAck"	\
221d037577davidch	"\16AnegAckDet"		\
222d037577davidch	"\15AnegAblDet"		\
223d037577davidch	"\14AnegNextPgWait"	\
224d037577davidch	"\13HCD"		\
225d037577davidch	"\12HCD" 		\
226d037577davidch	"\11HCD" 		\
227d037577davidch	"\10PrlDetFault"	\
228d037577davidch	"\07RemFault"		\
229d037577davidch	"\06PgRcvd"		\
2302156989davidch	"\05LnkPrtnrAnegAbl"	\
231d037577davidch	"\04LnkPrtnrNPAbl"	\
232d037577davidch	"\03LnkUp"		\
233d037577davidch	"\02EnaPauseRcv"	\
2342156989davidch	"\01EnaPausXmit"
2352156989davidch
2365724de4davidch/*
2375724de4davidch * Remove before release:
238d037577davidch *
239d037577davidch * #define BCE_DEBUG
240d037577davidch * #define BCE_NVRAM_WRITE_SUPPORT
241d037577davidch */
2420f2382bdavidch
243c2fa353ps/****************************************************************************/
244c2fa353ps/* Debugging macros and definitions.                                        */
2452156989davidch/****************************************************************************/
2462156989davidch
247d037577davidch#define BCE_CP_LOAD 		0x00000001
248d037577davidch#define BCE_CP_SEND		0x00000002
249d037577davidch#define BCE_CP_RECV		0x00000004
250d037577davidch#define BCE_CP_INTR		0x00000008
251d037577davidch#define BCE_CP_UNLOAD		0x00000010
252d037577davidch#define BCE_CP_RESET		0x00000020
25393acd8bdavidch#define BCE_CP_PHY			0x00000040
254d037577davidch#define BCE_CP_NVRAM		0x00000080
25593acd8bdavidch#define BCE_CP_FIRMWARE	0x00000100
25693acd8bdavidch#define BCE_CP_CTX			0x00000200
25793acd8bdavidch#define BCE_CP_REG			0x00000400
258d037577davidch#define BCE_CP_MISC		0x00400000
259d037577davidch#define BCE_CP_SPECIAL		0x00800000
26093acd8bdavidch#define BCE_CP_ALL			0x00FFFFFF
261d037577davidch
262d037577davidch#define BCE_CP_MASK		0x00FFFFFF
263d037577davidch
26493acd8bdavidch#define BCE_LEVEL_FATAL	0x00000000
265d037577davidch#define BCE_LEVEL_WARN		0x01000000
266d037577davidch#define BCE_LEVEL_INFO		0x02000000
267d037577davidch#define BCE_LEVEL_VERBOSE	0x03000000
268d037577davidch#define BCE_LEVEL_EXTREME	0x04000000
269d037577davidch#define BCE_LEVEL_INSANE	0x05000000
270d037577davidch
271d037577davidch#define BCE_LEVEL_MASK		0xFF000000
272d037577davidch
273d037577davidch#define BCE_WARN_LOAD		(BCE_CP_LOAD | BCE_LEVEL_WARN)
274d037577davidch#define BCE_INFO_LOAD		(BCE_CP_LOAD | BCE_LEVEL_INFO)
275d037577davidch#define BCE_VERBOSE_LOAD	(BCE_CP_LOAD | BCE_LEVEL_VERBOSE)
276d037577davidch#define BCE_EXTREME_LOAD	(BCE_CP_LOAD | BCE_LEVEL_EXTREME)
27793acd8bdavidch#define BCE_INSANE_LOAD	(BCE_CP_LOAD | BCE_LEVEL_INSANE)
278d037577davidch
279d037577davidch#define BCE_WARN_SEND		(BCE_CP_SEND | BCE_LEVEL_WARN)
280d037577davidch#define BCE_INFO_SEND		(BCE_CP_SEND | BCE_LEVEL_INFO)
281d037577davidch#define BCE_VERBOSE_SEND	(BCE_CP_SEND | BCE_LEVEL_VERBOSE)
282d037577davidch#define BCE_EXTREME_SEND	(BCE_CP_SEND | BCE_LEVEL_EXTREME)
28393acd8bdavidch#define BCE_INSANE_SEND	(BCE_CP_SEND | BCE_LEVEL_INSANE)
284d037577davidch
285d037577davidch#define BCE_WARN_RECV		(BCE_CP_RECV | BCE_LEVEL_WARN)
286d037577davidch#define BCE_INFO_RECV		(BCE_CP_RECV | BCE_LEVEL_INFO)
287d037577davidch#define BCE_VERBOSE_RECV	(BCE_CP_RECV | BCE_LEVEL_VERBOSE)
288d037577davidch#define BCE_EXTREME_RECV	(BCE_CP_RECV | BCE_LEVEL_EXTREME)
28993acd8bdavidch#define BCE_INSANE_RECV	(BCE_CP_RECV | BCE_LEVEL_INSANE)
290d037577davidch
291d037577davidch#define BCE_WARN_INTR		(BCE_CP_INTR | BCE_LEVEL_WARN)
292d037577davidch#define BCE_INFO_INTR		(BCE_CP_INTR | BCE_LEVEL_INFO)
293d037577davidch#define BCE_VERBOSE_INTR	(BCE_CP_INTR | BCE_LEVEL_VERBOSE)
294d037577davidch#define BCE_EXTREME_INTR	(BCE_CP_INTR | BCE_LEVEL_EXTREME)
29593acd8bdavidch#define BCE_INSANE_INTR	(BCE_CP_INTR | BCE_LEVEL_INSANE)
296d037577davidch
29793acd8bdavidch#define BCE_WARN_UNLOAD	(BCE_CP_UNLOAD | BCE_LEVEL_WARN)
29893acd8bdavidch#define BCE_INFO_UNLOAD	(BCE_CP_UNLOAD | BCE_LEVEL_INFO)
299d037577davidch#define BCE_VERBOSE_UNLOAD	(BCE_CP_UNLOAD | BCE_LEVEL_VERBOSE)
300d037577davidch#define BCE_EXTREME_UNLOAD	(BCE_CP_UNLOAD | BCE_LEVEL_EXTREME)
301d037577davidch#define BCE_INSANE_UNLOAD	(BCE_CP_UNLOAD | BCE_LEVEL_INSANE)
302d037577davidch
303d037577davidch#define BCE_WARN_RESET		(BCE_CP_RESET | BCE_LEVEL_WARN)
304d037577davidch#define BCE_INFO_RESET		(BCE_CP_RESET | BCE_LEVEL_INFO)
305d037577davidch#define BCE_VERBOSE_RESET	(BCE_CP_RESET | BCE_LEVEL_VERBOSE)
306d037577davidch#define BCE_EXTREME_RESET	(BCE_CP_RESET | BCE_LEVEL_EXTREME)
307d037577davidch#define BCE_INSANE_RESET	(BCE_CP_RESET | BCE_LEVEL_INSANE)
308d037577davidch
309d037577davidch#define BCE_WARN_PHY		(BCE_CP_PHY | BCE_LEVEL_WARN)
310d037577davidch#define BCE_INFO_PHY		(BCE_CP_PHY | BCE_LEVEL_INFO)
31193acd8bdavidch#define BCE_VERBOSE_PHY	(BCE_CP_PHY | BCE_LEVEL_VERBOSE)
31293acd8bdavidch#define BCE_EXTREME_PHY	(BCE_CP_PHY | BCE_LEVEL_EXTREME)
313d037577davidch#define BCE_INSANE_PHY		(BCE_CP_PHY | BCE_LEVEL_INSANE)
314d037577davidch
315d037577davidch#define BCE_WARN_NVRAM		(BCE_CP_NVRAM | BCE_LEVEL_WARN)
316d037577davidch#define BCE_INFO_NVRAM		(BCE_CP_NVRAM | BCE_LEVEL_INFO)
317d037577davidch#define BCE_VERBOSE_NVRAM	(BCE_CP_NVRAM | BCE_LEVEL_VERBOSE)
318d037577davidch#define BCE_EXTREME_NVRAM	(BCE_CP_NVRAM | BCE_LEVEL_EXTREME)
319d037577davidch#define BCE_INSANE_NVRAM	(BCE_CP_NVRAM | BCE_LEVEL_INSANE)
320d037577davidch
321d037577davidch#define BCE_WARN_FIRMWARE	(BCE_CP_FIRMWARE | BCE_LEVEL_WARN)
322d037577davidch#define BCE_INFO_FIRMWARE	(BCE_CP_FIRMWARE | BCE_LEVEL_INFO)
32393acd8bdavidch#define BCE_VERBOSE_FIRMWARE (BCE_CP_FIRMWARE | BCE_LEVEL_VERBOSE)
32493acd8bdavidch#define BCE_EXTREME_FIRMWARE (BCE_CP_FIRMWARE | BCE_LEVEL_EXTREME)
32593acd8bdavidch#define BCE_INSANE_FIRMWARE (BCE_CP_FIRMWARE | BCE_LEVEL_INSANE)
326d037577davidch
327d037577davidch#define BCE_WARN_CTX		(BCE_CP_CTX | BCE_LEVEL_WARN)
328d037577davidch#define BCE_INFO_CTX		(BCE_CP_CTX | BCE_LEVEL_INFO)
32993acd8bdavidch#define BCE_VERBOSE_CTX	(BCE_CP_CTX | BCE_LEVEL_VERBOSE)
33093acd8bdavidch#define BCE_EXTREME_CTX	(BCE_CP_CTX | BCE_LEVEL_EXTREME)
331d037577davidch#define BCE_INSANE_CTX		(BCE_CP_CTX | BCE_LEVEL_INSANE)
332d037577davidch
333d037577davidch#define BCE_WARN_REG		(BCE_CP_REG | BCE_LEVEL_WARN)
334d037577davidch#define BCE_INFO_REG		(BCE_CP_REG | BCE_LEVEL_INFO)
33593acd8bdavidch#define BCE_VERBOSE_REG	(BCE_CP_REG | BCE_LEVEL_VERBOSE)
33693acd8bdavidch#define BCE_EXTREME_REG	(BCE_CP_REG | BCE_LEVEL_EXTREME)
337d037577davidch#define BCE_INSANE_REG		(BCE_CP_REG | BCE_LEVEL_INSANE)
338d037577davidch
339d037577davidch#define BCE_WARN_MISC		(BCE_CP_MISC | BCE_LEVEL_WARN)
340d037577davidch#define BCE_INFO_MISC		(BCE_CP_MISC | BCE_LEVEL_INFO)
341d037577davidch#define BCE_VERBOSE_MISC	(BCE_CP_MISC | BCE_LEVEL_VERBOSE)
342d037577davidch#define BCE_EXTREME_MISC	(BCE_CP_MISC | BCE_LEVEL_EXTREME)
34393acd8bdavidch#define BCE_INSANE_MISC	(BCE_CP_MISC | BCE_LEVEL_INSANE)
344d037577davidch
345d037577davidch#define BCE_WARN_SPECIAL	(BCE_CP_SPECIAL | BCE_LEVEL_WARN)
346d037577davidch#define BCE_INFO_SPECIAL	(BCE_CP_SPECIAL | BCE_LEVEL_INFO)
34793acd8bdavidch#define BCE_VERBOSE_SPECIAL (BCE_CP_SPECIAL | BCE_LEVEL_VERBOSE)
34893acd8bdavidch#define BCE_EXTREME_SPECIAL (BCE_CP_SPECIAL | BCE_LEVEL_EXTREME)
349d037577davidch#define BCE_INSANE_SPECIAL	(BCE_CP_SPECIAL | BCE_LEVEL_INSANE)
350d037577davidch
35193acd8bdavidch#define BCE_FATAL			(BCE_CP_ALL | BCE_LEVEL_FATAL)
35293acd8bdavidch#define BCE_WARN			(BCE_CP_ALL | BCE_LEVEL_WARN)
35393acd8bdavidch#define BCE_INFO			(BCE_CP_ALL | BCE_LEVEL_INFO)
354d037577davidch#define BCE_VERBOSE		(BCE_CP_ALL | BCE_LEVEL_VERBOSE)
355d037577davidch#define BCE_EXTREME		(BCE_CP_ALL | BCE_LEVEL_EXTREME)
35693acd8bdavidch#define BCE_INSANE			(BCE_CP_ALL | BCE_LEVEL_INSANE)
357d037577davidch
358d037577davidch#define BCE_CODE_PATH(cp)	((cp & BCE_CP_MASK) & bce_debug)
359d037577davidch#define BCE_MSG_LEVEL(lv)	\
360d037577davidch    ((lv & BCE_LEVEL_MASK) <= (bce_debug & BCE_LEVEL_MASK))
361d037577davidch#define BCE_LOG_MSG(m)		(BCE_CODE_PATH(m) && BCE_MSG_LEVEL(m))
362c2fa353ps
363c2fa353ps#ifdef BCE_DEBUG
3640f2382bdavidch
365c2fa353ps/* Print a message based on the logging level and code path. */
366d037577davidch#define DBPRINT(sc, level, format, args...)			\
367d037577davidch	if (BCE_LOG_MSG(level)) {				\
368d037577davidch		device_printf(sc->bce_dev, format, ## args);	\
369c2fa353ps	}
370c2fa353ps
3710f2382bdavidch/* Runs a particular command when debugging is enabled. */
372d037577davidch#define DBRUN(args...)						\
373d037577davidch	do {							\
374d037577davidch		args;						\
3750f2382bdavidch	} while (0)
3760f2382bdavidch
377c2fa353ps/* Runs a particular command based on the logging level and code path. */
378d037577davidch#define DBRUNMSG(msg, args...)					\
379d037577davidch	if (BCE_LOG_MSG(msg)) {					\
380d037577davidch		args;						\
381c2fa353ps	}
382c2fa353ps
383c2fa353ps/* Runs a particular command based on the logging level. */
384d037577davidch#define DBRUNLV(level, args...) 				\
385d037577davidch	if (BCE_MSG_LEVEL(level)) { 				\
386d037577davidch		args;						\
387c2fa353ps	}
388c2fa353ps
389c2fa353ps/* Runs a particular command based on the code path. */
3905724de4davidch#define DBRUNCP(cp, args...)					\
391d037577davidch	if (BCE_CODE_PATH(cp)) { 				\
392d037577davidch		args; 						\
393c2fa353ps	}
394c2fa353ps
395c2fa353ps/* Runs a particular command based on a condition. */
396d037577davidch#define DBRUNIF(cond, args...)					\
397d037577davidch	if (cond) {						\
398d037577davidch		args;						\
399c2fa353ps	}
400c2fa353ps
4012156989davidch/* Announces function entry. */
402d037577davidch#define DBENTER(cond)						\
4032156989davidch	DBPRINT(sc, (cond), "%s(enter)\n", __FUNCTION__)
4042156989davidch
4052156989davidch/* Announces function exit. */
406d037577davidch#define DBEXIT(cond)						\
4072156989davidch	DBPRINT(sc, (cond), "%s(exit)\n", __FUNCTION__)
4082156989davidch
4092156989davidch/* Temporarily override the debug level. */
410d037577davidch#define DBPUSH(cond)						\
411d037577davidch	u32 bce_debug_temp = bce_debug;				\
4122156989davidch	bce_debug |= cond;
4132156989davidch
4142156989davidch/* Restore the previously overriden debug level. */
4152156989davidch#define DBPOP()							\
4162156989davidch	bce_debug = bce_debug_temp;
4172156989davidch
418c2fa353ps/* Needed for random() function which is only used in debugging. */
419c2fa353ps#include <sys/random.h>
420c2fa353ps
421c2fa353ps/* Returns FALSE in "defects" per 2^31 - 1 calls, otherwise returns TRUE. */
422c2fa353ps#define DB_RANDOMFALSE(defects)        (random() > defects)
423c2fa353ps#define DB_OR_RANDOMFALSE(defects)  || (random() > defects)
4241139775yongari#define DB_AND_RANDOMFALSE(defects) && (random() > defects)
425c2fa353ps
426c2fa353ps/* Returns TRUE in "defects" per 2^31 - 1 calls, otherwise returns FALSE. */
427c2fa353ps#define DB_RANDOMTRUE(defects)         (random() < defects)
428c2fa353ps#define DB_OR_RANDOMTRUE(defects)   || (random() < defects)
429c2fa353ps#define DB_AND_RANDOMTRUE(defects)  && (random() < defects)
430c2fa353ps
431d037577davidch#define DB_PRINT_PHY_REG(reg, val)					\
432d037577davidchswitch(reg) {								\
433d037577davidchcase 0x00: DBPRINT(sc, BCE_INSANE_PHY,					\
434d037577davidch	"%s(): phy = %d, reg = 0x%04X (BMCR   ), val = 0x%b\n",		\
435d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
436d037577davidch	BCE_BMCR_PRINTFB); break;					\
437d037577davidchcase 0x01: DBPRINT(sc, BCE_INSANE_PHY,					\
438d037577davidch	"%s(): phy = %d, reg = 0x%04X (BMSR   ), val = 0x%b\n",		\
439d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
440d037577davidch	BCE_BMSR_PRINTFB); break;					\
441d037577davidchcase 0x04: DBPRINT(sc, BCE_INSANE_PHY,					\
442d037577davidch	"%s(): phy = %d, reg = 0x%04X (ANAR   ), val = 0x%b\n",		\
443d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
444d037577davidch	BCE_ANAR_PRINTFB); break;					\
445d037577davidchcase 0x05: DBPRINT(sc, BCE_INSANE_PHY,					\
446d037577davidch	"%s(): phy = %d, reg = 0x%04X (ANLPAR ), val = 0x%b\n",		\
447d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
448d037577davidch	BCE_ANLPAR_PRINTFB); break;					\
449d037577davidchcase 0x09: DBPRINT(sc, BCE_INSANE_PHY,					\
450d037577davidch	"%s(): phy = %d, reg = 0x%04X (1000CTL), val = 0x%b\n",		\
451d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
452d037577davidch	BCE_1000CTL_PRINTFB); break;					\
453d037577davidchcase 0x0a: DBPRINT(sc, BCE_INSANE_PHY,					\
454d037577davidch	"%s(): phy = %d, reg = 0x%04X (1000STS), val = 0x%b\n",		\
455d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
456d037577davidch	BCE_1000STS_PRINTFB); break;					\
457d037577davidchcase 0x0f: DBPRINT(sc, BCE_INSANE_PHY,					\
458d037577davidch	"%s(): phy = %d, reg = 0x%04X (EXTSTS ), val = 0x%b\n",		\
459d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
460d037577davidch	BCE_EXTSTS_PRINTFB); break;					\
461d037577davidchcase 0x19: DBPRINT(sc, BCE_INSANE_PHY,					\
462d037577davidch	"%s(): phy = %d, reg = 0x%04X (AUXSTS ), val = 0x%b\n",		\
463d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff,	\
464d037577davidch	BCE_AUXSTS_PRINTFB); break;					\
465d037577davidchdefault: DBPRINT(sc, BCE_INSANE_PHY,					\
466d037577davidch	"%s(): phy = %d, reg = 0x%04X, val = 0x%04X\n",			\
467d037577davidch	__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff);	\
4682156989davidch	}
4692156989davidch
470c2fa353ps#else
471c2fa353ps
472c2fa353ps#define DBPRINT(level, format, args...)
4730f2382bdavidch#define DBRUN(args...)
474179a317davidch#define DBRUNMSG(msg, args...)
475c2fa353ps#define DBRUNLV(level, args...)
476c2fa353ps#define DBRUNCP(cp, args...)
477c2fa353ps#define DBRUNIF(cond, args...)
4782156989davidch#define DBENTER(cond)
4792156989davidch#define DBEXIT(cond)
4802156989davidch#define DBPUSH(cond)
4812156989davidch#define DBPOP()
482c2fa353ps#define DB_RANDOMFALSE(defects)
483c2fa353ps#define DB_OR_RANDOMFALSE(percent)
484c2fa353ps#define DB_AND_RANDOMFALSE(percent)
485c2fa353ps#define DB_RANDOMTRUE(defects)
486c2fa353ps#define DB_OR_RANDOMTRUE(percent)
487c2fa353ps#define DB_AND_RANDOMTRUE(percent)
4882156989davidch#define DB_PRINT_PHY_REG(reg, val)
489c2fa353ps
490c2fa353ps#endif /* BCE_DEBUG */
491c2fa353ps
492c2fa353ps/****************************************************************************/
493c2fa353ps/* Device identification definitions.                                       */
494c2fa353ps/****************************************************************************/
495c2fa353ps#define BRCM_VENDORID				0x14E4
496d037577davidch#define BRCM_DEVICEID_BCM5706			0x164A
497d037577davidch#define BRCM_DEVICEID_BCM5706S			0x16AA
498d037577davidch#define BRCM_DEVICEID_BCM5708			0x164C
499d037577davidch#define BRCM_DEVICEID_BCM5708S			0x16AC
500d037577davidch#define BRCM_DEVICEID_BCM5709			0x1639
501d037577davidch#define BRCM_DEVICEID_BCM5709S			0x163A
502d037577davidch#define BRCM_DEVICEID_BCM5716			0x163B
503c2fa353ps
504d037577davidch#define HP_VENDORID				0x103C
505c2fa353ps
506d037577davidch#define PCI_ANY_ID				(u_int16_t) (~0U)
507c2fa353ps
508c2fa353ps/* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
509c2fa353ps
510d037577davidch#define BCE_CHIP_NUM(sc)		(((sc)->bce_chipid) & 0xffff0000)
511d037577davidch#define BCE_CHIP_NUM_5706		0x57060000
512d037577davidch#define BCE_CHIP_NUM_5708		0x57080000
513d037577davidch#define BCE_CHIP_NUM_5709		0x57090000
514d037577davidch
515d037577davidch#define BCE_CHIP_REV(sc)		(((sc)->bce_chipid) & 0x0000f000)
516d037577davidch#define BCE_CHIP_REV_Ax			0x00000000
517d037577davidch#define BCE_CHIP_REV_Bx			0x00001000
518d037577davidch#define BCE_CHIP_REV_Cx			0x00002000
519d037577davidch
520d037577davidch#define BCE_CHIP_METAL(sc)		(((sc)->bce_chipid) & 0x00000ff0)
521d037577davidch#define BCE_CHIP_BOND(bp)		(((sc)->bce_chipid) & 0x0000000f)
522d037577davidch
523d037577davidch#define BCE_CHIP_ID(sc)			(((sc)->bce_chipid) & 0xfffffff0)
524d037577davidch#define BCE_CHIP_ID_5706_A0		0x57060000
525d037577davidch#define BCE_CHIP_ID_5706_A1		0x57060010
526d037577davidch#define BCE_CHIP_ID_5706_A2		0x57060020
527d037577davidch#define BCE_CHIP_ID_5706_A3		0x57060030
528d037577davidch#define BCE_CHIP_ID_5708_A0		0x57080000
529d037577davidch#define BCE_CHIP_ID_5708_B0		0x57081000
530d037577davidch#define BCE_CHIP_ID_5708_B1		0x57081010
531d037577davidch#define BCE_CHIP_ID_5708_B2		0x57081020
532d037577davidch#define BCE_CHIP_ID_5709_A0		0x57090000
533d037577davidch#define BCE_CHIP_ID_5709_A1		0x57090010
534d037577davidch#define BCE_CHIP_ID_5709_B0		0x57091000
535d037577davidch#define BCE_CHIP_ID_5709_B1		0x57091010
536d037577davidch#define BCE_CHIP_ID_5709_B2		0x57091020
537d037577davidch#define BCE_CHIP_ID_5709_C0		0x57092000
538c2fa353ps
539c2fa353ps#define BCE_CHIP_BOND_ID(sc)		(((sc)->bce_chipid) & 0xf)
540c2fa353ps
541c2fa353ps/* A serdes chip will have the first bit of the bond id set. */
542d037577davidch#define BCE_CHIP_BOND_ID_SERDES_BIT	0x01
543c2fa353ps
544c2fa353ps/* shorthand one */
545c2fa353ps#define BCE_ASICREV(x)			((x) >> 28)
546c2fa353ps#define BCE_ASICREV_BCM5700		0x06
547c2fa353ps
548c2fa353ps/* chip revisions */
549c2fa353ps#define BCE_CHIPREV(x)			((x) >> 24)
550c2fa353ps#define BCE_CHIPREV_5700_AX		0x70
551c2fa353ps#define BCE_CHIPREV_5700_BX		0x71
552c2fa353ps#define BCE_CHIPREV_5700_CX		0x72
553c2fa353ps#define BCE_CHIPREV_5701_AX		0x00
554c2fa353ps
555c2fa353psstruct bce_type {
556d037577davidch	u_int16_t bce_vid;
557d037577davidch	u_int16_t bce_did;
558d037577davidch	u_int16_t bce_svid;
559d037577davidch	u_int16_t bce_sdid;
5608dc4f9cmarius	const char *bce_name;
561c2fa353ps};
562c2fa353ps
563c2fa353ps/****************************************************************************/
564c2fa353ps/* Byte order conversions.                                                  */
565c2fa353ps/****************************************************************************/
566c2fa353ps#define bce_htobe16(x) htobe16(x)
567c2fa353ps#define bce_htobe32(x) htobe32(x)
568c2fa353ps#define bce_htobe64(x) htobe64(x)
569c2fa353ps#define bce_htole16(x) htole16(x)
570c2fa353ps#define bce_htole32(x) htole32(x)
571c2fa353ps#define bce_htole64(x) htole64(x)
572c2fa353ps
573c2fa353ps#define bce_be16toh(x) be16toh(x)
574c2fa353ps#define bce_be32toh(x) be32toh(x)
575c2fa353ps#define bce_be64toh(x) be64toh(x)
576c2fa353ps#define bce_le16toh(x) le16toh(x)
577c2fa353ps#define bce_le32toh(x) le32toh(x)
578c2fa353ps#define bce_le64toh(x) le64toh(x)
579c2fa353ps
580c2fa353ps/****************************************************************************/
581c2fa353ps/* NVRAM Access                                                             */
582c2fa353ps/****************************************************************************/
583c2fa353ps
584c2fa353ps/* Buffered flash (Atmel: AT45DB011B) specific information */
585d037577davidch#define SEEPROM_PAGE_BITS		2
586d037577davidch#define SEEPROM_PHY_PAGE_SIZE		(1 << SEEPROM_PAGE_BITS)
587d037577davidch#define SEEPROM_BYTE_ADDR_MASK		(SEEPROM_PHY_PAGE_SIZE-1)
588d037577davidch#define SEEPROM_PAGE_SIZE		4
589d037577davidch#define SEEPROM_TOTAL_SIZE		65536
590c2fa353ps
591d037577davidch#define BUFFERED_FLASH_PAGE_BITS	9
592c2fa353ps#define BUFFERED_FLASH_PHY_PAGE_SIZE	(1 << BUFFERED_FLASH_PAGE_BITS)
593c2fa353ps#define BUFFERED_FLASH_BYTE_ADDR_MASK	(BUFFERED_FLASH_PHY_PAGE_SIZE-1)
594d037577davidch#define BUFFERED_FLASH_PAGE_SIZE	264
595d037577davidch#define BUFFERED_FLASH_TOTAL_SIZE	0x21000
596c2fa353ps
597d037577davidch#define SAIFUN_FLASH_PAGE_BITS		8
598d037577davidch#define SAIFUN_FLASH_PHY_PAGE_SIZE	(1 << SAIFUN_FLASH_PAGE_BITS)
599d037577davidch#define SAIFUN_FLASH_BYTE_ADDR_MASK	(SAIFUN_FLASH_PHY_PAGE_SIZE-1)
600d037577davidch#define SAIFUN_FLASH_PAGE_SIZE		256
601c2fa353ps#define SAIFUN_FLASH_BASE_TOTAL_SIZE	65536
602c2fa353ps
603d037577davidch#define ST_MICRO_FLASH_PAGE_BITS	8
604c2fa353ps#define ST_MICRO_FLASH_PHY_PAGE_SIZE	(1 << ST_MICRO_FLASH_PAGE_BITS)
605c2fa353ps#define ST_MICRO_FLASH_BYTE_ADDR_MASK	(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
606d037577davidch#define ST_MICRO_FLASH_PAGE_SIZE	256
607c2fa353ps#define ST_MICRO_FLASH_BASE_TOTAL_SIZE	65536
608c2fa353ps
609d037577davidch#define BCM5709_FLASH_PAGE_BITS		8
610d037577davidch#define BCM5709_FLASH_PHY_PAGE_SIZE	(1 << BCM5709_FLASH_PAGE_BITS)
6112156989davidch#define BCM5709_FLASH_BYTE_ADDR_MASK	(BCM5709_FLASH_PHY_PAGE_SIZE-1)
612d037577davidch#define BCM5709_FLASH_PAGE_SIZE		256
6132156989davidch
614d037577davidch#define NVRAM_TIMEOUT_COUNT		30000
615d037577davidch#define BCE_FLASHDESC_MAX		64
616c2fa353ps
617d037577davidch#define FLASH_STRAP_MASK	(BCE_NVM_CFG1_FLASH_MODE |	\
618d037577davidch    BCE_NVM_CFG1_BUFFER_MODE | BCE_NVM_CFG1_PROTECT_MODE |	\
619d037577davidch    BCE_NVM_CFG1_FLASH_SIZE)
620c2fa353ps
621d037577davidch#define FLASH_BACKUP_STRAP_MASK		(0xf << 26)
622c2fa353ps
623c2fa353psstruct flash_spec {
624c2fa353ps	u32 strapping;
625c2fa353ps	u32 config1;
626c2fa353ps	u32 config2;
627c2fa353ps	u32 config3;
628c2fa353ps	u32 write1;
6292156989davidch#define BCE_NV_BUFFERED		0x00000001
6302156989davidch#define BCE_NV_TRANSLATE	0x00000002
631d037577davidch#define BCE_NV_WREN		0x00000004
6322156989davidch	u32 flags;
633c2fa353ps	u32 page_bits;
634c2fa353ps	u32 page_size;
635c2fa353ps	u32 addr_mask;
636c2fa353ps	u32 total_size;
6378dc4f9cmarius	const u8 *name;
638c2fa353ps};
639c2fa353ps
640c2fa353ps/****************************************************************************/
641c2fa353ps/* Shared Memory layout                                                     */
642c2fa353ps/* The BCE bootcode will initialize this data area with port configurtion   */
643c2fa353ps/* information which can be accessed by the driver.                         */
644c2fa353ps/****************************************************************************/
645c2fa353ps
6462156989davidch/*
647c2fa353ps * This value (in milliseconds) determines the frequency of the driver
648c2fa353ps * issuing the PULSE message code.  The firmware monitors this periodic
6492156989davidch * pulse to determine when to switch to an OS-absent mode.
650c2fa353ps */
651c2fa353ps#define DRV_PULSE_PERIOD_MS                 250
652c2fa353ps
6532156989davidch/*
654c2fa353ps * This value (in milliseconds) determines how long the driver should
655c2fa353ps * wait for an acknowledgement from the firmware before timing out.  Once
656c2fa353ps * the firmware has timed out, the driver will assume there is no firmware
657c2fa353ps * running and there won't be any firmware-driver synchronization during a
6582156989davidch * driver reset.
659c2fa353ps */
660d037577davidch#define FW_ACK_TIME_OUT_MS			1000
661c2fa353ps
662d037577davidch#define BCE_DRV_RESET_SIGNATURE			0x00000000
663c2fa353ps#define BCE_DRV_RESET_SIGNATURE_MAGIC		0x4841564b /* HAVK */
664c2fa353ps
665d037577davidch#define BCE_DRV_MB				0x00000004
666d037577davidch#define BCE_DRV_MSG_CODE	 		0xff000000
667d037577davidch#define BCE_DRV_MSG_CODE_RESET		 	0x01000000
668d037577davidch#define BCE_DRV_MSG_CODE_UNLOAD			0x02000000
669d037577davidch#define BCE_DRV_MSG_CODE_SHUTDOWN	 	0x03000000
670c2fa353ps#define BCE_DRV_MSG_CODE_SUSPEND_WOL		0x04000000
671d037577davidch#define BCE_DRV_MSG_CODE_FW_TIMEOUT	 	0x05000000
672d037577davidch#define BCE_DRV_MSG_CODE_PULSE		 	0x06000000
673d037577davidch#define BCE_DRV_MSG_CODE_DIAG		 	0x07000000
674c2fa353ps#define BCE_DRV_MSG_CODE_SUSPEND_NO_WOL	 	0x09000000
675f35e9ebdavidch#define BCE_DRV_MSG_CODE_UNLOAD_LNK_DN		0x0b000000
676f35e9ebdavidch#define BCE_DRV_MSG_CODE_CMD_SET_LINK		0x10000000
677c2fa353ps
678d037577davidch#define BCE_DRV_MSG_DATA			0x00ff0000
679d037577davidch#define BCE_DRV_MSG_DATA_WAIT0		 	0x00010000
680d037577davidch#define BCE_DRV_MSG_DATA_WAIT1			0x00020000
681d037577davidch#define BCE_DRV_MSG_DATA_WAIT2			0x00030000
682d037577davidch#define BCE_DRV_MSG_DATA_WAIT3			0x00040000
683c2fa353ps
684d037577davidch#define BCE_DRV_MSG_SEQ				0x0000ffff
685c2fa353ps
686c2fa353ps#define BCE_FW_MB				0x00000008
687c2fa353ps#define BCE_FW_MSG_ACK				 0x0000ffff
688c2fa353ps#define BCE_FW_MSG_STATUS_MASK			 0x00ff0000
689c2fa353ps#define BCE_FW_MSG_STATUS_OK			 0x00000000
690d037577davidch#define BCE_FW_MSG_STATUS_INVALID_ARGS		 0x00010000
691d037577davidch#define BCE_FW_MSG_STATUS_DRV_PRSNT		 0x00020000
692c2fa353ps#define BCE_FW_MSG_STATUS_FAILURE		 0x00ff0000
693c2fa353ps
694d037577davidch#define BCE_LINK_STATUS				0x0000000c
695c2fa353ps#define BCE_LINK_STATUS_INIT_VALUE		 0xffffffff
696d037577davidch#define BCE_LINK_STATUS_LINK_UP		 	 0x1
697c2fa353ps#define BCE_LINK_STATUS_LINK_DOWN		 0x0
698c2fa353ps#define BCE_LINK_STATUS_SPEED_MASK		 0x1e
699c2fa353ps#define BCE_LINK_STATUS_AN_INCOMPLETE		 (0<<1)
700c2fa353ps#define BCE_LINK_STATUS_10HALF			 (1<<1)
701c2fa353ps#define BCE_LINK_STATUS_10FULL			 (2<<1)
702d037577davidch#define BCE_LINK_STATUS_100HALF			 (3<<1)
703c2fa353ps#define BCE_LINK_STATUS_100BASE_T4		 (4<<1)
704d037577davidch#define BCE_LINK_STATUS_100FULL			 (5<<1)
705c2fa353ps#define BCE_LINK_STATUS_1000HALF		 (6<<1)
706c2fa353ps#define BCE_LINK_STATUS_1000FULL		 (7<<1)
707c2fa353ps#define BCE_LINK_STATUS_2500HALF		 (8<<1)
708c2fa353ps#define BCE_LINK_STATUS_2500FULL		 (9<<1)
709c2fa353ps#define BCE_LINK_STATUS_AN_ENABLED		 (1<<5)
710c2fa353ps#define BCE_LINK_STATUS_AN_COMPLETE		 (1<<6)
711c2fa353ps#define BCE_LINK_STATUS_PARALLEL_DET		 (1<<7)
712c2fa353ps#define BCE_LINK_STATUS_RESERVED		 (1<<8)
713c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_1000FULL	 (1<<9)
714c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_1000HALF	 (1<<10)
715c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_100BT4	 (1<<11)
716c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_100FULL	 (1<<12)
717c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_100HALF	 (1<<13)
718c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_10FULL	 (1<<14)
719c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_10HALF	 (1<<15)
720c2fa353ps#define BCE_LINK_STATUS_TX_FC_ENABLED		 (1<<16)
721c2fa353ps#define BCE_LINK_STATUS_RX_FC_ENABLED		 (1<<17)
722c2fa353ps#define BCE_LINK_STATUS_PARTNER_SYM_PAUSE_CAP	 (1<<18)
723c2fa353ps#define BCE_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP	 (1<<19)
724c2fa353ps#define BCE_LINK_STATUS_SERDES_LINK		 (1<<20)
725c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_2500FULL	 (1<<21)
726c2fa353ps#define BCE_LINK_STATUS_PARTNER_AD_2500HALF	 (1<<22)
727c2fa353ps
728c2fa353ps#define BCE_DRV_PULSE_MB			0x00000010
729c2fa353ps#define BCE_DRV_PULSE_SEQ_MASK			 0x00007fff
730c2fa353ps
731788fd40davidch#define BCE_MB_ARGS_0				0x00000014
73262a2488yongari#define	BCE_NETLINK_SPEED_10HALF		 (1<<0)
73362a2488yongari#define	BCE_NETLINK_SPEED_10FULL		 (1<<1)
73462a2488yongari#define	BCE_NETLINK_SPEED_100HALF		 (1<<2)
73562a2488yongari#define	BCE_NETLINK_SPEED_100FULL		 (1<<3)
73662a2488yongari#define	BCE_NETLINK_SPEED_1000HALF		 (1<<4)
73762a2488yongari#define	BCE_NETLINK_SPEED_1000FULL		 (1<<5)
73862a2488yongari#define	BCE_NETLINK_SPEED_2500HALF		 (1<<6)
73962a2488yongari#define	BCE_NETLINK_SPEED_2500FULL		 (1<<7)
74062a2488yongari#define	BCE_NETLINK_SPEED_10GHALF		 (1<<8)
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