xref: /freebsd-head/sys/dev/bce/if_bce.c

/*-
 * SPDX-License-Identifier: BSD-2-Clause
 *
 * Copyright (c) 2006-2014 QLogic Corporation
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");

/*
 * The following controllers are supported by this driver:
 *   BCM5706C A2, A3
 *   BCM5706S A2, A3
 *   BCM5708C B1, B2
 *   BCM5708S B1, B2
 *   BCM5709C A1, C0
 *   BCM5709S A1, C0
 *   BCM5716C C0
 *   BCM5716S C0
 *
 * The following controllers are not supported by this driver:
 *   BCM5706C A0, A1 (pre-production)
 *   BCM5706S A0, A1 (pre-production)
 *   BCM5708C A0, B0 (pre-production)
 *   BCM5708S A0, B0 (pre-production)
 *   BCM5709C A0  B0, B1, B2 (pre-production)
 *   BCM5709S A0, B0, B1, B2 (pre-production)
 */

#include "opt_bce.h"

#include <sys/param.h>
#include <sys/endian.h>
#include <sys/systm.h>
#include <sys/sockio.h>
#include <sys/lock.h>
#include <sys/mbuf.h>
#include <sys/malloc.h>
#include <sys/mutex.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/socket.h>
#include <sys/sysctl.h>
#include <sys/queue.h>

#include <net/bpf.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <net/if_var.h>
#include <net/if_arp.h>
#include <net/if_dl.h>
#include <net/if_media.h>

#include <net/if_types.h>
#include <net/if_vlan_var.h>

#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <netinet/ip.h>
#include <netinet/ip6.h>
#include <netinet/tcp.h>
#include <netinet/udp.h>

#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/bus.h>
#include <sys/rman.h>

#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include "miidevs.h"
#include <dev/mii/brgphyreg.h>

#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>

#include "miibus_if.h"

#include <dev/bce/if_bcereg.h>
#include <dev/bce/if_bcefw.h>

/****************************************************************************/
/* BCE Debug Options                                                        */
/****************************************************************************/
#ifdef BCE_DEBUG
	u32 bce_debug = BCE_WARN;

	/*          0 = Never              */
	/*          1 = 1 in 2,147,483,648 */
	/*        256 = 1 in     8,388,608 */
	/*       2048 = 1 in     1,048,576 */
	/*      65536 = 1 in        32,768 */
	/*    1048576 = 1 in         2,048 */
	/*  268435456 =	1 in             8 */
	/*  536870912 = 1 in             4 */
	/* 1073741824 = 1 in             2 */

	/* Controls how often the l2_fhdr frame error check will fail. */
	int l2fhdr_error_sim_control = 0;

	/* Controls how often the unexpected attention check will fail. */
	int unexpected_attention_sim_control = 0;

	/* Controls how often to simulate an mbuf allocation failure. */
	int mbuf_alloc_failed_sim_control = 0;

	/* Controls how often to simulate a DMA mapping failure. */
	int dma_map_addr_failed_sim_control = 0;

	/* Controls how often to simulate a bootcode failure. */
	int bootcode_running_failure_sim_control = 0;
#endif

/****************************************************************************/
/* PCI Device ID Table                                                      */
/*                                                                          */
/* Used by bce_probe() to identify the devices supported by this driver.    */
/****************************************************************************/
#define BCE_DEVDESC_MAX		64

static const struct bce_type bce_devs[] = {
	/* BCM5706C Controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706,  HP_VENDORID, 0x3101,
		"HP NC370T Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706,  HP_VENDORID, 0x3106,
		"HP NC370i Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706,  HP_VENDORID, 0x3070,
		"HP NC380T PCIe DP Multifunc Gig Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706,  HP_VENDORID, 0x1709,
		"HP NC371i Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5706 1000Base-T" },

	/* BCM5706S controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706S, HP_VENDORID, 0x3102,
		"HP NC370F Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5706S, PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5706 1000Base-SX" },

	/* BCM5708C controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708,  HP_VENDORID, 0x7037,
		"HP NC373T PCIe Multifunction Gig Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708,  HP_VENDORID, 0x7038,
		"HP NC373i Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708,  HP_VENDORID, 0x7045,
		"HP NC374m PCIe Multifunction Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5708 1000Base-T" },

	/* BCM5708S controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S,  HP_VENDORID, 0x1706,
		"HP NC373m Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S,  HP_VENDORID, 0x703b,
		"HP NC373i Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S,  HP_VENDORID, 0x703d,
		"HP NC373F PCIe Multifunc Giga Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5708 1000Base-SX" },

	/* BCM5709C controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709,  HP_VENDORID, 0x7055,
		"HP NC382i DP Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709,  HP_VENDORID, 0x7059,
		"HP NC382T PCIe DP Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5709 1000Base-T" },

	/* BCM5709S controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709S,  HP_VENDORID, 0x171d,
		"HP NC382m DP 1GbE Multifunction BL-c Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709S,  HP_VENDORID, 0x7056,
		"HP NC382i DP Multifunction Gigabit Server Adapter" },
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709S,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5709 1000Base-SX" },

	/* BCM5716 controllers and OEM boards. */
	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5716,  PCI_ANY_ID,  PCI_ANY_ID,
		"QLogic NetXtreme II BCM5716 1000Base-T" },
	{ 0, 0, 0, 0, NULL }
};

/****************************************************************************/
/* Supported Flash NVRAM device data.                                       */
/****************************************************************************/
static const struct flash_spec flash_table[] =
{
#define BUFFERED_FLAGS		(BCE_NV_BUFFERED | BCE_NV_TRANSLATE)
#define NONBUFFERED_FLAGS	(BCE_NV_WREN)

	/* Slow EEPROM */
	{0x00000000, 0x40830380, 0x009f0081, 0xa184a053, 0xaf000400,
	 BUFFERED_FLAGS, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
	 "EEPROM - slow"},
	/* Expansion entry 0001 */
	{0x08000002, 0x4b808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 0001"},
	/* Saifun SA25F010 (non-buffered flash) */
	/* strap, cfg1, & write1 need updates */
	{0x04000001, 0x47808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
	 "Non-buffered flash (128kB)"},
	/* Saifun SA25F020 (non-buffered flash) */
	/* strap, cfg1, & write1 need updates */
	{0x0c000003, 0x4f808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
	 "Non-buffered flash (256kB)"},
	/* Expansion entry 0100 */
	{0x11000000, 0x53808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 0100"},
	/* Entry 0101: ST M45PE10 (non-buffered flash, TetonII B0) */
	{0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
	 "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
	/* Entry 0110: ST M45PE20 (non-buffered flash)*/
	{0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
	 "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
	/* Saifun SA25F005 (non-buffered flash) */
	/* strap, cfg1, & write1 need updates */
	{0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
	 "Non-buffered flash (64kB)"},
	/* Fast EEPROM */
	{0x22000000, 0x62808380, 0x009f0081, 0xa184a053, 0xaf000400,
	 BUFFERED_FLAGS, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
	 "EEPROM - fast"},
	/* Expansion entry 1001 */
	{0x2a000002, 0x6b808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 1001"},
	/* Expansion entry 1010 */
	{0x26000001, 0x67808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 1010"},
	/* ATMEL AT45DB011B (buffered flash) */
	{0x2e000003, 0x6e808273, 0x00570081, 0x68848353, 0xaf000400,
	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
	 "Buffered flash (128kB)"},
	/* Expansion entry 1100 */
	{0x33000000, 0x73808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 1100"},
	/* Expansion entry 1101 */
	{0x3b000002, 0x7b808201, 0x00050081, 0x03840253, 0xaf020406,
	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 1101"},
	/* Ateml Expansion entry 1110 */
	{0x37000001, 0x76808273, 0x00570081, 0x68848353, 0xaf000400,
	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
	 BUFFERED_FLASH_BYTE_ADDR_MASK, 0,
	 "Entry 1110 (Atmel)"},
	/* ATMEL AT45DB021B (buffered flash) */
	{0x3f000003, 0x7e808273, 0x00570081, 0x68848353, 0xaf000400,
	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE*2,
	 "Buffered flash (256kB)"},
};

/*
 * The BCM5709 controllers transparently handle the
 * differences between Atmel 264 byte pages and all
 * flash devices which use 256 byte pages, so no
 * logical-to-physical mapping is required in the
 * driver.
 */
static const struct flash_spec flash_5709 = {
	.flags		= BCE_NV_BUFFERED,
	.page_bits	= BCM5709_FLASH_PAGE_BITS,
	.page_size	= BCM5709_FLASH_PAGE_SIZE,
	.addr_mask	= BCM5709_FLASH_BYTE_ADDR_MASK,
	.total_size	= BUFFERED_FLASH_TOTAL_SIZE * 2,
	.name		= "5709/5716 buffered flash (256kB)",
};

/****************************************************************************/
/* FreeBSD device entry points.                                             */
/****************************************************************************/
static int  bce_probe			(device_t);
static int  bce_attach			(device_t);
static int  bce_detach			(device_t);
static int  bce_shutdown		(device_t);

/****************************************************************************/
/* BCE Debug Data Structure Dump Routines                                   */
/****************************************************************************/
#ifdef BCE_DEBUG
static u32  bce_reg_rd				(struct bce_softc *, u32);
static void bce_reg_wr				(struct bce_softc *, u32, u32);
static void bce_reg_wr16			(struct bce_softc *, u32, u16);
static u32  bce_ctx_rd				(struct bce_softc *, u32, u32);
static void bce_dump_enet			(struct bce_softc *, struct mbuf *);
static void bce_dump_mbuf			(struct bce_softc *, struct mbuf *);
static void bce_dump_tx_mbuf_chain	(struct bce_softc *, u16, int);
static void bce_dump_rx_mbuf_chain	(struct bce_softc *, u16, int);
static void bce_dump_pg_mbuf_chain	(struct bce_softc *, u16, int);
static void bce_dump_txbd			(struct bce_softc *,
    int, struct tx_bd *);
static void bce_dump_rxbd			(struct bce_softc *,
    int, struct rx_bd *);
static void bce_dump_pgbd			(struct bce_softc *,
    int, struct rx_bd *);
static void bce_dump_l2fhdr		(struct bce_softc *,
    int, struct l2_fhdr *);
static void bce_dump_ctx			(struct bce_softc *, u16);
static void bce_dump_ftqs			(struct bce_softc *);
static void bce_dump_tx_chain		(struct bce_softc *, u16, int);
static void bce_dump_rx_bd_chain	(struct bce_softc *, u16, int);
static void bce_dump_pg_chain		(struct bce_softc *, u16, int);
static void bce_dump_status_block	(struct bce_softc *);
static void bce_dump_stats_block	(struct bce_softc *);
static void bce_dump_driver_state	(struct bce_softc *);
static void bce_dump_hw_state		(struct bce_softc *);
static void bce_dump_shmem_state	(struct bce_softc *);
static void bce_dump_mq_regs		(struct bce_softc *);
static void bce_dump_bc_state		(struct bce_softc *);
static void bce_dump_txp_state		(struct bce_softc *, int);
static void bce_dump_rxp_state		(struct bce_softc *, int);
static void bce_dump_tpat_state	(struct bce_softc *, int);
static void bce_dump_cp_state		(struct bce_softc *, int);
static void bce_dump_com_state		(struct bce_softc *, int);
static void bce_dump_rv2p_state	(struct bce_softc *);
static void bce_breakpoint			(struct bce_softc *);
#endif /*BCE_DEBUG */

/****************************************************************************/
/* BCE Register/Memory Access Routines                                      */
/****************************************************************************/
static u32  bce_reg_rd_ind		(struct bce_softc *, u32);
static void bce_reg_wr_ind		(struct bce_softc *, u32, u32);
static void bce_shmem_wr		(struct bce_softc *, u32, u32);
static u32  bce_shmem_rd		(struct bce_softc *, u32);
static void bce_ctx_wr			(struct bce_softc *, u32, u32, u32);
static int  bce_miibus_read_reg		(device_t, int, int);
static int  bce_miibus_write_reg	(device_t, int, int, int);
static void bce_miibus_statchg		(device_t);

#ifdef BCE_DEBUG
static int bce_sysctl_nvram_dump(SYSCTL_HANDLER_ARGS);
#ifdef BCE_NVRAM_WRITE_SUPPORT
static int bce_sysctl_nvram_write(SYSCTL_HANDLER_ARGS);
#endif
#endif

/****************************************************************************/
/* BCE NVRAM Access Routines                                                */
/****************************************************************************/
static int  bce_acquire_nvram_lock	(struct bce_softc *);
static int  bce_release_nvram_lock	(struct bce_softc *);
static void bce_enable_nvram_access(struct bce_softc *);
static void bce_disable_nvram_access(struct bce_softc *);
static int  bce_nvram_read_dword	(struct bce_softc *, u32, u8 *, u32);
static int  bce_init_nvram			(struct bce_softc *);
static int  bce_nvram_read			(struct bce_softc *, u32, u8 *, int);
static int  bce_nvram_test			(struct bce_softc *);
#ifdef BCE_NVRAM_WRITE_SUPPORT
static int  bce_enable_nvram_write	(struct bce_softc *);
static void bce_disable_nvram_write(struct bce_softc *);
static int  bce_nvram_erase_page	(struct bce_softc *, u32);
static int  bce_nvram_write_dword	(struct bce_softc *, u32, u8 *, u32);
static int  bce_nvram_write		(struct bce_softc *, u32, u8 *, int);
#endif

/****************************************************************************/
/*                                                                          */
/****************************************************************************/
static void bce_get_rx_buffer_sizes(struct bce_softc *, int);
static void bce_get_media			(struct bce_softc *);
static void bce_init_media			(struct bce_softc *);
static u32 bce_get_rphy_link		(struct bce_softc *);
static void bce_dma_map_addr		(void *, bus_dma_segment_t *, int, int);
static int  bce_dma_alloc			(device_t);
static void bce_dma_free			(struct bce_softc *);
static void bce_release_resources	(struct bce_softc *);

/****************************************************************************/
/* BCE Firmware Synchronization and Load                                    */
/****************************************************************************/
static void bce_fw_cap_init			(struct bce_softc *);
static int  bce_fw_sync			(struct bce_softc *, u32);
static void bce_load_rv2p_fw		(struct bce_softc *, const u32 *, u32,
    u32);
static void bce_load_cpu_fw		(struct bce_softc *,
    struct cpu_reg *, struct fw_info *);
static void bce_start_cpu			(struct bce_softc *, struct cpu_reg *);
static void bce_halt_cpu			(struct bce_softc *, struct cpu_reg *);
static void bce_start_rxp_cpu		(struct bce_softc *);
static void bce_init_rxp_cpu		(struct bce_softc *);
static void bce_init_txp_cpu 		(struct bce_softc *);
static void bce_init_tpat_cpu		(struct bce_softc *);
static void bce_init_cp_cpu	  	(struct bce_softc *);
static void bce_init_com_cpu	  	(struct bce_softc *);
static void bce_init_cpus			(struct bce_softc *);

static void bce_print_adapter_info	(struct bce_softc *);
static void bce_probe_pci_caps		(device_t, struct bce_softc *);
static void bce_stop				(struct bce_softc *);
static int  bce_reset				(struct bce_softc *, u32);
static int  bce_chipinit 			(struct bce_softc *);
static int  bce_blockinit 			(struct bce_softc *);

static int  bce_init_tx_chain		(struct bce_softc *);
static void bce_free_tx_chain		(struct bce_softc *);

static int  bce_get_rx_buf		(struct bce_softc *, u16, u16, u32 *);
static int  bce_init_rx_chain		(struct bce_softc *);
static void bce_fill_rx_chain		(struct bce_softc *);
static void bce_free_rx_chain		(struct bce_softc *);

static int  bce_get_pg_buf		(struct bce_softc *, u16, u16);
static int  bce_init_pg_chain		(struct bce_softc *);
static void bce_fill_pg_chain		(struct bce_softc *);
static void bce_free_pg_chain		(struct bce_softc *);

static struct mbuf *bce_tso_setup	(struct bce_softc *,
    struct mbuf **, u16 *);
static int  bce_tx_encap			(struct bce_softc *, struct mbuf **);
static void bce_start_locked		(struct ifnet *);
static void bce_start			(struct ifnet *);
static int  bce_ioctl			(struct ifnet *, u_long, caddr_t);
static uint64_t bce_get_counter		(struct ifnet *, ift_counter);
static void bce_watchdog		(struct bce_softc *);
static int  bce_ifmedia_upd		(struct ifnet *);
static int  bce_ifmedia_upd_locked	(struct ifnet *);
static void bce_ifmedia_sts		(struct ifnet *, struct ifmediareq *);
static void bce_ifmedia_sts_rphy	(struct bce_softc *, struct ifmediareq *);
static void bce_init_locked		(struct bce_softc *);
static void bce_init				(void *);
static void bce_mgmt_init_locked	(struct bce_softc *sc);

static int  bce_init_ctx			(struct bce_softc *);
static void bce_get_mac_addr		(struct bce_softc *);
static void bce_set_mac_addr		(struct bce_softc *);
static void bce_phy_intr			(struct bce_softc *);
static inline u16 bce_get_hw_rx_cons	(struct bce_softc *);
static void bce_rx_intr			(struct bce_softc *);
static void bce_tx_intr			(struct bce_softc *);
static void bce_disable_intr		(struct bce_softc *);
static void bce_enable_intr		(struct bce_softc *, int);

static void bce_intr				(void *);
static void bce_set_rx_mode		(struct bce_softc *);
static void bce_stats_update		(struct bce_softc *);
static void bce_tick				(void *);
static void bce_pulse				(void *);
static void bce_add_sysctls		(struct bce_softc *);

/****************************************************************************/
/* FreeBSD device dispatch table.                                           */
/****************************************************************************/
static device_method_t bce_methods[] = {
	/* Device interface (device_if.h) */
	DEVMETHOD(device_probe,		bce_probe),
	DEVMETHOD(device_attach,	bce_attach),
	DEVMETHOD(device_detach,	bce_detach),
	DEVMETHOD(device_shutdown,	bce_shutdown),
/* Supported by device interface but not used here. */
/*	DEVMETHOD(device_identify,	bce_identify),      */
/*	DEVMETHOD(device_suspend,	bce_suspend),       */
/*	DEVMETHOD(device_resume,	bce_resume),        */
/*	DEVMETHOD(device_quiesce,	bce_quiesce),       */

	/* MII interface (miibus_if.h) */
	DEVMETHOD(miibus_readreg,	bce_miibus_read_reg),
	DEVMETHOD(miibus_writereg,	bce_miibus_write_reg),
	DEVMETHOD(miibus_statchg,	bce_miibus_statchg),
/* Supported by MII interface but not used here.       */
/*	DEVMETHOD(miibus_linkchg,	bce_miibus_linkchg),   */
/*	DEVMETHOD(miibus_mediainit,	bce_miibus_mediainit), */

	DEVMETHOD_END
};

static driver_t bce_driver = {
	"bce",
	bce_methods,
	sizeof(struct bce_softc)
};

static devclass_t bce_devclass;

MODULE_DEPEND(bce, pci, 1, 1, 1);
MODULE_DEPEND(bce, ether, 1, 1, 1);
MODULE_DEPEND(bce, miibus, 1, 1, 1);

DRIVER_MODULE(bce, pci, bce_driver, bce_devclass, NULL, NULL);
DRIVER_MODULE(miibus, bce, miibus_driver, miibus_devclass, NULL, NULL);
MODULE_PNP_INFO("U16:vendor;U16:device;U16:#;U16:#;D:#", pci, bce,
    bce_devs, nitems(bce_devs) - 1);

/****************************************************************************/
/* Tunable device values                                                    */
/****************************************************************************/
static SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
    "bce driver parameters");

/* Allowable values are TRUE or FALSE */
static int bce_verbose = TRUE;
SYSCTL_INT(_hw_bce, OID_AUTO, verbose, CTLFLAG_RDTUN, &bce_verbose, 0,
    "Verbose output enable/disable");

/* Allowable values are TRUE or FALSE */
static int bce_tso_enable = TRUE;
SYSCTL_INT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
    "TSO Enable/Disable");

/* Allowable values are 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */
/* ToDo: Add MSI-X support. */
static int bce_msi_enable = 1;
SYSCTL_INT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
    "MSI-X|MSI|INTx selector");

/* Allowable values are 1, 2, 4, 8. */
static int bce_rx_pages = DEFAULT_RX_PAGES;
SYSCTL_UINT(_hw_bce, OID_AUTO, rx_pages, CTLFLAG_RDTUN, &bce_rx_pages, 0,
    "Receive buffer descriptor pages (1 page = 255 buffer descriptors)");

/* Allowable values are 1, 2, 4, 8. */
static int bce_tx_pages = DEFAULT_TX_PAGES;
SYSCTL_UINT(_hw_bce, OID_AUTO, tx_pages, CTLFLAG_RDTUN, &bce_tx_pages, 0,
    "Transmit buffer descriptor pages (1 page = 255 buffer descriptors)");

/* Allowable values are TRUE or FALSE. */
static int bce_hdr_split = TRUE;
SYSCTL_UINT(_hw_bce, OID_AUTO, hdr_split, CTLFLAG_RDTUN, &bce_hdr_split, 0,
    "Frame header/payload splitting Enable/Disable");

/* Allowable values are TRUE or FALSE. */
static int bce_strict_rx_mtu = FALSE;
SYSCTL_UINT(_hw_bce, OID_AUTO, strict_rx_mtu, CTLFLAG_RDTUN,
    &bce_strict_rx_mtu, 0,
    "Enable/Disable strict RX frame size checking");

/* Allowable values are 0 ... 100 */
#ifdef BCE_DEBUG
/* Generate 1 interrupt for every transmit completion. */
static int bce_tx_quick_cons_trip_int = 1;
#else
/* Generate 1 interrupt for every 20 transmit completions. */
static int bce_tx_quick_cons_trip_int = DEFAULT_TX_QUICK_CONS_TRIP_INT;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, tx_quick_cons_trip_int, CTLFLAG_RDTUN,
    &bce_tx_quick_cons_trip_int, 0,
    "Transmit BD trip point during interrupts");

/* Allowable values are 0 ... 100 */
/* Generate 1 interrupt for every transmit completion. */
#ifdef BCE_DEBUG
static int bce_tx_quick_cons_trip = 1;
#else
/* Generate 1 interrupt for every 20 transmit completions. */
static int bce_tx_quick_cons_trip = DEFAULT_TX_QUICK_CONS_TRIP;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, tx_quick_cons_trip, CTLFLAG_RDTUN,
    &bce_tx_quick_cons_trip, 0,
    "Transmit BD trip point");

/* Allowable values are 0 ... 100 */
#ifdef BCE_DEBUG
/* Generate an interrupt if 0us have elapsed since the last TX completion. */
static int bce_tx_ticks_int = 0;
#else
/* Generate an interrupt if 80us have elapsed since the last TX completion. */
static int bce_tx_ticks_int = DEFAULT_TX_TICKS_INT;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, tx_ticks_int, CTLFLAG_RDTUN,
    &bce_tx_ticks_int, 0, "Transmit ticks count during interrupt");

/* Allowable values are 0 ... 100 */
#ifdef BCE_DEBUG
/* Generate an interrupt if 0us have elapsed since the last TX completion. */
static int bce_tx_ticks = 0;
#else
/* Generate an interrupt if 80us have elapsed since the last TX completion. */
static int bce_tx_ticks = DEFAULT_TX_TICKS;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, tx_ticks, CTLFLAG_RDTUN,
    &bce_tx_ticks, 0, "Transmit ticks count");

/* Allowable values are 1 ... 100 */
#ifdef BCE_DEBUG
/* Generate 1 interrupt for every received frame. */
static int bce_rx_quick_cons_trip_int = 1;
#else
/* Generate 1 interrupt for every 6 received frames. */
static int bce_rx_quick_cons_trip_int = DEFAULT_RX_QUICK_CONS_TRIP_INT;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, rx_quick_cons_trip_int, CTLFLAG_RDTUN,
    &bce_rx_quick_cons_trip_int, 0,
    "Receive BD trip point duirng interrupts");

/* Allowable values are 1 ... 100 */
#ifdef BCE_DEBUG
/* Generate 1 interrupt for every received frame. */
static int bce_rx_quick_cons_trip = 1;
#else
/* Generate 1 interrupt for every 6 received frames. */
static int bce_rx_quick_cons_trip = DEFAULT_RX_QUICK_CONS_TRIP;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, rx_quick_cons_trip, CTLFLAG_RDTUN,
    &bce_rx_quick_cons_trip, 0,
    "Receive BD trip point");

/* Allowable values are 0 ... 100 */
#ifdef BCE_DEBUG
/* Generate an int. if 0us have elapsed since the last received frame. */
static int bce_rx_ticks_int = 0;
#else
/* Generate an int. if 18us have elapsed since the last received frame. */
static int bce_rx_ticks_int = DEFAULT_RX_TICKS_INT;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, rx_ticks_int, CTLFLAG_RDTUN,
    &bce_rx_ticks_int, 0, "Receive ticks count during interrupt");

/* Allowable values are 0 ... 100 */
#ifdef BCE_DEBUG
/* Generate an int. if 0us have elapsed since the last received frame. */
static int bce_rx_ticks = 0;
#else
/* Generate an int. if 18us have elapsed since the last received frame. */
static int bce_rx_ticks = DEFAULT_RX_TICKS;
#endif
SYSCTL_UINT(_hw_bce, OID_AUTO, rx_ticks, CTLFLAG_RDTUN,
    &bce_rx_ticks, 0, "Receive ticks count");

/****************************************************************************/
/* Device probe function.                                                   */
/*                                                                          */
/* Compares the device to the driver's list of supported devices and        */
/* reports back to the OS whether this is the right driver for the device.  */
/*                                                                          */
/* Returns:                                                                 */
/*   BUS_PROBE_DEFAULT on success, positive value on failure.               */
/****************************************************************************/
static int
bce_probe(device_t dev)
{
	const struct bce_type *t;
	struct bce_softc *sc;
	char *descbuf;
	u16 vid = 0, did = 0, svid = 0, sdid = 0;

	t = bce_devs;

	sc = device_get_softc(dev);
	sc->bce_unit = device_get_unit(dev);
	sc->bce_dev = dev;

	/* Get the data for the device to be probed. */
	vid  = pci_get_vendor(dev);
	did  = pci_get_device(dev);
	svid = pci_get_subvendor(dev);
	sdid = pci_get_subdevice(dev);

	DBPRINT(sc, BCE_EXTREME_LOAD,
	    "%s(); VID = 0x%04X, DID = 0x%04X, SVID = 0x%04X, "
	    "SDID = 0x%04X\n", __FUNCTION__, vid, did, svid, sdid);

	/* Look through the list of known devices for a match. */
	while(t->bce_name != NULL) {
		if ((vid == t->bce_vid) && (did == t->bce_did) &&
		    ((svid == t->bce_svid) || (t->bce_svid == PCI_ANY_ID)) &&
		    ((sdid == t->bce_sdid) || (t->bce_sdid == PCI_ANY_ID))) {
			descbuf = malloc(BCE_DEVDESC_MAX, M_TEMP, M_NOWAIT);

			if (descbuf == NULL)
				return(ENOMEM);

			/* Print out the device identity. */
			snprintf(descbuf, BCE_DEVDESC_MAX, "%s (%c%d)",
			    t->bce_name, (((pci_read_config(dev,
			    PCIR_REVID, 4) & 0xf0) >> 4) + 'A'),
			    (pci_read_config(dev, PCIR_REVID, 4) & 0xf));

			device_set_desc_copy(dev, descbuf);
			free(descbuf, M_TEMP);
			return(BUS_PROBE_DEFAULT);
		}
		t++;
	}

	return(ENXIO);
}

/****************************************************************************/
/* PCI Capabilities Probe Function.                                         */
/*                                                                          */
/* Walks the PCI capabiites list for the device to find what features are   */
/* supported.                                                               */
/*                                                                          */
/* Returns:                                                                 */
/*   None.                                                                  */
/****************************************************************************/
static void
bce_print_adapter_info(struct bce_softc *sc)
{
	int i = 0;

	DBENTER(BCE_VERBOSE_LOAD);

	if (bce_verbose || bootverbose) {
		BCE_PRINTF("ASIC (0x%08X); ", sc->bce_chipid);
		printf("Rev (%c%d); ", ((BCE_CHIP_ID(sc) & 0xf000) >>
		    12) + 'A', ((BCE_CHIP_ID(sc) & 0x0ff0) >> 4));

		/* Bus info. */
		if (sc->bce_flags & BCE_PCIE_FLAG) {
			printf("Bus (PCIe x%d, ", sc->link_width);
			switch (sc->link_speed) {
			case 1: printf("2.5Gbps); "); break;
			case 2:	printf("5Gbps); "); break;
			default: printf("Unknown link speed); ");
			}
		} else {
			printf("Bus (PCI%s, %s, %dMHz); ",
			    ((sc->bce_flags & BCE_PCIX_FLAG) ? "-X" : ""),
			    ((sc->bce_flags & BCE_PCI_32BIT_FLAG) ?
			    "32-bit" : "64-bit"), sc->bus_speed_mhz);
		}

		/* Firmware version and device features. */
		printf("B/C (%s); Bufs (RX:%d;TX:%d;PG:%d); Flags (",
		    sc->bce_bc_ver,	sc->rx_pages, sc->tx_pages,
		    (bce_hdr_split == TRUE ? sc->pg_pages: 0));

		if (bce_hdr_split == TRUE) {
			printf("SPLT");
			i++;
		}

		if (sc->bce_flags & BCE_USING_MSI_FLAG) {
			if (i > 0) printf("|");
			printf("MSI"); i++;
		}

		if (sc->bce_flags & BCE_USING_MSIX_FLAG) {
			if (i > 0) printf("|");
			printf("MSI-X"); i++;
		}

		if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG) {
			if (i > 0) printf("|");
			printf("2.5G"); i++;
		}

		if (sc->bce_phy_flags & BCE_PHY_REMOTE_CAP_FLAG) {
			if (i > 0) printf("|");
			printf("Remote PHY(%s)",
			    sc->bce_phy_flags & BCE_PHY_REMOTE_PORT_FIBER_FLAG ?
			    "FIBER" : "TP"); i++;
		}

		if (sc->bce_flags & BCE_MFW_ENABLE_FLAG) {
			if (i > 0) printf("|");
			printf("MFW); MFW (%s)\n", sc->bce_mfw_ver);
		} else {
			printf(")\n");
		}

		printf("Coal (RX:%d,%d,%d,%d; TX:%d,%d,%d,%d)\n",
		    sc->bce_rx_quick_cons_trip_int,
		    sc->bce_rx_quick_cons_trip,
		    sc->bce_rx_ticks_int,
		    sc->bce_rx_ticks,
		    sc->bce_tx_quick_cons_trip_int,
		    sc->bce_tx_quick_cons_trip,
		    sc->bce_tx_ticks_int,
		    sc->bce_tx_ticks);
	}

	DBEXIT(BCE_VERBOSE_LOAD);
}

/****************************************************************************/
/* PCI Capabilities Probe Function.                                         */
/*                                                                          */
/* Walks the PCI capabiites list for the device to find what features are   */
/* supported.                                                               */
/*                                                                          */
/* Returns:                                                                 */
/*   None.                                                                  */
/****************************************************************************/
static void
bce_probe_pci_caps(device_t dev, struct bce_softc *sc)
{
	u32 reg;

	DBENTER(BCE_VERBOSE_LOAD);

	/* Check if PCI-X capability is enabled. */
	if (pci_find_cap(dev, PCIY_PCIX, &reg) == 0) {
		if (reg != 0)
			sc->bce_cap_flags |= BCE_PCIX_CAPABLE_FLAG;
	}

	/* Check if PCIe capability is enabled. */
	if (pci_find_cap(dev, PCIY_EXPRESS, &reg) == 0) {
		if (reg != 0) {
			u16 link_status = pci_read_config(dev, reg + 0x12, 2);
			DBPRINT(sc, BCE_INFO_LOAD, "PCIe link_status = "
			    "0x%08X\n",	link_status);
			sc->link_speed = link_status & 0xf;
			sc->link_width = (link_status >> 4) & 0x3f;
			sc->bce_cap_flags |= BCE_PCIE_CAPABLE_FLAG;
			sc->bce_flags |= BCE_PCIE_FLAG;
		}
	}