coresight.c revision c8c25848151c4e087438b40e02959716bb7d70b9
1/*-
2 * Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD$");
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/bus.h>
37#include <sys/rman.h>
38#include <sys/kernel.h>
39#include <sys/lock.h>
40#include <sys/module.h>
41#include <sys/mutex.h>
42#include <machine/bus.h>
43
44#include <dev/ofw/ofw_bus.h>
45#include <dev/ofw/ofw_bus_subr.h>
46
47#include <arm64/coresight/coresight.h>
48
49MALLOC_DEFINE(M_CORESIGHT, "coresight", "ARM Coresight");
50static struct mtx cs_mtx;
51
52struct coresight_device_list cs_devs;
53
54static int
55coresight_get_ports(phandle_t dev_node,
56    struct coresight_platform_data *pdata)
57{
58	phandle_t node, child;
59	pcell_t port_reg;
60	phandle_t xref;
61	char *name;
62	int ret;
63	phandle_t endpoint_child;
64	struct endpoint *endp;
65
66	child = ofw_bus_find_child(dev_node, "ports");
67	if (child)
68		node = child;
69	else
70		node = dev_node;
71
72	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
73		ret = OF_getprop_alloc(child, "name", (void **)&name);
74		if (ret == -1)
75			continue;
76
77		if (strcasecmp(name, "port") ||
78		    strncasecmp(name, "port@", 6)) {
79
80			port_reg = -1;
81			OF_getencprop(child, "reg", (void *)&port_reg,
82			    sizeof(port_reg));
83
84			endpoint_child = ofw_bus_find_child(child, "endpoint");
85			if (endpoint_child) {
86				if (OF_getencprop(endpoint_child,
87				    "remote-endpoint", &xref,
88				    sizeof(xref)) == -1) {
89					printf("failed\n");
90					continue;
91				}
92				endp = malloc(sizeof(struct endpoint),
93				    M_CORESIGHT, M_WAITOK | M_ZERO);
94				endp->my_node = endpoint_child;
95				endp->their_node = OF_node_from_xref(xref);
96				endp->dev_node = dev_node;
97				endp->reg = port_reg;
98				if (OF_getproplen(endpoint_child,
99				    "slave-mode") >= 0) {
100					pdata->in_ports++;
101					endp->slave = 1;
102				} else
103					pdata->out_ports++;
104
105				mtx_lock(&pdata->mtx_lock);
106				TAILQ_INSERT_TAIL(&pdata->endpoints,
107				    endp, link);
108				mtx_unlock(&pdata->mtx_lock);
109			}
110		}
111	}
112
113	return (0);
114}
115
116int
117coresight_register(struct coresight_desc *desc)
118{
119	struct coresight_device *cs_dev;
120
121	cs_dev = malloc(sizeof(struct coresight_device),
122	    M_CORESIGHT, M_WAITOK | M_ZERO);
123	cs_dev->dev = desc->dev;
124	cs_dev->node = ofw_bus_get_node(desc->dev);
125	cs_dev->pdata = desc->pdata;
126	cs_dev->dev_type = desc->dev_type;
127
128	mtx_lock(&cs_mtx);
129	TAILQ_INSERT_TAIL(&cs_devs, cs_dev, link);
130	mtx_unlock(&cs_mtx);
131
132	return (0);
133}
134
135struct endpoint *
136coresight_get_output_endpoint(struct coresight_platform_data *pdata)
137{
138	struct endpoint *endp;
139
140	if (pdata->out_ports != 1)
141		return (NULL);
142
143	TAILQ_FOREACH(endp, &pdata->endpoints, link) {
144		if (endp->slave == 0)
145			return (endp);
146	}
147
148	return (NULL);
149}
150
151struct coresight_device *
152coresight_get_output_device(struct endpoint *endp, struct endpoint **out_endp)
153{
154	struct coresight_device *cs_dev;
155	struct endpoint *endp2;
156
157	TAILQ_FOREACH(cs_dev, &cs_devs, link) {
158		TAILQ_FOREACH(endp2, &cs_dev->pdata->endpoints, link) {
159			if (endp->their_node == endp2->my_node) {
160				*out_endp = endp2;
161				return (cs_dev);
162			}
163		}
164	}
165
166	return (NULL);
167}
168
169static int
170coresight_get_cpu(phandle_t node,
171    struct coresight_platform_data *pdata)
172{
173	phandle_t cpu_node;
174	pcell_t xref;
175	pcell_t cpu_reg;
176
177	if (OF_getencprop(node, "cpu", &xref, sizeof(xref)) != -1) {
178		cpu_node = OF_node_from_xref(xref);
179		if (OF_getencprop(cpu_node, "reg", (void *)&cpu_reg,
180			sizeof(cpu_reg)) > 0) {
181			pdata->cpu = cpu_reg;
182			return (0);
183		}
184	}
185
186	return (-1);
187}
188
189struct coresight_platform_data *
190coresight_get_platform_data(device_t dev)
191{
192	struct coresight_platform_data *pdata;
193	phandle_t node;
194
195	node = ofw_bus_get_node(dev);
196
197	pdata = malloc(sizeof(struct coresight_platform_data),
198	    M_CORESIGHT, M_WAITOK | M_ZERO);
199	mtx_init(&pdata->mtx_lock, "Coresight Platform Data", NULL, MTX_DEF);
200	TAILQ_INIT(&pdata->endpoints);
201
202	coresight_get_cpu(node, pdata);
203	coresight_get_ports(node, pdata);
204
205	if (bootverbose)
206		printf("Total ports: in %d out %d\n",
207		    pdata->in_ports, pdata->out_ports);
208
209	return (pdata);
210}
211
212static void
213coresight_init(void)
214{
215
216	mtx_init(&cs_mtx, "ARM Coresight", NULL, MTX_DEF);
217	TAILQ_INIT(&cs_devs);
218}
219
220SYSINIT(coresight, SI_SUB_DRIVERS, SI_ORDER_FIRST, coresight_init, NULL);
221