17d671d9br/*-
27d671d9br * Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
37d671d9br * All rights reserved.
47d671d9br *
57d671d9br * This software was developed by SRI International and the University of
67d671d9br * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
77d671d9br * ("CTSRD"), as part of the DARPA CRASH research programme.
87d671d9br *
97d671d9br * Redistribution and use in source and binary forms, with or without
107d671d9br * modification, are permitted provided that the following conditions
117d671d9br * are met:
127d671d9br * 1. Redistributions of source code must retain the above copyright
137d671d9br *    notice, this list of conditions and the following disclaimer.
147d671d9br * 2. Redistributions in binary form must reproduce the above copyright
157d671d9br *    notice, this list of conditions and the following disclaimer in the
167d671d9br *    documentation and/or other materials provided with the distribution.
177d671d9br *
187d671d9br * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
197d671d9br * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
207d671d9br * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
217d671d9br * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
227d671d9br * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
237d671d9br * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
247d671d9br * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
257d671d9br * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
267d671d9br * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
277d671d9br * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
287d671d9br * SUCH DAMAGE.
297d671d9br */
307d671d9br
317d671d9br#include <sys/cdefs.h>
327d671d9br__FBSDID("$FreeBSD$");
337d671d9br
347d671d9br#include <sys/param.h>
357d671d9br#include <sys/systm.h>
367d671d9br#include <sys/bus.h>
377d671d9br#include <sys/rman.h>
387d671d9br#include <sys/kernel.h>
39250e158cem#include <sys/lock.h>
407d671d9br#include <sys/module.h>
41250e158cem#include <sys/mutex.h>
427d671d9br#include <machine/bus.h>
437d671d9br
447d671d9br#include <dev/ofw/ofw_bus.h>
457d671d9br#include <dev/ofw/ofw_bus_subr.h>
467d671d9br
477d671d9br#include <arm64/coresight/coresight.h>
487d671d9br
497d671d9brMALLOC_DEFINE(M_CORESIGHT, "coresight", "ARM Coresight");
507d671d9brstatic struct mtx cs_mtx;
517d671d9br
527d671d9brstruct coresight_device_list cs_devs;
537d671d9br
547d671d9brstatic int
557d671d9brcoresight_get_ports(phandle_t dev_node,
567d671d9br    struct coresight_platform_data *pdata)
577d671d9br{
587d671d9br	phandle_t node, child;
597d671d9br	pcell_t port_reg;
607d671d9br	phandle_t xref;
617d671d9br	char *name;
627d671d9br	int ret;
637d671d9br	phandle_t endpoint_child;
647d671d9br	struct endpoint *endp;
657d671d9br
667d671d9br	child = ofw_bus_find_child(dev_node, "ports");
677d671d9br	if (child)
687d671d9br		node = child;
697d671d9br	else
707d671d9br		node = dev_node;
717d671d9br
727d671d9br	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
7338bf332gonzo		ret = OF_getprop_alloc(child, "name", (void **)&name);
747d671d9br		if (ret == -1)
757d671d9br			continue;
767d671d9br
777d671d9br		if (strcasecmp(name, "port") ||
787d671d9br		    strncasecmp(name, "port@", 6)) {
797d671d9br
807d671d9br			port_reg = -1;
817d671d9br			OF_getencprop(child, "reg", (void *)&port_reg, sizeof(port_reg));
827d671d9br
837d671d9br			endpoint_child = ofw_bus_find_child(child, "endpoint");
847d671d9br			if (endpoint_child) {
857d671d9br				if (OF_getencprop(endpoint_child, "remote-endpoint", &xref,
867d671d9br				    sizeof(xref)) == -1) {
877d671d9br					printf("failed\n");
887d671d9br					continue;
897d671d9br				}
907d671d9br				endp = malloc(sizeof(struct endpoint), M_CORESIGHT,
917d671d9br				    M_WAITOK | M_ZERO);
927d671d9br				endp->my_node = endpoint_child;
937d671d9br				endp->their_node = OF_node_from_xref(xref);
947d671d9br				endp->dev_node = dev_node;
957d671d9br				endp->reg = port_reg;
967d671d9br				if (OF_getproplen(endpoint_child, "slave-mode") >= 0) {
977d671d9br					pdata->in_ports++;
987d671d9br					endp->slave = 1;
997d671d9br				} else {
1007d671d9br					pdata->out_ports++;
1017d671d9br				}
1027d671d9br
1037d671d9br				mtx_lock(&pdata->mtx_lock);
1047d671d9br				TAILQ_INSERT_TAIL(&pdata->endpoints, endp, link);
1057d671d9br				mtx_unlock(&pdata->mtx_lock);
1067d671d9br			}
1077d671d9br		}
1087d671d9br	}
1097d671d9br
1107d671d9br	return (0);
1117d671d9br}
1127d671d9br
1137d671d9brint
1147d671d9brcoresight_register(struct coresight_desc *desc)
1157d671d9br{
1167d671d9br	struct coresight_device *cs_dev;
1177d671d9br
1187d671d9br	cs_dev = malloc(sizeof(struct coresight_device),
1197d671d9br	    M_CORESIGHT, M_WAITOK | M_ZERO);
1207d671d9br	cs_dev->dev = desc->dev;
1217d671d9br	cs_dev->node = ofw_bus_get_node(desc->dev);
1227d671d9br	cs_dev->pdata = desc->pdata;
1237d671d9br	cs_dev->dev_type = desc->dev_type;
1247d671d9br
1257d671d9br	mtx_lock(&cs_mtx);
1267d671d9br	TAILQ_INSERT_TAIL(&cs_devs, cs_dev, link);
1277d671d9br	mtx_unlock(&cs_mtx);
1287d671d9br
1297d671d9br	return (0);
1307d671d9br}
1317d671d9br
1327d671d9brstruct endpoint *
1337d671d9brcoresight_get_output_endpoint(struct coresight_platform_data *pdata)
1347d671d9br{
1357d671d9br	struct endpoint *endp;
1367d671d9br
1377d671d9br	if (pdata->out_ports != 1)
1387d671d9br		return (NULL);
1397d671d9br
1407d671d9br	TAILQ_FOREACH(endp, &pdata->endpoints, link) {
1417d671d9br		if (endp->slave == 0)
1427d671d9br			return (endp);
1437d671d9br	}
1447d671d9br
1457d671d9br	return (NULL);
1467d671d9br}
1477d671d9br
1487d671d9brstruct coresight_device *
1497d671d9brcoresight_get_output_device(struct endpoint *endp, struct endpoint **out_endp)
1507d671d9br{
1517d671d9br	struct coresight_device *cs_dev;
1527d671d9br	struct endpoint *endp2;
1537d671d9br
1547d671d9br	TAILQ_FOREACH(cs_dev, &cs_devs, link) {
1557d671d9br		TAILQ_FOREACH(endp2, &cs_dev->pdata->endpoints, link) {
1567d671d9br			if (endp->their_node == endp2->my_node) {
1577d671d9br				*out_endp = endp2;
1587d671d9br				return (cs_dev);
1597d671d9br			}
1607d671d9br		}
1617d671d9br	}
1627d671d9br
1637d671d9br	return (NULL);
1647d671d9br}
1657d671d9br
1667d671d9brstatic int
1677d671d9brcoresight_get_cpu(phandle_t node,
1687d671d9br    struct coresight_platform_data *pdata)
1697d671d9br{
1707d671d9br	phandle_t cpu_node;
1717d671d9br	pcell_t xref;
1727d671d9br	pcell_t cpu_reg;
1737d671d9br
1747d671d9br	if (OF_getencprop(node, "cpu", &xref, sizeof(xref)) != -1) {
1757d671d9br		cpu_node = OF_node_from_xref(xref);
1767d671d9br		if (OF_getencprop(cpu_node, "reg", (void *)&cpu_reg,
1777d671d9br			sizeof(cpu_reg)) > 0) {
1787d671d9br			pdata->cpu = cpu_reg;
1797d671d9br			return (0);
1807d671d9br		}
1817d671d9br	}
1827d671d9br
1837d671d9br	return (-1);
1847d671d9br}
1857d671d9br
1867d671d9brstruct coresight_platform_data *
1877d671d9brcoresight_get_platform_data(device_t dev)
1887d671d9br{
1897d671d9br	struct coresight_platform_data *pdata;
1907d671d9br	phandle_t node;
1917d671d9br
1927d671d9br	node = ofw_bus_get_node(dev);
1937d671d9br
1947d671d9br	pdata = malloc(sizeof(struct coresight_platform_data),
1957d671d9br	    M_CORESIGHT, M_WAITOK | M_ZERO);
1967d671d9br	mtx_init(&pdata->mtx_lock, "Coresight Platform Data", NULL, MTX_DEF);
1977d671d9br	TAILQ_INIT(&pdata->endpoints);
1987d671d9br
1997d671d9br	coresight_get_cpu(node, pdata);
2007d671d9br	coresight_get_ports(node, pdata);
2017d671d9br
2027d671d9br	if (bootverbose)
2037d671d9br		printf("Total ports: in %d out %d\n",
2047d671d9br		    pdata->in_ports, pdata->out_ports);
2057d671d9br
2067d671d9br	return (pdata);
2077d671d9br}
2087d671d9br
2097d671d9brstatic void
2107d671d9brcoresight_init(void)
2117d671d9br{
2127d671d9br
2137d671d9br	mtx_init(&cs_mtx, "ARM Coresight", NULL, MTX_DEF);
2147d671d9br	TAILQ_INIT(&cs_devs);
2157d671d9br}
2167d671d9br
2177d671d9brSYSINIT(coresight, SI_SUB_DRIVERS, SI_ORDER_FIRST, coresight_init, NULL);
218