Searched refs:_val (Results 1 - 25 of 32) sorted by last modified time

12

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c326 #define CL22_WR_OVER_CL45(_cb, _phy, _bank, _addr, _val) \
330 _val)
332 #define CL22_RD_OVER_CL45(_cb, _phy, _bank, _addr, _val) \
336 _val)
/illumos-gate/usr/src/lib/libc/port/rt/
H A Dmqueue.c135 int _val; \
136 (void) sem_getvalue((sem), &_val); \
137 assert((_val) <= val); }
/illumos-gate/usr/src/uts/common/io/bnx/570x/driver/common/lmdev/
H A Dbnx_lm_main.c385 #define SET_PARAM_VAL(_pdev, _entry, _val) \
386 *((u32_t *) ((u8_t *) (_pdev) + (_entry)->offset)) = (_val)
H A Dlm5706.h1283 #define LOG_REG_RD(_pdev, _offset, _val) \
1286 DbgMessage2(_pdev, INFORM, "rd 0x%04x = 0x%08x\n", _offset, _val); \
1289 #define LOG_REG_WR(_pdev, _offset, _val) \
1292 DbgMessage2(_pdev, INFORM, "wr 0x%04x 0x%08x\n", _offset, _val); \
1295 #define LOG_MBQ_WR32(_pdev, _cid, _offset, _val) \
1299 _cid, _offset, _val); \
1302 #define LOG_MBQ_WR32(_pdev, _cid, _offset, _val) \
1306 _cid, _offset, _val); \
1309 #define LOG_MBQ_WR16(_pdev, _cid, _offset, _val) \
1313 _cid, _offset, _val); \
[all...]
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Dbcm_osal.h165 #define DIRECT_REG_WR(_hwfn, _addr, _val) \
166 qede_osal_direct_reg_write32(_hwfn, _addr, _val)
H A Decore_dev.c2567 #define ECORE_WOL_WR(_p_hwfn, _p_ptt, _offset, _val) ECORE_IS_BB(_p_hwfn->p_dev) ? \
2568 ecore_wr(_p_hwfn, _p_ptt, _offset, _val) : \
2569 ecore_mcp_wol_wr(_p_hwfn, _p_ptt, _offset, _val);
H A Decore_mcp.c64 #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \
66 _val)
71 #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \
73 offsetof(struct public_drv_mb, _field), _val)
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/
H A Decore_sp_verbs.c75 #define ECORE_TODO_FW_COMMAND(_pdev, _drv_msg_code, _val) (-1)
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_devinfo.c2903 #define SET_PARAM_VAL(_pdev, _entry, _val) \
2904 *((u32_t *) ((u8_t *) (_pdev) + (_entry)->offset)) = (_val)
H A Dlm_dcbx_mp.c57 #define ETH_CID_COSX_END_OFFSET(_pdev, _val) (_val + MAX_NUM_OF_ACTIVE_ETH_CONS_PER_COS(pdev))
H A Dlm_hw_attn.c202 #define MASK_VALUE_GENERATE(_val) ((u32_t)((((u64_t)0x1)<<_val)-1))
574 #define GRC_TIMEOUT_MASK_ADDRESS(_val) ( (_val) & ((1<<19)-1)) // 0x000fffff
575 #define GRC_TIMEOUT_MASK_FUNCTION(_val) ( (_val>>20) & ((1<<3)-1)) // 0x00700000
576 #define GRC_TIMEOUT_MASK_MASTER(_val) ( (_val>>24) & ((1<<4)-1)) // 0x0f000000
H A Dlm_niv.c290 #define NIV_STATS_ASSIGN_HI_LO(_field, _val) _field##_hi = U64_HI((_val));\
291 _field##_lo = U64_LO((_val));
H A Dlm_stats.c68 #define STATS_DATA(_bits,_val) ( (_val) & DATA_MASK(_bits) )
71 #define INC_WRAPAROUND_COUNT(_bits,_val) (_val + ( 1ull << _bits ) )
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/documentation/
H A Decore.tex1176 \texttt{e\_d\_tov\_timer\_val} & E\_D\_TOV timeout value in 1msec resolution \\ \hline
1177 \texttt{rec\_tov\_timer\_val} & REC\_TOV timeout value in 1msec resolution \\ \hline
/illumos-gate/usr/src/lib/libast/common/sfio/
H A Dsfhdr.h41 #define _val val macro
/illumos-gate/usr/src/uts/common/io/sfxge/
H A Defsys.h591 #define EFSYS_STAT_SET(_knp, _val) \
593 ((_knp)->value.ui64) = (_val); \
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dutils.h62 #define SET_BIT( _bits, _val ) SET_FLAGS ( _bits, (0x1ULL << _val) )
63 #define RESET_BIT( _bits, _val ) RESET_FLAGS( _bits, (0x1ULL << _val) )
64 #define GET_BIT( _bits, _val ) GET_FLAGS ( _bits, (0x1ULL << _val) )
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h3932 #define REG_WR_IND(_pdev, _reg_offset, _val) lm_reg_wr_ind(_pdev, (_reg_offset), _val)
3936 #define LM_BAR_WR32_ADDRESS(_pdev, _address, _val) \
3937 *((u32_t volatile *) (_address))=(_val); \
3941 #define LM_BAR_WR32_ADDRESS(_pdev, _address, _val) \
3942 mm_io_write_dword(_pdev, _address, _val)
3988 #define LM_BAR_WR8_OFFSET(_pdev, _bar, _offset, _val) \
3991 *((u8_t volatile *) ((u8_t *) (_pdev)->vars.mapped_bar_addr[(_bar)]+(_offset)))=(_val); \
3996 #define LM_BAR_WR16_OFFSET(_pdev, _bar, _offset, _val) \
3999 *((u16_t volatile *) ((u8_t *) (_pdev)->vars.mapped_bar_addr[(_bar)]+(_offset)))=(_val); \
[all...]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dcdu_def.h16 #define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80)
/illumos-gate/usr/src/uts/intel/sys/
H A Dmca_x86.h141 uint32_t _val:1; /* <63> */ member in struct:mca_x86_mcistatus::__anon9626::__anon9628::__anon9629
155 uint32_t _val:1; /* <63> */ member in struct:mca_x86_mcistatus::__anon9626::__anon9628::__anon9630
169 #define mcistatus_val _mcis_hilo._mcis_hi._mcis_hi_tes_np._val
/illumos-gate/usr/src/uts/common/io/arn/
H A Darn_ath9k.h612 #define REG_WRITE(_ah, _reg, _val) arn_iowrite32((_ah), (_reg), (_val))
/illumos-gate/usr/src/lib/libcmd/common/
H A Dcat.c104 #define sfvalue(f) ((f)->_val)
/illumos-gate/usr/src/lib/libast/amd64/include/ast/
H A Dsfio.h361 #define __sf_value(f) (_SF_(f)->_val)
H A Dsfio_s.h45 ssize_t _val; /* values or string lengths */ member in struct:_sfio_s
/illumos-gate/usr/src/lib/libast/common/include/
H A Dsfio.h361 #define __sf_value(f) (_SF_(f)->_val)

Completed in 232 milliseconds

12