Home
last modified time | relevance | path

Searched refs:vBIT (Results 1 – 7 of 7) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-regs.h126 #define XGE_HAL_PCI_INFO vBIT(0xF,0,4)
269 #define XGE_HAL_TXREQTO_VAL(val) vBIT(val,0,32)
289 #define XGE_HAL_XMSI_NO(val) vBIT(val,26,6)
306 #define XGE_HAL_STAT_BYTE_CNT(n) vBIT(n, 4, 12)
451 #define XGE_HAL_TDA_Fn_ECC_SG_ERR vBIT(0xff,0,8)
452 #define XGE_HAL_TDA_Fn_ECC_DB_ERR vBIT(0xff,8,8)
460 #define XGE_HAL_PCC_FB_ECC_SG_ERR vBIT(0xFF,0,8)
466 #define XGE_HAL_PCC_N_SERR vBIT(0xff,48,8)
467 #define XGE_HAL_PCC_ENABLE_FOUR vBIT(0x0F,0,8)
634 #define XGE_HAL_PRC_PCI_AB_RD_Rn vBIT(0xFF,0,8)
[all …]
H A Dxgehal-ring.h66 #define XGE_HAL_RXD_MASK_FRAME_TYPE vBIT(0x3,25,2)
130 (int)((Control_2 & vBIT(0xFFFF,0,16))>>48)
153 (int)((Control_2 & vBIT(0xFF,8,8))>>48)
155 (int)((Control_2 & vBIT(0xFFFF,16,16))>>32)
157 (int)((Control_2 & vBIT(0xFFFF,32,16))>>16)
183 (int)((Control_3 & vBIT(0xFFFF,32,16))>>16)
185 (int)((Control_3 & vBIT(0xFFFF,48,16)))
199 (int)((Control_2 & vBIT(0xFFFF,0,16))>>48)
201 (int)((Control_2 & vBIT(0xFFFF,16,16))>>32)
203 (int)((Control_2 & vBIT(0xFFFF,32,16))>>16)
[all …]
H A Dxgehal-fifo.h57 #define XGE_HAL_TX_FIFO_LAST_TXD_NUM( val) vBIT(val,0,8)
60 #define XGE_HAL_TX_FIFO_FIRSTNLAST_LIST vBIT(3,14,2)
62 #define XGE_HAL_TX_FIFO_NO_SNOOP(n) vBIT(n,30,2)
105 #define XGE_HAL_TXD_LSO_COF_CTRL(val) vBIT(val,30,2)
106 #define XGE_HAL_TXD_TCP_LSO_MSS(val) vBIT(val,34,14)
107 #define XGE_HAL_TXD_BUFFER0_SIZE(val) vBIT(val,48,16)
108 #define XGE_HAL_TXD_GET_LSO_BYTES_SENT(val) ((val & vBIT(0xFFFF,16,16))>>32)
115 #define XGE_HAL_TXD_VLAN_TAG(val) vBIT(val,16,16)
116 #define XGE_HAL_TXD_INT_NUMBER(val) vBIT(val,34,6)
119 #define XGE_HAL_TXD_SET_MARKER vBIT(0x6,0,4)
H A Dxgehal-types.h39 #define vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz))) macro
/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-ring.c424 val64 |= vBIT((queue->buffer_mode >> 1),14,2);/* 1,3 or 5 => 0,1 or 2 */ in __hal_ring_prc_enable()
493 val64 |= vBIT(hldev->config.ring.queue[i].priority, in __hal_ring_hw_initialize()
506 val64 |= vBIT(hldev->config.ring.queue[i].dram_size_mb,(i*8),8); in __hal_ring_hw_initialize()
H A Dxgehal-fifo.c401 vBIT((hldev->config.fifo.queue[i].max-1), in __hal_fifo_hw_initialize()
403 13) | vBIT(priority, (((reg_half)*32) + 5), 3); in __hal_fifo_hw_initialize()
H A Dxgehal-device.c1566 val64 = vBIT(port->num,8,16) | in __hal_device_rts_port_configure()
1567 vBIT(rnum,37,3) | BIT(63); in __hal_device_rts_port_configure()
1576 val64 = BIT(7) | BIT(15) | vBIT(pnum,24,8); in __hal_device_rts_port_configure()
1948 spdm_line_arr[0] = vBIT(l4_sp,0,16) | in __hal_spdm_entry_add()
1949 vBIT(l4_dp,16,32) | in __hal_spdm_entry_add()
1950 vBIT(tgt_queue,53,3) | in __hal_spdm_entry_add()
1951 vBIT(is_tcp,59,1) | in __hal_spdm_entry_add()
1952 vBIT(is_ipv4,63,1); in __hal_spdm_entry_add()
1957 vBIT(dst_ip->ipv4.addr,32,32); in __hal_spdm_entry_add()
1966 spdm_line_arr[7] = vBIT(jhash_value,0,32) | in __hal_spdm_entry_add()
[all …]