Home
last modified time | relevance | path

Searched refs:s32 (Results 1 – 25 of 109) sorted by relevance

12345

/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_api.h53 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
54 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
56 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
61 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
69 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
126 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
127 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
128 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
134 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_common.h55 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
56 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
57 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
58 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
109 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
110 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
115 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
118 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
120 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
144 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_x550.h40 s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
41 s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
42 s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
44 s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);
50 s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw);
71 s32 ixgbe_get_phy_token(struct ixgbe_hw *);
72 s32 ixgbe_put_phy_token(struct ixgbe_hw *);
86 s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw);
88 s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw);
89 s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_phy.h160 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
163 s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
164 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
165 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
174 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
181 s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
184 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
187 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
193 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
195 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_x540.h41 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
46 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);
47 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);
50 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);
51 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
57 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw);
59 s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw);
60 s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);
62 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
66 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
[all …]
H A Dixgbe_api.c88 s32 status; in ixgbe_init_shared_code()
132 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) in ixgbe_set_mac_type()
134 s32 ret_val = IXGBE_SUCCESS; in ixgbe_set_mac_type()
232 s32 ixgbe_init_hw(struct ixgbe_hw *hw) in ixgbe_init_hw()
245 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) in ixgbe_reset_hw()
261 s32 ixgbe_start_hw(struct ixgbe_hw *hw) in ixgbe_start_hw()
475 s32 status = IXGBE_SUCCESS; in ixgbe_identify_phy()
489 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) in ixgbe_reset_phy()
491 s32 status = IXGBE_SUCCESS; in ixgbe_reset_phy()
512 s32 status = IXGBE_SUCCESS; in ixgbe_get_phy_firmware_version()
[all …]
H A Dixgbe_82599.h39 s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
47 s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
50 s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
54 s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);
56 s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);
57 s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
58 s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
59 s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw);
60 s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw);
61 s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);
[all …]
H A Dixgbe_mbx.c117 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_read_posted_mbx()
147 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_write_posted_mbx()
207 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_bit_vf()
226 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_msg_vf()
248 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_ack_vf()
270 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_rst_vf()
292 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_obtain_mbx_lock_vf()
318 s32 ret_val; in ixgbe_write_mbx_vf()
417 static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) in ixgbe_check_for_bit_pf()
558 s32 ret_val; in ixgbe_write_mbx_pf()
[all …]
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_phy.h49 s32 e1000_check_polarity_m88(struct e1000_hw *hw);
50 s32 e1000_check_polarity_igp(struct e1000_hw *hw);
51 s32 e1000_check_polarity_ife(struct e1000_hw *hw);
53 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
54 s32 e1000_copper_link_autoneg(struct e1000_hw *hw);
61 s32 e1000_get_cable_length_m88(struct e1000_hw *hw);
65 s32 e1000_get_phy_id(struct e1000_hw *hw);
66 s32 e1000_get_phy_info_igp(struct e1000_hw *hw);
67 s32 e1000_get_phy_info_m88(struct e1000_hw *hw);
68 s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
[all …]
H A De1000_api.h55 s32 e1000_set_mac_type(struct e1000_hw *hw);
66 s32 e1000_reset_hw(struct e1000_hw *hw);
67 s32 e1000_init_hw(struct e1000_hw *hw);
68 s32 e1000_setup_link(struct e1000_hw *hw);
76 s32 e1000_setup_led(struct e1000_hw *hw);
77 s32 e1000_cleanup_led(struct e1000_hw *hw);
79 s32 e1000_blink_led(struct e1000_hw *hw);
80 s32 e1000_led_on(struct e1000_hw *hw);
81 s32 e1000_led_off(struct e1000_hw *hw);
82 s32 e1000_id_led_init(struct e1000_hw *hw);
[all …]
H A De1000_mac.h41 s32 e1000_null_ops_generic(struct e1000_hw *hw);
48 s32 e1000_blink_led_generic(struct e1000_hw *hw);
52 s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
57 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);
58 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
68 s32 e1000_id_led_init_generic(struct e1000_hw *hw);
69 s32 e1000_led_on_generic(struct e1000_hw *hw);
70 s32 e1000_led_off_generic(struct e1000_hw *hw);
73 s32 e1000_set_default_fc_generic(struct e1000_hw *hw);
76 s32 e1000_setup_led_generic(struct e1000_hw *hw);
[all …]
H A De1000_nvm.h47 s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
49 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);
51 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
52 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
56 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
59 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
61 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
64 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,
69 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);
70 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,
[all …]
H A De1000_mbx.c75 s32 ret_val = -E1000_ERR_MBX; in e1000_read_mbx()
101 s32 ret_val = E1000_SUCCESS; in e1000_write_mbx()
124 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_msg()
144 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_ack()
164 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_rst()
249 s32 ret_val = -E1000_ERR_MBX; in e1000_read_posted_mbx()
278 s32 ret_val = -E1000_ERR_MBX; in e1000_write_posted_mbx()
460 s32 ret_val; in e1000_write_mbx_vf()
501 s32 ret_val = E1000_SUCCESS; in e1000_read_mbx_vf()
682 s32 ret_val; in e1000_write_mbx_pf()
[all …]
H A De1000_hw.h778 s32 (*led_on)(struct e1000_hw *);
779 s32 (*led_off)(struct e1000_hw *);
781 s32 (*reset_hw)(struct e1000_hw *);
782 s32 (*init_hw)(struct e1000_hw *);
814 s32 (*acquire)(struct e1000_hw *);
818 s32 (*commit)(struct e1000_hw *);
822 s32 (*get_info)(struct e1000_hw *);
828 s32 (*reset)(struct e1000_hw *);
843 s32 (*acquire)(struct e1000_hw *);
847 s32 (*update)(struct e1000_hw *);
[all …]
H A De1000_i210.c57 s32 ret_val; in e1000_acquire_nvm_i210()
93 s32 ret_val = E1000_SUCCESS; in e1000_acquire_swfw_sync_i210()
166 s32 i = 0; in e1000_get_hw_semaphore_i210()
238 s32 status = E1000_SUCCESS; in e1000_read_nvm_srrd_i210()
539 s32 ret_val; in e1000_update_nvm_checksum_i210()
618 s32 ret_val; in e1000_update_flash_i210()
674 s32 ret_val; in e1000_init_nvm_params_i210()
723 s32 ret_val; in e1000_valid_led_default_i210()
759 s32 ret_val; in __e1000_access_xmdio_reg()
828 s32 ret_val; in e1000_pll_workaround_i210()
[all …]
H A De1000_vf.c42 static s32 e1000_acquire_vf(struct e1000_hw *hw);
43 static s32 e1000_setup_link_vf(struct e1000_hw *hw);
49 static s32 e1000_init_hw_vf(struct e1000_hw *hw);
50 static s32 e1000_reset_hw_vf(struct e1000_hw *hw);
224 s32 status; in e1000_get_link_up_info_vf()
258 static s32 e1000_reset_hw_vf(struct e1000_hw *hw) in e1000_reset_hw_vf()
262 s32 ret_val = -E1000_ERR_MAC_INIT; in e1000_reset_hw_vf()
307 static s32 e1000_init_hw_vf(struct e1000_hw *hw) in e1000_init_hw_vf()
329 s32 ret_val; in e1000_rar_set_vf()
482 s32 ret_val; in e1000_promisc_set_vf()
[all …]
H A De1000_api.c46 s32 ret_val = E1000_SUCCESS; in e1000_init_mac_params()
72 s32 ret_val = E1000_SUCCESS; in e1000_init_nvm_params()
98 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params()
124 s32 ret_val = E1000_SUCCESS; in e1000_init_mbx_params()
153 s32 ret_val = E1000_SUCCESS; in e1000_set_mac_type()
461 s32 ret_val; in e1000_setup_init_funcs()
713 s32 e1000_reset_hw(struct e1000_hw *hw) in e1000_reset_hw()
728 s32 e1000_init_hw(struct e1000_hw *hw) in e1000_init_hw()
778 s32 e1000_setup_led(struct e1000_hw *hw) in e1000_setup_led()
839 s32 e1000_led_on(struct e1000_hw *hw) in e1000_led_on()
[all …]
/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_api.h14 s32 igc_set_mac_type(struct igc_hw *hw);
16 s32 igc_init_mac_params(struct igc_hw *hw);
17 s32 igc_init_nvm_params(struct igc_hw *hw);
18 s32 igc_init_phy_params(struct igc_hw *hw);
19 s32 igc_get_bus_info(struct igc_hw *hw);
22 s32 igc_force_mac_fc(struct igc_hw *hw);
23 s32 igc_check_for_link(struct igc_hw *hw);
24 s32 igc_reset_hw(struct igc_hw *hw);
25 s32 igc_init_hw(struct igc_hw *hw);
26 s32 igc_setup_link(struct igc_hw *hw);
[all …]
H A Digc_phy.h11 s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);
13 s32 igc_null_lplu_state(struct igc_hw *hw, bool active);
14 s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);
15 s32 igc_null_set_page(struct igc_hw *hw, u16 data);
16 s32 igc_check_downshift_generic(struct igc_hw *hw);
17 s32 igc_check_reset_block_generic(struct igc_hw *hw);
18 s32 igc_get_phy_id(struct igc_hw *hw);
20 s32 igc_phy_hw_reset_generic(struct igc_hw *hw);
21 s32 igc_phy_reset_dsp_generic(struct igc_hw *hw);
23 s32 igc_setup_copper_link_generic(struct igc_hw *hw);
[all …]
H A Digc_api.c16 s32 igc_init_mac_params(struct igc_hw *hw) in igc_init_mac_params()
18 s32 ret_val = IGC_SUCCESS; in igc_init_mac_params()
42 s32 igc_init_nvm_params(struct igc_hw *hw) in igc_init_nvm_params()
44 s32 ret_val = IGC_SUCCESS; in igc_init_nvm_params()
70 s32 ret_val = IGC_SUCCESS; in igc_init_phy_params()
96 s32 igc_set_mac_type(struct igc_hw *hw) in igc_set_mac_type()
99 s32 ret_val = IGC_SUCCESS; in igc_set_mac_type()
143 s32 ret_val; in igc_setup_init_funcs()
300 s32 igc_reset_hw(struct igc_hw *hw) in igc_reset_hw()
315 s32 igc_init_hw(struct igc_hw *hw) in igc_init_hw()
[all …]
H A Digc_hw.h345 s32 (*init_params)(struct igc_hw *);
353 s32 (*reset_hw)(struct igc_hw *);
354 s32 (*init_hw)(struct igc_hw *);
355 s32 (*setup_link)(struct igc_hw *);
381 s32 (*init_params)(struct igc_hw *);
382 s32 (*acquire)(struct igc_hw *);
385 s32 (*get_info)(struct igc_hw *);
391 s32 (*reset)(struct igc_hw *);
404 s32 (*acquire)(struct igc_hw *);
408 s32 (*update)(struct igc_hw *);
[all …]
H A Digc_nvm.h11 s32 igc_null_read_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);
13 s32 igc_null_led_default(struct igc_hw *hw, u16 *data);
14 s32 igc_null_write_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);
15 s32 igc_acquire_nvm_generic(struct igc_hw *hw);
17 s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg);
18 s32 igc_read_mac_addr_generic(struct igc_hw *hw);
19 s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num,
21 s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words,
24 s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw);
25 s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words,
[all …]
H A Digc_mac.h12 s32 igc_null_ops_generic(struct igc_hw *hw);
13 s32 igc_null_link_info(struct igc_hw *hw, u16 *s, u16 *d);
18 s32 igc_check_for_copper_link_generic(struct igc_hw *hw);
20 s32 igc_disable_pcie_master_generic(struct igc_hw *hw);
21 s32 igc_force_mac_fc_generic(struct igc_hw *hw);
22 s32 igc_get_auto_rd_done_generic(struct igc_hw *hw);
23 s32 igc_get_bus_info_pcie_generic(struct igc_hw *hw);
25 s32 igc_get_hw_semaphore_generic(struct igc_hw *hw);
31 s32 igc_set_fc_watermarks_generic(struct igc_hw *hw);
32 s32 igc_setup_link_generic(struct igc_hw *hw);
[all …]
H A Digc_i225.h11 s32 igc_update_flash_i225(struct igc_hw *hw);
12 s32 igc_update_nvm_checksum_i225(struct igc_hw *hw);
13 s32 igc_validate_nvm_checksum_i225(struct igc_hw *hw);
14 s32 igc_write_nvm_srwr_i225(struct igc_hw *hw, u16 offset,
16 s32 igc_read_nvm_srrd_i225(struct igc_hw *hw, u16 offset,
18 s32 igc_set_flsw_flash_burst_counter_i225(struct igc_hw *hw,
22 s32 igc_check_for_link_i225(struct igc_hw *hw);
23 s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask);
25 s32 igc_init_hw_i225(struct igc_hw *hw);
26 s32 igc_setup_copper_link_i225(struct igc_hw *hw);
[all …]
H A Digc_i225.c135 s32 ret_val = IGC_SUCCESS; in igc_init_phy_params_i225()
184 s32 ret_val; in igc_reset_hw_i225()
240 s32 ret_val; in igc_acquire_nvm_i225()
346 s32 ret_val; in igc_setup_copper_link_i225()
374 s32 i = 0; in igc_get_hw_semaphore_i225()
446 s32 status = IGC_SUCCESS; in igc_read_nvm_srrd_i225()
618 s32 ret_val; in igc_update_nvm_checksum_i225()
771 s32 ret_val = 0; in igc_update_flash_i225()
889 s32 size; in igc_set_ltr_i225()
990 s32 ret_val; in igc_check_for_link_i225()
[all …]

12345