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Searched refs:pci_phys_mid (Results 1 – 25 of 32) sorted by relevance

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/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_util.c150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
188 rp->pci_phys_mid += assign_p->pci_phys_mid; in px_reloc_reg()
200 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
219 reg_begin = (uint64_t)px_rp->pci_phys_mid << 32 | px_rp->pci_phys_low; in px_xlate_reg()
H A Dpx_tools.c475 dev_regspec.pci_phys_mid = 0; /* Not used */ in pxtool_get_phys_addr()
477 dev_regspec.pci_phys_mid = offset >> 32; in pxtool_get_phys_addr()
/illumos-gate/usr/src/uts/common/io/
H A Dbusra.c1050 ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_resource_setup()
1359 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_get_available_prop()
1387 newregs[j].pci_phys_mid = in pci_get_available_prop()
1399 newregs[j].pci_phys_mid = in pci_get_available_prop()
1521 range_base = ((uint64_t)(regs[i].pci_phys_mid) << 32) | in pci_put_available_prop()
1601 newregs[j].pci_phys_mid = in pci_put_available_prop()
1615 newregs[k].pci_phys_mid = in pci_put_available_prop()
1641 newregs[j].pci_phys_mid = (uint32_t)(base >> 32); in pci_put_available_prop()
1670 newregs[0].pci_phys_mid = (uint32_t)(base >> 32); in pci_put_available_prop()
/illumos-gate/usr/src/uts/sun4/io/efcode/
H A Dfcpci.c564 p.pci_phys_mid = fc_cell2uint(fc_arg(cp, 2)); in pfc_map_in()
851 p.pci_phys_mid = p.pci_phys_low = 0; in pfc_config_fetch()
983 p.pci_phys_mid = p.pci_phys_low = 0; in pfc_config_store()
1350 config.pci_phys_mid = config.pci_phys_low = 0; in pci_alloc_resource()
1410 phys_spec.pci_phys_mid = HIADDR(answer); in pci_alloc_resource()
1426 phys_spec.pci_phys_mid); in pci_alloc_resource()
1456 phys_spec.pci_phys_mid = HIADDR(answer); in pci_alloc_resource()
1577 config.pci_phys_mid = config.pci_phys_low = 0; in pci_free_resource()
1636 phys_spec.pci_phys_mid), in pci_free_resource()
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
158 if (rp->pci_phys_mid != 0 || rp->pci_size_hi != 0) { in pcmu_reloc_reg()
179 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c164 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
171 if (rp->pci_phys_mid != 0 || rp->pci_size_hi != 0) { in pci_reloc_reg()
202 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c1998 reg[i].pci_phys_mid = in pcicfg_bridge_assign()
2301 assigned[i].pci_phys_mid); in pcicfg_device_assign_readonly()
2772 pci_ap[i].pci_phys_mid) + in pcicfg_find_resource_end()
2777 pci_ap[i].pci_phys_mid) + in pcicfg_find_resource_end()
3229 addition.pci_phys_mid = 0; in pcicfg_update_reg_prop()
3362 addition.pci_phys_mid = base_hi; in pcicfg_update_assigned_prop_value()
4361 p.pci_phys_mid = p.pci_phys_low = 0; in pcicfg_fcode_probe()
5823 p.pci_phys_mid = 0; in pcicfg_load_fcode()
6059 phys_spec.pci_phys_mid = 0; in pcicfg_fcode_assign_bars()
6132 phys_spec.pci_phys_mid = 0; in pcicfg_fcode_assign_bars()
[all …]
H A Debus.c950 rp->pci_regspec.pci_phys_mid, in ebus_vreg_dump()
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dnhm_pci_cfg.c52 reg.pci_phys_mid = 0; in nhm_pci_cfg_setup()
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dsbbcvar.h72 uint32_t pci_phys_mid; /* Parent mid rng addr */ member
/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c2107 reg[i].pci_phys_mid = PCICFG_HIADDR(answer); in pcicfg_device_assign()
2142 reg[i].pci_phys_mid = 0; in pcicfg_device_assign()
2268 assigned[i].pci_phys_mid); in pcicfg_device_assign_readonly()
2786 assigned[i].pci_phys_mid), in pcicfg_free_device_resources()
2798 mem_type, assigned[i].pci_phys_mid, in pcicfg_free_device_resources()
3099 addition.pci_phys_mid = 0; in pcicfg_update_reg_prop()
3184 addition.pci_phys_mid = base_hi; in pcicfg_update_assigned_prop_value()
4658 pci_ap[i].pci_phys_mid) + in pcicfg_find_resource_end()
4664 pci_ap[i].pci_phys_mid) + in pcicfg_find_resource_end()
4670 pci_ap[i].pci_phys_mid) + in pcicfg_find_resource_end()
[all …]
/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dnb_pci_cfg.c53 reg.pci_phys_mid = 0; in nb_pci_cfg_setup()
/illumos-gate/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c619 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in npe_bus_map()
711 pci_rp->pci_phys_mid = (uint32_t)(addr >> 32); in npe_bus_map()
760 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in npe_bus_map()
/illumos-gate/usr/src/uts/common/os/
H A Dpcifm.c1264 ((uint64_t)drv_regp[rn].pci_phys_mid << 32)) && in pci_check_regs()
1267 ((uint64_t)drv_regp[rn].pci_phys_mid << 32) + in pci_check_regs()
1289 ((uint64_t)drv_regp[rn].pci_phys_mid << 32)) && in pci_check_regs()
1292 ((uint64_t)drv_regp[rn].pci_phys_mid << 32) + in pci_check_regs()
/illumos-gate/usr/src/uts/i86pc/io/pci/
H A Dpci.c439 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in pci_bus_map()
513 reg.regspec_addr = (uint64_t)pci_rp->pci_phys_mid << 32 | in pci_bus_map()
H A Dpci_common.c1040 if (assigned_addr[i].pci_phys_mid == 0 && in pci_common_get_reg_prop()
1047 pci_rp->pci_phys_mid = assigned_addr[i].pci_phys_mid; in pci_common_get_reg_prop()
/illumos-gate/usr/src/uts/sparc/io/pciex/
H A Dpcieb_sparc.c410 reg_spec[rnum].pci_phys_mid = 0; in plx_ro_disable()
/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c912 reg[i].pci_phys_mid = PCICFG_LOADDR(mem_answer); in cardbus_bridge_assign()
926 reg[i].pci_phys_mid = 0; in cardbus_bridge_assign()
1053 range.par_phys_mid = reg[i].pci_phys_mid; in cardbus_isa_bridge_ranges()
2288 assigned[i].pci_phys_mid, in cardbus_free_device_resources()
3385 addition.pci_phys_mid = (uint32_t)((base>>32) & 0xffffffff);
3554 addition.pci_phys_mid = 0;
/illumos-gate/usr/src/uts/sun4u/io/
H A Dsbbc.c921 rp->pci_phys_mid = rangep->pci_phys_mid; in sbbc_apply_range()
H A Dpmubus.c615 pci_regp->pci_phys_mid = rangep->rng_parent_mid; in pmubus_apply_range()
/illumos-gate/usr/src/uts/i86pc/io/
H A Disa.c449 pci_reg_p->pci_phys_mid = 0; in isa_apply_range()
484 pci_reg_p->pci_phys_mid = 0; in isa_apply_range()
/illumos-gate/usr/src/uts/common/sys/
H A Dpci.h1165 uint_t pci_phys_mid; /* child's address, middle word */ member
/illumos-gate/usr/src/uts/intel/io/pci/
H A Dpci_boot.c2853 assigned->pci_phys_mid = base_hi; in add_bar_reg_props()
2860 assigned->pci_phys_mid, in add_bar_reg_props()
3446 sp->pci_phys_mid = (uint32_t)(list->ml_address >> 32); in memlist_to_spec()
/illumos-gate/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_vgatext.c1244 if (reg[index].pci_phys_mid != 0) in vgatext_get_pci_reg_index()
/illumos-gate/usr/src/uts/intel/io/vmm/io/
H A Dppt.c432 pbar->base = ((uint64_t)reg->pci_phys_mid << 32) | in ppt_bar_crawl()

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