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Searched refs:msi_ctrl (Results 1 – 11 of 11) sorted by relevance

/illumos-gate/usr/src/uts/common/io/
H A Dpci_intr_lib.c109 *msi_ctrl = *caps_ptr = 0; in pci_get_msi_ctrl()
157 ushort_t caps_ptr, msi_ctrl; in pci_msi_get_cap() local
203 ushort_t caps_ptr, msi_ctrl; in pci_msi_configure() local
296 ushort_t msi_ctrl, caps_ptr; in pci_msi_unconfigure() local
360 ushort_t caps_ptr, msi_ctrl; in pci_is_msi_enabled() local
395 ushort_t caps_ptr, msi_ctrl; in pci_msi_enable_mode() local
418 msi_ctrl); in pci_msi_enable_mode()
423 msi_ctrl)); in pci_msi_enable_mode()
443 ushort_t caps_ptr, msi_ctrl; in pci_msi_disable_mode() local
469 msi_ctrl)); in pci_msi_disable_mode()
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/illumos-gate/usr/src/uts/i86xpv/io/psm/
H A Dxpv_intr.c242 ushort_t msi_ctrl; in apic_pci_msi_enable_vector() local
281 ushort_t msi_ctrl; in apic_pci_msi_disable_mode() local
289 if (!(msi_ctrl & PCI_MSI_ENABLE_BIT)) in apic_pci_msi_disable_mode()
297 if (msi_ctrl & PCI_MSIX_ENABLE_BIT) { in apic_pci_msi_disable_mode()
298 msi_ctrl &= ~PCI_MSIX_ENABLE_BIT; in apic_pci_msi_disable_mode()
300 msi_ctrl); in apic_pci_msi_disable_mode()
312 ushort_t msi_ctrl; in apic_pci_msi_enable_mode() local
320 if ((msi_ctrl & PCI_MSI_ENABLE_BIT)) in apic_pci_msi_enable_mode()
323 msi_ctrl |= PCI_MSI_ENABLE_BIT; in apic_pci_msi_enable_mode()
346 msi_ctrl |= PCI_MSIX_ENABLE_BIT; in apic_pci_msi_enable_mode()
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H A Dxpv_psm.c1110 ushort_t msi_ctrl; in xpv_psm_get_msi_vector() local
1116 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in xpv_psm_get_msi_vector()
1120 if (msi_ctrl & PCI_MSI_64BIT_MASK) { in xpv_psm_get_msi_vector()
/illumos-gate/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_introp.c65 ushort_t msi_ctrl; in apic_pci_msi_enable_vector() local
121 if (msi_ctrl & PCI_MSI_64BIT_MASK) { in apic_pci_msi_enable_vector()
417 ushort_t msi_ctrl; in apic_pci_msi_enable_mode() local
425 if ((msi_ctrl & PCI_MSI_ENABLE_BIT)) in apic_pci_msi_enable_mode()
428 msi_ctrl |= PCI_MSI_ENABLE_BIT; in apic_pci_msi_enable_mode()
451 msi_ctrl |= PCI_MSIX_ENABLE_BIT; in apic_pci_msi_enable_mode()
453 msi_ctrl); in apic_pci_msi_enable_mode()
514 ushort_t msi_ctrl; in apic_grp_set_cpu() local
594 if (msi_ctrl & PCI_MSI_PVM_MASK) { in apic_grp_set_cpu()
595 if (msi_ctrl & PCI_MSI_64BIT_MASK) in apic_grp_set_cpu()
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H A Dapic_common.c1842 ushort_t msi_ctrl; in apic_pci_msi_unconfigure() local
1850 msi_ctrl &= (~PCI_MSI_MME_MASK); in apic_pci_msi_unconfigure()
1851 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_unconfigure()
1854 if (msi_ctrl & PCI_MSI_64BIT_MASK) { in apic_pci_msi_unconfigure()
1896 ushort_t msi_ctrl; in apic_pci_msi_disable_mode() local
1904 if (!(msi_ctrl & PCI_MSI_ENABLE_BIT)) in apic_pci_msi_disable_mode()
1907 msi_ctrl &= ~PCI_MSI_ENABLE_BIT; /* MSI disable */ in apic_pci_msi_disable_mode()
1908 pci_config_put16(handle, cap_ptr + PCI_MSI_CTRL, msi_ctrl); in apic_pci_msi_disable_mode()
1912 if (msi_ctrl & PCI_MSIX_ENABLE_BIT) { in apic_pci_msi_disable_mode()
1913 msi_ctrl &= ~PCI_MSIX_ENABLE_BIT; in apic_pci_msi_disable_mode()
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/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix_utils.c306 ushort_t msi_ctrl; in apix_pci_msi_enable_vector() local
346 msi_ctrl |= ((highbit(count) - 1) << PCI_MSI_MME_SHIFT); in apix_pci_msi_enable_vector()
350 APIX_WRITE_MSI_DATA(handle, cap_ptr, msi_ctrl, in apix_pci_msi_enable_vector()
355 if (msi_ctrl & PCI_MSI_64BIT_MASK) in apix_pci_msi_enable_vector()
381 ushort_t msi_ctrl; in apix_pci_msi_enable_mode() local
389 if ((msi_ctrl & PCI_MSI_ENABLE_BIT)) in apix_pci_msi_enable_mode()
392 msi_ctrl |= PCI_MSI_ENABLE_BIT; in apix_pci_msi_enable_mode()
412 if (!(msi_ctrl & PCI_MSIX_ENABLE_BIT)) { in apix_pci_msi_enable_mode()
413 msi_ctrl |= PCI_MSIX_ENABLE_BIT; in apix_pci_msi_enable_mode()
415 msi_ctrl); in apix_pci_msi_enable_mode()
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H A Dapix.c1635 ushort_t msi_ctrl; in apix_grp_set_cpu() local
1692 msi_ctrl = pci_config_get16(handle, cap_ptr + PCI_MSI_CTRL); in apix_grp_set_cpu()
1695 if (msi_ctrl & PCI_MSI_PVM_MASK) { in apix_grp_set_cpu()
1696 if (msi_ctrl & PCI_MSI_64BIT_MASK) in apix_grp_set_cpu()
1711 if (msi_ctrl & PCI_MSI_PVM_MASK) { in apix_grp_set_cpu()
/illumos-gate/usr/src/uts/common/io/ib/adapters/tavor/
H A Dtavor.c3005 ushort_t msi_ctrl = 0, caps_ctrl = 0; in tavor_intr_disable() local
3021 if ((msi_ctrl = PCI_CAP_GET16(pci_cfg_hdl, 0, in tavor_intr_disable()
3025 ASSERT(msi_ctrl != 0); in tavor_intr_disable()
3027 if (!(msi_ctrl & PCI_MSI_ENABLE_BIT)) in tavor_intr_disable()
3030 if (msi_ctrl & PCI_MSI_PVM_MASK) { in tavor_intr_disable()
3031 int offset = (msi_ctrl & PCI_MSI_64BIT_MASK) ? in tavor_intr_disable()
3039 msi_ctrl &= ~PCI_MSI_ENABLE_BIT; in tavor_intr_disable()
3041 msi_ctrl); in tavor_intr_disable()
/illumos-gate/usr/src/uts/common/os/
H A Dsunpci.c576 uint16_t msi_ctrl; local
579 msi_ctrl = pci_config_get16(confhdl, cap_ptr + PCI_MSI_CTRL);
581 if (msi_ctrl & PCI_MSI_64BIT_MASK)
584 if (msi_ctrl & PCI_MSI_PVM_MASK)
/illumos-gate/usr/src/uts/common/io/myri10ge/drv/
H A Dmyri10ge_var.h140 uint16_t msi_ctrl; member
H A Dmyri10ge.c5635 mgp->pci_saved_state.msi_ctrl = in myri10ge_save_msi_state()
5663 mgp->pci_saved_state.msi_ctrl); in myri10ge_restore_msi_state()