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Searched refs:link_cfg (Results 1 – 9 of 9) sorted by relevance

/illumos-gate/usr/src/uts/common/io/qede/
H A Dqede_osal.c477 struct qede_link_cfg link_cfg; in qede_osal_link_update() local
479 memset(&link_cfg, 0 , sizeof (struct qede_link_cfg)); in qede_osal_link_update()
480 qede_get_link_info(hwfn, &link_cfg); in qede_osal_link_update()
482 if (link_cfg.duplex == DUPLEX_FULL) { in qede_osal_link_update()
488 if (!link_cfg.link_up) { in qede_osal_link_update()
498 } else if (link_cfg.link_up) { in qede_osal_link_update()
502 qede->props.link_speed = link_cfg.speed; in qede_osal_link_update()
503 qede->props.link_duplex = link_cfg.duplex; in qede_osal_link_update()
504 qede->props.tx_pause = (link_cfg.pause_cfg & in qede_osal_link_update()
506 qede->props.rx_pause = (link_cfg.pause_cfg & in qede_osal_link_update()
H A Dqede_gld.c2324 struct qede_link_cfg link_cfg; local
2328 memset(&link_cfg, 0, sizeof (struct qede_link_cfg));
2329 qede_get_link_info(&edev->hwfns[0], &link_cfg);
2369 *(uint8_t *)pr_val = link_cfg.autoneg;
2386 !(link_cfg.pause_cfg & QEDE_LINK_PAUSE_TX_ENABLE)) {
2389 if ((link_cfg.pause_cfg & QEDE_LINK_PAUSE_RX_ENABLE) &&
2390 !(link_cfg.pause_cfg & QEDE_LINK_PAUSE_TX_ENABLE)) {
2394 (link_cfg.pause_cfg & QEDE_LINK_PAUSE_TX_ENABLE)) {
2397 if ((link_cfg.pause_cfg & QEDE_LINK_PAUSE_RX_ENABLE) &&
2398 (link_cfg.pause_cfg & QEDE_LINK_PAUSE_TX_ENABLE)) {
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_mpi.c932 mbx_cmds.mb[1] = new_cfg.link_cfg; in ql_set_mpi_port_config()
961 qlge->port_cfg_info.link_cfg &= ~pause_bit_mask; in ql_set_pause_mode()
965 qlge->port_cfg_info.link_cfg |= STD_PAUSE; in ql_set_pause_mode()
967 qlge->port_cfg_info.link_cfg |= PP_PAUSE; in ql_set_pause_mode()
978 qlge->port_cfg_info.link_cfg &= ~loop_back_bit_mask; in ql_set_loop_back_mode()
981 qlge->port_cfg_info.link_cfg |= LOOP_INTERNAL_PARALLEL; in ql_set_loop_back_mode()
983 qlge->port_cfg_info.link_cfg |= LOOP_INTERNAL_SERIAL; in ql_set_loop_back_mode()
985 qlge->port_cfg_info.link_cfg |= LOOP_EXTERNAL_PHY; in ql_set_loop_back_mode()
1014 qlge->port_cfg_info.link_cfg = mbx_cmds.mb[1]; in ql_get_port_cfg()
H A Dqlge.c7006 qlge->port_cfg_info.link_cfg |= ENABLE_JUMBO; in ql_device_initialize()
7010 if (qlge->port_cfg_info.link_cfg & STD_PAUSE) in ql_device_initialize()
7012 else if (qlge->port_cfg_info.link_cfg & PP_PAUSE) in ql_device_initialize()
7018 qlge->port_cfg_info.link_cfg &= ~pause_bit_mask; in ql_device_initialize()
7020 qlge->port_cfg_info.link_cfg |= STD_PAUSE; in ql_device_initialize()
7022 qlge->port_cfg_info.link_cfg |= PP_PAUSE; in ql_device_initialize()
7026 if (qlge->port_cfg_info.link_cfg & DCBX_ENABLE) in ql_device_initialize()
7029 qlge->port_cfg_info.link_cfg &= ~dcbx_bit_mask; in ql_device_initialize()
7031 qlge->port_cfg_info.link_cfg |= DCBX_ENABLE; in ql_device_initialize()
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_mac.c215 struct link_config *lc = &pi->link_cfg; in t4_port_to_media()
318 struct link_config *lc = &pi->link_cfg; in t4_mc_getstat()
1240 if (pi->link_cfg.admin_caps & FW_PORT_CAP32_ANEG) in t4_mac_flowctrl_to_link_caps()
1325 struct link_config *lc = &pi->link_cfg; in t4_mc_setprop()
1458 struct link_config *lc = &pi->link_cfg; in t4_mc_getprop()
1577 struct link_config *lc = &pi->link_cfg; in t4_mc_propinfo()
1765 pi->link_cfg.admin_caps); in t4_init_synchronized()
1814 pi->link_cfg.link_ok = 0; in t4_uninit_synchronized()
1825 struct link_config *lc = &pi->link_cfg; in propinfo()
1855 struct link_config *lc = &pi->link_cfg; in getprop()
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H A Dadapter.h130 struct link_config link_cfg; member
769 return ((pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_10G) != 0); in is_10G_port()
781 return ((pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_25G) != 0); in is_25G_port()
787 return ((pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_40G) != 0); in is_40G_port()
793 return ((pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_50G) != 0); in is_50G_port()
799 return ((pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_100G) != 0); in is_100G_port()
H A Dt4_nexus.c3008 pi->link_cfg.new_module)
3009 pi->link_cfg.redo_l1cfg = true;
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dt4_hw.c8680 rx_en && tx_en && pi->link_cfg.link_ok); in t4_enable_pi_params()
8984 struct link_config *lc = &pi->link_cfg; in t4_link_set_autoneg()
9007 struct link_config *lc = &pi->link_cfg; in t4_link_set_pause()
9115 struct link_config *lc = &pi->link_cfg; in t4_link_set_fec()
9138 struct link_config *lc = &pi->link_cfg; in t4_link_set_speed()
9341 struct link_config *lc = &pi->link_cfg; in t4_init_link_config()
9432 struct link_config *lc = &pi->link_cfg; in t4_handle_get_port_info()
/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge_hw.h1679 uint32_t link_cfg; member