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/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.S117 TRACE_PTR(%g4, %g6)
120 rdpr %tl, %g6
122 rdpr %tt, %g6
124 rdpr %tpc, %g6
126 rdpr %tstate, %g6
269 TRACE_PTR(%g4, %g6)
272 rdpr %tl, %g6
274 rdpr %tt, %g6
275 or %g6, TT_SPURIOUS_INT, %g6
277 rdpr %tpc, %g6
[all …]
H A Dmach_xc.S63 TRACE_PTR(%g4, %g6)
64 GET_TRACE_TICK(%g6, %g3)
66 rdpr %tl, %g6
67 stha %g6, [%g4 + TRAP_ENT_TL]%asi
68 rdpr %tt, %g6
69 stha %g6, [%g4 + TRAP_ENT_TT]%asi
71 rdpr %tpc, %g6
72 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
73 rdpr %tstate, %g6
80 TRACE_NEXT(%g4, %g6, %g3)
[all …]
H A Dwbuf.S156 CPU_ADDR(%g5, %g6)
160 ldn [%g5 + CPU_MPCB], %g6
161 ld [%g6 + MPCB_WBCNT], %g5
163 st %g7, [%g6 + MPCB_WBCNT]
168 add %g6, %g7, %g7
171 ldn [%g6 + MPCB_WBUF], %g5
290 CPU_ADDR(%g5, %g6)
294 ldn [%g5 + CPU_MPCB], %g6
295 ld [%g6 + MPCB_WBCNT], %g5
302 add %g6, %g7, %g7
[all …]
H A Dtrap_table.S1024 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1030 and %g6, %g4, %g6 /* &= CTXREG_CTX_MASK */ ;\
1296 or %g6, (ttextra), %g6 ;\
2113 rdpr %cwp, %g6 ! %g6 = %cwp
2114 deccc %g6 ! %g6--
2115 movneg %xcc, %g5, %g6 ! if (%g6<0) %g6 = nwin-1
2630 ldxa [%g6]ASI_DMMU, %g6
2653 sllx %g6, PN_SFSR_PARITY_SHIFT, %g6
2679 add %g6, CPU_TL1_HDLR, %g6 ! %g6 = &cpu_m.tl1_hdlr (VA)
2706 and %g6, WTRAP_TTMASK, %g6
[all …]
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.S2861 or %g6, %lo(KERNELBASE), %g6
2862 cmp %g7, %g6
3656 or %g6, CPU_DTRACE_BADADDR, %g6
3882 add %g6, %o1, %g6
3883 add %g6, MMU_PAGESHIFT, %g6
4013 or %g6, %lo(kpmtsbm_area), %g6
4014 add %g6, %g7, %g6 /* g6 = kpmtsbm ptr */
4208 or %g6, %lo(KERNELBASE), %g6
4236 or %g6, %lo(kpmtsbm_area), %g6
4237 add %g6, %g7, %g6 /* g6 = kpmtsbm ptr */
[all …]
H A Dsfmmu_kdi.S121 srlx %g1, %g5, %g6; \
123 sllx %g6, %g5, %g5; \
127 sllx %g3, HTAG_REHASH_SHIFT, %g6; \
128 or %g6, SFMMU_INVALID_SHMERID, %g6; \
129 or %g5, %g6, %g5
168 ldxa [%g4]ASI_MEM, %g6; \
170 cmp %g5, %g6; \
176 ldxa [%g4]ASI_MEM, %g6; \
178 cmp %g6, %g2; \
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_cheetahplus_asm.S206 GET_CPU_IMPL(%g6)
212 mov %g6, %g3
257 GET_CPU_IMPL(%g6)
280 sll %g6, TRAPTR_SIZE_SHIFT, %g6
282 add %g6, %g5, %g6
357 GET_CPU_IMPL(%g6)
374 GET_CPU_IMPL(%g6)
622 sllx %g6, 32, %g6 ! if our logout structure is
783 mov 1, %g6
784 sllx %g6, PN_TLO_INFO_TL1_SHIFT, %g6
[all …]
H A Dus3_jalapeno_asm.S390 set CHPR_FECCTL0_LOGOUT, %g6
391 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
407 stx %g2, [%g6 + 0]
408 stx %g3, [%g6 + 8]
427 ASM_LD(%g6, dcache_linesize)
441 ASM_LD(%g6, icache_linesize)
628 CPU_INDEX(%g6, %g5)
629 sll %g6, TRAPTR_SIZE_SHIFT, %g6
631 add %g6, %g5, %g6
632 ld [%g6 + TRAPTR_LIMIT], %g5
[all …]
H A Dus3_cheetah_asm.S141 CH_ECACHE_FLUSHALL(%g4, %g5, %g6)
162 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
200 CPU_INDEX(%g6, %g5)
201 sll %g6, TRAPTR_SIZE_SHIFT, %g6
203 add %g6, %g5, %g6
204 ld [%g6 + TRAPTR_LIMIT], %g5
208 ldx [%g6 + TRAPTR_PBASE], %g5
209 ld [%g6 + TRAPTR_OFFSET], %g4
246 ld [%g6 + TRAPTR_OFFSET], %g5
247 ld [%g6 + TRAPTR_LIMIT], %g4
[all …]
H A Dus3_common_asm.S287 or %g6, %g4, %g6 ! %g6 = pgsz | cnum
1048 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1331 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1513 clr %g6
1514 movnz %xcc, 1, %g6 ! set %g6 if T_TL1 set
1515 sllx %g6, CLO_FLAGS_TL_SHIFT, %g6
1523 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
1689 sll %g6, TRAPTR_SIZE_SHIFT, %g6
1691 add %g6, %g5, %g6
1834 sll %g6, TRAPTR_SIZE_SHIFT, %g6
[all …]
H A Dopl_olympus_asm.S178 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
182 or %g6, %g4, %g6 ! %g6 = primary pgsz | cnum
188 or %g6, %g2, %g6 ! %g6 = nucleus pgsz | primary pgsz | cnum
714 mov %g0, %g6 ;\
756 mov %g0, %g6 ;\
1139 mov %g2, %g6 ! %g6 = SFPAR or SFAR/tpc
1174 movne %icc, %g6, %g1
1473 rdpr %cwp, %g6
1476 wrpr %g6, %cwp
1491 rdpr %cwp, %g6
[all …]
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dtrap_table.S1880 rdpr %cwp, %g6 ! %g6 = %cwp
1881 deccc %g6 ! %g6--
1882 movneg %xcc, %g5, %g6 ! if (%g6<0) %g6 = nwin-1
2386 ldx [%g6 + MMFSA_D_ADDR], %g6
2394 ldx [%g6 + MMFSA_D_CTX], %g6
2396 or %g6, %g7, %g6
2439 and %g6, WTRAP_TTMASK, %g6
2460 sllx %g6, MMU_PAGESHIFT, %g6
2634 ldx [%g6 + %g4], %g6
2640 ldx [%g6 + %g4], %g6
[all …]
H A Dmach_xc.S65 TRACE_PTR(%g4, %g6)
66 GET_TRACE_TICK(%g6, %g3)
68 rdpr %tl, %g6
69 stha %g6, [%g4 + TRAP_ENT_TL]%asi
70 rdpr %tt, %g6
71 stha %g6, [%g4 + TRAP_ENT_TT]%asi
73 rdpr %tpc, %g6
74 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
75 rdpr %tstate, %g6
82 TRACE_NEXT(%g4, %g6, %g3)
[all …]
H A Dwbuf.S75 mov %g6, %g2 ! arg2 = tagaccess
158 CPU_PADDR(%g5, %g6)
163 ldxa [%g5 + CPU_MPCB_PA]%asi, %g6
164 lda [%g6 + MPCB_WBCNT]%asi, %g5
166 sta %g7, [%g6 + MPCB_WBCNT]%asi
171 add %g6, %g7, %g7
211 mov %g6, %g2 ! arg2 = tagaccess
351 CPU_PADDR(%g5, %g6)
357 lda [%g6 + MPCB_WBCNT]%asi, %g5
359 sta %g7, [%g6 + MPCB_WBCNT]%asi
[all …]
H A Dmach_interrupt.S58 ! %g6 head ptr
61 ldxa [%g3]ASI_QUEUE, %g6 ! %g6 = head ptr
64 cmp %g6, %g7
438 mov %g6, %g2
474 mov %g2, %g6 ! save head in %g2
480 add %g6, %g4, %g4 ! %g4 = PA of ER in Q
518 add %g6, Q_ENTRY_SIZE, %g6 ! increment q head to next
519 and %g6, %g5, %g6 ! size mask for warp around
520 cmp %g6, %g3 ! head == tail ??
530 stxa %g6, [%g4]ASI_QUEUE ! update head offset
H A Dmach_subr_asm.S86 mov %o5, %g6
119 mov %g6, %o5
/illumos-gate/usr/src/uts/sun4/ml/
H A Dinterrupt.S62 add %g1, INTR_HEAD, %g6 ! %g6 = &cpu->m_cpu.intr_head
63 add %g6, %g5, %g6 ! %g6 = &cpu->m_cpu.intr_head[pil]
81 add %g1, INTR_TAIL, %g6 ! %g6 = &cpu->m_cpu.intr_tail
103 ldn [%g6 + %g3], %g6 ! %g6=cpu->m_cpu.intr_head[pil]
106 ldn [%g6 + %g3], %g6 ! %g6=cpu->m_cpu.intr_tail[pil]
1653 and %g6, IV_SOFTINT_MT, %g6 ! %g6 = ct->iv_flags & IV_SOFTINT_MT
1685 ldn [%g6 + %g7], %g6 ! %g6=cpu->m_cpu.intr_head[pil]
1688 ldn [%g6 + %g7], %g6 ! %g6=cpu->m_cpu.intr_tail[pil]
1695 mov 1, %g6 ! %g6 = 1
1696 sll %g6, %g2, %g6 ! %g6 = 1 << pil
[all …]
/illumos-gate/usr/src/stand/lib/sa/sparc/
H A D_setjmp.S115 sub %g7, 2, %g6
117 deccc %g6 ! all windows done?
120 sub %g7, 2, %g6
122 deccc %g6 ! all windows done?
/illumos-gate/usr/src/test/util-tests/tests/dis/sparc/
H A Dtst.regs.s29 add %g4, %g5, %g6
30 add %g5, %g6, %g7
31 add %g6, %g7, %o0
H A Dtst.regs.out5 libdis_test+0x10: 8c 01 00 05 add %g4, %g5, %g6
6 libdis_test+0x14: 8e 01 40 06 add %g5, %g6, %g7
7 libdis_test+0x18: 90 01 80 07 add %g6, %g7, %o0
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dmachthread.h236 CPU_ADDR(%g5, %g6); \
237 ldn [%g5 + CPU_THREAD], %g6; \
238 mov %g6, THREAD_REG; \
H A Dcheetahasm.h1155 stxa %g6, [%g1 + CH_ERR_TL1_G6]%asi; \
1160 rdpr %tl, %g6; \
1161 sub %g6, 1, %g6; \
1162 wrpr %g6, %tl; \
1163 and %g5, 3, %g6; \
1165 or %g3, %g6, %g3; \
1167 srlx %g5, CH_ERR_G2_TO_TSTATE_SHFT, %g6; \
1168 and %g6, 3, %g6; \
1170 or %g6, %g4, %g4; \
1228 ldxa [%g1 + CH_ERR_TL1_G6]%asi, %g6; \
/illumos-gate/usr/src/lib/libm/common/C/
H A D__lgamma.c72 g6 = 5.424138599891070494101986e2, variable
243 p = g0+y*(g1+y*(g2+y*(g3+y*(g4+y*(g5+y*(g6+y*g7)))))); in __k_lgamma()
252 p = g0+y*(g1+y*(g2+y*(g3+y*(g4+y*(g5+y*(g6+y*g7)))))); in __k_lgamma()
/illumos-gate/usr/src/uts/sun4v/cpu/
H A Dcommon_asm.S743 rdpr %tstate, %g6
745 btst TSTATE_PRIV, %g6 ! trap from supervisor mode?
828 mov %o5, %g6
847 mov %g6, %o5
870 SFMMU_CPU_CNUM(%g2, %o1, %g6) /* %o1 = sfmmu cnum on this CPU */
912 SFMMU_CPU_CNUM(%o0, %g2, %g6) /* %g2 = sfmmu cnum on this CPU */
914 set MMU_PAGESIZE, %g6 /* g6 = pgsize */
928 add %g1, %g6, %g1 /* go to nextpage */
942 mov %o3, %g6 ! XXXQ not used?
955 mov %g6, %o3 ! XXXQ not used?
/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu.h691 or %g0, TTE4M, %g6 ;\
694 sllx %g6, TTE_SZ_SHFT, %g6 ;\
703 or %g5, %g6, %g5 ;\

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