Searched refs:cpu (Results 1 - 25 of 536) sorted by relevance

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/illumos-gate/usr/src/cmd/dtrace/demo/sched/
H A Dticktime.d30 /last[cpu]/
32 @[cpu] = min(timestamp - last[cpu]);
37 last[cpu] = timestamp;
H A Dhowlong.d27 sched:::off-cpu
30 self->cpu = cpu;
34 sched:::on-cpu
37 @[self->cpu == cpu ?
41 self->cpu = 0;
H A Dwhere.d27 sched:::on-cpu
32 sched:::off-cpu
35 @[cpu] = quantize(timestamp - self->ts);
H A Dwhererun.d34 sched:::on-cpu
40 sched:::off-cpu
43 @[cpu] = sum(timestamp - self->ts);
H A Dwhosteal.d30 /args[2]->cpu_id != -1 && cpu != args[2]->cpu_id &&
34 lquantize(cpu, 0, 100);
/illumos-gate/usr/src/cmd/dtrace/test/tst/common/cpc/
H A Dtst.allcpus.ksh43 cpu=0
61 /cpus[cpu] != 1/
63 cpus[cpu] = 1;
64 @a[cpu] = count();
77 while [ $cpu -le $numproc ]
79 if [ "`psrinfo -s $cpu 2> /dev/null`" -eq 1 ]; then
80 printf "%9d %16d\n" $cpu 1 >> $scriptout
82 allpids[$cpu]=$!
83 pbind -b $cpu $!
85 cpu
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/illumos-gate/usr/src/compat/bhyve/amd64/machine/
H A Dcpu.h19 #include <sys/cpu.h>
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dintel_nhm.h50 #define SOCKET_BUS(cpu) (MAX_BUS_NUMBER - (cpu))
51 #define CPU_ID_RD(cpu) nhm_pci_getl(SOCKET_BUS(cpu), 0, 0, 0, 0)
52 #define MC_CONTROL_RD(cpu) \
53 nhm_pci_getl(SOCKET_BUS(cpu), 3, 0, 0x48, 0)
54 #define MC_STATUS_RD(cpu) \
55 nhm_pci_getl(SOCKET_BUS(cpu), 3, 0, 0x4c, 0)
56 #define MC_SMI_SPARE_DIMM_ERROR_STATUS_RD(cpu) \
57 nhm_pci_getl(SOCKET_BUS(cpu),
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/illumos-gate/usr/src/uts/i86pc/sys/
H A Dsmt.h26 struct cpu;
33 extern boolean_t smt_can_enable(struct cpu *, int);
47 extern boolean_t smt_should_run(kthread_t *, struct cpu *);
48 extern pri_t smt_adjust_cpu_score(kthread_t *, struct cpu *, pri_t);
/illumos-gate/usr/src/compat/bhyve/sys/
H A Dsmp.h24 void ipi_cpu(int cpu, u_int ipi);
H A Dcpuset.h26 #define CPU_SET(cpu, set) cpuset_add((set), (cpu))
27 #define CPU_SETOF(cpu, set) cpuset_only((set), (cpu))
29 #define CPU_CLR(cpu, set) cpuset_del((set), (cpu))
32 #define CPU_ISSET(cpu, set) cpu_in_set((cpuset_t *)(set), (cpu))
42 #define CPU_SET_ATOMIC(cpu, set) cpuset_atomic_add( \
44 (cpu))
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/illumos-gate/usr/src/uts/intel/asm/
H A Dcpuvar.h39 struct cpu;
41 extern __GNU_INLINE struct cpu *
44 struct cpu *__value;
/illumos-gate/usr/src/uts/sun4/os/
H A Dcpupm_mach.c33 cpupm_plat_domain_id(struct cpu *cp, cpupm_dtype_t type)
40 cpupm_plat_state_enumerate(struct cpu *cp, cpupm_dtype_t type,
48 cpupm_plat_change_state(struct cpu *cp, cpupm_state_t *state)
/illumos-gate/usr/src/cmd/powertop/common/
H A Dturbo.c117 int cpu; local
123 for (cpu = 0; cpu < g_ncpus; cpu++) {
124 turbo_info = &turbo_snapshot[cpu];
125 ksp = kstat_lookup(kc, "turbo", g_cpu_table[cpu], NULL);
128 cpu);
135 cpu);
143 "%d\n", cpu);
156 "%d\n", cpu);
198 int cpu; local
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/illumos-gate/usr/src/uts/i86pc/io/vmm/
H A Dvmm_lapic.h49 int lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval,
51 int lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t wval,
54 int lapic_mmio_read(void *vm, int cpu, uint64_t gpa,
56 int lapic_mmio_write(void *vm, int cpu, uint64_t gpa,
61 * to the 'cpu', the state is recorded in IRR.
63 int lapic_set_intr(struct vm *vm, int cpu, int vector, bool trig);
68 lapic_intr_level(struct vm *vm, int cpu, int vector) argument
71 return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_LEVEL));
75 lapic_intr_edge(struct vm *vm, int cpu, int vector) argument
78 return (lapic_set_intr(vm, cpu, vecto
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H A Dvmm_lapic.c67 lapic_set_intr(struct vm *vm, int cpu, int vector, bool level) argument
71 if (cpu < 0 || cpu >= vm_get_maxcpus(vm))
81 vlapic = vm_lapic(vm, cpu);
83 vcpu_notify_event(vm, cpu, true);
88 lapic_set_local_intr(struct vm *vm, int cpu, int vector) argument
94 if (cpu < -1 || cpu >= vm_get_maxcpus(vm))
97 if (cpu == -1)
100 CPU_SETOF(cpu,
173 lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval, bool *retu) argument
193 lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t val, bool *retu) argument
212 lapic_mmio_write(void *vm, int cpu, uint64_t gpa, uint64_t wval, int size, void *arg) argument
234 lapic_mmio_read(void *vm, int cpu, uint64_t gpa, uint64_t *rval, int size, void *arg) argument
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/illumos-gate/usr/src/uts/i86pc/io/apix/
H A Dapix_intr.c102 struct cpu *cpu = CPU; local
110 if (avp->av_vector != NULL && avp->av_prilevel < cpu->cpu_base_spl) {
230 apix_do_softint_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil, argument
234 struct machcpu *mcpu = &cpu->cpu_m;
238 ASSERT(pil > mcpu->mcpu_pri && pil > cpu->cpu_base_spl);
251 it = cpu->cpu_intr_thread;
253 cpu->cpu_intr_thread = it->t_link;
256 t = cpu
304 apix_do_softint_epilog(struct cpu *cpu, uint_t oldpil) argument
372 struct cpu *cpu = CPU; local
394 struct cpu *cpu = CPU; local
416 apix_hilevel_intr_prolog(struct cpu *cpu, uint_t pil, uint_t oldpil, struct regs *rp) argument
498 apix_hilevel_intr_epilog(struct cpu *cpu, uint_t oldpil) argument
587 apix_do_pending_hilevel(struct cpu *cpu, struct regs *rp) argument
622 apix_intr_thread_prolog(struct cpu *cpu, uint_t pil, caddr_t stackptr) argument
693 apix_intr_thread_epilog(struct cpu *cpu, uint_t oldpil) argument
783 struct cpu *cpu = CPU; local
797 apix_do_pending_hardint(struct cpu *cpu, struct regs *rp) argument
839 struct cpu *cpu = CPU; local
881 struct cpu *cpu = CPU; local
898 struct cpu *cpu = CPU; local
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/illumos-gate/usr/src/cmd/dtrace/test/tst/common/sched/
H A Dtst.oncpu.d32 sched:::on-cpu
38 sched:::off-cpu
44 sched:::off-cpu
/illumos-gate/usr/src/uts/common/sys/
H A Ddisp.h78 volatile int disp_nrunnable; /* runnable threads in cpu dispq */
80 struct cpu *disp_cpu; /* cpu owning this queue or NULL */
132 * idle_cpu() is invoked when a cpu goes idle, and has nothing to do.
136 extern void (*disp_enq_thread)(struct cpu *, int);
142 extern int intr_active(struct cpu *, int);
156 extern struct cpu *disp_lowpri_cpu(struct cpu *, kthread_t *, pri_t);
157 extern int disp_bound_threads(struct cpu *, int);
158 extern int disp_bound_anythreads(struct cpu *, in
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/illumos-gate/usr/src/uts/i86pc/generic_cpu/
H A DMakefile34 MODULE = cpu.generic
43 include ../cpu/Makefile.cpu
/illumos-gate/usr/src/cmd/fm/eversholt/files/i386/i86pc/
H A Dintel.esc37 event ereport.cpu.intel.leafclass@chip/core/strand { within(t) }
52 * trips. prop statement for ereport.cpu.intel.internal_unclassified is
56 engine serd.cpu.intel.simple@chip/core/strand, N=3, T=72h;
57 event fault.cpu.intel.internal@chip/core/strand,
58 engine=serd.cpu.intel.simple@chip/core/strand;
60 prop fault.cpu.intel.internal@chip/core/strand
62 ereport.cpu.intel.microcode_rom_parity@chip/core/strand,
63 ereport.cpu.intel.internal_timer@chip/core/strand,
64 ereport.cpu.intel.internal_parity@chip/core/strand,
65 ereport.cpu
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/illumos-gate/usr/src/uts/i86pc/os/
H A Dintr.c326 * now have per-cpu vectors.
504 * This variable tracks the last place events were disabled on each cpu
517 * Set cpu's base SPL level to the highest active interrupt level
522 struct cpu *cpu = CPU; local
523 uint16_t active = (uint16_t)cpu->cpu_intr_actv;
525 cpu->cpu_base_spl = active == 0 ? 0 : bsrw_insn(active);
529 * Do all the work necessary to set up the cpu and thread structures
539 hilevel_intr_prolog(struct cpu *cpu, uint_ argument
637 hilevel_intr_epilog(struct cpu *cpu, uint_t pil, uint_t oldpil, uint_t vecnum) argument
720 intr_thread_prolog(struct cpu *cpu, caddr_t stackptr, uint_t pil) argument
788 intr_thread_epilog(struct cpu *cpu, uint_t vec, uint_t oldpil) argument
926 struct cpu *cpu; local
957 dosoftint_prolog( struct cpu *cpu, caddr_t stackptr, uint32_t st_pending, uint_t oldpil) argument
1069 dosoftint_epilog(struct cpu *cpu, uint_t oldpil) argument
1230 cpu_t *cpu; local
1298 struct cpu *cpu = CPU; local
1317 struct cpu *cpu = CPU; local
1337 struct cpu *cpu = CPU; local
1363 struct cpu *cpu = CPU; local
1602 cpu_t *cpu; local
1632 cpu_t *cpu; local
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/illumos-gate/usr/src/cmd/fm/modules/sun4/cpumem-diagnosis/
H A Dcmd_cpu.c51 #include <sys/fm/cpu/UltraSPARC-III.h>
56 #include <sys/fm/cpu/UltraSPARC-T1.h>
249 cpu_uec_write(fmd_hdl_t *hdl, cmd_cpu_t *cpu, cmd_cpu_uec_t *uec) argument
265 cpu_buf_write(hdl, cpu);
269 cpu_uec_create(fmd_hdl_t *hdl, cmd_cpu_t *cpu, cmd_cpu_uec_t *uec, argument
278 cpu_uec_write(hdl, cpu, uec);
303 cpu_uec_flush_finish(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
306 if (cpu->cpu_olduec.uec_cache != NULL) {
307 fmd_hdl_free(hdl, cpu->cpu_olduec.uec_cache, sizeof (uint64_t) *
308 cpu
321 cpu_uec_flush(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
378 cmd_cpu_uec_add(fmd_hdl_t *hdl, cmd_cpu_t *cpu, uint64_t pa) argument
421 cmd_cpu_uec_set_allmatch(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
434 cmd_cpu_uec_match(cmd_cpu_t *cpu, uint64_t pa) argument
494 cmd_xr_create(fmd_hdl_t *hdl, fmd_event_t *ep, nvlist_t *nvl, cmd_cpu_t *cpu, cmd_errcl_t clcode) argument
584 cmd_xr_restore(fmd_hdl_t *hdl, cmd_cpu_t *cpu, fmd_case_t *cp) argument
1379 cmd_cpu_serdnm_create(fmd_hdl_t *hdl, cmd_cpu_t *cpu, const char *serdbase) argument
1413 cmd_cpu_create_faultlist(fmd_hdl_t *hdl, fmd_case_t *casep, cmd_cpu_t *cpu, const char *type, nvlist_t *rsrc, uint_t cert) argument
1501 cmd_cpu_free(fmd_hdl_t *hdl, cmd_cpu_t *cpu, int destroy) argument
1546 cmd_cpu_destroy(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
1554 cmd_cpu_t *cpu; local
1586 cpu_buf_write(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
1597 cpu_buf_create(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
1635 cmd_cpu_t *cpu; local
1709 cpu_all_threads_invalid(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
1755 cmd_cpu_t *cpu; local
1905 cmd_cpu_t *cpu; local
1919 cpu_case_restore(fmd_hdl_t *hdl, cmd_cpu_t *cpu, cmd_case_t *cc, fmd_case_t *cp, const char *serdbase) argument
1929 cmd_cpu_t *cpu; local
2022 cmd_cpu_t *cpu; local
2187 cmd_cpu_t *cpu, *cpun; local
2232 cmd_cpu_t *cpu; local
2260 cpu_gc_keep_one(fmd_hdl_t *hdl, cmd_cpu_t *cpu) argument
2295 cmd_cpu_t *cpu, *next; local
2318 cmd_cpu_t *cpu; local
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/illumos-gate/usr/src/cmd/picl/plugins/sun4u/boston/frutree/
H A Dsystem-board.info110 REFNODE cpu-module fru WITH name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
111 name:/frutree/chassis/MB/system-board/C0/cpu-module
113 REFPROP _seeprom_source name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
115 name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,b8
116 REFPROP _fru_parent name:/frutree/chassis/MB/system-board/C0/cpu-module
122 REFNODE cpu-module fru WITH name:/platform/i2c@1f,520000/cpu-fru-prom?UnitAddress=0,c8
123 name:/frutree/chassis/MB/system-board/C1/cpu-module
125 REFPROP _seeprom_source name:/platform/i2c@1f,520000/cpu
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/illumos-gate/usr/src/lib/fm/topo/modules/sun4v/platform-cpu/
H A DMakefile27 MODULE = platform-cpu
31 MODULESRCS = cpu.c cpu_mdesc.c

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