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Searched refs:__xge_os_attr_cacheline_aligned (Results 1 – 4 of 4) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-channel.h362 int __xge_os_attr_cacheline_aligned
366 __xge_os_attr_cacheline_aligned; member
411 } __xge_os_attr_cacheline_aligned xge_hal_channel_t ;
413 } xge_hal_channel_t __xge_os_attr_cacheline_aligned;
H A Dxgehal-fifo.h166 } __xge_os_attr_cacheline_aligned xge_hal_fifo_t;
H A Dxgehal-ring.h318 } __xge_os_attr_cacheline_aligned xge_hal_ring_t;
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxge_osdep.h220 #define __xge_os_attr_cacheline_aligned \ macro
223 #define __xge_os_attr_cacheline_aligned macro