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Searched refs:_PIPEA_LINK_M1 (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_ums.c141 dev_priv->regfile.savePIPEA_LINK_M1 = I915_READ(_PIPEA_LINK_M1); in i915_save_display_reg()
373 I915_WRITE(_PIPEA_LINK_M1, dev_priv->regfile.savePIPEA_LINK_M1); in i915_restore_display_reg()
H A Di915_reg.h3697 #define _PIPEA_LINK_M1 (dev_priv->info->display_mmio_offset + 0x60040) macro
3725 #define PIPE_LINK_M1(tran) _TRANSCODER(tran, _PIPEA_LINK_M1, _PIPEB_LINK_M1)