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Searched refs:_PCH_TRANS_HSYNC_A (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_ums.c154 dev_priv->regfile.saveTRANS_HSYNC_A = I915_READ(_PCH_TRANS_HSYNC_A); in i915_save_display_reg()
386 I915_WRITE(_PCH_TRANS_HSYNC_A, dev_priv->regfile.saveTRANS_HSYNC_A); in i915_restore_display_reg()
H A Di915_reg.h4086 #define _PCH_TRANS_HSYNC_A 0xe0008 macro
4186 #define PCH_TRANS_HSYNC(pipe) _PIPE(pipe, _PCH_TRANS_HSYNC_A, _PCH_TRANS_HSYNC_B)