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Searched refs:_MASKED_BIT_DISABLE (Results 1 – 4 of 4) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c4077 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in gen6_init_clock_gating()
4134 I915_WRITE(GEN6_GT_MODE, _MASKED_BIT_DISABLE(0xffffUL)); in gen6_init_clock_gating()
4490 I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); in gen3_init_clock_gating()
4861 I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffffUL)); in __gen6_gt_force_wake_mt_reset()
4925 I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in __gen6_gt_force_wake_mt_put()
4968 I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffffUL)); in vlv_force_wake_reset()
4997 I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in vlv_force_wake_put()
4999 _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in vlv_force_wake_put()
H A Dintel_ringbuffer.c572 _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | in init_render_ring()
588 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in init_render_ring()
1663 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE)); in gen6_bsd_ring_write_tail()
H A Di915_reg.h44 #define _MASKED_BIT_DISABLE(a) ((a) << 16) macro
H A Di915_irq.c2170 I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_DIS)); in i915_enable_vblank()