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Searched refs:_FDI_RXA_CTL (Results 1 – 4 of 4) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_ddi.c191 I915_WRITE(_FDI_RXA_CTL, rx_ctl_val); in hsw_fdi_link_train()
192 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()
197 I915_WRITE(_FDI_RXA_CTL, rx_ctl_val); in hsw_fdi_link_train()
230 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()
274 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()
1246 val = I915_READ(_FDI_RXA_CTL); in intel_ddi_fdi_disable()
1248 I915_WRITE(_FDI_RXA_CTL, val); in intel_ddi_fdi_disable()
1255 val = I915_READ(_FDI_RXA_CTL); in intel_ddi_fdi_disable()
1257 I915_WRITE(_FDI_RXA_CTL, val); in intel_ddi_fdi_disable()
1259 val = I915_READ(_FDI_RXA_CTL); in intel_ddi_fdi_disable()
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H A Di915_ums.c145 dev_priv->regfile.saveFDI_RXA_CTL = I915_READ(_FDI_RXA_CTL); in i915_save_display_reg()
376 I915_WRITE(_FDI_RXA_CTL, dev_priv->regfile.saveFDI_RXA_CTL); in i915_restore_display_reg()
H A Dintel_crt.c823 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config; in intel_crt_init()
H A Di915_reg.h4318 #define _FDI_RXA_CTL 0xf000c macro
4320 #define FDI_RX_CTL(pipe) _PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL)