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Searched refs:VIDEO_DIP_CTL (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_hdmi.c147 u32 val = I915_READ(VIDEO_DIP_CTL); in g4x_write_infoframe()
158 I915_WRITE(VIDEO_DIP_CTL, val); in g4x_write_infoframe()
174 I915_WRITE(VIDEO_DIP_CTL, val); in g4x_write_infoframe()
175 POSTING_READ(VIDEO_DIP_CTL); in g4x_write_infoframe()
391 u32 reg = VIDEO_DIP_CTL; in g4x_set_infoframes()
H A Di915_reg.h2141 #define VIDEO_DIP_CTL 0x61170 macro