1 /* 2 * Copyright 2014-2017 Cavium, Inc. 3 * The contents of this file are subject to the terms of the Common Development 4 * and Distribution License, v.1, (the "License"). 5 * 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the License at available 9 * at http://opensource.org/licenses/CDDL-1.0 10 * 11 * See the License for the specific language governing permissions and 12 * limitations under the License. 13 */ 14 15 #ifndef _TPAT_HSI_H 16 #define _TPAT_HSI_H 17 18 // Offset of xxx_hsi in 32 bit words from beginning of scratchpad 19 #define TPAT_HSI_OFFSET 0x104 20 21 typedef struct _tpat_hsi_t { 22 fw_version_t version; 23 u32_t l2_pseudo_checksum; 24 u32_t num_catchup_processed; 25 u32_t num_catchup_pause ; 26 // Debug 27 u32_t tpat_num_complete; 28 u32_t tpat_udp_patchup; 29 u32_t fault_insertion; 30 u32_t l4_segment_count; 31 // Catchup overide for RSS 32 u32_t catchup_overide; 33 u64_t unicast_bytes_xmit; 34 u64_t multicast_bytes_xmit; 35 u64_t broadcast_bytes_xmit; 36 u64_t volatile idle_count; 37 u32_t iscsi_ctx_num_tasks; // size of task array in iSCSI context 38 u32_t iscsi_ctx_num_ccells; // size of command queue in iSCSI context 39 u64_t iscsi_unicast_bytes_xmit; 40 u64_t iscsi_multicast_bytes_xmit; 41 u64_t iscsi_broadcast_bytes_xmit; 42 u32_t iscsi_teton_task_offset; // Teton only: offset of the task array 43 u32_t iscsi_teton_l5_offset; // Teton only: offset of L5 section 44 u64_t total_bytes_xmit; 45 }tpat_hsi_t; 46 47 // This macro can be used for little or big endian 32-bit system 48 #define TPAT_HSI_OFFSETOFF(m) (OFFSETOF(tpat_hsi_t,m) + 0x410) 49 #define TPAT_HSI_SIZEOF(m) (sizeof (((tpat_hsi_t *)0)->m)) 50 51 // Calling the following macro will actually get optimized during compile 52 // time. Its sole purpose is to ensure HSI variables cannot be modified/moved 53 // unnoticed scratch[3072] 0xa0000 (RW/Reset: undefined) 54 #define TEST_TPAT_HSI(){ \ 55 if (0){ \ 56 1/(TPAT_HSI_OFFSETOFF(version) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x000) && \ 57 TPAT_HSI_OFFSETOFF(l2_pseudo_checksum) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x010) && \ 58 TPAT_HSI_OFFSETOFF(num_catchup_processed) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x014) && \ 59 TPAT_HSI_OFFSETOFF(num_catchup_pause) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x018) && \ 60 TPAT_HSI_OFFSETOFF(tpat_num_complete) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x01c) && \ 61 TPAT_HSI_OFFSETOFF(tpat_udp_patchup) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x020) && \ 62 TPAT_HSI_OFFSETOFF(fault_insertion) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x024) && \ 63 TPAT_HSI_OFFSETOFF(l4_segment_count) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x028) && \ 64 TPAT_HSI_OFFSETOFF(catchup_overide) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x02c) && \ 65 TPAT_HSI_OFFSETOFF(unicast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x030) && \ 66 TPAT_HSI_OFFSETOFF(multicast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x038) && \ 67 TPAT_HSI_OFFSETOFF(broadcast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x040) && \ 68 TPAT_HSI_OFFSETOFF(idle_count) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x048) && \ 69 TPAT_HSI_OFFSETOFF(iscsi_ctx_num_tasks) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x050) && \ 70 TPAT_HSI_OFFSETOFF(iscsi_ctx_num_ccells) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x054) && \ 71 TPAT_HSI_OFFSETOFF(iscsi_unicast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x058) && \ 72 TPAT_HSI_OFFSETOFF(iscsi_multicast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x060) && \ 73 TPAT_HSI_OFFSETOFF(iscsi_broadcast_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x068) && \ 74 TPAT_HSI_OFFSETOFF(iscsi_teton_task_offset) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x070) && \ 75 TPAT_HSI_OFFSETOFF(iscsi_teton_l5_offset) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x074) && \ 76 TPAT_HSI_OFFSETOFF(total_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + 0x078) && \ 77 TPAT_HSI_OFFSETOFF(total_bytes_xmit)+TPAT_HSI_SIZEOF(total_bytes_xmit) == (TPAT_HSI_OFFSET * sizeof(u32_t) + sizeof(tpat_hsi_t)));}} 78 #endif 79 80