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Searched refs:SOUTH_DSPCLK_GATE_D (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c3920 I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); in ibx_init_clock_gating()
4015 I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); in cpt_init_clock_gating()
4166 I915_WRITE(SOUTH_DSPCLK_GATE_D, in lpt_init_clock_gating()
4167 I915_READ(SOUTH_DSPCLK_GATE_D) | in lpt_init_clock_gating()
4181 uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D); in lpt_suspend_hw()
4184 I915_WRITE(SOUTH_DSPCLK_GATE_D, val); in lpt_suspend_hw()
H A Di915_reg.h4263 #define SOUTH_DSPCLK_GATE_D 0xc2020 macro