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Searched refs:PIPE_START_VBLANK_INTERRUPT_STATUS (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h3046 #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ macro
H A Di915_irq.c3464 if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && in i965_irq_handler()