| /illumos-gate/usr/src/uts/sun4v/io/px/ |
| H A D | px_libhv.c | 116 (void) hvio_config_get(dev_hdl, bdf, offset + PCIE_DEVCTL, in hvio_rp_mps()
123 (void) hvio_config_put(dev_hdl, bdf, offset + PCIE_DEVCTL, in hvio_rp_mps()
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| /illumos-gate/usr/src/uts/common/io/pciex/ |
| H A D | pcie.c | 1168 reg16 = PCIE_CAP_GET(16, bus_p, PCIE_DEVCTL); in pcie_initchild()
1174 PCIE_CAP_PUT(16, bus_p, PCIE_DEVCTL, tmp16); in pcie_initchild()
2341 if ((reg16 = PCIE_CAP_GET(16, bus_p, PCIE_DEVCTL)) != in pcie_enable_errors()
2349 PCIE_CAP_PUT(16, bus_p, PCIE_DEVCTL, tmp16); in pcie_enable_errors()
2350 PCIE_DBG_CAP(dip, bus_p, "DEVCTL", 16, PCIE_DEVCTL, reg16); in pcie_enable_errors()
2485 device_ctl = PCIE_CAP_GET(16, bus_p, PCIE_DEVCTL); in pcie_enable_ce()
2486 PCIE_CAP_PUT(16, bus_p, PCIE_DEVCTL, in pcie_enable_ce()
2507 device_ctl = PCIE_CAP_GET(16, bus_p, PCIE_DEVCTL); in pcie_disable_errors()
2509 PCIE_CAP_PUT(16, bus_p, PCIE_DEVCTL, device_ctl); in pcie_disable_errors()
3582 PCIE_DEVCTL); in pcie_fabric_feature_set()
[all …]
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| H A D | pcieb.c | 417 cdip_dev_ctrl = PCIE_CAP_GET(16, cdip_bus_p, PCIE_DEVCTL); in pcieb_41210_mps_wkrnd()
446 PCIE_DEVCTL); in pcieb_41210_mps_wkrnd()
464 (void) PCI_CAP_PUT16(cfg_hdl, 0, cap_ptr, PCIE_DEVCTL, in pcieb_41210_mps_wkrnd()
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| H A D | pcie_fault.c | 607 pcie_regs->pcie_err_ctl = PCIE_CAP_GET(16, bus_p, PCIE_DEVCTL); in pf_pcie_regs_gather()
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| /illumos-gate/usr/src/uts/common/io/sfxge/ |
| H A D | sfxge_pci.c | 184 devctl = pci_config_get16(sp->s_pci_handle, off + PCIE_DEVCTL); in sfxge_pci_init()
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| /illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/ |
| H A D | osdep.h | 131 #define PCI_EXP_DEVCTL PCIE_DEVCTL
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| /illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/emlxs/ |
| H A D | emlxs_os.h | 204 #define PCIE_DEVCTL 0x08 /* Device Control */
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| /illumos-gate/usr/src/uts/common/io/igb/ |
| H A D | igb_debug.c | 247 pci_config_get16(handle, offset + PCIE_DEVCTL)); in pci_dump()
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| /illumos-gate/usr/src/uts/common/io/ixgbe/ |
| H A D | ixgbe_debug.c | 372 pci_config_get16(handle, offset + PCIE_DEVCTL)); in ixgbe_pci_dump()
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| /illumos-gate/usr/src/uts/common/io/e1000g/ |
| H A D | e1000g_debug.c | 522 pci_config_get16(handle, offset + PCIE_DEVCTL)); in pciconfig_dump()
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| /illumos-gate/usr/src/uts/common/sys/ |
| H A D | pcie.h | 47 #define PCIE_DEVCTL 0x08 /* Device Control */ macro
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| /illumos-gate/usr/src/uts/intel/io/vmm/io/ |
| H A D | ppt.c | 811 ctl = PCI_CAP_GET16(hdl, 0, cap_ptr, PCIE_DEVCTL); in ppt_flr()
812 (void) PCI_CAP_PUT16(hdl, 0, cap_ptr, PCIE_DEVCTL, in ppt_flr()
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| /illumos-gate/usr/src/uts/sun4/io/ |
| H A D | pcicfg.c | 3977 PCIE_DEVCTL); in pcicfg_disable_bridge_probe_err()
3982 PCI_CAP_PUT16(h, 0, cap_ptr, PCIE_DEVCTL, devctl); in pcicfg_disable_bridge_probe_err()
4000 pci_config_put16(h, regs->pcie_cap_off + PCIE_DEVCTL, in pcicfg_enable_bridge_probe_err()
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| /illumos-gate/usr/src/uts/common/io/myri10ge/drv/ |
| H A D | myri10ge.c | 4811 val = pci_config_get16(handle, ptr + PCIE_DEVCTL); in myri10ge_set_max_readreq()
4814 pci_config_put16(handle, ptr + PCIE_DEVCTL, val); in myri10ge_set_max_readreq()
4815 val = pci_config_get16(handle, ptr + PCIE_DEVCTL); in myri10ge_set_max_readreq()
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| /illumos-gate/usr/src/cmd/pcieadm/ |
| H A D | pcieadm_cfgspace.c | 1859 { PCIE_DEVCTL, 2, "devctl", "Device Control",
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| /illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/ |
| H A D | emlxs_solaris.c | 1418 PCIE_DEVCTL)); in emlxs_disable_pcie_ce_err()
1425 PCIE_DEVCTL), in emlxs_disable_pcie_ce_err()
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| /illumos-gate/usr/src/uts/common/io/nxge/ |
| H A D | nxge_main.c | 1284 pci_offset = 0x80 + PCIE_DEVCTL; in nxge_map_regs()
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