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Searched refs:PCIEX_ROOT (Results 1 – 9 of 9) sorted by relevance

/illumos-gate/usr/src/lib/fm/topo/modules/i86pc/x86pi/
H A Dx86pi_hostbridge.c118 if (topo_node_range_create(mod, tn_hbr, PCIEX_ROOT, 0, in pciex_process()
122 f, PCIEX_ROOT, topo_mod_errmsg(mod)); in pciex_process()
126 hcfmri.hc_name = PCIEX_ROOT; in pciex_process()
131 f, PCIEX_ROOT, rci); in pciex_process()
145 PRIu64 "\n", f, PCIEX_ROOT, rci); in pciex_process()
/illumos-gate/usr/src/cmd/fm/modules/common/fabric-xlate/
H A Dfx_subr.c388 "/propval[@name='dev']/@value", str, PCIEX_ROOT, hcpath); in fab_find_rppath_by_df()
461 if (STRCMP(tprop, PCIEX_ROOT)) { in fab_find_rppath_by_devbdf()
528 "/@value", PCIEX_ROOT, devpath); in fab_find_rppath_by_devpath()
879 "/propval[@name='dev']/@value", PCIEX_ROOT); in fab_get_rpdev()
913 "/propval[@name='dev']/@value", PCIEX_ROOT, hbpath); in fab_send_erpt_all_rps()
/illumos-gate/usr/src/lib/fm/topo/modules/common/pcibus/
H A Dpcibus.h45 #define PCIEX_ROOT "pciexrc" macro
H A Ddid_props.c475 strcmp(nm, PCIEX_ROOT) == 0) { in ASRU_set()
611 (strcmp(topo_node_name(topo_node_parent(tn)), PCIEX_ROOT) == 0)) { in FRU_set()
678 (strcmp(topo_node_name(topo_node_parent(tn)), PCIEX_ROOT) == 0)) { in label_set()
720 TOPO_PCI_EXCAP, TOPO_PROP_IMMUTABLE, PCIEX_ROOT, &err); in EXCAP_set()
H A Dpcibus.c226 ptn = find_predecessor(parent, PCIEX_ROOT); in pciexfn_declare()
895 if (strcmp(pname, HOSTBRIDGE) != 0 && strcmp(pname, PCIEX_ROOT) != 0) { in pci_enum()
901 HOSTBRIDGE, PCIEX_ROOT); in pci_enum()
/illumos-gate/usr/src/lib/fm/topo/modules/i86pc/pcibus/
H A Dpci_i86pc.c62 return (strcmp(topo_node_name(did_gettnode(dp)), PCIEX_ROOT) == 0); in parent_is_rc()
/illumos-gate/usr/src/lib/fm/topo/modules/common/hostbridge/
H A Dhostbridge.c282 if (child_range_add(mod, ntn, PCIEX_ROOT, 0, MAX_HB_BUSES) < 0) { in pciexhostbridge_declare()
299 if ((ntn = hb_tnode_create(mod, parent, PCIEX_ROOT, ri, din)) == NULL) in pciexrc_declare()
/illumos-gate/usr/src/lib/fm/topo/libtopo/common/
H A Dtopo_hc.h82 #define PCIEX_ROOT "pciexrc" macro
H A Dhc.c192 { PCIEX_ROOT, TOPO_STABILITY_PRIVATE },