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Searched refs:PCICFG_CACHE_LINE_SIZE (Results 1 – 3 of 3) sorted by relevance

/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dpcics_reg_driver.h62 #define PCICFG_CACHE_LINE_SIZE 0x0c macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dpcics_reg_driver.h23 #define PCICFG_CACHE_LINE_SIZE 0x0c macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_devinfo.c316 lm_status = mm_read_pci(pdev, PCICFG_CACHE_LINE_SIZE, &val); in lm_get_pcicfg_info()