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Searched refs:NXGE_MAX_RDCS (Results 1 – 14 of 14) sorted by relevance

/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_defs.h248 #define NXGE_MAX_DMCS (NXGE_MAX_RDCS + NXGE_MAX_TDCS)
249 #define NXGE_MAX_RDCS 16 macro
294 #define NXGE_MAX_RDCS 16 macro
456 #define VRXDMA_CHANNEL_VALID(n) (n < NXGE_MAX_RDCS)
475 #define LD_RXDMA_LD_VALID(n) (n < NXGE_MAX_RDCS)
476 #define LD_TXDMA_LD_VALID(n) (n >= NXGE_MAX_RDCS && \
477 ((n - NXGE_MAX_RDCS) < NXGE_MAX_TDCS)))
H A Dnxge_common.h39 #define NXGE_RDMA_PER_NIU_PORT (NXGE_MAX_RDCS/NXGE_PORTS_NIU)
41 #define NXGE_RDMA_PER_NEP_PORT (NXGE_MAX_RDCS/NXGE_PORTS_NEPTUNE)
396 uint32_t grpids[NXGE_MAX_RDCS]; /* RDC group IDs */
435 uint16_t rcr_timeout[NXGE_MAX_RDCS];
436 uint16_t rcr_threshold[NXGE_MAX_RDCS];
464 nxge_rdc_cfg_t rdc_config[NXGE_MAX_RDCS];
H A Dnxge.h448 kstat_t *rdc_ksp[NXGE_MAX_RDCS];
466 nxge_rx_ring_stats_t rdc_stats[NXGE_MAX_RDCS]; /* per rdc stats */
801 nxge_ring_handle_t rx_ring_handles[NXGE_MAX_RDCS];
H A Dnxge_hio.h311 nxge_hio_dc_t rdc[NXGE_MAX_RDCS];
/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_rxdma.h50 (RDC_TBL_REG + table * (NXGE_MAX_RDCS * 8))
87 ((rdc < NXGE_MAX_RDCS))
H A Dnpi_rxdma.c1474 int8_t set[NXGE_MAX_RDCS]; in npi_rxdma_rdc_table_config()
1492 for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) { in npi_rxdma_rdc_table_config()
1504 for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) { in npi_rxdma_rdc_table_config()
1576 for (tbl_offset = 0; tbl_offset < NXGE_MAX_RDCS; tbl_offset++) { in npi_rxdma_dump_rdc_table()
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_hio_guest.c396 limit = NXGE_MAX_RDCS; in nxge_guest_dc_alloc()
947 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_hio_rdc_intr_arm()
1003 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_hio_rdc_enable()
H A Dnxge_hio.c449 if (channel > NXGE_MAX_RDCS) { in nxge_grp_dc_add()
617 NXGE_MAX_TDCS : NXGE_MAX_RDCS; in nxge_grp_dc_find()
1474 for (i = 0; i < NXGE_MAX_RDCS; i++) { in nxge_hio_share_assign()
1692 for (i = 0; i < NXGE_MAX_RDCS; i++) { in nxge_hio_share_add_group()
1982 max_dcs = (type == MAC_RING_TYPE_TX) ? NXGE_MAX_TDCS : NXGE_MAX_RDCS; in nxge_hio_addres()
2499 for (i = 0; i < NXGE_MAX_RDCS; i++) { in nxge_hio_rdc_unshare()
H A Dnxge_virtual.c638 NXGE_MAX_RDCS)) { in nxge_update_rxdma_properties()
669 NXGE_MAX_RDCS) || in nxge_update_rxdma_properties()
672 NXGE_MAX_RDCS)) { in nxge_update_rxdma_properties()
682 if (num_rdc > NXGE_MAX_RDCS) { in nxge_update_rxdma_properties()
849 NXGE_MAX_RDCS)) { in nxge_update_txdma_properties()
2567 for (i = 0; i < NXGE_MAX_RDCS; i++) { in nxge_set_rdc_intr_property()
3196 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_ldgv_init_n2()
3381 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_ldgv_init()
H A Dnxge_rxdma.c166 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_init_rxdma_channels()
188 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_init_rxdma_channels()
258 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_uninit_rxdma_channels()
330 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_rxdma_regs_dump_channels()
1218 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_rxdma_hw_mode()
1310 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_fixup_rxdma_rings()
1423 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_rxdma_get_rbr_ring()
1466 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_rxdma_get_rcr_ring()
4706 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_rx_port_fatal_err_recover()
H A Dnxge_intr.c717 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_hio_intr_uninit()
H A Dnxge_kstats.c2109 int8_t set[NXGE_MAX_RDCS]; in nxge_m_rx_stat()
2118 for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) { in nxge_m_rx_stat()
H A Dnxge_ndd.c1058 for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) { in nxge_param_get_rxdma_info()
H A Dnxge_main.c2263 rdc_max = NXGE_MAX_RDCS; in nxge_alloc_rx_mem_pool()
2536 int rdc_max = NXGE_MAX_RDCS; in nxge_free_rx_mem_pool()