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Searched refs:MDIO_AN_REG_CTRL (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h418 #define MDIO_AN_REG_CTRL 0x0000 macro
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4267 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); in elink_warpcore_set_10G_XFI()
4384 MDIO_AN_REG_CTRL, 0); in elink_warpcore_set_20G_force_KR2()
4588 {MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0}, in elink_warpcore_clear_regs()
8058 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x0000); in elink_807x_force_10G()
8259 elink_cl45_write(cb, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8073_config_init()
9930 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8706_config_init()
10086 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); in elink_8726_config_init()
10888 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, in elink_848xx_cmn_config_init()
11492 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x0000); in elink_8481_link_reset()
12345 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, &val); in elink_7101_config_init()
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