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Searched refs:MCHBAR_MIRROR_BASE_SNB (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h1480 #define MCHBAR_MIRROR_BASE_SNB 0x140000 macro
1503 #define MAD_DIMM_C0 (MCHBAR_MIRROR_BASE_SNB + 0x5004)
1504 #define MAD_DIMM_C1 (MCHBAR_MIRROR_BASE_SNB + 0x5008)
1505 #define MAD_DIMM_C2 (MCHBAR_MIRROR_BASE_SNB + 0x500C)
1525 #define MCH_SSKPD (MCHBAR_MIRROR_BASE_SNB + 0x5d10)
3258 #define SNB_LATENCY(shift) (I915_READ(MCHBAR_MIRROR_BASE_SNB + SSKPD) >> (shift) & SSKPD_WM_MASK)
H A Dintel_pm.c3387 min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK); in gen6_update_ring_freq()